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16#include <linux/stddef.h>
17#include <linux/kernel.h>
18#include <linux/delay.h>
19#include <linux/interrupt.h>
20#include <linux/seq_file.h>
21#include <linux/time.h>
22#include <linux/of.h>
23
24#include <asm/machdep.h>
25#include <asm/prom.h>
26#include <asm/time.h>
27
28#include <mm/mmu_decl.h>
29
30#include <sysdev/mv64x60.h>
31
32#define MV64x60_MPP_CNTL_0 0x0000
33#define MV64x60_MPP_CNTL_2 0x0008
34
35#define MV64x60_GPP_IO_CNTL 0x0000
36#define MV64x60_GPP_LEVEL_CNTL 0x0010
37#define MV64x60_GPP_VALUE_SET 0x0018
38
39static void __iomem *mv64x60_mpp_reg_base;
40static void __iomem *mv64x60_gpp_reg_base;
41
42static void __init c2k_setup_arch(void)
43{
44 struct device_node *np;
45 phys_addr_t paddr;
46 const unsigned int *reg;
47
48
49
50
51
52 np = of_find_compatible_node(NULL, NULL, "marvell,mv64360-mpp");
53 reg = of_get_property(np, "reg", NULL);
54 paddr = of_translate_address(np, reg);
55 of_node_put(np);
56 mv64x60_mpp_reg_base = ioremap(paddr, reg[1]);
57
58 np = of_find_compatible_node(NULL, NULL, "marvell,mv64360-gpp");
59 reg = of_get_property(np, "reg", NULL);
60 paddr = of_translate_address(np, reg);
61 of_node_put(np);
62 mv64x60_gpp_reg_base = ioremap(paddr, reg[1]);
63
64#ifdef CONFIG_PCI
65 mv64x60_pci_init();
66#endif
67}
68
69static void c2k_reset_board(void)
70{
71 u32 temp;
72
73 local_irq_disable();
74
75 temp = in_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_0);
76 temp &= 0xFFFF0FFF;
77 out_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_0, temp);
78
79 temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL);
80 temp |= 0x00000004;
81 out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL, temp);
82
83 temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL);
84 temp |= 0x00000004;
85 out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL, temp);
86
87 temp = in_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_2);
88 temp &= 0xFFFF0FFF;
89 out_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_2, temp);
90
91 temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL);
92 temp |= 0x00080000;
93 out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL, temp);
94
95 temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL);
96 temp |= 0x00080000;
97 out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL, temp);
98
99 out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_VALUE_SET, 0x00080004);
100}
101
102static void __noreturn c2k_restart(char *cmd)
103{
104 c2k_reset_board();
105 msleep(100);
106 panic("restart failed\n");
107}
108
109#ifdef CONFIG_NOT_COHERENT_CACHE
110#define COHERENCY_SETTING "off"
111#else
112#define COHERENCY_SETTING "on"
113#endif
114
115void c2k_show_cpuinfo(struct seq_file *m)
116{
117 seq_printf(m, "Vendor\t\t: GEFanuc\n");
118 seq_printf(m, "coherency\t: %s\n", COHERENCY_SETTING);
119}
120
121
122
123
124static int __init c2k_probe(void)
125{
126 if (!of_machine_is_compatible("GEFanuc,C2K"))
127 return 0;
128
129 printk(KERN_INFO "Detected a GEFanuc C2K board\n");
130
131 _set_L2CR(0);
132 _set_L2CR(L2CR_L2E | L2CR_L2PE | L2CR_L2I);
133
134 mv64x60_init_early();
135
136 return 1;
137}
138
139define_machine(c2k) {
140 .name = "C2K",
141 .probe = c2k_probe,
142 .setup_arch = c2k_setup_arch,
143 .show_cpuinfo = c2k_show_cpuinfo,
144 .init_IRQ = mv64x60_init_irq,
145 .get_irq = mv64x60_get_irq,
146 .restart = c2k_restart,
147 .calibrate_decr = generic_calibrate_decr,
148};
149