linux/drivers/clk/clk-mux.c
<<
>>
Prefs
   1/*
   2 * Copyright (C) 2011 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
   3 * Copyright (C) 2011 Richard Zhao, Linaro <richard.zhao@linaro.org>
   4 * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
   5 *
   6 * This program is free software; you can redistribute it and/or modify
   7 * it under the terms of the GNU General Public License version 2 as
   8 * published by the Free Software Foundation.
   9 *
  10 * Simple multiplexer clock implementation
  11 */
  12
  13#include <linux/clk-provider.h>
  14#include <linux/module.h>
  15#include <linux/slab.h>
  16#include <linux/io.h>
  17#include <linux/err.h>
  18
  19/*
  20 * DOC: basic adjustable multiplexer clock that cannot gate
  21 *
  22 * Traits of this clock:
  23 * prepare - clk_prepare only ensures that parents are prepared
  24 * enable - clk_enable only ensures that parents are enabled
  25 * rate - rate is only affected by parent switching.  No clk_set_rate support
  26 * parent - parent is adjustable through clk_set_parent
  27 */
  28
  29int clk_mux_val_to_index(struct clk_hw *hw, u32 *table, unsigned int flags,
  30                         unsigned int val)
  31{
  32        int num_parents = clk_hw_get_num_parents(hw);
  33
  34        if (table) {
  35                int i;
  36
  37                for (i = 0; i < num_parents; i++)
  38                        if (table[i] == val)
  39                                return i;
  40                return -EINVAL;
  41        }
  42
  43        if (val && (flags & CLK_MUX_INDEX_BIT))
  44                val = ffs(val) - 1;
  45
  46        if (val && (flags & CLK_MUX_INDEX_ONE))
  47                val--;
  48
  49        if (val >= num_parents)
  50                return -EINVAL;
  51
  52        return val;
  53}
  54EXPORT_SYMBOL_GPL(clk_mux_val_to_index);
  55
  56unsigned int clk_mux_index_to_val(u32 *table, unsigned int flags, u8 index)
  57{
  58        unsigned int val = index;
  59
  60        if (table) {
  61                val = table[index];
  62        } else {
  63                if (flags & CLK_MUX_INDEX_BIT)
  64                        val = 1 << index;
  65
  66                if (flags & CLK_MUX_INDEX_ONE)
  67                        val++;
  68        }
  69
  70        return val;
  71}
  72EXPORT_SYMBOL_GPL(clk_mux_index_to_val);
  73
  74static u8 clk_mux_get_parent(struct clk_hw *hw)
  75{
  76        struct clk_mux *mux = to_clk_mux(hw);
  77        u32 val;
  78
  79        val = clk_readl(mux->reg) >> mux->shift;
  80        val &= mux->mask;
  81
  82        return clk_mux_val_to_index(hw, mux->table, mux->flags, val);
  83}
  84
  85static int clk_mux_set_parent(struct clk_hw *hw, u8 index)
  86{
  87        struct clk_mux *mux = to_clk_mux(hw);
  88        u32 val = clk_mux_index_to_val(mux->table, mux->flags, index);
  89        unsigned long flags = 0;
  90        u32 reg;
  91
  92        if (mux->lock)
  93                spin_lock_irqsave(mux->lock, flags);
  94        else
  95                __acquire(mux->lock);
  96
  97        if (mux->flags & CLK_MUX_HIWORD_MASK) {
  98                reg = mux->mask << (mux->shift + 16);
  99        } else {
 100                reg = clk_readl(mux->reg);
 101                reg &= ~(mux->mask << mux->shift);
 102        }
 103        val = val << mux->shift;
 104        reg |= val;
 105        clk_writel(reg, mux->reg);
 106
 107        if (mux->lock)
 108                spin_unlock_irqrestore(mux->lock, flags);
 109        else
 110                __release(mux->lock);
 111
 112        return 0;
 113}
 114
 115static int clk_mux_determine_rate(struct clk_hw *hw,
 116                                  struct clk_rate_request *req)
 117{
 118        struct clk_mux *mux = to_clk_mux(hw);
 119
 120        return clk_mux_determine_rate_flags(hw, req, mux->flags);
 121}
 122
 123const struct clk_ops clk_mux_ops = {
 124        .get_parent = clk_mux_get_parent,
 125        .set_parent = clk_mux_set_parent,
 126        .determine_rate = clk_mux_determine_rate,
 127};
 128EXPORT_SYMBOL_GPL(clk_mux_ops);
 129
 130const struct clk_ops clk_mux_ro_ops = {
 131        .get_parent = clk_mux_get_parent,
 132};
 133EXPORT_SYMBOL_GPL(clk_mux_ro_ops);
 134
 135struct clk_hw *clk_hw_register_mux_table(struct device *dev, const char *name,
 136                const char * const *parent_names, u8 num_parents,
 137                unsigned long flags,
 138                void __iomem *reg, u8 shift, u32 mask,
 139                u8 clk_mux_flags, u32 *table, spinlock_t *lock)
 140{
 141        struct clk_mux *mux;
 142        struct clk_hw *hw;
 143        struct clk_init_data init;
 144        u8 width = 0;
 145        int ret;
 146
 147        if (clk_mux_flags & CLK_MUX_HIWORD_MASK) {
 148                width = fls(mask) - ffs(mask) + 1;
 149                if (width + shift > 16) {
 150                        pr_err("mux value exceeds LOWORD field\n");
 151                        return ERR_PTR(-EINVAL);
 152                }
 153        }
 154
 155        /* allocate the mux */
 156        mux = kzalloc(sizeof(*mux), GFP_KERNEL);
 157        if (!mux)
 158                return ERR_PTR(-ENOMEM);
 159
 160        init.name = name;
 161        if (clk_mux_flags & CLK_MUX_READ_ONLY)
 162                init.ops = &clk_mux_ro_ops;
 163        else
 164                init.ops = &clk_mux_ops;
 165        init.flags = flags | CLK_IS_BASIC;
 166        init.parent_names = parent_names;
 167        init.num_parents = num_parents;
 168
 169        /* struct clk_mux assignments */
 170        mux->reg = reg;
 171        mux->shift = shift;
 172        mux->mask = mask;
 173        mux->flags = clk_mux_flags;
 174        mux->lock = lock;
 175        mux->table = table;
 176        mux->hw.init = &init;
 177
 178        hw = &mux->hw;
 179        ret = clk_hw_register(dev, hw);
 180        if (ret) {
 181                kfree(mux);
 182                hw = ERR_PTR(ret);
 183        }
 184
 185        return hw;
 186}
 187EXPORT_SYMBOL_GPL(clk_hw_register_mux_table);
 188
 189struct clk *clk_register_mux_table(struct device *dev, const char *name,
 190                const char * const *parent_names, u8 num_parents,
 191                unsigned long flags,
 192                void __iomem *reg, u8 shift, u32 mask,
 193                u8 clk_mux_flags, u32 *table, spinlock_t *lock)
 194{
 195        struct clk_hw *hw;
 196
 197        hw = clk_hw_register_mux_table(dev, name, parent_names, num_parents,
 198                                       flags, reg, shift, mask, clk_mux_flags,
 199                                       table, lock);
 200        if (IS_ERR(hw))
 201                return ERR_CAST(hw);
 202        return hw->clk;
 203}
 204EXPORT_SYMBOL_GPL(clk_register_mux_table);
 205
 206struct clk *clk_register_mux(struct device *dev, const char *name,
 207                const char * const *parent_names, u8 num_parents,
 208                unsigned long flags,
 209                void __iomem *reg, u8 shift, u8 width,
 210                u8 clk_mux_flags, spinlock_t *lock)
 211{
 212        u32 mask = BIT(width) - 1;
 213
 214        return clk_register_mux_table(dev, name, parent_names, num_parents,
 215                                      flags, reg, shift, mask, clk_mux_flags,
 216                                      NULL, lock);
 217}
 218EXPORT_SYMBOL_GPL(clk_register_mux);
 219
 220struct clk_hw *clk_hw_register_mux(struct device *dev, const char *name,
 221                const char * const *parent_names, u8 num_parents,
 222                unsigned long flags,
 223                void __iomem *reg, u8 shift, u8 width,
 224                u8 clk_mux_flags, spinlock_t *lock)
 225{
 226        u32 mask = BIT(width) - 1;
 227
 228        return clk_hw_register_mux_table(dev, name, parent_names, num_parents,
 229                                      flags, reg, shift, mask, clk_mux_flags,
 230                                      NULL, lock);
 231}
 232EXPORT_SYMBOL_GPL(clk_hw_register_mux);
 233
 234void clk_unregister_mux(struct clk *clk)
 235{
 236        struct clk_mux *mux;
 237        struct clk_hw *hw;
 238
 239        hw = __clk_get_hw(clk);
 240        if (!hw)
 241                return;
 242
 243        mux = to_clk_mux(hw);
 244
 245        clk_unregister(clk);
 246        kfree(mux);
 247}
 248EXPORT_SYMBOL_GPL(clk_unregister_mux);
 249
 250void clk_hw_unregister_mux(struct clk_hw *hw)
 251{
 252        struct clk_mux *mux;
 253
 254        mux = to_clk_mux(hw);
 255
 256        clk_hw_unregister(hw);
 257        kfree(mux);
 258}
 259EXPORT_SYMBOL_GPL(clk_hw_unregister_mux);
 260