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23#ifndef _SMU_HELPER_H_
24#define _SMU_HELPER_H_
25
26struct pp_atomctrl_voltage_table;
27struct pp_hwmgr;
28struct phm_ppt_v1_voltage_lookup_table;
29
30uint8_t convert_to_vid(uint16_t vddc);
31uint16_t convert_to_vddc(uint8_t vid);
32
33extern int phm_wait_for_register_unequal(struct pp_hwmgr *hwmgr,
34 uint32_t index,
35 uint32_t value, uint32_t mask);
36extern int phm_wait_for_indirect_register_unequal(
37 struct pp_hwmgr *hwmgr,
38 uint32_t indirect_port, uint32_t index,
39 uint32_t value, uint32_t mask);
40
41
42extern bool phm_cf_want_uvd_power_gating(struct pp_hwmgr *hwmgr);
43extern bool phm_cf_want_vce_power_gating(struct pp_hwmgr *hwmgr);
44extern bool phm_cf_want_microcode_fan_ctrl(struct pp_hwmgr *hwmgr);
45
46extern int phm_trim_voltage_table(struct pp_atomctrl_voltage_table *vol_table);
47extern int phm_get_svi2_mvdd_voltage_table(struct pp_atomctrl_voltage_table *vol_table, phm_ppt_v1_clock_voltage_dependency_table *dep_table);
48extern int phm_get_svi2_vddci_voltage_table(struct pp_atomctrl_voltage_table *vol_table, phm_ppt_v1_clock_voltage_dependency_table *dep_table);
49extern int phm_get_svi2_vdd_voltage_table(struct pp_atomctrl_voltage_table *vol_table, phm_ppt_v1_voltage_lookup_table *lookup_table);
50extern void phm_trim_voltage_table_to_fit_state_table(uint32_t max_vol_steps, struct pp_atomctrl_voltage_table *vol_table);
51extern int phm_reset_single_dpm_table(void *table, uint32_t count, int max);
52extern void phm_setup_pcie_table_entry(void *table, uint32_t index, uint32_t pcie_gen, uint32_t pcie_lanes);
53extern int32_t phm_get_dpm_level_enable_mask_value(void *table);
54extern uint8_t phm_get_voltage_id(struct pp_atomctrl_voltage_table *voltage_table,
55 uint32_t voltage);
56extern uint8_t phm_get_voltage_index(struct phm_ppt_v1_voltage_lookup_table *lookup_table, uint16_t voltage);
57extern uint16_t phm_find_closest_vddci(struct pp_atomctrl_voltage_table *vddci_table, uint16_t vddci);
58extern int phm_find_boot_level(void *table, uint32_t value, uint32_t *boot_level);
59extern int phm_get_sclk_for_voltage_evv(struct pp_hwmgr *hwmgr, phm_ppt_v1_voltage_lookup_table *lookup_table,
60 uint16_t virtual_voltage_id, int32_t *sclk);
61extern int phm_initializa_dynamic_state_adjustment_rule_settings(struct pp_hwmgr *hwmgr);
62extern uint32_t phm_get_lowest_enabled_level(struct pp_hwmgr *hwmgr, uint32_t mask);
63extern void phm_apply_dal_min_voltage_request(struct pp_hwmgr *hwmgr);
64
65extern int phm_get_voltage_evv_on_sclk(struct pp_hwmgr *hwmgr, uint8_t voltage_type,
66 uint32_t sclk, uint16_t id, uint16_t *voltage);
67
68extern uint32_t phm_set_field_to_u32(u32 offset, u32 original_data, u32 field, u32 size);
69
70extern int phm_wait_on_register(struct pp_hwmgr *hwmgr, uint32_t index,
71 uint32_t value, uint32_t mask);
72
73extern int phm_wait_on_indirect_register(struct pp_hwmgr *hwmgr,
74 uint32_t indirect_port,
75 uint32_t index,
76 uint32_t value,
77 uint32_t mask);
78
79int phm_irq_process(struct amdgpu_device *adev,
80 struct amdgpu_irq_src *source,
81 struct amdgpu_iv_entry *entry);
82
83int smu9_register_irq_handlers(struct pp_hwmgr *hwmgr);
84
85#define PHM_FIELD_SHIFT(reg, field) reg##__##field##__SHIFT
86#define PHM_FIELD_MASK(reg, field) reg##__##field##_MASK
87
88#define PHM_SET_FIELD(origval, reg, field, fieldval) \
89 (((origval) & ~PHM_FIELD_MASK(reg, field)) | \
90 (PHM_FIELD_MASK(reg, field) & ((fieldval) << PHM_FIELD_SHIFT(reg, field))))
91
92#define PHM_GET_FIELD(value, reg, field) \
93 (((value) & PHM_FIELD_MASK(reg, field)) >> \
94 PHM_FIELD_SHIFT(reg, field))
95
96
97
98
99#define PHM_READ_FIELD(device, reg, field) \
100 PHM_GET_FIELD(cgs_read_register(device, mm##reg), reg, field)
101
102#define PHM_READ_INDIRECT_FIELD(device, port, reg, field) \
103 PHM_GET_FIELD(cgs_read_ind_register(device, port, ix##reg), \
104 reg, field)
105
106#define PHM_READ_VFPF_INDIRECT_FIELD(device, port, reg, field) \
107 PHM_GET_FIELD(cgs_read_ind_register(device, port, ix##reg), \
108 reg, field)
109
110#define PHM_WRITE_FIELD(device, reg, field, fieldval) \
111 cgs_write_register(device, mm##reg, PHM_SET_FIELD( \
112 cgs_read_register(device, mm##reg), reg, field, fieldval))
113
114#define PHM_WRITE_INDIRECT_FIELD(device, port, reg, field, fieldval) \
115 cgs_write_ind_register(device, port, ix##reg, \
116 PHM_SET_FIELD(cgs_read_ind_register(device, port, ix##reg), \
117 reg, field, fieldval))
118
119#define PHM_WRITE_VFPF_INDIRECT_FIELD(device, port, reg, field, fieldval) \
120 cgs_write_ind_register(device, port, ix##reg, \
121 PHM_SET_FIELD(cgs_read_ind_register(device, port, ix##reg), \
122 reg, field, fieldval))
123
124#define PHM_WAIT_INDIRECT_REGISTER_GIVEN_INDEX(hwmgr, port, index, value, mask) \
125 phm_wait_on_indirect_register(hwmgr, mm##port##_INDEX, index, value, mask)
126
127
128#define PHM_WAIT_INDIRECT_REGISTER(hwmgr, port, reg, value, mask) \
129 PHM_WAIT_INDIRECT_REGISTER_GIVEN_INDEX(hwmgr, port, ix##reg, value, mask)
130
131#define PHM_WAIT_INDIRECT_FIELD(hwmgr, port, reg, field, fieldval) \
132 PHM_WAIT_INDIRECT_REGISTER(hwmgr, port, reg, (fieldval) \
133 << PHM_FIELD_SHIFT(reg, field), PHM_FIELD_MASK(reg, field))
134
135#define PHM_WAIT_INDIRECT_REGISTER_UNEQUAL_GIVEN_INDEX(hwmgr, port, index, value, mask) \
136 phm_wait_for_indirect_register_unequal(hwmgr, \
137 mm##port##_INDEX, index, value, mask)
138
139#define PHM_WAIT_INDIRECT_REGISTER_UNEQUAL(hwmgr, port, reg, value, mask) \
140 PHM_WAIT_INDIRECT_REGISTER_UNEQUAL_GIVEN_INDEX(hwmgr, port, ix##reg, value, mask)
141
142#define PHM_WAIT_INDIRECT_FIELD_UNEQUAL(hwmgr, port, reg, field, fieldval) \
143 PHM_WAIT_INDIRECT_REGISTER_UNEQUAL(hwmgr, port, reg, \
144 (fieldval) << PHM_FIELD_SHIFT(reg, field), \
145 PHM_FIELD_MASK(reg, field) )
146
147
148#define PHM_WAIT_VFPF_INDIRECT_REGISTER_UNEQUAL_GIVEN_INDEX(hwmgr, \
149 port, index, value, mask) \
150 phm_wait_for_indirect_register_unequal(hwmgr, \
151 mm##port##_INDEX_11, index, value, mask)
152
153#define PHM_WAIT_VFPF_INDIRECT_REGISTER_UNEQUAL(hwmgr, port, reg, value, mask) \
154 PHM_WAIT_VFPF_INDIRECT_REGISTER_UNEQUAL_GIVEN_INDEX(hwmgr, port, ix##reg, value, mask)
155
156#define PHM_WAIT_VFPF_INDIRECT_FIELD_UNEQUAL(hwmgr, port, reg, field, fieldval) \
157 PHM_WAIT_VFPF_INDIRECT_REGISTER_UNEQUAL(hwmgr, port, reg, \
158 (fieldval) << PHM_FIELD_SHIFT(reg, field), \
159 PHM_FIELD_MASK(reg, field))
160
161
162#define PHM_WAIT_VFPF_INDIRECT_REGISTER_GIVEN_INDEX(hwmgr, \
163 port, index, value, mask) \
164 phm_wait_on_indirect_register(hwmgr, \
165 mm##port##_INDEX_11, index, value, mask)
166
167#define PHM_WAIT_VFPF_INDIRECT_REGISTER(hwmgr, port, reg, value, mask) \
168 PHM_WAIT_VFPF_INDIRECT_REGISTER_GIVEN_INDEX(hwmgr, port, ix##reg, value, mask)
169
170#define PHM_WAIT_VFPF_INDIRECT_FIELD(hwmgr, port, reg, field, fieldval) \
171 PHM_WAIT_VFPF_INDIRECT_REGISTER(hwmgr, port, reg, \
172 (fieldval) << PHM_FIELD_SHIFT(reg, field), \
173 PHM_FIELD_MASK(reg, field))
174
175#define PHM_WAIT_REGISTER_UNEQUAL_GIVEN_INDEX(hwmgr, \
176 index, value, mask) \
177 phm_wait_for_register_unequal(hwmgr, \
178 index, value, mask)
179
180#define PHM_WAIT_REGISTER_UNEQUAL(hwmgr, reg, value, mask) \
181 PHM_WAIT_REGISTER_UNEQUAL_GIVEN_INDEX(hwmgr, \
182 mm##reg, value, mask)
183
184#define PHM_WAIT_FIELD_UNEQUAL(hwmgr, reg, field, fieldval) \
185 PHM_WAIT_REGISTER_UNEQUAL(hwmgr, reg, \
186 (fieldval) << PHM_FIELD_SHIFT(reg, field), \
187 PHM_FIELD_MASK(reg, field))
188
189#endif
190