linux/drivers/iio/adc/qcom-pm8xxx-xoadc.c
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   1/*
   2 * Qualcomm PM8xxx PMIC XOADC driver
   3 *
   4 * These ADCs are known as HK/XO (house keeping / chrystal oscillator)
   5 * "XO" in "XOADC" means Chrystal Oscillator. It's a bunch of
   6 * specific-purpose and general purpose ADC converters and channels.
   7 *
   8 * Copyright (C) 2017 Linaro Ltd.
   9 * Author: Linus Walleij <linus.walleij@linaro.org>
  10 */
  11
  12#include <linux/iio/iio.h>
  13#include <linux/iio/sysfs.h>
  14#include <linux/module.h>
  15#include <linux/of.h>
  16#include <linux/of_device.h>
  17#include <linux/platform_device.h>
  18#include <linux/regmap.h>
  19#include <linux/init.h>
  20#include <linux/interrupt.h>
  21#include <linux/regulator/consumer.h>
  22
  23#include "qcom-vadc-common.h"
  24
  25/*
  26 * Definitions for the "user processor" registers lifted from the v3.4
  27 * Qualcomm tree. Their kernel has two out-of-tree drivers for the ADC:
  28 * drivers/misc/pmic8058-xoadc.c
  29 * drivers/hwmon/pm8xxx-adc.c
  30 * None of them contain any complete register specification, so this is
  31 * a best effort of combining the information.
  32 */
  33
  34/* These appear to be "battery monitor" registers */
  35#define ADC_ARB_BTM_CNTRL1                      0x17e
  36#define ADC_ARB_BTM_CNTRL1_EN_BTM               BIT(0)
  37#define ADC_ARB_BTM_CNTRL1_SEL_OP_MODE          BIT(1)
  38#define ADC_ARB_BTM_CNTRL1_MEAS_INTERVAL1       BIT(2)
  39#define ADC_ARB_BTM_CNTRL1_MEAS_INTERVAL2       BIT(3)
  40#define ADC_ARB_BTM_CNTRL1_MEAS_INTERVAL3       BIT(4)
  41#define ADC_ARB_BTM_CNTRL1_MEAS_INTERVAL4       BIT(5)
  42#define ADC_ARB_BTM_CNTRL1_EOC                  BIT(6)
  43#define ADC_ARB_BTM_CNTRL1_REQ                  BIT(7)
  44
  45#define ADC_ARB_BTM_AMUX_CNTRL                  0x17f
  46#define ADC_ARB_BTM_ANA_PARAM                   0x180
  47#define ADC_ARB_BTM_DIG_PARAM                   0x181
  48#define ADC_ARB_BTM_RSV                         0x182
  49#define ADC_ARB_BTM_DATA1                       0x183
  50#define ADC_ARB_BTM_DATA0                       0x184
  51#define ADC_ARB_BTM_BAT_COOL_THR1               0x185
  52#define ADC_ARB_BTM_BAT_COOL_THR0               0x186
  53#define ADC_ARB_BTM_BAT_WARM_THR1               0x187
  54#define ADC_ARB_BTM_BAT_WARM_THR0               0x188
  55#define ADC_ARB_BTM_CNTRL2                      0x18c
  56
  57/* Proper ADC registers */
  58
  59#define ADC_ARB_USRP_CNTRL                      0x197
  60#define ADC_ARB_USRP_CNTRL_EN_ARB               BIT(0)
  61#define ADC_ARB_USRP_CNTRL_RSV1                 BIT(1)
  62#define ADC_ARB_USRP_CNTRL_RSV2                 BIT(2)
  63#define ADC_ARB_USRP_CNTRL_RSV3                 BIT(3)
  64#define ADC_ARB_USRP_CNTRL_RSV4                 BIT(4)
  65#define ADC_ARB_USRP_CNTRL_RSV5                 BIT(5)
  66#define ADC_ARB_USRP_CNTRL_EOC                  BIT(6)
  67#define ADC_ARB_USRP_CNTRL_REQ                  BIT(7)
  68
  69#define ADC_ARB_USRP_AMUX_CNTRL                 0x198
  70/*
  71 * The channel mask includes the bits selecting channel mux and prescaler
  72 * on PM8058, or channel mux and premux on PM8921.
  73 */
  74#define ADC_ARB_USRP_AMUX_CNTRL_CHAN_MASK       0xfc
  75#define ADC_ARB_USRP_AMUX_CNTRL_RSV0            BIT(0)
  76#define ADC_ARB_USRP_AMUX_CNTRL_RSV1            BIT(1)
  77/* On PM8058 this is prescaling, on PM8921 this is premux */
  78#define ADC_ARB_USRP_AMUX_CNTRL_PRESCALEMUX0    BIT(2)
  79#define ADC_ARB_USRP_AMUX_CNTRL_PRESCALEMUX1    BIT(3)
  80#define ADC_ARB_USRP_AMUX_CNTRL_SEL0            BIT(4)
  81#define ADC_ARB_USRP_AMUX_CNTRL_SEL1            BIT(5)
  82#define ADC_ARB_USRP_AMUX_CNTRL_SEL2            BIT(6)
  83#define ADC_ARB_USRP_AMUX_CNTRL_SEL3            BIT(7)
  84#define ADC_AMUX_PREMUX_SHIFT                   2
  85#define ADC_AMUX_SEL_SHIFT                      4
  86
  87/* We know very little about the bits in this register */
  88#define ADC_ARB_USRP_ANA_PARAM                  0x199
  89#define ADC_ARB_USRP_ANA_PARAM_DIS              0xFE
  90#define ADC_ARB_USRP_ANA_PARAM_EN               0xFF
  91
  92#define ADC_ARB_USRP_DIG_PARAM                  0x19A
  93#define ADC_ARB_USRP_DIG_PARAM_SEL_SHIFT0       BIT(0)
  94#define ADC_ARB_USRP_DIG_PARAM_SEL_SHIFT1       BIT(1)
  95#define ADC_ARB_USRP_DIG_PARAM_CLK_RATE0        BIT(2)
  96#define ADC_ARB_USRP_DIG_PARAM_CLK_RATE1        BIT(3)
  97#define ADC_ARB_USRP_DIG_PARAM_EOC              BIT(4)
  98/*
  99 * On a later ADC the decimation factors are defined as
 100 * 00 = 512, 01 = 1024, 10 = 2048, 11 = 4096 so assume this
 101 * holds also for this older XOADC.
 102 */
 103#define ADC_ARB_USRP_DIG_PARAM_DEC_RATE0        BIT(5)
 104#define ADC_ARB_USRP_DIG_PARAM_DEC_RATE1        BIT(6)
 105#define ADC_ARB_USRP_DIG_PARAM_EN               BIT(7)
 106#define ADC_DIG_PARAM_DEC_SHIFT                 5
 107
 108#define ADC_ARB_USRP_RSV                        0x19B
 109#define ADC_ARB_USRP_RSV_RST                    BIT(0)
 110#define ADC_ARB_USRP_RSV_DTEST0                 BIT(1)
 111#define ADC_ARB_USRP_RSV_DTEST1                 BIT(2)
 112#define ADC_ARB_USRP_RSV_OP                     BIT(3)
 113#define ADC_ARB_USRP_RSV_IP_SEL0                BIT(4)
 114#define ADC_ARB_USRP_RSV_IP_SEL1                BIT(5)
 115#define ADC_ARB_USRP_RSV_IP_SEL2                BIT(6)
 116#define ADC_ARB_USRP_RSV_TRM                    BIT(7)
 117#define ADC_RSV_IP_SEL_SHIFT                    4
 118
 119#define ADC_ARB_USRP_DATA0                      0x19D
 120#define ADC_ARB_USRP_DATA1                      0x19C
 121
 122/**
 123 * Physical channels which MUST exist on all PM variants in order to provide
 124 * proper reference points for calibration.
 125 *
 126 * @PM8XXX_CHANNEL_INTERNAL: 625mV reference channel
 127 * @PM8XXX_CHANNEL_125V: 1250mV reference channel
 128 * @PM8XXX_CHANNEL_INTERNAL_2: 325mV reference channel
 129 * @PM8XXX_CHANNEL_MUXOFF: channel to reduce input load on mux, apparently also
 130 * measures XO temperature
 131 */
 132#define PM8XXX_CHANNEL_INTERNAL         0x0c
 133#define PM8XXX_CHANNEL_125V             0x0d
 134#define PM8XXX_CHANNEL_INTERNAL_2       0x0e
 135#define PM8XXX_CHANNEL_MUXOFF           0x0f
 136
 137/*
 138 * PM8058 AMUX premux scaling, two bits. This is done of the channel before
 139 * reaching the AMUX.
 140 */
 141#define PM8058_AMUX_PRESCALE_0 0x0 /* No scaling on the signal */
 142#define PM8058_AMUX_PRESCALE_1 0x1 /* Unity scaling selected by the user */
 143#define PM8058_AMUX_PRESCALE_1_DIV3 0x2 /* 1/3 prescaler on the input */
 144
 145/* Defines reference voltage for the XOADC */
 146#define AMUX_RSV0 0x0 /* XO_IN/XOADC_GND, special selection to read XO temp */
 147#define AMUX_RSV1 0x1 /* PMIC_IN/XOADC_GND */
 148#define AMUX_RSV2 0x2 /* PMIC_IN/BMS_CSP */
 149#define AMUX_RSV3 0x3 /* not used */
 150#define AMUX_RSV4 0x4 /* XOADC_GND/XOADC_GND */
 151#define AMUX_RSV5 0x5 /* XOADC_VREF/XOADC_GND */
 152#define XOADC_RSV_MAX 5 /* 3 bits 0..7, 3 and 6,7 are invalid */
 153
 154/**
 155 * struct xoadc_channel - encodes channel properties and defaults
 156 * @datasheet_name: the hardwarename of this channel
 157 * @pre_scale_mux: prescale (PM8058) or premux (PM8921) for selecting
 158 * this channel. Both this and the amux channel is needed to uniquely
 159 * identify a channel. Values 0..3.
 160 * @amux_channel: value of the ADC_ARB_USRP_AMUX_CNTRL register for this
 161 * channel, bits 4..7, selects the amux, values 0..f
 162 * @prescale: the channels have hard-coded prescale ratios defined
 163 * by the hardware, this tells us what it is
 164 * @type: corresponding IIO channel type, usually IIO_VOLTAGE or
 165 * IIO_TEMP
 166 * @scale_fn_type: the liner interpolation etc to convert the
 167 * ADC code to the value that IIO expects, in uV or millicelsius
 168 * etc. This scale function can be pretty elaborate if different
 169 * thermistors are connected or other hardware characteristics are
 170 * deployed.
 171 * @amux_ip_rsv: ratiometric scale value used by the analog muxer: this
 172 * selects the reference voltage for ratiometric scaling
 173 */
 174struct xoadc_channel {
 175        const char *datasheet_name;
 176        u8 pre_scale_mux:2;
 177        u8 amux_channel:4;
 178        const struct vadc_prescale_ratio prescale;
 179        enum iio_chan_type type;
 180        enum vadc_scale_fn_type scale_fn_type;
 181        u8 amux_ip_rsv:3;
 182};
 183
 184/**
 185 * struct xoadc_variant - encodes the XOADC variant characteristics
 186 * @name: name of this PMIC variant
 187 * @channels: the hardware channels and respective settings and defaults
 188 * @broken_ratiometric: if the PMIC has broken ratiometric scaling (this
 189 * is a known problem on PM8058)
 190 * @prescaling: this variant uses AMUX bits 2 & 3 for prescaling (PM8058)
 191 * @second_level_mux: this variant uses AMUX bits 2 & 3 for a second level
 192 * mux
 193 */
 194struct xoadc_variant {
 195        const char name[16];
 196        const struct xoadc_channel *channels;
 197        bool broken_ratiometric;
 198        bool prescaling;
 199        bool second_level_mux;
 200};
 201
 202/*
 203 * XOADC_CHAN macro parameters:
 204 * _dname: the name of the channel
 205 * _presmux: prescaler (PM8058) or premux (PM8921) setting for this channel
 206 * _amux: the value in bits 2..7 of the ADC_ARB_USRP_AMUX_CNTRL register
 207 * for this channel. On some PMICs some of the bits select a prescaler, and
 208 * on some PMICs some of the bits select various complex multiplex settings.
 209 * _type: IIO channel type
 210 * _prenum: prescaler numerator (dividend)
 211 * _preden: prescaler denominator (divisor)
 212 * _scale: scaling function type, this selects how the raw valued is mangled
 213 * to output the actual processed measurement
 214 * _amip: analog mux input parent when using ratiometric measurements
 215 */
 216#define XOADC_CHAN(_dname, _presmux, _amux, _type, _prenum, _preden, _scale, _amip) \
 217        {                                                               \
 218                .datasheet_name = __stringify(_dname),                  \
 219                .pre_scale_mux = _presmux,                              \
 220                .amux_channel = _amux,                                  \
 221                .prescale = { .num = _prenum, .den = _preden },         \
 222                .type = _type,                                          \
 223                .scale_fn_type = _scale,                                \
 224                .amux_ip_rsv = _amip,                                   \
 225        }
 226
 227/*
 228 * Taken from arch/arm/mach-msm/board-9615.c in the vendor tree:
 229 * TODO: incomplete, needs testing.
 230 */
 231static const struct xoadc_channel pm8018_xoadc_channels[] = {
 232        XOADC_CHAN(VCOIN, 0x00, 0x00, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
 233        XOADC_CHAN(VBAT, 0x00, 0x01, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
 234        XOADC_CHAN(VPH_PWR, 0x00, 0x02, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
 235        XOADC_CHAN(DIE_TEMP, 0x00, 0x0b, IIO_TEMP, 1, 1, SCALE_PMIC_THERM, AMUX_RSV1),
 236        /* Used for battery ID or battery temperature */
 237        XOADC_CHAN(AMUX8, 0x00, 0x08, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV2),
 238        XOADC_CHAN(INTERNAL, 0x00, 0x0c, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
 239        XOADC_CHAN(125V, 0x00, 0x0d, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
 240        XOADC_CHAN(MUXOFF, 0x00, 0x0f, IIO_TEMP, 1, 1, SCALE_XOTHERM, AMUX_RSV0),
 241        { }, /* Sentinel */
 242};
 243
 244/*
 245 * Taken from arch/arm/mach-msm/board-8930-pmic.c in the vendor tree:
 246 * TODO: needs testing.
 247 */
 248static const struct xoadc_channel pm8038_xoadc_channels[] = {
 249        XOADC_CHAN(VCOIN, 0x00, 0x00, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
 250        XOADC_CHAN(VBAT, 0x00, 0x01, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
 251        XOADC_CHAN(DCIN, 0x00, 0x02, IIO_VOLTAGE, 1, 6, SCALE_DEFAULT, AMUX_RSV1),
 252        XOADC_CHAN(ICHG, 0x00, 0x03, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
 253        XOADC_CHAN(VPH_PWR, 0x00, 0x04, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
 254        XOADC_CHAN(AMUX5, 0x00, 0x05, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
 255        XOADC_CHAN(AMUX6, 0x00, 0x06, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
 256        XOADC_CHAN(AMUX7, 0x00, 0x07, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
 257        /* AMUX8 used for battery temperature in most cases */
 258        XOADC_CHAN(AMUX8, 0x00, 0x08, IIO_TEMP, 1, 1, SCALE_THERM_100K_PULLUP, AMUX_RSV2),
 259        XOADC_CHAN(AMUX9, 0x00, 0x09, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
 260        XOADC_CHAN(USB_VBUS, 0x00, 0x0a, IIO_VOLTAGE, 1, 4, SCALE_DEFAULT, AMUX_RSV1),
 261        XOADC_CHAN(DIE_TEMP, 0x00, 0x0b, IIO_TEMP, 1, 1, SCALE_PMIC_THERM, AMUX_RSV1),
 262        XOADC_CHAN(INTERNAL, 0x00, 0x0c, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
 263        XOADC_CHAN(125V, 0x00, 0x0d, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
 264        XOADC_CHAN(INTERNAL_2, 0x00, 0x0e, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
 265        XOADC_CHAN(MUXOFF, 0x00, 0x0f, IIO_TEMP, 1, 1, SCALE_XOTHERM, AMUX_RSV0),
 266        { }, /* Sentinel */
 267};
 268
 269/*
 270 * This was created by cross-referencing the vendor tree
 271 * arch/arm/mach-msm/board-msm8x60.c msm_adc_channels_data[]
 272 * with the "channel types" (first field) to find the right
 273 * configuration for these channels on an MSM8x60 i.e. PM8058
 274 * setup.
 275 */
 276static const struct xoadc_channel pm8058_xoadc_channels[] = {
 277        XOADC_CHAN(VCOIN, 0x00, 0x00, IIO_VOLTAGE, 1, 2, SCALE_DEFAULT, AMUX_RSV1),
 278        XOADC_CHAN(VBAT, 0x00, 0x01, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
 279        XOADC_CHAN(DCIN, 0x00, 0x02, IIO_VOLTAGE, 1, 10, SCALE_DEFAULT, AMUX_RSV1),
 280        XOADC_CHAN(ICHG, 0x00, 0x03, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
 281        XOADC_CHAN(VPH_PWR, 0x00, 0x04, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
 282        /*
 283         * AMUX channels 5 thru 9 are referred to as MPP5 thru MPP9 in
 284         * some code and documentation. But they are really just 5
 285         * channels just like any other. They are connected to a switching
 286         * matrix where they can be routed to any of the MPPs, not just
 287         * 1-to-1 onto MPP5 thru 9, so naming them MPP5 thru MPP9 is
 288         * very confusing.
 289         */
 290        XOADC_CHAN(AMUX5, 0x00, 0x05, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
 291        XOADC_CHAN(AMUX6, 0x00, 0x06, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
 292        XOADC_CHAN(AMUX7, 0x00, 0x07, IIO_VOLTAGE, 1, 2, SCALE_DEFAULT, AMUX_RSV1),
 293        XOADC_CHAN(AMUX8, 0x00, 0x08, IIO_VOLTAGE, 1, 2, SCALE_DEFAULT, AMUX_RSV1),
 294        XOADC_CHAN(AMUX9, 0x00, 0x09, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
 295        XOADC_CHAN(USB_VBUS, 0x00, 0x0a, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
 296        XOADC_CHAN(DIE_TEMP, 0x00, 0x0b, IIO_TEMP, 1, 1, SCALE_PMIC_THERM, AMUX_RSV1),
 297        XOADC_CHAN(INTERNAL, 0x00, 0x0c, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
 298        XOADC_CHAN(125V, 0x00, 0x0d, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
 299        XOADC_CHAN(INTERNAL_2, 0x00, 0x0e, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
 300        XOADC_CHAN(MUXOFF, 0x00, 0x0f, IIO_TEMP, 1, 1, SCALE_XOTHERM, AMUX_RSV0),
 301        /* There are also "unity" and divided by 3 channels (prescaler) but noone is using them */
 302        { }, /* Sentinel */
 303};
 304
 305/*
 306 * The PM8921 has some pre-muxing on its channels, this comes from the vendor tree
 307 * include/linux/mfd/pm8xxx/pm8xxx-adc.h
 308 * board-flo-pmic.c (Nexus 7) and board-8064-pmic.c
 309 */
 310static const struct xoadc_channel pm8921_xoadc_channels[] = {
 311        XOADC_CHAN(VCOIN, 0x00, 0x00, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
 312        XOADC_CHAN(VBAT, 0x00, 0x01, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
 313        XOADC_CHAN(DCIN, 0x00, 0x02, IIO_VOLTAGE, 1, 6, SCALE_DEFAULT, AMUX_RSV1),
 314        /* channel "ICHG" is reserved and not used on PM8921 */
 315        XOADC_CHAN(VPH_PWR, 0x00, 0x04, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
 316        XOADC_CHAN(IBAT, 0x00, 0x05, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
 317        /* CHAN 6 & 7 (MPP1 & MPP2) are reserved for MPP channels on PM8921 */
 318        XOADC_CHAN(BATT_THERM, 0x00, 0x08, IIO_TEMP, 1, 1, SCALE_THERM_100K_PULLUP, AMUX_RSV1),
 319        XOADC_CHAN(BATT_ID, 0x00, 0x09, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
 320        XOADC_CHAN(USB_VBUS, 0x00, 0x0a, IIO_VOLTAGE, 1, 4, SCALE_DEFAULT, AMUX_RSV1),
 321        XOADC_CHAN(DIE_TEMP, 0x00, 0x0b, IIO_TEMP, 1, 1, SCALE_PMIC_THERM, AMUX_RSV1),
 322        XOADC_CHAN(INTERNAL, 0x00, 0x0c, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
 323        XOADC_CHAN(125V, 0x00, 0x0d, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
 324        /* FIXME: look into the scaling of this temperature */
 325        XOADC_CHAN(CHG_TEMP, 0x00, 0x0e, IIO_TEMP, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
 326        XOADC_CHAN(MUXOFF, 0x00, 0x0f, IIO_TEMP, 1, 1, SCALE_XOTHERM, AMUX_RSV0),
 327        /* The following channels have premux bit 0 set to 1 (all end in 4) */
 328        XOADC_CHAN(ATEST_8, 0x01, 0x00, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
 329        /* Set scaling to 1/2 based on the name for these two */
 330        XOADC_CHAN(USB_SNS_DIV20, 0x01, 0x01, IIO_VOLTAGE, 1, 2, SCALE_DEFAULT, AMUX_RSV1),
 331        XOADC_CHAN(DCIN_SNS_DIV20, 0x01, 0x02, IIO_VOLTAGE, 1, 2, SCALE_DEFAULT, AMUX_RSV1),
 332        XOADC_CHAN(AMUX3, 0x01, 0x03, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
 333        XOADC_CHAN(AMUX4, 0x01, 0x04, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
 334        XOADC_CHAN(AMUX5, 0x01, 0x05, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
 335        XOADC_CHAN(AMUX6, 0x01, 0x06, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
 336        XOADC_CHAN(AMUX7, 0x01, 0x07, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
 337        XOADC_CHAN(AMUX8, 0x01, 0x08, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
 338        /* Internal test signals, I think */
 339        XOADC_CHAN(ATEST_1, 0x01, 0x09, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
 340        XOADC_CHAN(ATEST_2, 0x01, 0x0a, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
 341        XOADC_CHAN(ATEST_3, 0x01, 0x0b, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
 342        XOADC_CHAN(ATEST_4, 0x01, 0x0c, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
 343        XOADC_CHAN(ATEST_5, 0x01, 0x0d, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
 344        XOADC_CHAN(ATEST_6, 0x01, 0x0e, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
 345        XOADC_CHAN(ATEST_7, 0x01, 0x0f, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
 346        /* The following channels have premux bit 1 set to 1 (all end in 8) */
 347        /* I guess even ATEST8 will be divided by 3 here */
 348        XOADC_CHAN(ATEST_8, 0x02, 0x00, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
 349        /* I guess div 2 div 3 becomes div 6 */
 350        XOADC_CHAN(USB_SNS_DIV20_DIV3, 0x02, 0x01, IIO_VOLTAGE, 1, 6, SCALE_DEFAULT, AMUX_RSV1),
 351        XOADC_CHAN(DCIN_SNS_DIV20_DIV3, 0x02, 0x02, IIO_VOLTAGE, 1, 6, SCALE_DEFAULT, AMUX_RSV1),
 352        XOADC_CHAN(AMUX3_DIV3, 0x02, 0x03, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
 353        XOADC_CHAN(AMUX4_DIV3, 0x02, 0x04, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
 354        XOADC_CHAN(AMUX5_DIV3, 0x02, 0x05, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
 355        XOADC_CHAN(AMUX6_DIV3, 0x02, 0x06, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
 356        XOADC_CHAN(AMUX7_DIV3, 0x02, 0x07, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
 357        XOADC_CHAN(AMUX8_DIV3, 0x02, 0x08, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
 358        XOADC_CHAN(ATEST_1_DIV3, 0x02, 0x09, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
 359        XOADC_CHAN(ATEST_2_DIV3, 0x02, 0x0a, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
 360        XOADC_CHAN(ATEST_3_DIV3, 0x02, 0x0b, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
 361        XOADC_CHAN(ATEST_4_DIV3, 0x02, 0x0c, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
 362        XOADC_CHAN(ATEST_5_DIV3, 0x02, 0x0d, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
 363        XOADC_CHAN(ATEST_6_DIV3, 0x02, 0x0e, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
 364        XOADC_CHAN(ATEST_7_DIV3, 0x02, 0x0f, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
 365        { }, /* Sentinel */
 366};
 367
 368/**
 369 * struct pm8xxx_chan_info - ADC channel information
 370 * @name: name of this channel
 371 * @hwchan: pointer to hardware channel information (muxing & scaling settings)
 372 * @calibration: whether to use absolute or ratiometric calibration
 373 * @scale_fn_type: scaling function type
 374 * @decimation: 0,1,2,3
 375 * @amux_ip_rsv: ratiometric scale value if using ratiometric
 376 * calibration: 0, 1, 2, 4, 5.
 377 */
 378struct pm8xxx_chan_info {
 379        const char *name;
 380        const struct xoadc_channel *hwchan;
 381        enum vadc_calibration calibration;
 382        u8 decimation:2;
 383        u8 amux_ip_rsv:3;
 384};
 385
 386/**
 387 * struct pm8xxx_xoadc - state container for the XOADC
 388 * @dev: pointer to device
 389 * @map: regmap to access registers
 390 * @vref: reference voltage regulator
 391 * characteristics of the channels, and sensible default settings
 392 * @nchans: number of channels, configured by the device tree
 393 * @chans: the channel information per-channel, configured by the device tree
 394 * @iio_chans: IIO channel specifiers
 395 * @graph: linear calibration parameters for absolute and
 396 * ratiometric measurements
 397 * @complete: completion to indicate end of conversion
 398 * @lock: lock to restrict access to the hardware to one client at the time
 399 */
 400struct pm8xxx_xoadc {
 401        struct device *dev;
 402        struct regmap *map;
 403        const struct xoadc_variant *variant;
 404        struct regulator *vref;
 405        unsigned int nchans;
 406        struct pm8xxx_chan_info *chans;
 407        struct iio_chan_spec *iio_chans;
 408        struct vadc_linear_graph graph[2];
 409        struct completion complete;
 410        struct mutex lock;
 411};
 412
 413static irqreturn_t pm8xxx_eoc_irq(int irq, void *d)
 414{
 415        struct iio_dev *indio_dev = d;
 416        struct pm8xxx_xoadc *adc = iio_priv(indio_dev);
 417
 418        complete(&adc->complete);
 419
 420        return IRQ_HANDLED;
 421}
 422
 423static struct pm8xxx_chan_info *
 424pm8xxx_get_channel(struct pm8xxx_xoadc *adc, u8 chan)
 425{
 426        struct pm8xxx_chan_info *ch;
 427        int i;
 428
 429        for (i = 0; i < adc->nchans; i++) {
 430                ch = &adc->chans[i];
 431                if (ch->hwchan->amux_channel == chan)
 432                        break;
 433        }
 434        if (i == adc->nchans)
 435                return NULL;
 436
 437        return ch;
 438}
 439
 440static int pm8xxx_read_channel_rsv(struct pm8xxx_xoadc *adc,
 441                                   const struct pm8xxx_chan_info *ch,
 442                                   u8 rsv, u16 *adc_code,
 443                                   bool force_ratiometric)
 444{
 445        int ret;
 446        unsigned int val;
 447        u8 rsvmask, rsvval;
 448        u8 lsb, msb;
 449
 450        dev_dbg(adc->dev, "read channel \"%s\", amux %d, prescale/mux: %d, rsv %d\n",
 451                ch->name, ch->hwchan->amux_channel, ch->hwchan->pre_scale_mux, rsv);
 452
 453        mutex_lock(&adc->lock);
 454
 455        /* Mux in this channel */
 456        val = ch->hwchan->amux_channel << ADC_AMUX_SEL_SHIFT;
 457        val |= ch->hwchan->pre_scale_mux << ADC_AMUX_PREMUX_SHIFT;
 458        ret = regmap_write(adc->map, ADC_ARB_USRP_AMUX_CNTRL, val);
 459        if (ret)
 460                goto unlock;
 461
 462        /* Set up ratiometric scale value, mask off all bits except these */
 463        rsvmask = (ADC_ARB_USRP_RSV_RST | ADC_ARB_USRP_RSV_DTEST0 |
 464                   ADC_ARB_USRP_RSV_DTEST1 | ADC_ARB_USRP_RSV_OP);
 465        if (adc->variant->broken_ratiometric && !force_ratiometric) {
 466                /*
 467                 * Apparently the PM8058 has some kind of bug which is
 468                 * reflected in the vendor tree drivers/misc/pmix8058-xoadc.c
 469                 * which just hardcodes the RSV selector to SEL1 (0x20) for
 470                 * most cases and SEL0 (0x10) for the MUXOFF channel only.
 471                 * If we force ratiometric (currently only done when attempting
 472                 * to do ratiometric calibration) this doesn't seem to work
 473                 * very well and I suspect ratiometric conversion is simply
 474                 * broken or not supported on the PM8058.
 475                 *
 476                 * Maybe IO_SEL2 doesn't exist on PM8058 and bits 4 & 5 select
 477                 * the mode alone.
 478                 *
 479                 * Some PM8058 register documentation would be nice to get
 480                 * this right.
 481                 */
 482                if (ch->hwchan->amux_channel == PM8XXX_CHANNEL_MUXOFF)
 483                        rsvval = ADC_ARB_USRP_RSV_IP_SEL0;
 484                else
 485                        rsvval = ADC_ARB_USRP_RSV_IP_SEL1;
 486        } else {
 487                if (rsv == 0xff)
 488                        rsvval = (ch->amux_ip_rsv << ADC_RSV_IP_SEL_SHIFT) |
 489                                ADC_ARB_USRP_RSV_TRM;
 490                else
 491                        rsvval = (rsv << ADC_RSV_IP_SEL_SHIFT) |
 492                                ADC_ARB_USRP_RSV_TRM;
 493        }
 494
 495        ret = regmap_update_bits(adc->map,
 496                                 ADC_ARB_USRP_RSV,
 497                                 ~rsvmask,
 498                                 rsvval);
 499        if (ret)
 500                goto unlock;
 501
 502        ret = regmap_write(adc->map, ADC_ARB_USRP_ANA_PARAM,
 503                           ADC_ARB_USRP_ANA_PARAM_DIS);
 504        if (ret)
 505                goto unlock;
 506
 507        /* Decimation factor */
 508        ret = regmap_write(adc->map, ADC_ARB_USRP_DIG_PARAM,
 509                           ADC_ARB_USRP_DIG_PARAM_SEL_SHIFT0 |
 510                           ADC_ARB_USRP_DIG_PARAM_SEL_SHIFT1 |
 511                           ch->decimation << ADC_DIG_PARAM_DEC_SHIFT);
 512        if (ret)
 513                goto unlock;
 514
 515        ret = regmap_write(adc->map, ADC_ARB_USRP_ANA_PARAM,
 516                           ADC_ARB_USRP_ANA_PARAM_EN);
 517        if (ret)
 518                goto unlock;
 519
 520        /* Enable the arbiter, the Qualcomm code does it twice like this */
 521        ret = regmap_write(adc->map, ADC_ARB_USRP_CNTRL,
 522                           ADC_ARB_USRP_CNTRL_EN_ARB);
 523        if (ret)
 524                goto unlock;
 525        ret = regmap_write(adc->map, ADC_ARB_USRP_CNTRL,
 526                           ADC_ARB_USRP_CNTRL_EN_ARB);
 527        if (ret)
 528                goto unlock;
 529
 530
 531        /* Fire a request! */
 532        reinit_completion(&adc->complete);
 533        ret = regmap_write(adc->map, ADC_ARB_USRP_CNTRL,
 534                           ADC_ARB_USRP_CNTRL_EN_ARB |
 535                           ADC_ARB_USRP_CNTRL_REQ);
 536        if (ret)
 537                goto unlock;
 538
 539        /* Next the interrupt occurs */
 540        ret = wait_for_completion_timeout(&adc->complete,
 541                                          VADC_CONV_TIME_MAX_US);
 542        if (!ret) {
 543                dev_err(adc->dev, "conversion timed out\n");
 544                ret = -ETIMEDOUT;
 545                goto unlock;
 546        }
 547
 548        ret = regmap_read(adc->map, ADC_ARB_USRP_DATA0, &val);
 549        if (ret)
 550                goto unlock;
 551        lsb = val;
 552        ret = regmap_read(adc->map, ADC_ARB_USRP_DATA1, &val);
 553        if (ret)
 554                goto unlock;
 555        msb = val;
 556        *adc_code = (msb << 8) | lsb;
 557
 558        /* Turn off the ADC by setting the arbiter to 0 twice */
 559        ret = regmap_write(adc->map, ADC_ARB_USRP_CNTRL, 0);
 560        if (ret)
 561                goto unlock;
 562        ret = regmap_write(adc->map, ADC_ARB_USRP_CNTRL, 0);
 563        if (ret)
 564                goto unlock;
 565
 566unlock:
 567        mutex_unlock(&adc->lock);
 568        return ret;
 569}
 570
 571static int pm8xxx_read_channel(struct pm8xxx_xoadc *adc,
 572                               const struct pm8xxx_chan_info *ch,
 573                               u16 *adc_code)
 574{
 575        /*
 576         * Normally we just use the ratiometric scale value (RSV) predefined
 577         * for the channel, but during calibration we need to modify this
 578         * so this wrapper is a helper hiding the more complex version.
 579         */
 580        return pm8xxx_read_channel_rsv(adc, ch, 0xff, adc_code, false);
 581}
 582
 583static int pm8xxx_calibrate_device(struct pm8xxx_xoadc *adc)
 584{
 585        const struct pm8xxx_chan_info *ch;
 586        u16 read_1250v;
 587        u16 read_0625v;
 588        u16 read_nomux_rsv5;
 589        u16 read_nomux_rsv4;
 590        int ret;
 591
 592        adc->graph[VADC_CALIB_ABSOLUTE].dx = VADC_ABSOLUTE_RANGE_UV;
 593        adc->graph[VADC_CALIB_RATIOMETRIC].dx = VADC_RATIOMETRIC_RANGE;
 594
 595        /* Common reference channel calibration */
 596        ch = pm8xxx_get_channel(adc, PM8XXX_CHANNEL_125V);
 597        if (!ch)
 598                return -ENODEV;
 599        ret = pm8xxx_read_channel(adc, ch, &read_1250v);
 600        if (ret) {
 601                dev_err(adc->dev, "could not read 1.25V reference channel\n");
 602                return -ENODEV;
 603        }
 604        ch = pm8xxx_get_channel(adc, PM8XXX_CHANNEL_INTERNAL);
 605        if (!ch)
 606                return -ENODEV;
 607        ret = pm8xxx_read_channel(adc, ch, &read_0625v);
 608        if (ret) {
 609                dev_err(adc->dev, "could not read 0.625V reference channel\n");
 610                return -ENODEV;
 611        }
 612        if (read_1250v == read_0625v) {
 613                dev_err(adc->dev, "read same ADC code for 1.25V and 0.625V\n");
 614                return -ENODEV;
 615        }
 616
 617        adc->graph[VADC_CALIB_ABSOLUTE].dy = read_1250v - read_0625v;
 618        adc->graph[VADC_CALIB_ABSOLUTE].gnd = read_0625v;
 619
 620        dev_info(adc->dev, "absolute calibration dx = %d uV, dy = %d units\n",
 621                 VADC_ABSOLUTE_RANGE_UV, adc->graph[VADC_CALIB_ABSOLUTE].dy);
 622
 623        /* Ratiometric calibration */
 624        ch = pm8xxx_get_channel(adc, PM8XXX_CHANNEL_MUXOFF);
 625        if (!ch)
 626                return -ENODEV;
 627        ret = pm8xxx_read_channel_rsv(adc, ch, AMUX_RSV5,
 628                                      &read_nomux_rsv5, true);
 629        if (ret) {
 630                dev_err(adc->dev, "could not read MUXOFF reference channel\n");
 631                return -ENODEV;
 632        }
 633        ret = pm8xxx_read_channel_rsv(adc, ch, AMUX_RSV4,
 634                                      &read_nomux_rsv4, true);
 635        if (ret) {
 636                dev_err(adc->dev, "could not read MUXOFF reference channel\n");
 637                return -ENODEV;
 638        }
 639        adc->graph[VADC_CALIB_RATIOMETRIC].dy =
 640                read_nomux_rsv5 - read_nomux_rsv4;
 641        adc->graph[VADC_CALIB_RATIOMETRIC].gnd = read_nomux_rsv4;
 642
 643        dev_info(adc->dev, "ratiometric calibration dx = %d, dy = %d units\n",
 644                 VADC_RATIOMETRIC_RANGE,
 645                 adc->graph[VADC_CALIB_RATIOMETRIC].dy);
 646
 647        return 0;
 648}
 649
 650static int pm8xxx_read_raw(struct iio_dev *indio_dev,
 651                           struct iio_chan_spec const *chan,
 652                           int *val, int *val2, long mask)
 653{
 654        struct pm8xxx_xoadc *adc = iio_priv(indio_dev);
 655        const struct pm8xxx_chan_info *ch;
 656        u16 adc_code;
 657        int ret;
 658
 659        switch (mask) {
 660        case IIO_CHAN_INFO_PROCESSED:
 661                ch = pm8xxx_get_channel(adc, chan->address);
 662                if (!ch) {
 663                        dev_err(adc->dev, "no such channel %lu\n",
 664                                chan->address);
 665                        return -EINVAL;
 666                }
 667                ret = pm8xxx_read_channel(adc, ch, &adc_code);
 668                if (ret)
 669                        return ret;
 670
 671                ret = qcom_vadc_scale(ch->hwchan->scale_fn_type,
 672                                      &adc->graph[ch->calibration],
 673                                      &ch->hwchan->prescale,
 674                                      (ch->calibration == VADC_CALIB_ABSOLUTE),
 675                                      adc_code, val);
 676                if (ret)
 677                        return ret;
 678
 679                return IIO_VAL_INT;
 680        case IIO_CHAN_INFO_RAW:
 681                ch = pm8xxx_get_channel(adc, chan->address);
 682                if (!ch) {
 683                        dev_err(adc->dev, "no such channel %lu\n",
 684                                chan->address);
 685                        return -EINVAL;
 686                }
 687                ret = pm8xxx_read_channel(adc, ch, &adc_code);
 688                if (ret)
 689                        return ret;
 690
 691                *val = (int)adc_code;
 692                return IIO_VAL_INT;
 693        default:
 694                return -EINVAL;
 695        }
 696}
 697
 698static int pm8xxx_of_xlate(struct iio_dev *indio_dev,
 699                           const struct of_phandle_args *iiospec)
 700{
 701        struct pm8xxx_xoadc *adc = iio_priv(indio_dev);
 702        u8 pre_scale_mux;
 703        u8 amux_channel;
 704        unsigned int i;
 705
 706        /*
 707         * First cell is prescaler or premux, second cell is analog
 708         * mux.
 709         */
 710        if (iiospec->args_count != 2) {
 711                dev_err(&indio_dev->dev, "wrong number of arguments for %s need 2 got %d\n",
 712                        iiospec->np->name,
 713                        iiospec->args_count);
 714                return -EINVAL;
 715        }
 716        pre_scale_mux = (u8)iiospec->args[0];
 717        amux_channel = (u8)iiospec->args[1];
 718        dev_dbg(&indio_dev->dev, "pre scale/mux: %02x, amux: %02x\n",
 719                pre_scale_mux, amux_channel);
 720
 721        /* We need to match exactly on the prescale/premux and channel */
 722        for (i = 0; i < adc->nchans; i++)
 723                if (adc->chans[i].hwchan->pre_scale_mux == pre_scale_mux &&
 724                    adc->chans[i].hwchan->amux_channel == amux_channel)
 725                        return i;
 726
 727        return -EINVAL;
 728}
 729
 730static const struct iio_info pm8xxx_xoadc_info = {
 731        .of_xlate = pm8xxx_of_xlate,
 732        .read_raw = pm8xxx_read_raw,
 733};
 734
 735static int pm8xxx_xoadc_parse_channel(struct device *dev,
 736                                      struct device_node *np,
 737                                      const struct xoadc_channel *hw_channels,
 738                                      struct iio_chan_spec *iio_chan,
 739                                      struct pm8xxx_chan_info *ch)
 740{
 741        const char *name = np->name;
 742        const struct xoadc_channel *hwchan;
 743        u32 pre_scale_mux, amux_channel;
 744        u32 rsv, dec;
 745        int ret;
 746        int chid;
 747
 748        ret = of_property_read_u32_index(np, "reg", 0, &pre_scale_mux);
 749        if (ret) {
 750                dev_err(dev, "invalid pre scale/mux number %s\n", name);
 751                return ret;
 752        }
 753        ret = of_property_read_u32_index(np, "reg", 1, &amux_channel);
 754        if (ret) {
 755                dev_err(dev, "invalid amux channel number %s\n", name);
 756                return ret;
 757        }
 758
 759        /* Find the right channel setting */
 760        chid = 0;
 761        hwchan = &hw_channels[0];
 762        while (hwchan && hwchan->datasheet_name) {
 763                if (hwchan->pre_scale_mux == pre_scale_mux &&
 764                    hwchan->amux_channel == amux_channel)
 765                        break;
 766                hwchan++;
 767                chid++;
 768        }
 769        /* The sentinel does not have a name assigned */
 770        if (!hwchan->datasheet_name) {
 771                dev_err(dev, "could not locate channel %02x/%02x\n",
 772                        pre_scale_mux, amux_channel);
 773                return -EINVAL;
 774        }
 775        ch->name = name;
 776        ch->hwchan = hwchan;
 777        /* Everyone seems to use absolute calibration except in special cases */
 778        ch->calibration = VADC_CALIB_ABSOLUTE;
 779        /* Everyone seems to use default ("type 2") decimation */
 780        ch->decimation = VADC_DEF_DECIMATION;
 781
 782        if (!of_property_read_u32(np, "qcom,ratiometric", &rsv)) {
 783                ch->calibration = VADC_CALIB_RATIOMETRIC;
 784                if (rsv > XOADC_RSV_MAX) {
 785                        dev_err(dev, "%s too large RSV value %d\n", name, rsv);
 786                        return -EINVAL;
 787                }
 788                if (rsv == AMUX_RSV3) {
 789                        dev_err(dev, "%s invalid RSV value %d\n", name, rsv);
 790                        return -EINVAL;
 791                }
 792        }
 793
 794        /* Optional decimation, if omitted we use the default */
 795        ret = of_property_read_u32(np, "qcom,decimation", &dec);
 796        if (!ret) {
 797                ret = qcom_vadc_decimation_from_dt(dec);
 798                if (ret < 0) {
 799                        dev_err(dev, "%s invalid decimation %d\n",
 800                                name, dec);
 801                        return ret;
 802                }
 803                ch->decimation = ret;
 804        }
 805
 806        iio_chan->channel = chid;
 807        iio_chan->address = hwchan->amux_channel;
 808        iio_chan->datasheet_name = hwchan->datasheet_name;
 809        iio_chan->type = hwchan->type;
 810        /* All channels are raw or processed */
 811        iio_chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
 812                BIT(IIO_CHAN_INFO_PROCESSED);
 813        iio_chan->indexed = 1;
 814
 815        dev_dbg(dev, "channel [PRESCALE/MUX: %02x AMUX: %02x] \"%s\" "
 816                "ref voltage: %d, decimation %d "
 817                "prescale %d/%d, scale function %d\n",
 818                hwchan->pre_scale_mux, hwchan->amux_channel, ch->name,
 819                ch->amux_ip_rsv, ch->decimation, hwchan->prescale.num,
 820                hwchan->prescale.den, hwchan->scale_fn_type);
 821
 822        return 0;
 823}
 824
 825static int pm8xxx_xoadc_parse_channels(struct pm8xxx_xoadc *adc,
 826                                       struct device_node *np)
 827{
 828        struct device_node *child;
 829        struct pm8xxx_chan_info *ch;
 830        int ret;
 831        int i;
 832
 833        adc->nchans = of_get_available_child_count(np);
 834        if (!adc->nchans) {
 835                dev_err(adc->dev, "no channel children\n");
 836                return -ENODEV;
 837        }
 838        dev_dbg(adc->dev, "found %d ADC channels\n", adc->nchans);
 839
 840        adc->iio_chans = devm_kcalloc(adc->dev, adc->nchans,
 841                                      sizeof(*adc->iio_chans), GFP_KERNEL);
 842        if (!adc->iio_chans)
 843                return -ENOMEM;
 844
 845        adc->chans = devm_kcalloc(adc->dev, adc->nchans,
 846                                  sizeof(*adc->chans), GFP_KERNEL);
 847        if (!adc->chans)
 848                return -ENOMEM;
 849
 850        i = 0;
 851        for_each_available_child_of_node(np, child) {
 852                ch = &adc->chans[i];
 853                ret = pm8xxx_xoadc_parse_channel(adc->dev, child,
 854                                                 adc->variant->channels,
 855                                                 &adc->iio_chans[i],
 856                                                 ch);
 857                if (ret) {
 858                        of_node_put(child);
 859                        return ret;
 860                }
 861                i++;
 862        }
 863
 864        /* Check for required channels */
 865        ch = pm8xxx_get_channel(adc, PM8XXX_CHANNEL_125V);
 866        if (!ch) {
 867                dev_err(adc->dev, "missing 1.25V reference channel\n");
 868                return -ENODEV;
 869        }
 870        ch = pm8xxx_get_channel(adc, PM8XXX_CHANNEL_INTERNAL);
 871        if (!ch) {
 872                dev_err(adc->dev, "missing 0.625V reference channel\n");
 873                return -ENODEV;
 874        }
 875        ch = pm8xxx_get_channel(adc, PM8XXX_CHANNEL_MUXOFF);
 876        if (!ch) {
 877                dev_err(adc->dev, "missing MUXOFF reference channel\n");
 878                return -ENODEV;
 879        }
 880
 881        return 0;
 882}
 883
 884static int pm8xxx_xoadc_probe(struct platform_device *pdev)
 885{
 886        const struct xoadc_variant *variant;
 887        struct pm8xxx_xoadc *adc;
 888        struct iio_dev *indio_dev;
 889        struct device_node *np = pdev->dev.of_node;
 890        struct regmap *map;
 891        struct device *dev = &pdev->dev;
 892        int ret;
 893
 894        variant = of_device_get_match_data(dev);
 895        if (!variant)
 896                return -ENODEV;
 897
 898        indio_dev = devm_iio_device_alloc(dev, sizeof(*adc));
 899        if (!indio_dev)
 900                return -ENOMEM;
 901        platform_set_drvdata(pdev, indio_dev);
 902
 903        adc = iio_priv(indio_dev);
 904        adc->dev = dev;
 905        adc->variant = variant;
 906        init_completion(&adc->complete);
 907        mutex_init(&adc->lock);
 908
 909        ret = pm8xxx_xoadc_parse_channels(adc, np);
 910        if (ret)
 911                return ret;
 912
 913        map = dev_get_regmap(dev->parent, NULL);
 914        if (!map) {
 915                dev_err(dev, "parent regmap unavailable.\n");
 916                return -ENXIO;
 917        }
 918        adc->map = map;
 919
 920        /* Bring up regulator */
 921        adc->vref = devm_regulator_get(dev, "xoadc-ref");
 922        if (IS_ERR(adc->vref)) {
 923                dev_err(dev, "failed to get XOADC VREF regulator\n");
 924                return PTR_ERR(adc->vref);
 925        }
 926        ret = regulator_enable(adc->vref);
 927        if (ret) {
 928                dev_err(dev, "failed to enable XOADC VREF regulator\n");
 929                return ret;
 930        }
 931
 932        ret = devm_request_threaded_irq(dev, platform_get_irq(pdev, 0),
 933                        pm8xxx_eoc_irq, NULL, 0, variant->name, indio_dev);
 934        if (ret) {
 935                dev_err(dev, "unable to request IRQ\n");
 936                goto out_disable_vref;
 937        }
 938
 939        indio_dev->dev.parent = dev;
 940        indio_dev->dev.of_node = np;
 941        indio_dev->name = variant->name;
 942        indio_dev->modes = INDIO_DIRECT_MODE;
 943        indio_dev->info = &pm8xxx_xoadc_info;
 944        indio_dev->channels = adc->iio_chans;
 945        indio_dev->num_channels = adc->nchans;
 946
 947        ret = iio_device_register(indio_dev);
 948        if (ret)
 949                goto out_disable_vref;
 950
 951        ret = pm8xxx_calibrate_device(adc);
 952        if (ret)
 953                goto out_unreg_device;
 954
 955        dev_info(dev, "%s XOADC driver enabled\n", variant->name);
 956
 957        return 0;
 958
 959out_unreg_device:
 960        iio_device_unregister(indio_dev);
 961out_disable_vref:
 962        regulator_disable(adc->vref);
 963
 964        return ret;
 965}
 966
 967static int pm8xxx_xoadc_remove(struct platform_device *pdev)
 968{
 969        struct iio_dev *indio_dev = platform_get_drvdata(pdev);
 970        struct pm8xxx_xoadc *adc = iio_priv(indio_dev);
 971
 972        iio_device_unregister(indio_dev);
 973
 974        regulator_disable(adc->vref);
 975
 976        return 0;
 977}
 978
 979static const struct xoadc_variant pm8018_variant = {
 980        .name = "PM8018-XOADC",
 981        .channels = pm8018_xoadc_channels,
 982};
 983
 984static const struct xoadc_variant pm8038_variant = {
 985        .name = "PM8038-XOADC",
 986        .channels = pm8038_xoadc_channels,
 987};
 988
 989static const struct xoadc_variant pm8058_variant = {
 990        .name = "PM8058-XOADC",
 991        .channels = pm8058_xoadc_channels,
 992        .broken_ratiometric = true,
 993        .prescaling = true,
 994};
 995
 996static const struct xoadc_variant pm8921_variant = {
 997        .name = "PM8921-XOADC",
 998        .channels = pm8921_xoadc_channels,
 999        .second_level_mux = true,
1000};
1001
1002static const struct of_device_id pm8xxx_xoadc_id_table[] = {
1003        {
1004                .compatible = "qcom,pm8018-adc",
1005                .data = &pm8018_variant,
1006        },
1007        {
1008                .compatible = "qcom,pm8038-adc",
1009                .data = &pm8038_variant,
1010        },
1011        {
1012                .compatible = "qcom,pm8058-adc",
1013                .data = &pm8058_variant,
1014        },
1015        {
1016                .compatible = "qcom,pm8921-adc",
1017                .data = &pm8921_variant,
1018        },
1019        { },
1020};
1021MODULE_DEVICE_TABLE(of, pm8xxx_xoadc_id_table);
1022
1023static struct platform_driver pm8xxx_xoadc_driver = {
1024        .driver         = {
1025                .name   = "pm8xxx-adc",
1026                .of_match_table = pm8xxx_xoadc_id_table,
1027        },
1028        .probe          = pm8xxx_xoadc_probe,
1029        .remove         = pm8xxx_xoadc_remove,
1030};
1031module_platform_driver(pm8xxx_xoadc_driver);
1032
1033MODULE_DESCRIPTION("PM8xxx XOADC driver");
1034MODULE_LICENSE("GPL v2");
1035MODULE_ALIAS("platform:pm8xxx-xoadc");
1036