linux/drivers/mailbox/omap-mailbox.c
<<
>>
Prefs
   1/*
   2 * OMAP mailbox driver
   3 *
   4 * Copyright (C) 2006-2009 Nokia Corporation. All rights reserved.
   5 * Copyright (C) 2013-2016 Texas Instruments Incorporated - http://www.ti.com
   6 *
   7 * Contact: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
   8 *          Suman Anna <s-anna@ti.com>
   9 *
  10 * This program is free software; you can redistribute it and/or
  11 * modify it under the terms of the GNU General Public License
  12 * version 2 as published by the Free Software Foundation.
  13 *
  14 * This program is distributed in the hope that it will be useful, but
  15 * WITHOUT ANY WARRANTY; without even the implied warranty of
  16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  17 * General Public License for more details.
  18 */
  19
  20#include <linux/interrupt.h>
  21#include <linux/spinlock.h>
  22#include <linux/mutex.h>
  23#include <linux/slab.h>
  24#include <linux/kfifo.h>
  25#include <linux/err.h>
  26#include <linux/module.h>
  27#include <linux/of_device.h>
  28#include <linux/platform_device.h>
  29#include <linux/pm_runtime.h>
  30#include <linux/omap-mailbox.h>
  31#include <linux/mailbox_controller.h>
  32#include <linux/mailbox_client.h>
  33
  34#include "mailbox.h"
  35
  36#define MAILBOX_REVISION                0x000
  37#define MAILBOX_MESSAGE(m)              (0x040 + 4 * (m))
  38#define MAILBOX_FIFOSTATUS(m)           (0x080 + 4 * (m))
  39#define MAILBOX_MSGSTATUS(m)            (0x0c0 + 4 * (m))
  40
  41#define OMAP2_MAILBOX_IRQSTATUS(u)      (0x100 + 8 * (u))
  42#define OMAP2_MAILBOX_IRQENABLE(u)      (0x104 + 8 * (u))
  43
  44#define OMAP4_MAILBOX_IRQSTATUS(u)      (0x104 + 0x10 * (u))
  45#define OMAP4_MAILBOX_IRQENABLE(u)      (0x108 + 0x10 * (u))
  46#define OMAP4_MAILBOX_IRQENABLE_CLR(u)  (0x10c + 0x10 * (u))
  47
  48#define MAILBOX_IRQSTATUS(type, u)      (type ? OMAP4_MAILBOX_IRQSTATUS(u) : \
  49                                                OMAP2_MAILBOX_IRQSTATUS(u))
  50#define MAILBOX_IRQENABLE(type, u)      (type ? OMAP4_MAILBOX_IRQENABLE(u) : \
  51                                                OMAP2_MAILBOX_IRQENABLE(u))
  52#define MAILBOX_IRQDISABLE(type, u)     (type ? OMAP4_MAILBOX_IRQENABLE_CLR(u) \
  53                                                : OMAP2_MAILBOX_IRQENABLE(u))
  54
  55#define MAILBOX_IRQ_NEWMSG(m)           (1 << (2 * (m)))
  56#define MAILBOX_IRQ_NOTFULL(m)          (1 << (2 * (m) + 1))
  57
  58/* Interrupt register configuration types */
  59#define MBOX_INTR_CFG_TYPE1             0
  60#define MBOX_INTR_CFG_TYPE2             1
  61
  62struct omap_mbox_fifo {
  63        unsigned long msg;
  64        unsigned long fifo_stat;
  65        unsigned long msg_stat;
  66        unsigned long irqenable;
  67        unsigned long irqstatus;
  68        unsigned long irqdisable;
  69        u32 intr_bit;
  70};
  71
  72struct omap_mbox_queue {
  73        spinlock_t              lock;
  74        struct kfifo            fifo;
  75        struct work_struct      work;
  76        struct omap_mbox        *mbox;
  77        bool full;
  78};
  79
  80struct omap_mbox_device {
  81        struct device *dev;
  82        struct mutex cfg_lock;
  83        void __iomem *mbox_base;
  84        u32 *irq_ctx;
  85        u32 num_users;
  86        u32 num_fifos;
  87        u32 intr_type;
  88        struct omap_mbox **mboxes;
  89        struct mbox_controller controller;
  90        struct list_head elem;
  91};
  92
  93struct omap_mbox_fifo_info {
  94        int tx_id;
  95        int tx_usr;
  96        int tx_irq;
  97
  98        int rx_id;
  99        int rx_usr;
 100        int rx_irq;
 101
 102        const char *name;
 103        bool send_no_irq;
 104};
 105
 106struct omap_mbox {
 107        const char              *name;
 108        int                     irq;
 109        struct omap_mbox_queue  *rxq;
 110        struct device           *dev;
 111        struct omap_mbox_device *parent;
 112        struct omap_mbox_fifo   tx_fifo;
 113        struct omap_mbox_fifo   rx_fifo;
 114        u32                     intr_type;
 115        struct mbox_chan        *chan;
 116        bool                    send_no_irq;
 117};
 118
 119/* global variables for the mailbox devices */
 120static DEFINE_MUTEX(omap_mbox_devices_lock);
 121static LIST_HEAD(omap_mbox_devices);
 122
 123static unsigned int mbox_kfifo_size = CONFIG_OMAP_MBOX_KFIFO_SIZE;
 124module_param(mbox_kfifo_size, uint, S_IRUGO);
 125MODULE_PARM_DESC(mbox_kfifo_size, "Size of omap's mailbox kfifo (bytes)");
 126
 127static struct omap_mbox *mbox_chan_to_omap_mbox(struct mbox_chan *chan)
 128{
 129        if (!chan || !chan->con_priv)
 130                return NULL;
 131
 132        return (struct omap_mbox *)chan->con_priv;
 133}
 134
 135static inline
 136unsigned int mbox_read_reg(struct omap_mbox_device *mdev, size_t ofs)
 137{
 138        return __raw_readl(mdev->mbox_base + ofs);
 139}
 140
 141static inline
 142void mbox_write_reg(struct omap_mbox_device *mdev, u32 val, size_t ofs)
 143{
 144        __raw_writel(val, mdev->mbox_base + ofs);
 145}
 146
 147/* Mailbox FIFO handle functions */
 148static mbox_msg_t mbox_fifo_read(struct omap_mbox *mbox)
 149{
 150        struct omap_mbox_fifo *fifo = &mbox->rx_fifo;
 151
 152        return (mbox_msg_t)mbox_read_reg(mbox->parent, fifo->msg);
 153}
 154
 155static void mbox_fifo_write(struct omap_mbox *mbox, mbox_msg_t msg)
 156{
 157        struct omap_mbox_fifo *fifo = &mbox->tx_fifo;
 158
 159        mbox_write_reg(mbox->parent, msg, fifo->msg);
 160}
 161
 162static int mbox_fifo_empty(struct omap_mbox *mbox)
 163{
 164        struct omap_mbox_fifo *fifo = &mbox->rx_fifo;
 165
 166        return (mbox_read_reg(mbox->parent, fifo->msg_stat) == 0);
 167}
 168
 169static int mbox_fifo_full(struct omap_mbox *mbox)
 170{
 171        struct omap_mbox_fifo *fifo = &mbox->tx_fifo;
 172
 173        return mbox_read_reg(mbox->parent, fifo->fifo_stat);
 174}
 175
 176/* Mailbox IRQ handle functions */
 177static void ack_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
 178{
 179        struct omap_mbox_fifo *fifo = (irq == IRQ_TX) ?
 180                                &mbox->tx_fifo : &mbox->rx_fifo;
 181        u32 bit = fifo->intr_bit;
 182        u32 irqstatus = fifo->irqstatus;
 183
 184        mbox_write_reg(mbox->parent, bit, irqstatus);
 185
 186        /* Flush posted write for irq status to avoid spurious interrupts */
 187        mbox_read_reg(mbox->parent, irqstatus);
 188}
 189
 190static int is_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
 191{
 192        struct omap_mbox_fifo *fifo = (irq == IRQ_TX) ?
 193                                &mbox->tx_fifo : &mbox->rx_fifo;
 194        u32 bit = fifo->intr_bit;
 195        u32 irqenable = fifo->irqenable;
 196        u32 irqstatus = fifo->irqstatus;
 197
 198        u32 enable = mbox_read_reg(mbox->parent, irqenable);
 199        u32 status = mbox_read_reg(mbox->parent, irqstatus);
 200
 201        return (int)(enable & status & bit);
 202}
 203
 204static void _omap_mbox_enable_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
 205{
 206        u32 l;
 207        struct omap_mbox_fifo *fifo = (irq == IRQ_TX) ?
 208                                &mbox->tx_fifo : &mbox->rx_fifo;
 209        u32 bit = fifo->intr_bit;
 210        u32 irqenable = fifo->irqenable;
 211
 212        l = mbox_read_reg(mbox->parent, irqenable);
 213        l |= bit;
 214        mbox_write_reg(mbox->parent, l, irqenable);
 215}
 216
 217static void _omap_mbox_disable_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
 218{
 219        struct omap_mbox_fifo *fifo = (irq == IRQ_TX) ?
 220                                &mbox->tx_fifo : &mbox->rx_fifo;
 221        u32 bit = fifo->intr_bit;
 222        u32 irqdisable = fifo->irqdisable;
 223
 224        /*
 225         * Read and update the interrupt configuration register for pre-OMAP4.
 226         * OMAP4 and later SoCs have a dedicated interrupt disabling register.
 227         */
 228        if (!mbox->intr_type)
 229                bit = mbox_read_reg(mbox->parent, irqdisable) & ~bit;
 230
 231        mbox_write_reg(mbox->parent, bit, irqdisable);
 232}
 233
 234void omap_mbox_enable_irq(struct mbox_chan *chan, omap_mbox_irq_t irq)
 235{
 236        struct omap_mbox *mbox = mbox_chan_to_omap_mbox(chan);
 237
 238        if (WARN_ON(!mbox))
 239                return;
 240
 241        _omap_mbox_enable_irq(mbox, irq);
 242}
 243EXPORT_SYMBOL(omap_mbox_enable_irq);
 244
 245void omap_mbox_disable_irq(struct mbox_chan *chan, omap_mbox_irq_t irq)
 246{
 247        struct omap_mbox *mbox = mbox_chan_to_omap_mbox(chan);
 248
 249        if (WARN_ON(!mbox))
 250                return;
 251
 252        _omap_mbox_disable_irq(mbox, irq);
 253}
 254EXPORT_SYMBOL(omap_mbox_disable_irq);
 255
 256/*
 257 * Message receiver(workqueue)
 258 */
 259static void mbox_rx_work(struct work_struct *work)
 260{
 261        struct omap_mbox_queue *mq =
 262                        container_of(work, struct omap_mbox_queue, work);
 263        mbox_msg_t msg;
 264        int len;
 265
 266        while (kfifo_len(&mq->fifo) >= sizeof(msg)) {
 267                len = kfifo_out(&mq->fifo, (unsigned char *)&msg, sizeof(msg));
 268                WARN_ON(len != sizeof(msg));
 269
 270                mbox_chan_received_data(mq->mbox->chan, (void *)msg);
 271                spin_lock_irq(&mq->lock);
 272                if (mq->full) {
 273                        mq->full = false;
 274                        _omap_mbox_enable_irq(mq->mbox, IRQ_RX);
 275                }
 276                spin_unlock_irq(&mq->lock);
 277        }
 278}
 279
 280/*
 281 * Mailbox interrupt handler
 282 */
 283static void __mbox_tx_interrupt(struct omap_mbox *mbox)
 284{
 285        _omap_mbox_disable_irq(mbox, IRQ_TX);
 286        ack_mbox_irq(mbox, IRQ_TX);
 287        mbox_chan_txdone(mbox->chan, 0);
 288}
 289
 290static void __mbox_rx_interrupt(struct omap_mbox *mbox)
 291{
 292        struct omap_mbox_queue *mq = mbox->rxq;
 293        mbox_msg_t msg;
 294        int len;
 295
 296        while (!mbox_fifo_empty(mbox)) {
 297                if (unlikely(kfifo_avail(&mq->fifo) < sizeof(msg))) {
 298                        _omap_mbox_disable_irq(mbox, IRQ_RX);
 299                        mq->full = true;
 300                        goto nomem;
 301                }
 302
 303                msg = mbox_fifo_read(mbox);
 304
 305                len = kfifo_in(&mq->fifo, (unsigned char *)&msg, sizeof(msg));
 306                WARN_ON(len != sizeof(msg));
 307        }
 308
 309        /* no more messages in the fifo. clear IRQ source. */
 310        ack_mbox_irq(mbox, IRQ_RX);
 311nomem:
 312        schedule_work(&mbox->rxq->work);
 313}
 314
 315static irqreturn_t mbox_interrupt(int irq, void *p)
 316{
 317        struct omap_mbox *mbox = p;
 318
 319        if (is_mbox_irq(mbox, IRQ_TX))
 320                __mbox_tx_interrupt(mbox);
 321
 322        if (is_mbox_irq(mbox, IRQ_RX))
 323                __mbox_rx_interrupt(mbox);
 324
 325        return IRQ_HANDLED;
 326}
 327
 328static struct omap_mbox_queue *mbox_queue_alloc(struct omap_mbox *mbox,
 329                                        void (*work)(struct work_struct *))
 330{
 331        struct omap_mbox_queue *mq;
 332
 333        if (!work)
 334                return NULL;
 335
 336        mq = kzalloc(sizeof(*mq), GFP_KERNEL);
 337        if (!mq)
 338                return NULL;
 339
 340        spin_lock_init(&mq->lock);
 341
 342        if (kfifo_alloc(&mq->fifo, mbox_kfifo_size, GFP_KERNEL))
 343                goto error;
 344
 345        INIT_WORK(&mq->work, work);
 346        return mq;
 347
 348error:
 349        kfree(mq);
 350        return NULL;
 351}
 352
 353static void mbox_queue_free(struct omap_mbox_queue *q)
 354{
 355        kfifo_free(&q->fifo);
 356        kfree(q);
 357}
 358
 359static int omap_mbox_startup(struct omap_mbox *mbox)
 360{
 361        int ret = 0;
 362        struct omap_mbox_queue *mq;
 363
 364        mq = mbox_queue_alloc(mbox, mbox_rx_work);
 365        if (!mq)
 366                return -ENOMEM;
 367        mbox->rxq = mq;
 368        mq->mbox = mbox;
 369
 370        ret = request_irq(mbox->irq, mbox_interrupt, IRQF_SHARED,
 371                          mbox->name, mbox);
 372        if (unlikely(ret)) {
 373                pr_err("failed to register mailbox interrupt:%d\n", ret);
 374                goto fail_request_irq;
 375        }
 376
 377        if (mbox->send_no_irq)
 378                mbox->chan->txdone_method = TXDONE_BY_ACK;
 379
 380        _omap_mbox_enable_irq(mbox, IRQ_RX);
 381
 382        return 0;
 383
 384fail_request_irq:
 385        mbox_queue_free(mbox->rxq);
 386        return ret;
 387}
 388
 389static void omap_mbox_fini(struct omap_mbox *mbox)
 390{
 391        _omap_mbox_disable_irq(mbox, IRQ_RX);
 392        free_irq(mbox->irq, mbox);
 393        flush_work(&mbox->rxq->work);
 394        mbox_queue_free(mbox->rxq);
 395}
 396
 397static struct omap_mbox *omap_mbox_device_find(struct omap_mbox_device *mdev,
 398                                               const char *mbox_name)
 399{
 400        struct omap_mbox *_mbox, *mbox = NULL;
 401        struct omap_mbox **mboxes = mdev->mboxes;
 402        int i;
 403
 404        if (!mboxes)
 405                return NULL;
 406
 407        for (i = 0; (_mbox = mboxes[i]); i++) {
 408                if (!strcmp(_mbox->name, mbox_name)) {
 409                        mbox = _mbox;
 410                        break;
 411                }
 412        }
 413        return mbox;
 414}
 415
 416struct mbox_chan *omap_mbox_request_channel(struct mbox_client *cl,
 417                                            const char *chan_name)
 418{
 419        struct device *dev = cl->dev;
 420        struct omap_mbox *mbox = NULL;
 421        struct omap_mbox_device *mdev;
 422        struct mbox_chan *chan;
 423        unsigned long flags;
 424        int ret;
 425
 426        if (!dev)
 427                return ERR_PTR(-ENODEV);
 428
 429        if (dev->of_node) {
 430                pr_err("%s: please use mbox_request_channel(), this API is supported only for OMAP non-DT usage\n",
 431                       __func__);
 432                return ERR_PTR(-ENODEV);
 433        }
 434
 435        mutex_lock(&omap_mbox_devices_lock);
 436        list_for_each_entry(mdev, &omap_mbox_devices, elem) {
 437                mbox = omap_mbox_device_find(mdev, chan_name);
 438                if (mbox)
 439                        break;
 440        }
 441        mutex_unlock(&omap_mbox_devices_lock);
 442
 443        if (!mbox || !mbox->chan)
 444                return ERR_PTR(-ENOENT);
 445
 446        chan = mbox->chan;
 447        spin_lock_irqsave(&chan->lock, flags);
 448        chan->msg_free = 0;
 449        chan->msg_count = 0;
 450        chan->active_req = NULL;
 451        chan->cl = cl;
 452        init_completion(&chan->tx_complete);
 453        spin_unlock_irqrestore(&chan->lock, flags);
 454
 455        ret = chan->mbox->ops->startup(chan);
 456        if (ret) {
 457                pr_err("Unable to startup the chan (%d)\n", ret);
 458                mbox_free_channel(chan);
 459                chan = ERR_PTR(ret);
 460        }
 461
 462        return chan;
 463}
 464EXPORT_SYMBOL(omap_mbox_request_channel);
 465
 466static struct class omap_mbox_class = { .name = "mbox", };
 467
 468static int omap_mbox_register(struct omap_mbox_device *mdev)
 469{
 470        int ret;
 471        int i;
 472        struct omap_mbox **mboxes;
 473
 474        if (!mdev || !mdev->mboxes)
 475                return -EINVAL;
 476
 477        mboxes = mdev->mboxes;
 478        for (i = 0; mboxes[i]; i++) {
 479                struct omap_mbox *mbox = mboxes[i];
 480
 481                mbox->dev = device_create(&omap_mbox_class, mdev->dev,
 482                                        0, mbox, "%s", mbox->name);
 483                if (IS_ERR(mbox->dev)) {
 484                        ret = PTR_ERR(mbox->dev);
 485                        goto err_out;
 486                }
 487        }
 488
 489        mutex_lock(&omap_mbox_devices_lock);
 490        list_add(&mdev->elem, &omap_mbox_devices);
 491        mutex_unlock(&omap_mbox_devices_lock);
 492
 493        ret = mbox_controller_register(&mdev->controller);
 494
 495err_out:
 496        if (ret) {
 497                while (i--)
 498                        device_unregister(mboxes[i]->dev);
 499        }
 500        return ret;
 501}
 502
 503static int omap_mbox_unregister(struct omap_mbox_device *mdev)
 504{
 505        int i;
 506        struct omap_mbox **mboxes;
 507
 508        if (!mdev || !mdev->mboxes)
 509                return -EINVAL;
 510
 511        mutex_lock(&omap_mbox_devices_lock);
 512        list_del(&mdev->elem);
 513        mutex_unlock(&omap_mbox_devices_lock);
 514
 515        mbox_controller_unregister(&mdev->controller);
 516
 517        mboxes = mdev->mboxes;
 518        for (i = 0; mboxes[i]; i++)
 519                device_unregister(mboxes[i]->dev);
 520        return 0;
 521}
 522
 523static int omap_mbox_chan_startup(struct mbox_chan *chan)
 524{
 525        struct omap_mbox *mbox = mbox_chan_to_omap_mbox(chan);
 526        struct omap_mbox_device *mdev = mbox->parent;
 527        int ret = 0;
 528
 529        mutex_lock(&mdev->cfg_lock);
 530        pm_runtime_get_sync(mdev->dev);
 531        ret = omap_mbox_startup(mbox);
 532        if (ret)
 533                pm_runtime_put_sync(mdev->dev);
 534        mutex_unlock(&mdev->cfg_lock);
 535        return ret;
 536}
 537
 538static void omap_mbox_chan_shutdown(struct mbox_chan *chan)
 539{
 540        struct omap_mbox *mbox = mbox_chan_to_omap_mbox(chan);
 541        struct omap_mbox_device *mdev = mbox->parent;
 542
 543        mutex_lock(&mdev->cfg_lock);
 544        omap_mbox_fini(mbox);
 545        pm_runtime_put_sync(mdev->dev);
 546        mutex_unlock(&mdev->cfg_lock);
 547}
 548
 549static int omap_mbox_chan_send_noirq(struct omap_mbox *mbox, void *data)
 550{
 551        int ret = -EBUSY;
 552
 553        if (!mbox_fifo_full(mbox)) {
 554                _omap_mbox_enable_irq(mbox, IRQ_RX);
 555                mbox_fifo_write(mbox, (mbox_msg_t)data);
 556                ret = 0;
 557                _omap_mbox_disable_irq(mbox, IRQ_RX);
 558
 559                /* we must read and ack the interrupt directly from here */
 560                mbox_fifo_read(mbox);
 561                ack_mbox_irq(mbox, IRQ_RX);
 562        }
 563
 564        return ret;
 565}
 566
 567static int omap_mbox_chan_send(struct omap_mbox *mbox, void *data)
 568{
 569        int ret = -EBUSY;
 570
 571        if (!mbox_fifo_full(mbox)) {
 572                mbox_fifo_write(mbox, (mbox_msg_t)data);
 573                ret = 0;
 574        }
 575
 576        /* always enable the interrupt */
 577        _omap_mbox_enable_irq(mbox, IRQ_TX);
 578        return ret;
 579}
 580
 581static int omap_mbox_chan_send_data(struct mbox_chan *chan, void *data)
 582{
 583        struct omap_mbox *mbox = mbox_chan_to_omap_mbox(chan);
 584        int ret;
 585
 586        if (!mbox)
 587                return -EINVAL;
 588
 589        if (mbox->send_no_irq)
 590                ret = omap_mbox_chan_send_noirq(mbox, data);
 591        else
 592                ret = omap_mbox_chan_send(mbox, data);
 593
 594        return ret;
 595}
 596
 597static const struct mbox_chan_ops omap_mbox_chan_ops = {
 598        .startup        = omap_mbox_chan_startup,
 599        .send_data      = omap_mbox_chan_send_data,
 600        .shutdown       = omap_mbox_chan_shutdown,
 601};
 602
 603#ifdef CONFIG_PM_SLEEP
 604static int omap_mbox_suspend(struct device *dev)
 605{
 606        struct omap_mbox_device *mdev = dev_get_drvdata(dev);
 607        u32 usr, fifo, reg;
 608
 609        if (pm_runtime_status_suspended(dev))
 610                return 0;
 611
 612        for (fifo = 0; fifo < mdev->num_fifos; fifo++) {
 613                if (mbox_read_reg(mdev, MAILBOX_MSGSTATUS(fifo))) {
 614                        dev_err(mdev->dev, "fifo %d has unexpected unread messages\n",
 615                                fifo);
 616                        return -EBUSY;
 617                }
 618        }
 619
 620        for (usr = 0; usr < mdev->num_users; usr++) {
 621                reg = MAILBOX_IRQENABLE(mdev->intr_type, usr);
 622                mdev->irq_ctx[usr] = mbox_read_reg(mdev, reg);
 623        }
 624
 625        return 0;
 626}
 627
 628static int omap_mbox_resume(struct device *dev)
 629{
 630        struct omap_mbox_device *mdev = dev_get_drvdata(dev);
 631        u32 usr, reg;
 632
 633        if (pm_runtime_status_suspended(dev))
 634                return 0;
 635
 636        for (usr = 0; usr < mdev->num_users; usr++) {
 637                reg = MAILBOX_IRQENABLE(mdev->intr_type, usr);
 638                mbox_write_reg(mdev, mdev->irq_ctx[usr], reg);
 639        }
 640
 641        return 0;
 642}
 643#endif
 644
 645static const struct dev_pm_ops omap_mbox_pm_ops = {
 646        SET_SYSTEM_SLEEP_PM_OPS(omap_mbox_suspend, omap_mbox_resume)
 647};
 648
 649static const struct of_device_id omap_mailbox_of_match[] = {
 650        {
 651                .compatible     = "ti,omap2-mailbox",
 652                .data           = (void *)MBOX_INTR_CFG_TYPE1,
 653        },
 654        {
 655                .compatible     = "ti,omap3-mailbox",
 656                .data           = (void *)MBOX_INTR_CFG_TYPE1,
 657        },
 658        {
 659                .compatible     = "ti,omap4-mailbox",
 660                .data           = (void *)MBOX_INTR_CFG_TYPE2,
 661        },
 662        {
 663                /* end */
 664        },
 665};
 666MODULE_DEVICE_TABLE(of, omap_mailbox_of_match);
 667
 668static struct mbox_chan *omap_mbox_of_xlate(struct mbox_controller *controller,
 669                                            const struct of_phandle_args *sp)
 670{
 671        phandle phandle = sp->args[0];
 672        struct device_node *node;
 673        struct omap_mbox_device *mdev;
 674        struct omap_mbox *mbox;
 675
 676        mdev = container_of(controller, struct omap_mbox_device, controller);
 677        if (WARN_ON(!mdev))
 678                return ERR_PTR(-EINVAL);
 679
 680        node = of_find_node_by_phandle(phandle);
 681        if (!node) {
 682                pr_err("%s: could not find node phandle 0x%x\n",
 683                       __func__, phandle);
 684                return ERR_PTR(-ENODEV);
 685        }
 686
 687        mbox = omap_mbox_device_find(mdev, node->name);
 688        of_node_put(node);
 689        return mbox ? mbox->chan : ERR_PTR(-ENOENT);
 690}
 691
 692static int omap_mbox_probe(struct platform_device *pdev)
 693{
 694        struct resource *mem;
 695        int ret;
 696        struct mbox_chan *chnls;
 697        struct omap_mbox **list, *mbox, *mboxblk;
 698        struct omap_mbox_fifo_info *finfo, *finfoblk;
 699        struct omap_mbox_device *mdev;
 700        struct omap_mbox_fifo *fifo;
 701        struct device_node *node = pdev->dev.of_node;
 702        struct device_node *child;
 703        const struct of_device_id *match;
 704        u32 intr_type, info_count;
 705        u32 num_users, num_fifos;
 706        u32 tmp[3];
 707        u32 l;
 708        int i;
 709
 710        if (!node) {
 711                pr_err("%s: only DT-based devices are supported\n", __func__);
 712                return -ENODEV;
 713        }
 714
 715        match = of_match_device(omap_mailbox_of_match, &pdev->dev);
 716        if (!match)
 717                return -ENODEV;
 718        intr_type = (u32)match->data;
 719
 720        if (of_property_read_u32(node, "ti,mbox-num-users", &num_users))
 721                return -ENODEV;
 722
 723        if (of_property_read_u32(node, "ti,mbox-num-fifos", &num_fifos))
 724                return -ENODEV;
 725
 726        info_count = of_get_available_child_count(node);
 727        if (!info_count) {
 728                dev_err(&pdev->dev, "no available mbox devices found\n");
 729                return -ENODEV;
 730        }
 731
 732        finfoblk = devm_kzalloc(&pdev->dev, info_count * sizeof(*finfoblk),
 733                                GFP_KERNEL);
 734        if (!finfoblk)
 735                return -ENOMEM;
 736
 737        finfo = finfoblk;
 738        child = NULL;
 739        for (i = 0; i < info_count; i++, finfo++) {
 740                child = of_get_next_available_child(node, child);
 741                ret = of_property_read_u32_array(child, "ti,mbox-tx", tmp,
 742                                                 ARRAY_SIZE(tmp));
 743                if (ret)
 744                        return ret;
 745                finfo->tx_id = tmp[0];
 746                finfo->tx_irq = tmp[1];
 747                finfo->tx_usr = tmp[2];
 748
 749                ret = of_property_read_u32_array(child, "ti,mbox-rx", tmp,
 750                                                 ARRAY_SIZE(tmp));
 751                if (ret)
 752                        return ret;
 753                finfo->rx_id = tmp[0];
 754                finfo->rx_irq = tmp[1];
 755                finfo->rx_usr = tmp[2];
 756
 757                finfo->name = child->name;
 758
 759                if (of_find_property(child, "ti,mbox-send-noirq", NULL))
 760                        finfo->send_no_irq = true;
 761
 762                if (finfo->tx_id >= num_fifos || finfo->rx_id >= num_fifos ||
 763                    finfo->tx_usr >= num_users || finfo->rx_usr >= num_users)
 764                        return -EINVAL;
 765        }
 766
 767        mdev = devm_kzalloc(&pdev->dev, sizeof(*mdev), GFP_KERNEL);
 768        if (!mdev)
 769                return -ENOMEM;
 770
 771        mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 772        mdev->mbox_base = devm_ioremap_resource(&pdev->dev, mem);
 773        if (IS_ERR(mdev->mbox_base))
 774                return PTR_ERR(mdev->mbox_base);
 775
 776        mdev->irq_ctx = devm_kzalloc(&pdev->dev, num_users * sizeof(u32),
 777                                     GFP_KERNEL);
 778        if (!mdev->irq_ctx)
 779                return -ENOMEM;
 780
 781        /* allocate one extra for marking end of list */
 782        list = devm_kzalloc(&pdev->dev, (info_count + 1) * sizeof(*list),
 783                            GFP_KERNEL);
 784        if (!list)
 785                return -ENOMEM;
 786
 787        chnls = devm_kzalloc(&pdev->dev, (info_count + 1) * sizeof(*chnls),
 788                             GFP_KERNEL);
 789        if (!chnls)
 790                return -ENOMEM;
 791
 792        mboxblk = devm_kzalloc(&pdev->dev, info_count * sizeof(*mbox),
 793                               GFP_KERNEL);
 794        if (!mboxblk)
 795                return -ENOMEM;
 796
 797        mbox = mboxblk;
 798        finfo = finfoblk;
 799        for (i = 0; i < info_count; i++, finfo++) {
 800                fifo = &mbox->tx_fifo;
 801                fifo->msg = MAILBOX_MESSAGE(finfo->tx_id);
 802                fifo->fifo_stat = MAILBOX_FIFOSTATUS(finfo->tx_id);
 803                fifo->intr_bit = MAILBOX_IRQ_NOTFULL(finfo->tx_id);
 804                fifo->irqenable = MAILBOX_IRQENABLE(intr_type, finfo->tx_usr);
 805                fifo->irqstatus = MAILBOX_IRQSTATUS(intr_type, finfo->tx_usr);
 806                fifo->irqdisable = MAILBOX_IRQDISABLE(intr_type, finfo->tx_usr);
 807
 808                fifo = &mbox->rx_fifo;
 809                fifo->msg = MAILBOX_MESSAGE(finfo->rx_id);
 810                fifo->msg_stat =  MAILBOX_MSGSTATUS(finfo->rx_id);
 811                fifo->intr_bit = MAILBOX_IRQ_NEWMSG(finfo->rx_id);
 812                fifo->irqenable = MAILBOX_IRQENABLE(intr_type, finfo->rx_usr);
 813                fifo->irqstatus = MAILBOX_IRQSTATUS(intr_type, finfo->rx_usr);
 814                fifo->irqdisable = MAILBOX_IRQDISABLE(intr_type, finfo->rx_usr);
 815
 816                mbox->send_no_irq = finfo->send_no_irq;
 817                mbox->intr_type = intr_type;
 818
 819                mbox->parent = mdev;
 820                mbox->name = finfo->name;
 821                mbox->irq = platform_get_irq(pdev, finfo->tx_irq);
 822                if (mbox->irq < 0)
 823                        return mbox->irq;
 824                mbox->chan = &chnls[i];
 825                chnls[i].con_priv = mbox;
 826                list[i] = mbox++;
 827        }
 828
 829        mutex_init(&mdev->cfg_lock);
 830        mdev->dev = &pdev->dev;
 831        mdev->num_users = num_users;
 832        mdev->num_fifos = num_fifos;
 833        mdev->intr_type = intr_type;
 834        mdev->mboxes = list;
 835
 836        /* OMAP does not have a Tx-Done IRQ, but rather a Tx-Ready IRQ */
 837        mdev->controller.txdone_irq = true;
 838        mdev->controller.dev = mdev->dev;
 839        mdev->controller.ops = &omap_mbox_chan_ops;
 840        mdev->controller.chans = chnls;
 841        mdev->controller.num_chans = info_count;
 842        mdev->controller.of_xlate = omap_mbox_of_xlate;
 843        ret = omap_mbox_register(mdev);
 844        if (ret)
 845                return ret;
 846
 847        platform_set_drvdata(pdev, mdev);
 848        pm_runtime_enable(mdev->dev);
 849
 850        ret = pm_runtime_get_sync(mdev->dev);
 851        if (ret < 0) {
 852                pm_runtime_put_noidle(mdev->dev);
 853                goto unregister;
 854        }
 855
 856        /*
 857         * just print the raw revision register, the format is not
 858         * uniform across all SoCs
 859         */
 860        l = mbox_read_reg(mdev, MAILBOX_REVISION);
 861        dev_info(mdev->dev, "omap mailbox rev 0x%x\n", l);
 862
 863        ret = pm_runtime_put_sync(mdev->dev);
 864        if (ret < 0)
 865                goto unregister;
 866
 867        devm_kfree(&pdev->dev, finfoblk);
 868        return 0;
 869
 870unregister:
 871        pm_runtime_disable(mdev->dev);
 872        omap_mbox_unregister(mdev);
 873        return ret;
 874}
 875
 876static int omap_mbox_remove(struct platform_device *pdev)
 877{
 878        struct omap_mbox_device *mdev = platform_get_drvdata(pdev);
 879
 880        pm_runtime_disable(mdev->dev);
 881        omap_mbox_unregister(mdev);
 882
 883        return 0;
 884}
 885
 886static struct platform_driver omap_mbox_driver = {
 887        .probe  = omap_mbox_probe,
 888        .remove = omap_mbox_remove,
 889        .driver = {
 890                .name = "omap-mailbox",
 891                .pm = &omap_mbox_pm_ops,
 892                .of_match_table = of_match_ptr(omap_mailbox_of_match),
 893        },
 894};
 895
 896static int __init omap_mbox_init(void)
 897{
 898        int err;
 899
 900        err = class_register(&omap_mbox_class);
 901        if (err)
 902                return err;
 903
 904        /* kfifo size sanity check: alignment and minimal size */
 905        mbox_kfifo_size = ALIGN(mbox_kfifo_size, sizeof(mbox_msg_t));
 906        mbox_kfifo_size = max_t(unsigned int, mbox_kfifo_size,
 907                                                        sizeof(mbox_msg_t));
 908
 909        err = platform_driver_register(&omap_mbox_driver);
 910        if (err)
 911                class_unregister(&omap_mbox_class);
 912
 913        return err;
 914}
 915subsys_initcall(omap_mbox_init);
 916
 917static void __exit omap_mbox_exit(void)
 918{
 919        platform_driver_unregister(&omap_mbox_driver);
 920        class_unregister(&omap_mbox_class);
 921}
 922module_exit(omap_mbox_exit);
 923
 924MODULE_LICENSE("GPL v2");
 925MODULE_DESCRIPTION("omap mailbox: interrupt driven messaging");
 926MODULE_AUTHOR("Toshihiro Kobayashi");
 927MODULE_AUTHOR("Hiroshi DOYU");
 928