LXR linux/drivers/media/i2c/adv748x/adv748x-core.c

   1/*
   2 * Driver for Analog Devices ADV748X HDMI receiver with AFE
   3 *
   4 * Copyright (C) 2017 Renesas Electronics Corp.
   5 *
   6 * This program is free software; you can redistribute  it and/or modify it
   7 * under  the terms of  the GNU General  Public License as published by the
   8 * Free Software Foundation;  either version 2 of the  License, or (at your
   9 * option) any later version.
  10 *
  11 * Authors:
  12 *      Koji Matsuoka <koji.matsuoka.xm@renesas.com>
  13 *      Niklas Söderlund <niklas.soderlund@ragnatech.se>
  14 *      Kieran Bingham <kieran.bingham@ideasonboard.com>
  15 */
  16
  17#include <linux/delay.h>
  18#include <linux/errno.h>
  19#include <linux/i2c.h>
  20#include <linux/module.h>
  21#include <linux/mutex.h>
  22#include <linux/of_graph.h>
  23#include <linux/regmap.h>
  24#include <linux/slab.h>
  25#include <linux/v4l2-dv-timings.h>
  26
  27#include <media/v4l2-ctrls.h>
  28#include <media/v4l2-device.h>
  29#include <media/v4l2-dv-timings.h>
  30#include <media/v4l2-ioctl.h>
  31
  32#include "adv748x.h"
  33
  34/* -----------------------------------------------------------------------------
  35 * Register manipulation
  36 */
  37
  38#define ADV748X_REGMAP_CONF(n) \
  39{ \
  40        .name = n, \
  41        .reg_bits = 8, \
  42        .val_bits = 8, \
  43        .max_register = 0xff, \
  44        .cache_type = REGCACHE_NONE, \
  45}
  46
  47static const struct regmap_config adv748x_regmap_cnf[] = {
  48        ADV748X_REGMAP_CONF("io"),
  49        ADV748X_REGMAP_CONF("dpll"),
  50        ADV748X_REGMAP_CONF("cp"),
  51        ADV748X_REGMAP_CONF("hdmi"),
  52        ADV748X_REGMAP_CONF("edid"),
  53        ADV748X_REGMAP_CONF("repeater"),
  54        ADV748X_REGMAP_CONF("infoframe"),
  55        ADV748X_REGMAP_CONF("cbus"),
  56        ADV748X_REGMAP_CONF("cec"),
  57        ADV748X_REGMAP_CONF("sdp"),
  58        ADV748X_REGMAP_CONF("txa"),
  59        ADV748X_REGMAP_CONF("txb"),
  60};
  61
  62static int adv748x_configure_regmap(struct adv748x_state *state, int region)
  63{
  64        int err;
  65
  66        if (!state->i2c_clients[region])
  67                return -ENODEV;
  68
  69        state->regmap[region] =
  70                devm_regmap_init_i2c(state->i2c_clients[region],
  71                                     &adv748x_regmap_cnf[region]);
  72
  73        if (IS_ERR(state->regmap[region])) {
  74                err = PTR_ERR(state->regmap[region]);
  75                adv_err(state,
  76                        "Error initializing regmap %d with error %d\n",
  77                        region, err);
  78                return -EINVAL;
  79        }
  80
  81        return 0;
  82}
  83struct adv748x_register_map {
  84        const char *name;
  85        u8 default_addr;
  86};
  87
  88static const struct adv748x_register_map adv748x_default_addresses[] = {
  89        [ADV748X_PAGE_IO] = { "main", 0x70 },
  90        [ADV748X_PAGE_DPLL] = { "dpll", 0x26 },
  91        [ADV748X_PAGE_CP] = { "cp", 0x22 },
  92        [ADV748X_PAGE_HDMI] = { "hdmi", 0x34 },
  93        [ADV748X_PAGE_EDID] = { "edid", 0x36 },
  94        [ADV748X_PAGE_REPEATER] = { "repeater", 0x32 },
  95        [ADV748X_PAGE_INFOFRAME] = { "infoframe", 0x31 },
  96        [ADV748X_PAGE_CBUS] = { "cbus", 0x30 },
  97        [ADV748X_PAGE_CEC] = { "cec", 0x41 },
  98        [ADV748X_PAGE_SDP] = { "sdp", 0x79 },
  99        [ADV748X_PAGE_TXB] = { "txb", 0x48 },
 100        [ADV748X_PAGE_TXA] = { "txa", 0x4a },
 101};
 102
 103static int adv748x_read_check(struct adv748x_state *state,
 104                              int client_page, u8 reg)
 105{
 106        struct i2c_client *client = state->i2c_clients[client_page];
 107        int err;
 108        unsigned int val;
 109
 110        err = regmap_read(state->regmap[client_page], reg, &val);
 111
 112        if (err) {
 113                adv_err(state, "error reading %02x, %02x\n",
 114                                client->addr, reg);
 115                return err;
 116        }
 117
 118        return val;
 119}
 120
 121int adv748x_read(struct adv748x_state *state, u8 page, u8 reg)
 122{
 123        return adv748x_read_check(state, page, reg);
 124}
 125
 126int adv748x_write(struct adv748x_state *state, u8 page, u8 reg, u8 value)
 127{
 128        return regmap_write(state->regmap[page], reg, value);
 129}
 130
 131/* adv748x_write_block(): Write raw data with a maximum of I2C_SMBUS_BLOCK_MAX
 132 * size to one or more registers.
 133 *
 134 * A value of zero will be returned on success, a negative errno will
 135 * be returned in error cases.
 136 */
 137int adv748x_write_block(struct adv748x_state *state, int client_page,
 138                        unsigned int init_reg, const void *val,
 139                        size_t val_len)
 140{
 141        struct regmap *regmap = state->regmap[client_page];
 142
 143        if (val_len > I2C_SMBUS_BLOCK_MAX)
 144                val_len = I2C_SMBUS_BLOCK_MAX;
 145
 146        return regmap_raw_write(regmap, init_reg, val, val_len);
 147}
 148
 149static int adv748x_set_slave_addresses(struct adv748x_state *state)
 150{
 151        struct i2c_client *client;
 152        unsigned int i;
 153        u8 io_reg;
 154
 155        for (i = ADV748X_PAGE_DPLL; i < ADV748X_PAGE_MAX; ++i) {
 156                io_reg = ADV748X_IO_SLAVE_ADDR_BASE + i;
 157                client = state->i2c_clients[i];
 158
 159                io_write(state, io_reg, client->addr << 1);
 160        }
 161
 162        return 0;
 163}
 164
 165static void adv748x_unregister_clients(struct adv748x_state *state)
 166{
 167        unsigned int i;
 168
 169        for (i = 1; i < ARRAY_SIZE(state->i2c_clients); ++i)
 170                i2c_unregister_device(state->i2c_clients[i]);
 171}
 172
 173static int adv748x_initialise_clients(struct adv748x_state *state)
 174{
 175        unsigned int i;
 176        int ret;
 177
 178        for (i = ADV748X_PAGE_DPLL; i < ADV748X_PAGE_MAX; ++i) {
 179                state->i2c_clients[i] = i2c_new_secondary_device(
 180                                state->client,
 181                                adv748x_default_addresses[i].name,
 182                                adv748x_default_addresses[i].default_addr);
 183
 184                if (state->i2c_clients[i] == NULL) {
 185                        adv_err(state, "failed to create i2c client %u\n", i);
 186                        return -ENOMEM;
 187                }
 188
 189                ret = adv748x_configure_regmap(state, i);
 190                if (ret)
 191                        return ret;
 192        }
 193
 194        return adv748x_set_slave_addresses(state);
 195}
 196
 197/**
 198 * struct adv748x_reg_value - Register write instruction
 199 * @page:               Regmap page identifier
 200 * @reg:                I2C register
 201 * @value:              value to write to @page at @reg
 202 */
 203struct adv748x_reg_value {
 204        u8 page;
 205        u8 reg;
 206        u8 value;
 207};
 208
 209static int adv748x_write_regs(struct adv748x_state *state,
 210                              const struct adv748x_reg_value *regs)
 211{
 212        int ret;
 213
 214        while (regs->page != ADV748X_PAGE_EOR) {
 215                if (regs->page == ADV748X_PAGE_WAIT) {
 216                        msleep(regs->value);
 217                } else {
 218                        ret = adv748x_write(state, regs->page, regs->reg,
 219                                      regs->value);
 220                        if (ret < 0) {
 221                                adv_err(state,
 222                                        "Error regs page: 0x%02x reg: 0x%02x\n",
 223                                        regs->page, regs->reg);
 224                                return ret;
 225                        }
 226                }
 227                regs++;
 228        }
 229
 230        return 0;
 231}
 232
 233/* -----------------------------------------------------------------------------
 234 * TXA and TXB
 235 */
 236
 237static const struct adv748x_reg_value adv748x_power_up_txa_4lane[] = {
 238
 239        {ADV748X_PAGE_TXA, 0x00, 0x84}, /* Enable 4-lane MIPI */
 240        {ADV748X_PAGE_TXA, 0x00, 0xa4}, /* Set Auto DPHY Timing */
 241
 242        {ADV748X_PAGE_TXA, 0x31, 0x82}, /* ADI Required Write */
 243        {ADV748X_PAGE_TXA, 0x1e, 0x40}, /* ADI Required Write */
 244        {ADV748X_PAGE_TXA, 0xda, 0x01}, /* i2c_mipi_pll_en - 1'b1 */
 245        {ADV748X_PAGE_WAIT, 0x00, 0x02},/* delay 2 */
 246        {ADV748X_PAGE_TXA, 0x00, 0x24 },/* Power-up CSI-TX */
 247        {ADV748X_PAGE_WAIT, 0x00, 0x01},/* delay 1 */
 248        {ADV748X_PAGE_TXA, 0xc1, 0x2b}, /* ADI Required Write */
 249        {ADV748X_PAGE_WAIT, 0x00, 0x01},/* delay 1 */
 250        {ADV748X_PAGE_TXA, 0x31, 0x80}, /* ADI Required Write */
 251
 252        {ADV748X_PAGE_EOR, 0xff, 0xff}  /* End of register table */
 253};
 254
 255static const struct adv748x_reg_value adv748x_power_down_txa_4lane[] = {
 256
 257        {ADV748X_PAGE_TXA, 0x31, 0x82}, /* ADI Required Write */
 258        {ADV748X_PAGE_TXA, 0x1e, 0x00}, /* ADI Required Write */
 259        {ADV748X_PAGE_TXA, 0x00, 0x84}, /* Enable 4-lane MIPI */
 260        {ADV748X_PAGE_TXA, 0xda, 0x01}, /* i2c_mipi_pll_en - 1'b1 */
 261        {ADV748X_PAGE_TXA, 0xc1, 0x3b}, /* ADI Required Write */
 262
 263        {ADV748X_PAGE_EOR, 0xff, 0xff}  /* End of register table */
 264};
 265
 266static const struct adv748x_reg_value adv748x_power_up_txb_1lane[] = {
 267
 268        {ADV748X_PAGE_TXB, 0x00, 0x81}, /* Enable 1-lane MIPI */
 269        {ADV748X_PAGE_TXB, 0x00, 0xa1}, /* Set Auto DPHY Timing */
 270
 271        {ADV748X_PAGE_TXB, 0x31, 0x82}, /* ADI Required Write */
 272        {ADV748X_PAGE_TXB, 0x1e, 0x40}, /* ADI Required Write */
 273        {ADV748X_PAGE_TXB, 0xda, 0x01}, /* i2c_mipi_pll_en - 1'b1 */
 274        {ADV748X_PAGE_WAIT, 0x00, 0x02},/* delay 2 */
 275        {ADV748X_PAGE_TXB, 0x00, 0x21 },/* Power-up CSI-TX */
 276        {ADV748X_PAGE_WAIT, 0x00, 0x01},/* delay 1 */
 277        {ADV748X_PAGE_TXB, 0xc1, 0x2b}, /* ADI Required Write */
 278        {ADV748X_PAGE_WAIT, 0x00, 0x01},/* delay 1 */
 279        {ADV748X_PAGE_TXB, 0x31, 0x80}, /* ADI Required Write */
 280
 281        {ADV748X_PAGE_EOR, 0xff, 0xff}  /* End of register table */
 282};
 283
 284static const struct adv748x_reg_value adv748x_power_down_txb_1lane[] = {
 285
 286        {ADV748X_PAGE_TXB, 0x31, 0x82}, /* ADI Required Write */
 287        {ADV748X_PAGE_TXB, 0x1e, 0x00}, /* ADI Required Write */
 288        {ADV748X_PAGE_TXB, 0x00, 0x81}, /* Enable 4-lane MIPI */
 289        {ADV748X_PAGE_TXB, 0xda, 0x01}, /* i2c_mipi_pll_en - 1'b1 */
 290        {ADV748X_PAGE_TXB, 0xc1, 0x3b}, /* ADI Required Write */
 291
 292        {ADV748X_PAGE_EOR, 0xff, 0xff}  /* End of register table */
 293};
 294
 295int adv748x_txa_power(struct adv748x_state *state, bool on)
 296{
 297        int val;
 298
 299        val = txa_read(state, ADV748X_CSI_FS_AS_LS);
 300        if (val < 0)
 301                return val;
 302
 303        /*
 304         * This test against BIT(6) is not documented by the datasheet, but was
 305         * specified in the downstream driver.
 306         * Track with a WARN_ONCE to determine if it is ever set by HW.
 307         */
 308        WARN_ONCE((on && val & ADV748X_CSI_FS_AS_LS_UNKNOWN),
 309                        "Enabling with unknown bit set");
 310
 311        if (on)
 312                return adv748x_write_regs(state, adv748x_power_up_txa_4lane);
 313
 314        return adv748x_write_regs(state, adv748x_power_down_txa_4lane);
 315}
 316
 317int adv748x_txb_power(struct adv748x_state *state, bool on)
 318{
 319        int val;
 320
 321        val = txb_read(state, ADV748X_CSI_FS_AS_LS);
 322        if (val < 0)
 323                return val;
 324
 325        /*
 326         * This test against BIT(6) is not documented by the datasheet, but was
 327         * specified in the downstream driver.
 328         * Track with a WARN_ONCE to determine if it is ever set by HW.
 329         */
 330        WARN_ONCE((on && val & ADV748X_CSI_FS_AS_LS_UNKNOWN),
 331                        "Enabling with unknown bit set");
 332
 333        if (on)
 334                return adv748x_write_regs(state, adv748x_power_up_txb_1lane);
 335
 336        return adv748x_write_regs(state, adv748x_power_down_txb_1lane);
 337}
 338
 339/* -----------------------------------------------------------------------------
 340 * Media Operations
 341 */
 342
 343static const struct media_entity_operations adv748x_media_ops = {
 344        .link_validate = v4l2_subdev_link_validate,
 345};
 346
 347/* -----------------------------------------------------------------------------
 348 * HW setup
 349 */
 350
 351static const struct adv748x_reg_value adv748x_sw_reset[] = {
 352
 353        {ADV748X_PAGE_IO, 0xff, 0xff},  /* SW reset */
 354        {ADV748X_PAGE_WAIT, 0x00, 0x05},/* delay 5 */
 355        {ADV748X_PAGE_IO, 0x01, 0x76},  /* ADI Required Write */
 356        {ADV748X_PAGE_IO, 0xf2, 0x01},  /* Enable I2C Read Auto-Increment */
 357        {ADV748X_PAGE_EOR, 0xff, 0xff}  /* End of register table */
 358};
 359
 360/* Supported Formats For Script Below */
 361/* - 01-29 HDMI to MIPI TxA CSI 4-Lane - RGB888: */
 362static const struct adv748x_reg_value adv748x_init_txa_4lane[] = {
 363        /* Disable chip powerdown & Enable HDMI Rx block */
 364        {ADV748X_PAGE_IO, 0x00, 0x40},
 365
 366        {ADV748X_PAGE_REPEATER, 0x40, 0x83}, /* Enable HDCP 1.1 */
 367
 368        {ADV748X_PAGE_HDMI, 0x00, 0x08},/* Foreground Channel = A */
 369        {ADV748X_PAGE_HDMI, 0x98, 0xff},/* ADI Required Write */
 370        {ADV748X_PAGE_HDMI, 0x99, 0xa3},/* ADI Required Write */
 371        {ADV748X_PAGE_HDMI, 0x9a, 0x00},/* ADI Required Write */
 372        {ADV748X_PAGE_HDMI, 0x9b, 0x0a},/* ADI Required Write */
 373        {ADV748X_PAGE_HDMI, 0x9d, 0x40},/* ADI Required Write */
 374        {ADV748X_PAGE_HDMI, 0xcb, 0x09},/* ADI Required Write */
 375        {ADV748X_PAGE_HDMI, 0x3d, 0x10},/* ADI Required Write */
 376        {ADV748X_PAGE_HDMI, 0x3e, 0x7b},/* ADI Required Write */
 377        {ADV748X_PAGE_HDMI, 0x3f, 0x5e},/* ADI Required Write */
 378        {ADV748X_PAGE_HDMI, 0x4e, 0xfe},/* ADI Required Write */
 379        {ADV748X_PAGE_HDMI, 0x4f, 0x18},/* ADI Required Write */
 380        {ADV748X_PAGE_HDMI, 0x57, 0xa3},/* ADI Required Write */
 381        {ADV748X_PAGE_HDMI, 0x58, 0x04},/* ADI Required Write */
 382        {ADV748X_PAGE_HDMI, 0x85, 0x10},/* ADI Required Write */
 383
 384        {ADV748X_PAGE_HDMI, 0x83, 0x00},/* Enable All Terminations */
 385        {ADV748X_PAGE_HDMI, 0xa3, 0x01},/* ADI Required Write */
 386        {ADV748X_PAGE_HDMI, 0xbe, 0x00},/* ADI Required Write */
 387
 388        {ADV748X_PAGE_HDMI, 0x6c, 0x01},/* HPA Manual Enable */
 389        {ADV748X_PAGE_HDMI, 0xf8, 0x01},/* HPA Asserted */
 390        {ADV748X_PAGE_HDMI, 0x0f, 0x00},/* Audio Mute Speed Set to Fastest */
 391        /* (Smallest Step Size) */
 392
 393        {ADV748X_PAGE_IO, 0x04, 0x02},  /* RGB Out of CP */
 394        {ADV748X_PAGE_IO, 0x12, 0xf0},  /* CSC Depends on ip Packets, SDR 444 */
 395        {ADV748X_PAGE_IO, 0x17, 0x80},  /* Luma & Chroma can reach 254d */
 396        {ADV748X_PAGE_IO, 0x03, 0x86},  /* CP-Insert_AV_Code */
 397
 398        {ADV748X_PAGE_CP, 0x7c, 0x00},  /* ADI Required Write */
 399
 400        {ADV748X_PAGE_IO, 0x0c, 0xe0},  /* Enable LLC_DLL & Double LLC Timing */
 401        {ADV748X_PAGE_IO, 0x0e, 0xdd},  /* LLC/PIX/SPI PINS TRISTATED AUD */
 402        /* Outputs Enabled */
 403        {ADV748X_PAGE_IO, 0x10, 0xa0},  /* Enable 4-lane CSI Tx & Pixel Port */
 404
 405        {ADV748X_PAGE_TXA, 0x00, 0x84}, /* Enable 4-lane MIPI */
 406        {ADV748X_PAGE_TXA, 0x00, 0xa4}, /* Set Auto DPHY Timing */
 407        {ADV748X_PAGE_TXA, 0xdb, 0x10}, /* ADI Required Write */
 408        {ADV748X_PAGE_TXA, 0xd6, 0x07}, /* ADI Required Write */
 409        {ADV748X_PAGE_TXA, 0xc4, 0x0a}, /* ADI Required Write */
 410        {ADV748X_PAGE_TXA, 0x71, 0x33}, /* ADI Required Write */
 411        {ADV748X_PAGE_TXA, 0x72, 0x11}, /* ADI Required Write */
 412        {ADV748X_PAGE_TXA, 0xf0, 0x00}, /* i2c_dphy_pwdn - 1'b0 */
 413
 414        {ADV748X_PAGE_TXA, 0x31, 0x82}, /* ADI Required Write */
 415        {ADV748X_PAGE_TXA, 0x1e, 0x40}, /* ADI Required Write */
 416        {ADV748X_PAGE_TXA, 0xda, 0x01}, /* i2c_mipi_pll_en - 1'b1 */
 417        {ADV748X_PAGE_WAIT, 0x00, 0x02},/* delay 2 */
 418        {ADV748X_PAGE_TXA, 0x00, 0x24 },/* Power-up CSI-TX */
 419        {ADV748X_PAGE_WAIT, 0x00, 0x01},/* delay 1 */
 420        {ADV748X_PAGE_TXA, 0xc1, 0x2b}, /* ADI Required Write */
 421        {ADV748X_PAGE_WAIT, 0x00, 0x01},/* delay 1 */
 422        {ADV748X_PAGE_TXA, 0x31, 0x80}, /* ADI Required Write */
 423
 424        {ADV748X_PAGE_EOR, 0xff, 0xff}  /* End of register table */
 425};
 426
 427/* 02-01 Analog CVBS to MIPI TX-B CSI 1-Lane - */
 428/* Autodetect CVBS Single Ended In Ain 1 - MIPI Out */
 429static const struct adv748x_reg_value adv748x_init_txb_1lane[] = {
 430
 431        {ADV748X_PAGE_IO, 0x00, 0x30},  /* Disable chip powerdown Rx */
 432        {ADV748X_PAGE_IO, 0xf2, 0x01},  /* Enable I2C Read Auto-Increment */
 433
 434        {ADV748X_PAGE_IO, 0x0e, 0xff},  /* LLC/PIX/AUD/SPI PINS TRISTATED */
 435
 436        {ADV748X_PAGE_SDP, 0x0f, 0x00}, /* Exit Power Down Mode */
 437        {ADV748X_PAGE_SDP, 0x52, 0xcd}, /* ADI Required Write */
 438
 439        {ADV748X_PAGE_SDP, 0x0e, 0x80}, /* ADI Required Write */
 440        {ADV748X_PAGE_SDP, 0x9c, 0x00}, /* ADI Required Write */
 441        {ADV748X_PAGE_SDP, 0x9c, 0xff}, /* ADI Required Write */
 442        {ADV748X_PAGE_SDP, 0x0e, 0x00}, /* ADI Required Write */
 443
 444        /* ADI recommended writes for improved video quality */
 445        {ADV748X_PAGE_SDP, 0x80, 0x51}, /* ADI Required Write */
 446        {ADV748X_PAGE_SDP, 0x81, 0x51}, /* ADI Required Write */
 447        {ADV748X_PAGE_SDP, 0x82, 0x68}, /* ADI Required Write */
 448
 449        {ADV748X_PAGE_SDP, 0x03, 0x42}, /* Tri-S Output , PwrDwn 656 pads */
 450        {ADV748X_PAGE_SDP, 0x04, 0xb5}, /* ITU-R BT.656-4 compatible */
 451        {ADV748X_PAGE_SDP, 0x13, 0x00}, /* ADI Required Write */
 452
 453        {ADV748X_PAGE_SDP, 0x17, 0x41}, /* Select SH1 */
 454        {ADV748X_PAGE_SDP, 0x31, 0x12}, /* ADI Required Write */
 455        {ADV748X_PAGE_SDP, 0xe6, 0x4f},  /* V bit end pos manually in NTSC */
 456
 457        /* Enable 1-Lane MIPI Tx, */
 458        /* enable pixel output and route SD through Pixel port */
 459        {ADV748X_PAGE_IO, 0x10, 0x70},
 460
 461        {ADV748X_PAGE_TXB, 0x00, 0x81}, /* Enable 1-lane MIPI */
 462        {ADV748X_PAGE_TXB, 0x00, 0xa1}, /* Set Auto DPHY Timing */
 463        {ADV748X_PAGE_TXB, 0xd2, 0x40}, /* ADI Required Write */
 464        {ADV748X_PAGE_TXB, 0xc4, 0x0a}, /* ADI Required Write */
 465        {ADV748X_PAGE_TXB, 0x71, 0x33}, /* ADI Required Write */
 466        {ADV748X_PAGE_TXB, 0x72, 0x11}, /* ADI Required Write */
 467        {ADV748X_PAGE_TXB, 0xf0, 0x00}, /* i2c_dphy_pwdn - 1'b0 */
 468        {ADV748X_PAGE_TXB, 0x31, 0x82}, /* ADI Required Write */
 469        {ADV748X_PAGE_TXB, 0x1e, 0x40}, /* ADI Required Write */
 470        {ADV748X_PAGE_TXB, 0xda, 0x01}, /* i2c_mipi_pll_en - 1'b1 */
 471
 472        {ADV748X_PAGE_WAIT, 0x00, 0x02},/* delay 2 */
 473        {ADV748X_PAGE_TXB, 0x00, 0x21 },/* Power-up CSI-TX */
 474        {ADV748X_PAGE_WAIT, 0x00, 0x01},/* delay 1 */
 475        {ADV748X_PAGE_TXB, 0xc1, 0x2b}, /* ADI Required Write */
 476        {ADV748X_PAGE_WAIT, 0x00, 0x01},/* delay 1 */
 477        {ADV748X_PAGE_TXB, 0x31, 0x80}, /* ADI Required Write */
 478
 479        {ADV748X_PAGE_EOR, 0xff, 0xff}  /* End of register table */
 480};
 481
 482static int adv748x_reset(struct adv748x_state *state)
 483{
 484        int ret;
 485
 486        ret = adv748x_write_regs(state, adv748x_sw_reset);
 487        if (ret < 0)
 488                return ret;
 489
 490        ret = adv748x_set_slave_addresses(state);
 491        if (ret < 0)
 492                return ret;
 493
 494        /* Init and power down TXA */
 495        ret = adv748x_write_regs(state, adv748x_init_txa_4lane);
 496        if (ret)
 497                return ret;
 498
 499        adv748x_txa_power(state, 0);
 500
 501        /* Init and power down TXB */
 502        ret = adv748x_write_regs(state, adv748x_init_txb_1lane);
 503        if (ret)
 504                return ret;
 505
 506        adv748x_txb_power(state, 0);
 507
 508        /* Disable chip powerdown & Enable HDMI Rx block */
 509        io_write(state, ADV748X_IO_PD, ADV748X_IO_PD_RX_EN);
 510
 511        /* Enable 4-lane CSI Tx & Pixel Port */
 512        io_write(state, ADV748X_IO_10, ADV748X_IO_10_CSI4_EN |
 513                                       ADV748X_IO_10_CSI1_EN |
 514                                       ADV748X_IO_10_PIX_OUT_EN);
 515
 516        /* Use vid_std and v_freq as freerun resolution for CP */
 517        cp_clrset(state, ADV748X_CP_CLMP_POS, ADV748X_CP_CLMP_POS_DIS_AUTO,
 518                                              ADV748X_CP_CLMP_POS_DIS_AUTO);
 519
 520        return 0;
 521}
 522
 523static int adv748x_identify_chip(struct adv748x_state *state)
 524{
 525        int msb, lsb;
 526
 527        lsb = io_read(state, ADV748X_IO_CHIP_REV_ID_1);
 528        msb = io_read(state, ADV748X_IO_CHIP_REV_ID_2);
 529
 530        if (lsb < 0 || msb < 0) {
 531                adv_err(state, "Failed to read chip revision\n");
 532                return -EIO;
 533        }
 534
 535        adv_info(state, "chip found @ 0x%02x revision %02x%02x\n",
 536                 state->client->addr << 1, lsb, msb);
 537
 538        return 0;
 539}
 540
 541/* -----------------------------------------------------------------------------
 542 * i2c driver
 543 */
 544
 545void adv748x_subdev_init(struct v4l2_subdev *sd, struct adv748x_state *state,
 546                         const struct v4l2_subdev_ops *ops, u32 function,
 547                         const char *ident)
 548{
 549        v4l2_subdev_init(sd, ops);
 550        sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
 551
 552        /* the owner is the same as the i2c_client's driver owner */
 553        sd->owner = state->dev->driver->owner;
 554        sd->dev = state->dev;
 555
 556        v4l2_set_subdevdata(sd, state);
 557
 558        /* initialize name */
 559        snprintf(sd->name, sizeof(sd->name), "%s %d-%04x %s",
 560                state->dev->driver->name,
 561                i2c_adapter_id(state->client->adapter),
 562                state->client->addr, ident);
 563
 564        sd->entity.function = function;
 565        sd->entity.ops = &adv748x_media_ops;
 566}
 567
 568static int adv748x_parse_dt(struct adv748x_state *state)
 569{
 570        struct device_node *ep_np = NULL;
 571        struct of_endpoint ep;
 572        bool found = false;
 573
 574        for_each_endpoint_of_node(state->dev->of_node, ep_np) {
 575                of_graph_parse_endpoint(ep_np, &ep);
 576                adv_info(state, "Endpoint %pOF on port %d", ep.local_node,
 577                         ep.port);
 578
 579                if (ep.port >= ADV748X_PORT_MAX) {
 580                        adv_err(state, "Invalid endpoint %pOF on port %d",
 581                                ep.local_node, ep.port);
 582
 583                        continue;
 584                }
 585
 586                if (state->endpoints[ep.port]) {
 587                        adv_err(state,
 588                                "Multiple port endpoints are not supported");
 589                        continue;
 590                }
 591
 592                of_node_get(ep_np);
 593                state->endpoints[ep.port] = ep_np;
 594
 595                found = true;
 596        }
 597
 598        return found ? 0 : -ENODEV;
 599}
 600
 601static void adv748x_dt_cleanup(struct adv748x_state *state)
 602{
 603        unsigned int i;
 604
 605        for (i = 0; i < ADV748X_PORT_MAX; i++)
 606                of_node_put(state->endpoints[i]);
 607}
 608
 609static int adv748x_probe(struct i2c_client *client,
 610                         const struct i2c_device_id *id)
 611{
 612        struct adv748x_state *state;
 613        int ret;
 614
 615        /* Check if the adapter supports the needed features */
 616        if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
 617                return -EIO;
 618
 619        state = kzalloc(sizeof(struct adv748x_state), GFP_KERNEL);
 620        if (!state)
 621                return -ENOMEM;
 622
 623        mutex_init(&state->mutex);
 624
 625        state->dev = &client->dev;
 626        state->client = client;
 627        state->i2c_clients[ADV748X_PAGE_IO] = client;
 628        i2c_set_clientdata(client, state);
 629
 630        /* Discover and process ports declared by the Device tree endpoints */
 631        ret = adv748x_parse_dt(state);
 632        if (ret) {
 633                adv_err(state, "Failed to parse device tree");
 634                goto err_free_mutex;
 635        }
 636
 637        /* Configure IO Regmap region */
 638        ret = adv748x_configure_regmap(state, ADV748X_PAGE_IO);
 639        if (ret) {
 640                adv_err(state, "Error configuring IO regmap region");
 641                goto err_cleanup_dt;
 642        }
 643
 644        ret = adv748x_identify_chip(state);
 645        if (ret) {
 646                adv_err(state, "Failed to identify chip");
 647                goto err_cleanup_dt;
 648        }
 649
 650        /* Configure remaining pages as I2C clients with regmap access */
 651        ret = adv748x_initialise_clients(state);
 652        if (ret) {
 653                adv_err(state, "Failed to setup client regmap pages");
 654                goto err_cleanup_clients;
 655        }
 656
 657        /* SW reset ADV748X to its default values */
 658        ret = adv748x_reset(state);
 659        if (ret) {
 660                adv_err(state, "Failed to reset hardware");
 661                goto err_cleanup_clients;
 662        }
 663
 664        /* Initialise HDMI */
 665        ret = adv748x_hdmi_init(&state->hdmi);
 666        if (ret) {
 667                adv_err(state, "Failed to probe HDMI");
 668                goto err_cleanup_clients;
 669        }
 670
 671        /* Initialise AFE */
 672        ret = adv748x_afe_init(&state->afe);
 673        if (ret) {
 674                adv_err(state, "Failed to probe AFE");
 675                goto err_cleanup_hdmi;
 676        }
 677
 678        /* Initialise TXA */
 679        ret = adv748x_csi2_init(state, &state->txa);
 680        if (ret) {
 681                adv_err(state, "Failed to probe TXA");
 682                goto err_cleanup_afe;
 683        }
 684
 685        /* Initialise TXB */
 686        ret = adv748x_csi2_init(state, &state->txb);
 687        if (ret) {
 688                adv_err(state, "Failed to probe TXB");
 689                goto err_cleanup_txa;
 690        }
 691
 692        return 0;
 693
 694err_cleanup_txa:
 695        adv748x_csi2_cleanup(&state->txa);
 696err_cleanup_afe:
 697        adv748x_afe_cleanup(&state->afe);
 698err_cleanup_hdmi:
 699        adv748x_hdmi_cleanup(&state->hdmi);
 700err_cleanup_clients:
 701        adv748x_unregister_clients(state);
 702err_cleanup_dt:
 703        adv748x_dt_cleanup(state);
 704err_free_mutex:
 705        mutex_destroy(&state->mutex);
 706        kfree(state);
 707
 708        return ret;
 709}
 710
 711static int adv748x_remove(struct i2c_client *client)
 712{
 713        struct adv748x_state *state = i2c_get_clientdata(client);
 714
 715        adv748x_afe_cleanup(&state->afe);
 716        adv748x_hdmi_cleanup(&state->hdmi);
 717
 718        adv748x_csi2_cleanup(&state->txa);
 719        adv748x_csi2_cleanup(&state->txb);
 720
 721        adv748x_unregister_clients(state);
 722        adv748x_dt_cleanup(state);
 723        mutex_destroy(&state->mutex);
 724
 725        kfree(state);
 726
 727        return 0;
 728}
 729
 730static const struct i2c_device_id adv748x_id[] = {
 731        { "adv7481", 0 },
 732        { "adv7482", 0 },
 733        { },
 734};
 735MODULE_DEVICE_TABLE(i2c, adv748x_id);
 736
 737static const struct of_device_id adv748x_of_table[] = {
 738        { .compatible = "adi,adv7481", },
 739        { .compatible = "adi,adv7482", },
 740        { }
 741};
 742MODULE_DEVICE_TABLE(of, adv748x_of_table);
 743
 744static struct i2c_driver adv748x_driver = {
 745        .driver = {
 746                .name = "adv748x",
 747                .of_match_table = adv748x_of_table,
 748        },
 749        .probe = adv748x_probe,
 750        .remove = adv748x_remove,
 751        .id_table = adv748x_id,
 752};
 753
 754module_i2c_driver(adv748x_driver);
 755
 756MODULE_AUTHOR("Kieran Bingham <kieran.bingham@ideasonboard.com>");
 757MODULE_DESCRIPTION("ADV748X video decoder");
 758MODULE_LICENSE("GPL v2");
 759