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20#include <linux/kernel.h>
21#include <linux/sched/signal.h>
22#include <linux/module.h>
23#include <linux/slab.h>
24#include <linux/vmalloc.h>
25#include <linux/pci.h>
26#include <linux/kthread.h>
27#include <linux/freezer.h>
28#include <linux/ratelimit.h>
29
30#include <media/dvbdev.h>
31#include <media/dvb_demux.h>
32#include <media/dmxdev.h>
33#include <media/dvb_net.h>
34#include <media/dvb_frontend.h>
35
36#include "va1j5jf8007t.h"
37#include "va1j5jf8007s.h"
38
39#define DRIVER_NAME "earth-pt1"
40
41#define PT1_PAGE_SHIFT 12
42#define PT1_PAGE_SIZE (1 << PT1_PAGE_SHIFT)
43#define PT1_NR_UPACKETS 1024
44#define PT1_NR_BUFS 511
45
46struct pt1_buffer_page {
47 __le32 upackets[PT1_NR_UPACKETS];
48};
49
50struct pt1_table_page {
51 __le32 next_pfn;
52 __le32 buf_pfns[PT1_NR_BUFS];
53};
54
55struct pt1_buffer {
56 struct pt1_buffer_page *page;
57 dma_addr_t addr;
58};
59
60struct pt1_table {
61 struct pt1_table_page *page;
62 dma_addr_t addr;
63 struct pt1_buffer bufs[PT1_NR_BUFS];
64};
65
66#define PT1_NR_ADAPS 4
67
68struct pt1_adapter;
69
70struct pt1 {
71 struct pci_dev *pdev;
72 void __iomem *regs;
73 struct i2c_adapter i2c_adap;
74 int i2c_running;
75 struct pt1_adapter *adaps[PT1_NR_ADAPS];
76 struct pt1_table *tables;
77 struct task_struct *kthread;
78 int table_index;
79 int buf_index;
80
81 struct mutex lock;
82 int power;
83 int reset;
84};
85
86struct pt1_adapter {
87 struct pt1 *pt1;
88 int index;
89
90 u8 *buf;
91 int upacket_count;
92 int packet_count;
93 int st_count;
94
95 struct dvb_adapter adap;
96 struct dvb_demux demux;
97 int users;
98 struct dmxdev dmxdev;
99 struct dvb_frontend *fe;
100 int (*orig_set_voltage)(struct dvb_frontend *fe,
101 enum fe_sec_voltage voltage);
102 int (*orig_sleep)(struct dvb_frontend *fe);
103 int (*orig_init)(struct dvb_frontend *fe);
104
105 enum fe_sec_voltage voltage;
106 int sleep;
107};
108
109static void pt1_write_reg(struct pt1 *pt1, int reg, u32 data)
110{
111 writel(data, pt1->regs + reg * 4);
112}
113
114static u32 pt1_read_reg(struct pt1 *pt1, int reg)
115{
116 return readl(pt1->regs + reg * 4);
117}
118
119static unsigned int pt1_nr_tables = 8;
120module_param_named(nr_tables, pt1_nr_tables, uint, 0);
121
122static void pt1_increment_table_count(struct pt1 *pt1)
123{
124 pt1_write_reg(pt1, 0, 0x00000020);
125}
126
127static void pt1_init_table_count(struct pt1 *pt1)
128{
129 pt1_write_reg(pt1, 0, 0x00000010);
130}
131
132static void pt1_register_tables(struct pt1 *pt1, u32 first_pfn)
133{
134 pt1_write_reg(pt1, 5, first_pfn);
135 pt1_write_reg(pt1, 0, 0x0c000040);
136}
137
138static void pt1_unregister_tables(struct pt1 *pt1)
139{
140 pt1_write_reg(pt1, 0, 0x08080000);
141}
142
143static int pt1_sync(struct pt1 *pt1)
144{
145 int i;
146 for (i = 0; i < 57; i++) {
147 if (pt1_read_reg(pt1, 0) & 0x20000000)
148 return 0;
149 pt1_write_reg(pt1, 0, 0x00000008);
150 }
151 dev_err(&pt1->pdev->dev, "could not sync\n");
152 return -EIO;
153}
154
155static u64 pt1_identify(struct pt1 *pt1)
156{
157 int i;
158 u64 id;
159 id = 0;
160 for (i = 0; i < 57; i++) {
161 id |= (u64)(pt1_read_reg(pt1, 0) >> 30 & 1) << i;
162 pt1_write_reg(pt1, 0, 0x00000008);
163 }
164 return id;
165}
166
167static int pt1_unlock(struct pt1 *pt1)
168{
169 int i;
170 pt1_write_reg(pt1, 0, 0x00000008);
171 for (i = 0; i < 3; i++) {
172 if (pt1_read_reg(pt1, 0) & 0x80000000)
173 return 0;
174 schedule_timeout_uninterruptible((HZ + 999) / 1000);
175 }
176 dev_err(&pt1->pdev->dev, "could not unlock\n");
177 return -EIO;
178}
179
180static int pt1_reset_pci(struct pt1 *pt1)
181{
182 int i;
183 pt1_write_reg(pt1, 0, 0x01010000);
184 pt1_write_reg(pt1, 0, 0x01000000);
185 for (i = 0; i < 10; i++) {
186 if (pt1_read_reg(pt1, 0) & 0x00000001)
187 return 0;
188 schedule_timeout_uninterruptible((HZ + 999) / 1000);
189 }
190 dev_err(&pt1->pdev->dev, "could not reset PCI\n");
191 return -EIO;
192}
193
194static int pt1_reset_ram(struct pt1 *pt1)
195{
196 int i;
197 pt1_write_reg(pt1, 0, 0x02020000);
198 pt1_write_reg(pt1, 0, 0x02000000);
199 for (i = 0; i < 10; i++) {
200 if (pt1_read_reg(pt1, 0) & 0x00000002)
201 return 0;
202 schedule_timeout_uninterruptible((HZ + 999) / 1000);
203 }
204 dev_err(&pt1->pdev->dev, "could not reset RAM\n");
205 return -EIO;
206}
207
208static int pt1_do_enable_ram(struct pt1 *pt1)
209{
210 int i, j;
211 u32 status;
212 status = pt1_read_reg(pt1, 0) & 0x00000004;
213 pt1_write_reg(pt1, 0, 0x00000002);
214 for (i = 0; i < 10; i++) {
215 for (j = 0; j < 1024; j++) {
216 if ((pt1_read_reg(pt1, 0) & 0x00000004) != status)
217 return 0;
218 }
219 schedule_timeout_uninterruptible((HZ + 999) / 1000);
220 }
221 dev_err(&pt1->pdev->dev, "could not enable RAM\n");
222 return -EIO;
223}
224
225static int pt1_enable_ram(struct pt1 *pt1)
226{
227 int i, ret;
228 int phase;
229 schedule_timeout_uninterruptible((HZ + 999) / 1000);
230 phase = pt1->pdev->device == 0x211a ? 128 : 166;
231 for (i = 0; i < phase; i++) {
232 ret = pt1_do_enable_ram(pt1);
233 if (ret < 0)
234 return ret;
235 }
236 return 0;
237}
238
239static void pt1_disable_ram(struct pt1 *pt1)
240{
241 pt1_write_reg(pt1, 0, 0x0b0b0000);
242}
243
244static void pt1_set_stream(struct pt1 *pt1, int index, int enabled)
245{
246 pt1_write_reg(pt1, 2, 1 << (index + 8) | enabled << index);
247}
248
249static void pt1_init_streams(struct pt1 *pt1)
250{
251 int i;
252 for (i = 0; i < PT1_NR_ADAPS; i++)
253 pt1_set_stream(pt1, i, 0);
254}
255
256static int pt1_filter(struct pt1 *pt1, struct pt1_buffer_page *page)
257{
258 u32 upacket;
259 int i;
260 int index;
261 struct pt1_adapter *adap;
262 int offset;
263 u8 *buf;
264 int sc;
265
266 if (!page->upackets[PT1_NR_UPACKETS - 1])
267 return 0;
268
269 for (i = 0; i < PT1_NR_UPACKETS; i++) {
270 upacket = le32_to_cpu(page->upackets[i]);
271 index = (upacket >> 29) - 1;
272 if (index < 0 || index >= PT1_NR_ADAPS)
273 continue;
274
275 adap = pt1->adaps[index];
276 if (upacket >> 25 & 1)
277 adap->upacket_count = 0;
278 else if (!adap->upacket_count)
279 continue;
280
281 if (upacket >> 24 & 1)
282 printk_ratelimited(KERN_INFO "earth-pt1: device buffer overflowing. table[%d] buf[%d]\n",
283 pt1->table_index, pt1->buf_index);
284 sc = upacket >> 26 & 0x7;
285 if (adap->st_count != -1 && sc != ((adap->st_count + 1) & 0x7))
286 printk_ratelimited(KERN_INFO "earth-pt1: data loss in streamID(adapter)[%d]\n",
287 index);
288 adap->st_count = sc;
289
290 buf = adap->buf;
291 offset = adap->packet_count * 188 + adap->upacket_count * 3;
292 buf[offset] = upacket >> 16;
293 buf[offset + 1] = upacket >> 8;
294 if (adap->upacket_count != 62)
295 buf[offset + 2] = upacket;
296
297 if (++adap->upacket_count >= 63) {
298 adap->upacket_count = 0;
299 if (++adap->packet_count >= 21) {
300 dvb_dmx_swfilter_packets(&adap->demux, buf, 21);
301 adap->packet_count = 0;
302 }
303 }
304 }
305
306 page->upackets[PT1_NR_UPACKETS - 1] = 0;
307 return 1;
308}
309
310static int pt1_thread(void *data)
311{
312 struct pt1 *pt1;
313 struct pt1_buffer_page *page;
314
315 pt1 = data;
316 set_freezable();
317
318 while (!kthread_should_stop()) {
319 try_to_freeze();
320
321 page = pt1->tables[pt1->table_index].bufs[pt1->buf_index].page;
322 if (!pt1_filter(pt1, page)) {
323 schedule_timeout_interruptible((HZ + 999) / 1000);
324 continue;
325 }
326
327 if (++pt1->buf_index >= PT1_NR_BUFS) {
328 pt1_increment_table_count(pt1);
329 pt1->buf_index = 0;
330 if (++pt1->table_index >= pt1_nr_tables)
331 pt1->table_index = 0;
332 }
333 }
334
335 return 0;
336}
337
338static void pt1_free_page(struct pt1 *pt1, void *page, dma_addr_t addr)
339{
340 dma_free_coherent(&pt1->pdev->dev, PT1_PAGE_SIZE, page, addr);
341}
342
343static void *pt1_alloc_page(struct pt1 *pt1, dma_addr_t *addrp, u32 *pfnp)
344{
345 void *page;
346 dma_addr_t addr;
347
348 page = dma_alloc_coherent(&pt1->pdev->dev, PT1_PAGE_SIZE, &addr,
349 GFP_KERNEL);
350 if (page == NULL)
351 return NULL;
352
353 BUG_ON(addr & (PT1_PAGE_SIZE - 1));
354 BUG_ON(addr >> PT1_PAGE_SHIFT >> 31 >> 1);
355
356 *addrp = addr;
357 *pfnp = addr >> PT1_PAGE_SHIFT;
358 return page;
359}
360
361static void pt1_cleanup_buffer(struct pt1 *pt1, struct pt1_buffer *buf)
362{
363 pt1_free_page(pt1, buf->page, buf->addr);
364}
365
366static int
367pt1_init_buffer(struct pt1 *pt1, struct pt1_buffer *buf, u32 *pfnp)
368{
369 struct pt1_buffer_page *page;
370 dma_addr_t addr;
371
372 page = pt1_alloc_page(pt1, &addr, pfnp);
373 if (page == NULL)
374 return -ENOMEM;
375
376 page->upackets[PT1_NR_UPACKETS - 1] = 0;
377
378 buf->page = page;
379 buf->addr = addr;
380 return 0;
381}
382
383static void pt1_cleanup_table(struct pt1 *pt1, struct pt1_table *table)
384{
385 int i;
386
387 for (i = 0; i < PT1_NR_BUFS; i++)
388 pt1_cleanup_buffer(pt1, &table->bufs[i]);
389
390 pt1_free_page(pt1, table->page, table->addr);
391}
392
393static int
394pt1_init_table(struct pt1 *pt1, struct pt1_table *table, u32 *pfnp)
395{
396 struct pt1_table_page *page;
397 dma_addr_t addr;
398 int i, ret;
399 u32 buf_pfn;
400
401 page = pt1_alloc_page(pt1, &addr, pfnp);
402 if (page == NULL)
403 return -ENOMEM;
404
405 for (i = 0; i < PT1_NR_BUFS; i++) {
406 ret = pt1_init_buffer(pt1, &table->bufs[i], &buf_pfn);
407 if (ret < 0)
408 goto err;
409
410 page->buf_pfns[i] = cpu_to_le32(buf_pfn);
411 }
412
413 pt1_increment_table_count(pt1);
414 table->page = page;
415 table->addr = addr;
416 return 0;
417
418err:
419 while (i--)
420 pt1_cleanup_buffer(pt1, &table->bufs[i]);
421
422 pt1_free_page(pt1, page, addr);
423 return ret;
424}
425
426static void pt1_cleanup_tables(struct pt1 *pt1)
427{
428 struct pt1_table *tables;
429 int i;
430
431 tables = pt1->tables;
432 pt1_unregister_tables(pt1);
433
434 for (i = 0; i < pt1_nr_tables; i++)
435 pt1_cleanup_table(pt1, &tables[i]);
436
437 vfree(tables);
438}
439
440static int pt1_init_tables(struct pt1 *pt1)
441{
442 struct pt1_table *tables;
443 int i, ret;
444 u32 first_pfn, pfn;
445
446 if (!pt1_nr_tables)
447 return 0;
448
449 tables = vmalloc(sizeof(struct pt1_table) * pt1_nr_tables);
450 if (tables == NULL)
451 return -ENOMEM;
452
453 pt1_init_table_count(pt1);
454
455 i = 0;
456 ret = pt1_init_table(pt1, &tables[0], &first_pfn);
457 if (ret)
458 goto err;
459 i++;
460
461 while (i < pt1_nr_tables) {
462 ret = pt1_init_table(pt1, &tables[i], &pfn);
463 if (ret)
464 goto err;
465 tables[i - 1].page->next_pfn = cpu_to_le32(pfn);
466 i++;
467 }
468
469 tables[pt1_nr_tables - 1].page->next_pfn = cpu_to_le32(first_pfn);
470
471 pt1_register_tables(pt1, first_pfn);
472 pt1->tables = tables;
473 return 0;
474
475err:
476 while (i--)
477 pt1_cleanup_table(pt1, &tables[i]);
478
479 vfree(tables);
480 return ret;
481}
482
483static int pt1_start_polling(struct pt1 *pt1)
484{
485 int ret = 0;
486
487 mutex_lock(&pt1->lock);
488 if (!pt1->kthread) {
489 pt1->kthread = kthread_run(pt1_thread, pt1, "earth-pt1");
490 if (IS_ERR(pt1->kthread)) {
491 ret = PTR_ERR(pt1->kthread);
492 pt1->kthread = NULL;
493 }
494 }
495 mutex_unlock(&pt1->lock);
496 return ret;
497}
498
499static int pt1_start_feed(struct dvb_demux_feed *feed)
500{
501 struct pt1_adapter *adap;
502 adap = container_of(feed->demux, struct pt1_adapter, demux);
503 if (!adap->users++) {
504 int ret;
505
506 ret = pt1_start_polling(adap->pt1);
507 if (ret)
508 return ret;
509 pt1_set_stream(adap->pt1, adap->index, 1);
510 }
511 return 0;
512}
513
514static void pt1_stop_polling(struct pt1 *pt1)
515{
516 int i, count;
517
518 mutex_lock(&pt1->lock);
519 for (i = 0, count = 0; i < PT1_NR_ADAPS; i++)
520 count += pt1->adaps[i]->users;
521
522 if (count == 0 && pt1->kthread) {
523 kthread_stop(pt1->kthread);
524 pt1->kthread = NULL;
525 }
526 mutex_unlock(&pt1->lock);
527}
528
529static int pt1_stop_feed(struct dvb_demux_feed *feed)
530{
531 struct pt1_adapter *adap;
532 adap = container_of(feed->demux, struct pt1_adapter, demux);
533 if (!--adap->users) {
534 pt1_set_stream(adap->pt1, adap->index, 0);
535 pt1_stop_polling(adap->pt1);
536 }
537 return 0;
538}
539
540static void
541pt1_update_power(struct pt1 *pt1)
542{
543 int bits;
544 int i;
545 struct pt1_adapter *adap;
546 static const int sleep_bits[] = {
547 1 << 4,
548 1 << 6 | 1 << 7,
549 1 << 5,
550 1 << 6 | 1 << 8,
551 };
552
553 bits = pt1->power | !pt1->reset << 3;
554 mutex_lock(&pt1->lock);
555 for (i = 0; i < PT1_NR_ADAPS; i++) {
556 adap = pt1->adaps[i];
557 switch (adap->voltage) {
558 case SEC_VOLTAGE_13:
559 bits |= 1 << 1;
560 break;
561 case SEC_VOLTAGE_18:
562 bits |= 1 << 1 | 1 << 2;
563 break;
564 default:
565 break;
566 }
567
568
569 bits |= sleep_bits[i];
570 }
571 pt1_write_reg(pt1, 1, bits);
572 mutex_unlock(&pt1->lock);
573}
574
575static int pt1_set_voltage(struct dvb_frontend *fe, enum fe_sec_voltage voltage)
576{
577 struct pt1_adapter *adap;
578
579 adap = container_of(fe->dvb, struct pt1_adapter, adap);
580 adap->voltage = voltage;
581 pt1_update_power(adap->pt1);
582
583 if (adap->orig_set_voltage)
584 return adap->orig_set_voltage(fe, voltage);
585 else
586 return 0;
587}
588
589static int pt1_sleep(struct dvb_frontend *fe)
590{
591 struct pt1_adapter *adap;
592
593 adap = container_of(fe->dvb, struct pt1_adapter, adap);
594 adap->sleep = 1;
595 pt1_update_power(adap->pt1);
596
597 if (adap->orig_sleep)
598 return adap->orig_sleep(fe);
599 else
600 return 0;
601}
602
603static int pt1_wakeup(struct dvb_frontend *fe)
604{
605 struct pt1_adapter *adap;
606
607 adap = container_of(fe->dvb, struct pt1_adapter, adap);
608 adap->sleep = 0;
609 pt1_update_power(adap->pt1);
610 schedule_timeout_uninterruptible((HZ + 999) / 1000);
611
612 if (adap->orig_init)
613 return adap->orig_init(fe);
614 else
615 return 0;
616}
617
618static void pt1_free_adapter(struct pt1_adapter *adap)
619{
620 adap->demux.dmx.close(&adap->demux.dmx);
621 dvb_dmxdev_release(&adap->dmxdev);
622 dvb_dmx_release(&adap->demux);
623 dvb_unregister_adapter(&adap->adap);
624 free_page((unsigned long)adap->buf);
625 kfree(adap);
626}
627
628DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
629
630static struct pt1_adapter *
631pt1_alloc_adapter(struct pt1 *pt1)
632{
633 struct pt1_adapter *adap;
634 void *buf;
635 struct dvb_adapter *dvb_adap;
636 struct dvb_demux *demux;
637 struct dmxdev *dmxdev;
638 int ret;
639
640 adap = kzalloc(sizeof(struct pt1_adapter), GFP_KERNEL);
641 if (!adap) {
642 ret = -ENOMEM;
643 goto err;
644 }
645
646 adap->pt1 = pt1;
647
648 adap->voltage = SEC_VOLTAGE_OFF;
649 adap->sleep = 1;
650
651 buf = (u8 *)__get_free_page(GFP_KERNEL);
652 if (!buf) {
653 ret = -ENOMEM;
654 goto err_kfree;
655 }
656
657 adap->buf = buf;
658 adap->upacket_count = 0;
659 adap->packet_count = 0;
660 adap->st_count = -1;
661
662 dvb_adap = &adap->adap;
663 dvb_adap->priv = adap;
664 ret = dvb_register_adapter(dvb_adap, DRIVER_NAME, THIS_MODULE,
665 &pt1->pdev->dev, adapter_nr);
666 if (ret < 0)
667 goto err_free_page;
668
669 demux = &adap->demux;
670 demux->dmx.capabilities = DMX_TS_FILTERING | DMX_SECTION_FILTERING;
671 demux->priv = adap;
672 demux->feednum = 256;
673 demux->filternum = 256;
674 demux->start_feed = pt1_start_feed;
675 demux->stop_feed = pt1_stop_feed;
676 demux->write_to_decoder = NULL;
677 ret = dvb_dmx_init(demux);
678 if (ret < 0)
679 goto err_unregister_adapter;
680
681 dmxdev = &adap->dmxdev;
682 dmxdev->filternum = 256;
683 dmxdev->demux = &demux->dmx;
684 dmxdev->capabilities = 0;
685 ret = dvb_dmxdev_init(dmxdev, dvb_adap);
686 if (ret < 0)
687 goto err_dmx_release;
688
689 return adap;
690
691err_dmx_release:
692 dvb_dmx_release(demux);
693err_unregister_adapter:
694 dvb_unregister_adapter(dvb_adap);
695err_free_page:
696 free_page((unsigned long)buf);
697err_kfree:
698 kfree(adap);
699err:
700 return ERR_PTR(ret);
701}
702
703static void pt1_cleanup_adapters(struct pt1 *pt1)
704{
705 int i;
706 for (i = 0; i < PT1_NR_ADAPS; i++)
707 pt1_free_adapter(pt1->adaps[i]);
708}
709
710static int pt1_init_adapters(struct pt1 *pt1)
711{
712 int i;
713 struct pt1_adapter *adap;
714 int ret;
715
716 for (i = 0; i < PT1_NR_ADAPS; i++) {
717 adap = pt1_alloc_adapter(pt1);
718 if (IS_ERR(adap)) {
719 ret = PTR_ERR(adap);
720 goto err;
721 }
722
723 adap->index = i;
724 pt1->adaps[i] = adap;
725 }
726 return 0;
727
728err:
729 while (i--)
730 pt1_free_adapter(pt1->adaps[i]);
731
732 return ret;
733}
734
735static void pt1_cleanup_frontend(struct pt1_adapter *adap)
736{
737 dvb_unregister_frontend(adap->fe);
738}
739
740static int pt1_init_frontend(struct pt1_adapter *adap, struct dvb_frontend *fe)
741{
742 int ret;
743
744 adap->orig_set_voltage = fe->ops.set_voltage;
745 adap->orig_sleep = fe->ops.sleep;
746 adap->orig_init = fe->ops.init;
747 fe->ops.set_voltage = pt1_set_voltage;
748 fe->ops.sleep = pt1_sleep;
749 fe->ops.init = pt1_wakeup;
750
751 ret = dvb_register_frontend(&adap->adap, fe);
752 if (ret < 0)
753 return ret;
754
755 adap->fe = fe;
756 return 0;
757}
758
759static void pt1_cleanup_frontends(struct pt1 *pt1)
760{
761 int i;
762 for (i = 0; i < PT1_NR_ADAPS; i++)
763 pt1_cleanup_frontend(pt1->adaps[i]);
764}
765
766struct pt1_config {
767 struct va1j5jf8007s_config va1j5jf8007s_config;
768 struct va1j5jf8007t_config va1j5jf8007t_config;
769};
770
771static const struct pt1_config pt1_configs[2] = {
772 {
773 {
774 .demod_address = 0x1b,
775 .frequency = VA1J5JF8007S_20MHZ,
776 },
777 {
778 .demod_address = 0x1a,
779 .frequency = VA1J5JF8007T_20MHZ,
780 },
781 }, {
782 {
783 .demod_address = 0x19,
784 .frequency = VA1J5JF8007S_20MHZ,
785 },
786 {
787 .demod_address = 0x18,
788 .frequency = VA1J5JF8007T_20MHZ,
789 },
790 },
791};
792
793static const struct pt1_config pt2_configs[2] = {
794 {
795 {
796 .demod_address = 0x1b,
797 .frequency = VA1J5JF8007S_25MHZ,
798 },
799 {
800 .demod_address = 0x1a,
801 .frequency = VA1J5JF8007T_25MHZ,
802 },
803 }, {
804 {
805 .demod_address = 0x19,
806 .frequency = VA1J5JF8007S_25MHZ,
807 },
808 {
809 .demod_address = 0x18,
810 .frequency = VA1J5JF8007T_25MHZ,
811 },
812 },
813};
814
815static int pt1_init_frontends(struct pt1 *pt1)
816{
817 int i, j;
818 struct i2c_adapter *i2c_adap;
819 const struct pt1_config *configs, *config;
820 struct dvb_frontend *fe[4];
821 int ret;
822
823 i = 0;
824 j = 0;
825
826 i2c_adap = &pt1->i2c_adap;
827 configs = pt1->pdev->device == 0x211a ? pt1_configs : pt2_configs;
828 do {
829 config = &configs[i / 2];
830
831 fe[i] = va1j5jf8007s_attach(&config->va1j5jf8007s_config,
832 i2c_adap);
833 if (!fe[i]) {
834 ret = -ENODEV;
835 goto err;
836 }
837 i++;
838
839 fe[i] = va1j5jf8007t_attach(&config->va1j5jf8007t_config,
840 i2c_adap);
841 if (!fe[i]) {
842 ret = -ENODEV;
843 goto err;
844 }
845 i++;
846
847 ret = va1j5jf8007s_prepare(fe[i - 2]);
848 if (ret < 0)
849 goto err;
850
851 ret = va1j5jf8007t_prepare(fe[i - 1]);
852 if (ret < 0)
853 goto err;
854
855 } while (i < 4);
856
857 do {
858 ret = pt1_init_frontend(pt1->adaps[j], fe[j]);
859 if (ret < 0)
860 goto err;
861 } while (++j < 4);
862
863 return 0;
864
865err:
866 while (i-- > j)
867 fe[i]->ops.release(fe[i]);
868
869 while (j--)
870 dvb_unregister_frontend(fe[j]);
871
872 return ret;
873}
874
875static void pt1_i2c_emit(struct pt1 *pt1, int addr, int busy, int read_enable,
876 int clock, int data, int next_addr)
877{
878 pt1_write_reg(pt1, 4, addr << 18 | busy << 13 | read_enable << 12 |
879 !clock << 11 | !data << 10 | next_addr);
880}
881
882static void pt1_i2c_write_bit(struct pt1 *pt1, int addr, int *addrp, int data)
883{
884 pt1_i2c_emit(pt1, addr, 1, 0, 0, data, addr + 1);
885 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, data, addr + 2);
886 pt1_i2c_emit(pt1, addr + 2, 1, 0, 0, data, addr + 3);
887 *addrp = addr + 3;
888}
889
890static void pt1_i2c_read_bit(struct pt1 *pt1, int addr, int *addrp)
891{
892 pt1_i2c_emit(pt1, addr, 1, 0, 0, 1, addr + 1);
893 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 1, addr + 2);
894 pt1_i2c_emit(pt1, addr + 2, 1, 1, 1, 1, addr + 3);
895 pt1_i2c_emit(pt1, addr + 3, 1, 0, 0, 1, addr + 4);
896 *addrp = addr + 4;
897}
898
899static void pt1_i2c_write_byte(struct pt1 *pt1, int addr, int *addrp, int data)
900{
901 int i;
902 for (i = 0; i < 8; i++)
903 pt1_i2c_write_bit(pt1, addr, &addr, data >> (7 - i) & 1);
904 pt1_i2c_write_bit(pt1, addr, &addr, 1);
905 *addrp = addr;
906}
907
908static void pt1_i2c_read_byte(struct pt1 *pt1, int addr, int *addrp, int last)
909{
910 int i;
911 for (i = 0; i < 8; i++)
912 pt1_i2c_read_bit(pt1, addr, &addr);
913 pt1_i2c_write_bit(pt1, addr, &addr, last);
914 *addrp = addr;
915}
916
917static void pt1_i2c_prepare(struct pt1 *pt1, int addr, int *addrp)
918{
919 pt1_i2c_emit(pt1, addr, 1, 0, 1, 1, addr + 1);
920 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
921 pt1_i2c_emit(pt1, addr + 2, 1, 0, 0, 0, addr + 3);
922 *addrp = addr + 3;
923}
924
925static void
926pt1_i2c_write_msg(struct pt1 *pt1, int addr, int *addrp, struct i2c_msg *msg)
927{
928 int i;
929 pt1_i2c_prepare(pt1, addr, &addr);
930 pt1_i2c_write_byte(pt1, addr, &addr, msg->addr << 1);
931 for (i = 0; i < msg->len; i++)
932 pt1_i2c_write_byte(pt1, addr, &addr, msg->buf[i]);
933 *addrp = addr;
934}
935
936static void
937pt1_i2c_read_msg(struct pt1 *pt1, int addr, int *addrp, struct i2c_msg *msg)
938{
939 int i;
940 pt1_i2c_prepare(pt1, addr, &addr);
941 pt1_i2c_write_byte(pt1, addr, &addr, msg->addr << 1 | 1);
942 for (i = 0; i < msg->len; i++)
943 pt1_i2c_read_byte(pt1, addr, &addr, i == msg->len - 1);
944 *addrp = addr;
945}
946
947static int pt1_i2c_end(struct pt1 *pt1, int addr)
948{
949 pt1_i2c_emit(pt1, addr, 1, 0, 0, 0, addr + 1);
950 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
951 pt1_i2c_emit(pt1, addr + 2, 1, 0, 1, 1, 0);
952
953 pt1_write_reg(pt1, 0, 0x00000004);
954 do {
955 if (signal_pending(current))
956 return -EINTR;
957 schedule_timeout_interruptible((HZ + 999) / 1000);
958 } while (pt1_read_reg(pt1, 0) & 0x00000080);
959 return 0;
960}
961
962static void pt1_i2c_begin(struct pt1 *pt1, int *addrp)
963{
964 int addr;
965 addr = 0;
966
967 pt1_i2c_emit(pt1, addr, 0, 0, 1, 1, addr );
968 addr = addr + 1;
969
970 if (!pt1->i2c_running) {
971 pt1_i2c_emit(pt1, addr, 1, 0, 1, 1, addr + 1);
972 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
973 addr = addr + 2;
974 pt1->i2c_running = 1;
975 }
976 *addrp = addr;
977}
978
979static int pt1_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
980{
981 struct pt1 *pt1;
982 int i;
983 struct i2c_msg *msg, *next_msg;
984 int addr, ret;
985 u16 len;
986 u32 word;
987
988 pt1 = i2c_get_adapdata(adap);
989
990 for (i = 0; i < num; i++) {
991 msg = &msgs[i];
992 if (msg->flags & I2C_M_RD)
993 return -ENOTSUPP;
994
995 if (i + 1 < num)
996 next_msg = &msgs[i + 1];
997 else
998 next_msg = NULL;
999
1000 if (next_msg && next_msg->flags & I2C_M_RD) {
1001 i++;
1002
1003 len = next_msg->len;
1004 if (len > 4)
1005 return -ENOTSUPP;
1006
1007 pt1_i2c_begin(pt1, &addr);
1008 pt1_i2c_write_msg(pt1, addr, &addr, msg);
1009 pt1_i2c_read_msg(pt1, addr, &addr, next_msg);
1010 ret = pt1_i2c_end(pt1, addr);
1011 if (ret < 0)
1012 return ret;
1013
1014 word = pt1_read_reg(pt1, 2);
1015 while (len--) {
1016 next_msg->buf[len] = word;
1017 word >>= 8;
1018 }
1019 } else {
1020 pt1_i2c_begin(pt1, &addr);
1021 pt1_i2c_write_msg(pt1, addr, &addr, msg);
1022 ret = pt1_i2c_end(pt1, addr);
1023 if (ret < 0)
1024 return ret;
1025 }
1026 }
1027
1028 return num;
1029}
1030
1031static u32 pt1_i2c_func(struct i2c_adapter *adap)
1032{
1033 return I2C_FUNC_I2C;
1034}
1035
1036static const struct i2c_algorithm pt1_i2c_algo = {
1037 .master_xfer = pt1_i2c_xfer,
1038 .functionality = pt1_i2c_func,
1039};
1040
1041static void pt1_i2c_wait(struct pt1 *pt1)
1042{
1043 int i;
1044 for (i = 0; i < 128; i++)
1045 pt1_i2c_emit(pt1, 0, 0, 0, 1, 1, 0);
1046}
1047
1048static void pt1_i2c_init(struct pt1 *pt1)
1049{
1050 int i;
1051 for (i = 0; i < 1024; i++)
1052 pt1_i2c_emit(pt1, i, 0, 0, 1, 1, 0);
1053}
1054
1055static void pt1_remove(struct pci_dev *pdev)
1056{
1057 struct pt1 *pt1;
1058 void __iomem *regs;
1059
1060 pt1 = pci_get_drvdata(pdev);
1061 regs = pt1->regs;
1062
1063 if (pt1->kthread)
1064 kthread_stop(pt1->kthread);
1065 pt1_cleanup_tables(pt1);
1066 pt1_cleanup_frontends(pt1);
1067 pt1_disable_ram(pt1);
1068 pt1->power = 0;
1069 pt1->reset = 1;
1070 pt1_update_power(pt1);
1071 pt1_cleanup_adapters(pt1);
1072 i2c_del_adapter(&pt1->i2c_adap);
1073 kfree(pt1);
1074 pci_iounmap(pdev, regs);
1075 pci_release_regions(pdev);
1076 pci_disable_device(pdev);
1077}
1078
1079static int pt1_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1080{
1081 int ret;
1082 void __iomem *regs;
1083 struct pt1 *pt1;
1084 struct i2c_adapter *i2c_adap;
1085
1086 ret = pci_enable_device(pdev);
1087 if (ret < 0)
1088 goto err;
1089
1090 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1091 if (ret < 0)
1092 goto err_pci_disable_device;
1093
1094 pci_set_master(pdev);
1095
1096 ret = pci_request_regions(pdev, DRIVER_NAME);
1097 if (ret < 0)
1098 goto err_pci_disable_device;
1099
1100 regs = pci_iomap(pdev, 0, 0);
1101 if (!regs) {
1102 ret = -EIO;
1103 goto err_pci_release_regions;
1104 }
1105
1106 pt1 = kzalloc(sizeof(struct pt1), GFP_KERNEL);
1107 if (!pt1) {
1108 ret = -ENOMEM;
1109 goto err_pci_iounmap;
1110 }
1111
1112 mutex_init(&pt1->lock);
1113 pt1->pdev = pdev;
1114 pt1->regs = regs;
1115 pci_set_drvdata(pdev, pt1);
1116
1117 ret = pt1_init_adapters(pt1);
1118 if (ret < 0)
1119 goto err_kfree;
1120
1121 mutex_init(&pt1->lock);
1122
1123 pt1->power = 0;
1124 pt1->reset = 1;
1125 pt1_update_power(pt1);
1126
1127 i2c_adap = &pt1->i2c_adap;
1128 i2c_adap->algo = &pt1_i2c_algo;
1129 i2c_adap->algo_data = NULL;
1130 i2c_adap->dev.parent = &pdev->dev;
1131 strcpy(i2c_adap->name, DRIVER_NAME);
1132 i2c_set_adapdata(i2c_adap, pt1);
1133 ret = i2c_add_adapter(i2c_adap);
1134 if (ret < 0)
1135 goto err_pt1_cleanup_adapters;
1136
1137 pt1_i2c_init(pt1);
1138 pt1_i2c_wait(pt1);
1139
1140 ret = pt1_sync(pt1);
1141 if (ret < 0)
1142 goto err_i2c_del_adapter;
1143
1144 pt1_identify(pt1);
1145
1146 ret = pt1_unlock(pt1);
1147 if (ret < 0)
1148 goto err_i2c_del_adapter;
1149
1150 ret = pt1_reset_pci(pt1);
1151 if (ret < 0)
1152 goto err_i2c_del_adapter;
1153
1154 ret = pt1_reset_ram(pt1);
1155 if (ret < 0)
1156 goto err_i2c_del_adapter;
1157
1158 ret = pt1_enable_ram(pt1);
1159 if (ret < 0)
1160 goto err_i2c_del_adapter;
1161
1162 pt1_init_streams(pt1);
1163
1164 pt1->power = 1;
1165 pt1_update_power(pt1);
1166 schedule_timeout_uninterruptible((HZ + 49) / 50);
1167
1168 pt1->reset = 0;
1169 pt1_update_power(pt1);
1170 schedule_timeout_uninterruptible((HZ + 999) / 1000);
1171
1172 ret = pt1_init_frontends(pt1);
1173 if (ret < 0)
1174 goto err_pt1_disable_ram;
1175
1176 ret = pt1_init_tables(pt1);
1177 if (ret < 0)
1178 goto err_pt1_cleanup_frontends;
1179
1180 return 0;
1181
1182err_pt1_cleanup_frontends:
1183 pt1_cleanup_frontends(pt1);
1184err_pt1_disable_ram:
1185 pt1_disable_ram(pt1);
1186 pt1->power = 0;
1187 pt1->reset = 1;
1188 pt1_update_power(pt1);
1189err_i2c_del_adapter:
1190 i2c_del_adapter(i2c_adap);
1191err_pt1_cleanup_adapters:
1192 pt1_cleanup_adapters(pt1);
1193err_kfree:
1194 kfree(pt1);
1195err_pci_iounmap:
1196 pci_iounmap(pdev, regs);
1197err_pci_release_regions:
1198 pci_release_regions(pdev);
1199err_pci_disable_device:
1200 pci_disable_device(pdev);
1201err:
1202 return ret;
1203
1204}
1205
1206static const struct pci_device_id pt1_id_table[] = {
1207 { PCI_DEVICE(0x10ee, 0x211a) },
1208 { PCI_DEVICE(0x10ee, 0x222a) },
1209 { },
1210};
1211MODULE_DEVICE_TABLE(pci, pt1_id_table);
1212
1213static struct pci_driver pt1_driver = {
1214 .name = DRIVER_NAME,
1215 .probe = pt1_probe,
1216 .remove = pt1_remove,
1217 .id_table = pt1_id_table,
1218};
1219
1220module_pci_driver(pt1_driver);
1221
1222MODULE_AUTHOR("Takahito HIRANO <hiranotaka@zng.info>");
1223MODULE_DESCRIPTION("Earthsoft PT1/PT2 Driver");
1224MODULE_LICENSE("GPL");
1225
