linux/drivers/media/platform/coda/coda-bit.c
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   1/*
   2 * Coda multi-standard codec IP - BIT processor functions
   3 *
   4 * Copyright (C) 2012 Vista Silicon S.L.
   5 *    Javier Martin, <javier.martin@vista-silicon.com>
   6 *    Xavier Duret
   7 * Copyright (C) 2012-2014 Philipp Zabel, Pengutronix
   8 *
   9 * This program is free software; you can redistribute it and/or modify
  10 * it under the terms of the GNU General Public License as published by
  11 * the Free Software Foundation; either version 2 of the License, or
  12 * (at your option) any later version.
  13 */
  14
  15#include <linux/clk.h>
  16#include <linux/irqreturn.h>
  17#include <linux/kernel.h>
  18#include <linux/log2.h>
  19#include <linux/platform_device.h>
  20#include <linux/reset.h>
  21#include <linux/slab.h>
  22#include <linux/videodev2.h>
  23
  24#include <media/v4l2-common.h>
  25#include <media/v4l2-ctrls.h>
  26#include <media/v4l2-fh.h>
  27#include <media/v4l2-mem2mem.h>
  28#include <media/videobuf2-v4l2.h>
  29#include <media/videobuf2-dma-contig.h>
  30#include <media/videobuf2-vmalloc.h>
  31
  32#include "coda.h"
  33#include "imx-vdoa.h"
  34#define CREATE_TRACE_POINTS
  35#include "trace.h"
  36
  37#define CODA_PARA_BUF_SIZE      (10 * 1024)
  38#define CODA7_PS_BUF_SIZE       0x28000
  39#define CODA9_PS_SAVE_SIZE      (512 * 1024)
  40
  41#define CODA_DEFAULT_GAMMA      4096
  42#define CODA9_DEFAULT_GAMMA     24576   /* 0.75 * 32768 */
  43
  44static void coda_free_bitstream_buffer(struct coda_ctx *ctx);
  45
  46static inline int coda_is_initialized(struct coda_dev *dev)
  47{
  48        return coda_read(dev, CODA_REG_BIT_CUR_PC) != 0;
  49}
  50
  51static inline unsigned long coda_isbusy(struct coda_dev *dev)
  52{
  53        return coda_read(dev, CODA_REG_BIT_BUSY);
  54}
  55
  56static int coda_wait_timeout(struct coda_dev *dev)
  57{
  58        unsigned long timeout = jiffies + msecs_to_jiffies(1000);
  59
  60        while (coda_isbusy(dev)) {
  61                if (time_after(jiffies, timeout))
  62                        return -ETIMEDOUT;
  63        }
  64        return 0;
  65}
  66
  67static void coda_command_async(struct coda_ctx *ctx, int cmd)
  68{
  69        struct coda_dev *dev = ctx->dev;
  70
  71        if (dev->devtype->product == CODA_HX4 ||
  72            dev->devtype->product == CODA_7541 ||
  73            dev->devtype->product == CODA_960) {
  74                /* Restore context related registers to CODA */
  75                coda_write(dev, ctx->bit_stream_param,
  76                                CODA_REG_BIT_BIT_STREAM_PARAM);
  77                coda_write(dev, ctx->frm_dis_flg,
  78                                CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
  79                coda_write(dev, ctx->frame_mem_ctrl,
  80                                CODA_REG_BIT_FRAME_MEM_CTRL);
  81                coda_write(dev, ctx->workbuf.paddr, CODA_REG_BIT_WORK_BUF_ADDR);
  82        }
  83
  84        if (dev->devtype->product == CODA_960) {
  85                coda_write(dev, 1, CODA9_GDI_WPROT_ERR_CLR);
  86                coda_write(dev, 0, CODA9_GDI_WPROT_RGN_EN);
  87        }
  88
  89        coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
  90
  91        coda_write(dev, ctx->idx, CODA_REG_BIT_RUN_INDEX);
  92        coda_write(dev, ctx->params.codec_mode, CODA_REG_BIT_RUN_COD_STD);
  93        coda_write(dev, ctx->params.codec_mode_aux, CODA7_REG_BIT_RUN_AUX_STD);
  94
  95        trace_coda_bit_run(ctx, cmd);
  96
  97        coda_write(dev, cmd, CODA_REG_BIT_RUN_COMMAND);
  98}
  99
 100static int coda_command_sync(struct coda_ctx *ctx, int cmd)
 101{
 102        struct coda_dev *dev = ctx->dev;
 103        int ret;
 104
 105        coda_command_async(ctx, cmd);
 106        ret = coda_wait_timeout(dev);
 107        trace_coda_bit_done(ctx);
 108
 109        return ret;
 110}
 111
 112int coda_hw_reset(struct coda_ctx *ctx)
 113{
 114        struct coda_dev *dev = ctx->dev;
 115        unsigned long timeout;
 116        unsigned int idx;
 117        int ret;
 118
 119        if (!dev->rstc)
 120                return -ENOENT;
 121
 122        idx = coda_read(dev, CODA_REG_BIT_RUN_INDEX);
 123
 124        if (dev->devtype->product == CODA_960) {
 125                timeout = jiffies + msecs_to_jiffies(100);
 126                coda_write(dev, 0x11, CODA9_GDI_BUS_CTRL);
 127                while (coda_read(dev, CODA9_GDI_BUS_STATUS) != 0x77) {
 128                        if (time_after(jiffies, timeout))
 129                                return -ETIME;
 130                        cpu_relax();
 131                }
 132        }
 133
 134        ret = reset_control_reset(dev->rstc);
 135        if (ret < 0)
 136                return ret;
 137
 138        if (dev->devtype->product == CODA_960)
 139                coda_write(dev, 0x00, CODA9_GDI_BUS_CTRL);
 140        coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
 141        coda_write(dev, CODA_REG_RUN_ENABLE, CODA_REG_BIT_CODE_RUN);
 142        ret = coda_wait_timeout(dev);
 143        coda_write(dev, idx, CODA_REG_BIT_RUN_INDEX);
 144
 145        return ret;
 146}
 147
 148static void coda_kfifo_sync_from_device(struct coda_ctx *ctx)
 149{
 150        struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
 151        struct coda_dev *dev = ctx->dev;
 152        u32 rd_ptr;
 153
 154        rd_ptr = coda_read(dev, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
 155        kfifo->out = (kfifo->in & ~kfifo->mask) |
 156                      (rd_ptr - ctx->bitstream.paddr);
 157        if (kfifo->out > kfifo->in)
 158                kfifo->out -= kfifo->mask + 1;
 159}
 160
 161static void coda_kfifo_sync_to_device_full(struct coda_ctx *ctx)
 162{
 163        struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
 164        struct coda_dev *dev = ctx->dev;
 165        u32 rd_ptr, wr_ptr;
 166
 167        rd_ptr = ctx->bitstream.paddr + (kfifo->out & kfifo->mask);
 168        coda_write(dev, rd_ptr, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
 169        wr_ptr = ctx->bitstream.paddr + (kfifo->in & kfifo->mask);
 170        coda_write(dev, wr_ptr, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
 171}
 172
 173static void coda_kfifo_sync_to_device_write(struct coda_ctx *ctx)
 174{
 175        struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
 176        struct coda_dev *dev = ctx->dev;
 177        u32 wr_ptr;
 178
 179        wr_ptr = ctx->bitstream.paddr + (kfifo->in & kfifo->mask);
 180        coda_write(dev, wr_ptr, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
 181}
 182
 183static int coda_bitstream_pad(struct coda_ctx *ctx, u32 size)
 184{
 185        unsigned char *buf;
 186        u32 n;
 187
 188        if (size < 6)
 189                size = 6;
 190
 191        buf = kmalloc(size, GFP_KERNEL);
 192        if (!buf)
 193                return -ENOMEM;
 194
 195        coda_h264_filler_nal(size, buf);
 196        n = kfifo_in(&ctx->bitstream_fifo, buf, size);
 197        kfree(buf);
 198
 199        return (n < size) ? -ENOSPC : 0;
 200}
 201
 202static int coda_bitstream_queue(struct coda_ctx *ctx,
 203                                struct vb2_v4l2_buffer *src_buf)
 204{
 205        u32 src_size = vb2_get_plane_payload(&src_buf->vb2_buf, 0);
 206        u32 n;
 207
 208        n = kfifo_in(&ctx->bitstream_fifo,
 209                        vb2_plane_vaddr(&src_buf->vb2_buf, 0), src_size);
 210        if (n < src_size)
 211                return -ENOSPC;
 212
 213        src_buf->sequence = ctx->qsequence++;
 214
 215        return 0;
 216}
 217
 218static bool coda_bitstream_try_queue(struct coda_ctx *ctx,
 219                                     struct vb2_v4l2_buffer *src_buf)
 220{
 221        unsigned long payload = vb2_get_plane_payload(&src_buf->vb2_buf, 0);
 222        int ret;
 223
 224        if (coda_get_bitstream_payload(ctx) + payload + 512 >=
 225            ctx->bitstream.size)
 226                return false;
 227
 228        if (vb2_plane_vaddr(&src_buf->vb2_buf, 0) == NULL) {
 229                v4l2_err(&ctx->dev->v4l2_dev, "trying to queue empty buffer\n");
 230                return true;
 231        }
 232
 233        /* Add zero padding before the first H.264 buffer, if it is too small */
 234        if (ctx->qsequence == 0 && payload < 512 &&
 235            ctx->codec->src_fourcc == V4L2_PIX_FMT_H264)
 236                coda_bitstream_pad(ctx, 512 - payload);
 237
 238        ret = coda_bitstream_queue(ctx, src_buf);
 239        if (ret < 0) {
 240                v4l2_err(&ctx->dev->v4l2_dev, "bitstream buffer overflow\n");
 241                return false;
 242        }
 243        /* Sync read pointer to device */
 244        if (ctx == v4l2_m2m_get_curr_priv(ctx->dev->m2m_dev))
 245                coda_kfifo_sync_to_device_write(ctx);
 246
 247        ctx->hold = false;
 248
 249        return true;
 250}
 251
 252void coda_fill_bitstream(struct coda_ctx *ctx, struct list_head *buffer_list)
 253{
 254        struct vb2_v4l2_buffer *src_buf;
 255        struct coda_buffer_meta *meta;
 256        unsigned long flags;
 257        u32 start;
 258
 259        if (ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG)
 260                return;
 261
 262        while (v4l2_m2m_num_src_bufs_ready(ctx->fh.m2m_ctx) > 0) {
 263                /*
 264                 * Only queue a single JPEG into the bitstream buffer, except
 265                 * to increase payload over 512 bytes or if in hold state.
 266                 */
 267                if (ctx->codec->src_fourcc == V4L2_PIX_FMT_JPEG &&
 268                    (coda_get_bitstream_payload(ctx) >= 512) && !ctx->hold)
 269                        break;
 270
 271                src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx);
 272
 273                /* Drop frames that do not start/end with a SOI/EOI markers */
 274                if (ctx->codec->src_fourcc == V4L2_PIX_FMT_JPEG &&
 275                    !coda_jpeg_check_buffer(ctx, &src_buf->vb2_buf)) {
 276                        v4l2_err(&ctx->dev->v4l2_dev,
 277                                 "dropping invalid JPEG frame %d\n",
 278                                 ctx->qsequence);
 279                        src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
 280                        if (buffer_list) {
 281                                struct v4l2_m2m_buffer *m2m_buf;
 282
 283                                m2m_buf = container_of(src_buf,
 284                                                       struct v4l2_m2m_buffer,
 285                                                       vb);
 286                                list_add_tail(&m2m_buf->list, buffer_list);
 287                        } else {
 288                                v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_ERROR);
 289                        }
 290                        continue;
 291                }
 292
 293                /* Dump empty buffers */
 294                if (!vb2_get_plane_payload(&src_buf->vb2_buf, 0)) {
 295                        src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
 296                        v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
 297                        continue;
 298                }
 299
 300                /* Buffer start position */
 301                start = ctx->bitstream_fifo.kfifo.in &
 302                        ctx->bitstream_fifo.kfifo.mask;
 303
 304                if (coda_bitstream_try_queue(ctx, src_buf)) {
 305                        /*
 306                         * Source buffer is queued in the bitstream ringbuffer;
 307                         * queue the timestamp and mark source buffer as done
 308                         */
 309                        src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
 310
 311                        meta = kmalloc(sizeof(*meta), GFP_KERNEL);
 312                        if (meta) {
 313                                meta->sequence = src_buf->sequence;
 314                                meta->timecode = src_buf->timecode;
 315                                meta->timestamp = src_buf->vb2_buf.timestamp;
 316                                meta->start = start;
 317                                meta->end = ctx->bitstream_fifo.kfifo.in &
 318                                            ctx->bitstream_fifo.kfifo.mask;
 319                                spin_lock_irqsave(&ctx->buffer_meta_lock,
 320                                                  flags);
 321                                list_add_tail(&meta->list,
 322                                              &ctx->buffer_meta_list);
 323                                ctx->num_metas++;
 324                                spin_unlock_irqrestore(&ctx->buffer_meta_lock,
 325                                                       flags);
 326
 327                                trace_coda_bit_queue(ctx, src_buf, meta);
 328                        }
 329
 330                        if (buffer_list) {
 331                                struct v4l2_m2m_buffer *m2m_buf;
 332
 333                                m2m_buf = container_of(src_buf,
 334                                                       struct v4l2_m2m_buffer,
 335                                                       vb);
 336                                list_add_tail(&m2m_buf->list, buffer_list);
 337                        } else {
 338                                v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
 339                        }
 340                } else {
 341                        break;
 342                }
 343        }
 344}
 345
 346void coda_bit_stream_end_flag(struct coda_ctx *ctx)
 347{
 348        struct coda_dev *dev = ctx->dev;
 349
 350        ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
 351
 352        /* If this context is currently running, update the hardware flag */
 353        if ((dev->devtype->product == CODA_960) &&
 354            coda_isbusy(dev) &&
 355            (ctx->idx == coda_read(dev, CODA_REG_BIT_RUN_INDEX))) {
 356                coda_write(dev, ctx->bit_stream_param,
 357                           CODA_REG_BIT_BIT_STREAM_PARAM);
 358        }
 359}
 360
 361static void coda_parabuf_write(struct coda_ctx *ctx, int index, u32 value)
 362{
 363        struct coda_dev *dev = ctx->dev;
 364        u32 *p = ctx->parabuf.vaddr;
 365
 366        if (dev->devtype->product == CODA_DX6)
 367                p[index] = value;
 368        else
 369                p[index ^ 1] = value;
 370}
 371
 372static inline int coda_alloc_context_buf(struct coda_ctx *ctx,
 373                                         struct coda_aux_buf *buf, size_t size,
 374                                         const char *name)
 375{
 376        return coda_alloc_aux_buf(ctx->dev, buf, size, name, ctx->debugfs_entry);
 377}
 378
 379
 380static void coda_free_framebuffers(struct coda_ctx *ctx)
 381{
 382        int i;
 383
 384        for (i = 0; i < CODA_MAX_FRAMEBUFFERS; i++)
 385                coda_free_aux_buf(ctx->dev, &ctx->internal_frames[i]);
 386}
 387
 388static int coda_alloc_framebuffers(struct coda_ctx *ctx,
 389                                   struct coda_q_data *q_data, u32 fourcc)
 390{
 391        struct coda_dev *dev = ctx->dev;
 392        int width, height;
 393        int ysize;
 394        int ret;
 395        int i;
 396
 397        if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 ||
 398            ctx->codec->dst_fourcc == V4L2_PIX_FMT_H264 ||
 399            ctx->codec->src_fourcc == V4L2_PIX_FMT_MPEG4 ||
 400            ctx->codec->dst_fourcc == V4L2_PIX_FMT_MPEG4) {
 401                width = round_up(q_data->width, 16);
 402                height = round_up(q_data->height, 16);
 403        } else {
 404                width = round_up(q_data->width, 8);
 405                height = q_data->height;
 406        }
 407        ysize = width * height;
 408
 409        /* Allocate frame buffers */
 410        for (i = 0; i < ctx->num_internal_frames; i++) {
 411                size_t size;
 412                char *name;
 413
 414                if (ctx->tiled_map_type == GDI_TILED_FRAME_MB_RASTER_MAP)
 415                        size = round_up(ysize, 4096) + ysize / 2;
 416                else
 417                        size = ysize + ysize / 2;
 418                /* Add space for mvcol buffers */
 419                if (dev->devtype->product != CODA_DX6 &&
 420                    (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 ||
 421                     (ctx->codec->src_fourcc == V4L2_PIX_FMT_MPEG4 && i == 0)))
 422                        size += ysize / 4;
 423                name = kasprintf(GFP_KERNEL, "fb%d", i);
 424                if (!name) {
 425                        coda_free_framebuffers(ctx);
 426                        return -ENOMEM;
 427                }
 428                ret = coda_alloc_context_buf(ctx, &ctx->internal_frames[i],
 429                                             size, name);
 430                kfree(name);
 431                if (ret < 0) {
 432                        coda_free_framebuffers(ctx);
 433                        return ret;
 434                }
 435        }
 436
 437        /* Register frame buffers in the parameter buffer */
 438        for (i = 0; i < ctx->num_internal_frames; i++) {
 439                u32 y, cb, cr, mvcol;
 440
 441                /* Start addresses of Y, Cb, Cr planes */
 442                y = ctx->internal_frames[i].paddr;
 443                cb = y + ysize;
 444                cr = y + ysize + ysize/4;
 445                mvcol = y + ysize + ysize/4 + ysize/4;
 446                if (ctx->tiled_map_type == GDI_TILED_FRAME_MB_RASTER_MAP) {
 447                        cb = round_up(cb, 4096);
 448                        mvcol = cb + ysize/2;
 449                        cr = 0;
 450                        /* Packed 20-bit MSB of base addresses */
 451                        /* YYYYYCCC, CCyyyyyc, cccc.... */
 452                        y = (y & 0xfffff000) | cb >> 20;
 453                        cb = (cb & 0x000ff000) << 12;
 454                }
 455                coda_parabuf_write(ctx, i * 3 + 0, y);
 456                coda_parabuf_write(ctx, i * 3 + 1, cb);
 457                coda_parabuf_write(ctx, i * 3 + 2, cr);
 458
 459                if (dev->devtype->product == CODA_DX6)
 460                        continue;
 461
 462                /* mvcol buffer for h.264 and mpeg4 */
 463                if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264)
 464                        coda_parabuf_write(ctx, 96 + i, mvcol);
 465                if (ctx->codec->src_fourcc == V4L2_PIX_FMT_MPEG4 && i == 0)
 466                        coda_parabuf_write(ctx, 97, mvcol);
 467        }
 468
 469        return 0;
 470}
 471
 472static void coda_free_context_buffers(struct coda_ctx *ctx)
 473{
 474        struct coda_dev *dev = ctx->dev;
 475
 476        coda_free_aux_buf(dev, &ctx->slicebuf);
 477        coda_free_aux_buf(dev, &ctx->psbuf);
 478        if (dev->devtype->product != CODA_DX6)
 479                coda_free_aux_buf(dev, &ctx->workbuf);
 480        coda_free_aux_buf(dev, &ctx->parabuf);
 481}
 482
 483static int coda_alloc_context_buffers(struct coda_ctx *ctx,
 484                                      struct coda_q_data *q_data)
 485{
 486        struct coda_dev *dev = ctx->dev;
 487        size_t size;
 488        int ret;
 489
 490        if (!ctx->parabuf.vaddr) {
 491                ret = coda_alloc_context_buf(ctx, &ctx->parabuf,
 492                                             CODA_PARA_BUF_SIZE, "parabuf");
 493                if (ret < 0)
 494                        return ret;
 495        }
 496
 497        if (dev->devtype->product == CODA_DX6)
 498                return 0;
 499
 500        if (!ctx->slicebuf.vaddr && q_data->fourcc == V4L2_PIX_FMT_H264) {
 501                /* worst case slice size */
 502                size = (DIV_ROUND_UP(q_data->width, 16) *
 503                        DIV_ROUND_UP(q_data->height, 16)) * 3200 / 8 + 512;
 504                ret = coda_alloc_context_buf(ctx, &ctx->slicebuf, size,
 505                                             "slicebuf");
 506                if (ret < 0)
 507                        goto err;
 508        }
 509
 510        if (!ctx->psbuf.vaddr && (dev->devtype->product == CODA_HX4 ||
 511                                  dev->devtype->product == CODA_7541)) {
 512                ret = coda_alloc_context_buf(ctx, &ctx->psbuf,
 513                                             CODA7_PS_BUF_SIZE, "psbuf");
 514                if (ret < 0)
 515                        goto err;
 516        }
 517
 518        if (!ctx->workbuf.vaddr) {
 519                size = dev->devtype->workbuf_size;
 520                if (dev->devtype->product == CODA_960 &&
 521                    q_data->fourcc == V4L2_PIX_FMT_H264)
 522                        size += CODA9_PS_SAVE_SIZE;
 523                ret = coda_alloc_context_buf(ctx, &ctx->workbuf, size,
 524                                             "workbuf");
 525                if (ret < 0)
 526                        goto err;
 527        }
 528
 529        return 0;
 530
 531err:
 532        coda_free_context_buffers(ctx);
 533        return ret;
 534}
 535
 536static int coda_encode_header(struct coda_ctx *ctx, struct vb2_v4l2_buffer *buf,
 537                              int header_code, u8 *header, int *size)
 538{
 539        struct vb2_buffer *vb = &buf->vb2_buf;
 540        struct coda_dev *dev = ctx->dev;
 541        size_t bufsize;
 542        int ret;
 543        int i;
 544
 545        if (dev->devtype->product == CODA_960)
 546                memset(vb2_plane_vaddr(vb, 0), 0, 64);
 547
 548        coda_write(dev, vb2_dma_contig_plane_dma_addr(vb, 0),
 549                   CODA_CMD_ENC_HEADER_BB_START);
 550        bufsize = vb2_plane_size(vb, 0);
 551        if (dev->devtype->product == CODA_960)
 552                bufsize /= 1024;
 553        coda_write(dev, bufsize, CODA_CMD_ENC_HEADER_BB_SIZE);
 554        coda_write(dev, header_code, CODA_CMD_ENC_HEADER_CODE);
 555        ret = coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER);
 556        if (ret < 0) {
 557                v4l2_err(&dev->v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
 558                return ret;
 559        }
 560
 561        if (dev->devtype->product == CODA_960) {
 562                for (i = 63; i > 0; i--)
 563                        if (((char *)vb2_plane_vaddr(vb, 0))[i] != 0)
 564                                break;
 565                *size = i + 1;
 566        } else {
 567                *size = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->reg_idx)) -
 568                        coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
 569        }
 570        memcpy(header, vb2_plane_vaddr(vb, 0), *size);
 571
 572        return 0;
 573}
 574
 575static phys_addr_t coda_iram_alloc(struct coda_iram_info *iram, size_t size)
 576{
 577        phys_addr_t ret;
 578
 579        size = round_up(size, 1024);
 580        if (size > iram->remaining)
 581                return 0;
 582        iram->remaining -= size;
 583
 584        ret = iram->next_paddr;
 585        iram->next_paddr += size;
 586
 587        return ret;
 588}
 589
 590static void coda_setup_iram(struct coda_ctx *ctx)
 591{
 592        struct coda_iram_info *iram_info = &ctx->iram_info;
 593        struct coda_dev *dev = ctx->dev;
 594        int w64, w128;
 595        int mb_width;
 596        int dbk_bits;
 597        int bit_bits;
 598        int ip_bits;
 599        int me_bits;
 600
 601        memset(iram_info, 0, sizeof(*iram_info));
 602        iram_info->next_paddr = dev->iram.paddr;
 603        iram_info->remaining = dev->iram.size;
 604
 605        if (!dev->iram.vaddr)
 606                return;
 607
 608        switch (dev->devtype->product) {
 609        case CODA_HX4:
 610                dbk_bits = CODA7_USE_HOST_DBK_ENABLE;
 611                bit_bits = CODA7_USE_HOST_BIT_ENABLE;
 612                ip_bits = CODA7_USE_HOST_IP_ENABLE;
 613                me_bits = CODA7_USE_HOST_ME_ENABLE;
 614                break;
 615        case CODA_7541:
 616                dbk_bits = CODA7_USE_HOST_DBK_ENABLE | CODA7_USE_DBK_ENABLE;
 617                bit_bits = CODA7_USE_HOST_BIT_ENABLE | CODA7_USE_BIT_ENABLE;
 618                ip_bits = CODA7_USE_HOST_IP_ENABLE | CODA7_USE_IP_ENABLE;
 619                me_bits = CODA7_USE_HOST_ME_ENABLE | CODA7_USE_ME_ENABLE;
 620                break;
 621        case CODA_960:
 622                dbk_bits = CODA9_USE_HOST_DBK_ENABLE | CODA9_USE_DBK_ENABLE;
 623                bit_bits = CODA9_USE_HOST_BIT_ENABLE | CODA7_USE_BIT_ENABLE;
 624                ip_bits = CODA9_USE_HOST_IP_ENABLE | CODA7_USE_IP_ENABLE;
 625                me_bits = 0;
 626                break;
 627        default: /* CODA_DX6 */
 628                return;
 629        }
 630
 631        if (ctx->inst_type == CODA_INST_ENCODER) {
 632                struct coda_q_data *q_data_src;
 633
 634                q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
 635                mb_width = DIV_ROUND_UP(q_data_src->width, 16);
 636                w128 = mb_width * 128;
 637                w64 = mb_width * 64;
 638
 639                /* Prioritize in case IRAM is too small for everything */
 640                if (dev->devtype->product == CODA_HX4 ||
 641                    dev->devtype->product == CODA_7541) {
 642                        iram_info->search_ram_size = round_up(mb_width * 16 *
 643                                                              36 + 2048, 1024);
 644                        iram_info->search_ram_paddr = coda_iram_alloc(iram_info,
 645                                                iram_info->search_ram_size);
 646                        if (!iram_info->search_ram_paddr) {
 647                                pr_err("IRAM is smaller than the search ram size\n");
 648                                goto out;
 649                        }
 650                        iram_info->axi_sram_use |= me_bits;
 651                }
 652
 653                /* Only H.264BP and H.263P3 are considered */
 654                iram_info->buf_dbk_y_use = coda_iram_alloc(iram_info, w64);
 655                iram_info->buf_dbk_c_use = coda_iram_alloc(iram_info, w64);
 656                if (!iram_info->buf_dbk_c_use)
 657                        goto out;
 658                iram_info->axi_sram_use |= dbk_bits;
 659
 660                iram_info->buf_bit_use = coda_iram_alloc(iram_info, w128);
 661                if (!iram_info->buf_bit_use)
 662                        goto out;
 663                iram_info->axi_sram_use |= bit_bits;
 664
 665                iram_info->buf_ip_ac_dc_use = coda_iram_alloc(iram_info, w128);
 666                if (!iram_info->buf_ip_ac_dc_use)
 667                        goto out;
 668                iram_info->axi_sram_use |= ip_bits;
 669
 670                /* OVL and BTP disabled for encoder */
 671        } else if (ctx->inst_type == CODA_INST_DECODER) {
 672                struct coda_q_data *q_data_dst;
 673
 674                q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
 675                mb_width = DIV_ROUND_UP(q_data_dst->width, 16);
 676                w128 = mb_width * 128;
 677
 678                iram_info->buf_dbk_y_use = coda_iram_alloc(iram_info, w128);
 679                iram_info->buf_dbk_c_use = coda_iram_alloc(iram_info, w128);
 680                if (!iram_info->buf_dbk_c_use)
 681                        goto out;
 682                iram_info->axi_sram_use |= dbk_bits;
 683
 684                iram_info->buf_bit_use = coda_iram_alloc(iram_info, w128);
 685                if (!iram_info->buf_bit_use)
 686                        goto out;
 687                iram_info->axi_sram_use |= bit_bits;
 688
 689                iram_info->buf_ip_ac_dc_use = coda_iram_alloc(iram_info, w128);
 690                if (!iram_info->buf_ip_ac_dc_use)
 691                        goto out;
 692                iram_info->axi_sram_use |= ip_bits;
 693
 694                /* OVL and BTP unused as there is no VC1 support yet */
 695        }
 696
 697out:
 698        if (!(iram_info->axi_sram_use & CODA7_USE_HOST_IP_ENABLE))
 699                v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
 700                         "IRAM smaller than needed\n");
 701
 702        if (dev->devtype->product == CODA_HX4 ||
 703            dev->devtype->product == CODA_7541) {
 704                /* TODO - Enabling these causes picture errors on CODA7541 */
 705                if (ctx->inst_type == CODA_INST_DECODER) {
 706                        /* fw 1.4.50 */
 707                        iram_info->axi_sram_use &= ~(CODA7_USE_HOST_IP_ENABLE |
 708                                                     CODA7_USE_IP_ENABLE);
 709                } else {
 710                        /* fw 13.4.29 */
 711                        iram_info->axi_sram_use &= ~(CODA7_USE_HOST_IP_ENABLE |
 712                                                     CODA7_USE_HOST_DBK_ENABLE |
 713                                                     CODA7_USE_IP_ENABLE |
 714                                                     CODA7_USE_DBK_ENABLE);
 715                }
 716        }
 717}
 718
 719static u32 coda_supported_firmwares[] = {
 720        CODA_FIRMWARE_VERNUM(CODA_DX6, 2, 2, 5),
 721        CODA_FIRMWARE_VERNUM(CODA_HX4, 1, 4, 50),
 722        CODA_FIRMWARE_VERNUM(CODA_7541, 1, 4, 50),
 723        CODA_FIRMWARE_VERNUM(CODA_960, 2, 1, 5),
 724        CODA_FIRMWARE_VERNUM(CODA_960, 2, 3, 10),
 725        CODA_FIRMWARE_VERNUM(CODA_960, 3, 1, 1),
 726};
 727
 728static bool coda_firmware_supported(u32 vernum)
 729{
 730        int i;
 731
 732        for (i = 0; i < ARRAY_SIZE(coda_supported_firmwares); i++)
 733                if (vernum == coda_supported_firmwares[i])
 734                        return true;
 735        return false;
 736}
 737
 738int coda_check_firmware(struct coda_dev *dev)
 739{
 740        u16 product, major, minor, release;
 741        u32 data;
 742        int ret;
 743
 744        ret = clk_prepare_enable(dev->clk_per);
 745        if (ret)
 746                goto err_clk_per;
 747
 748        ret = clk_prepare_enable(dev->clk_ahb);
 749        if (ret)
 750                goto err_clk_ahb;
 751
 752        coda_write(dev, 0, CODA_CMD_FIRMWARE_VERNUM);
 753        coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
 754        coda_write(dev, 0, CODA_REG_BIT_RUN_INDEX);
 755        coda_write(dev, 0, CODA_REG_BIT_RUN_COD_STD);
 756        coda_write(dev, CODA_COMMAND_FIRMWARE_GET, CODA_REG_BIT_RUN_COMMAND);
 757        if (coda_wait_timeout(dev)) {
 758                v4l2_err(&dev->v4l2_dev, "firmware get command error\n");
 759                ret = -EIO;
 760                goto err_run_cmd;
 761        }
 762
 763        if (dev->devtype->product == CODA_960) {
 764                data = coda_read(dev, CODA9_CMD_FIRMWARE_CODE_REV);
 765                v4l2_info(&dev->v4l2_dev, "Firmware code revision: %d\n",
 766                          data);
 767        }
 768
 769        /* Check we are compatible with the loaded firmware */
 770        data = coda_read(dev, CODA_CMD_FIRMWARE_VERNUM);
 771        product = CODA_FIRMWARE_PRODUCT(data);
 772        major = CODA_FIRMWARE_MAJOR(data);
 773        minor = CODA_FIRMWARE_MINOR(data);
 774        release = CODA_FIRMWARE_RELEASE(data);
 775
 776        clk_disable_unprepare(dev->clk_per);
 777        clk_disable_unprepare(dev->clk_ahb);
 778
 779        if (product != dev->devtype->product) {
 780                v4l2_err(&dev->v4l2_dev,
 781                         "Wrong firmware. Hw: %s, Fw: %s, Version: %u.%u.%u\n",
 782                         coda_product_name(dev->devtype->product),
 783                         coda_product_name(product), major, minor, release);
 784                return -EINVAL;
 785        }
 786
 787        v4l2_info(&dev->v4l2_dev, "Initialized %s.\n",
 788                  coda_product_name(product));
 789
 790        if (coda_firmware_supported(data)) {
 791                v4l2_info(&dev->v4l2_dev, "Firmware version: %u.%u.%u\n",
 792                          major, minor, release);
 793        } else {
 794                v4l2_warn(&dev->v4l2_dev,
 795                          "Unsupported firmware version: %u.%u.%u\n",
 796                          major, minor, release);
 797        }
 798
 799        return 0;
 800
 801err_run_cmd:
 802        clk_disable_unprepare(dev->clk_ahb);
 803err_clk_ahb:
 804        clk_disable_unprepare(dev->clk_per);
 805err_clk_per:
 806        return ret;
 807}
 808
 809static void coda9_set_frame_cache(struct coda_ctx *ctx, u32 fourcc)
 810{
 811        u32 cache_size, cache_config;
 812
 813        if (ctx->tiled_map_type == GDI_LINEAR_FRAME_MAP) {
 814                /* Luma 2x0 page, 2x6 cache, chroma 2x0 page, 2x4 cache size */
 815                cache_size = 0x20262024;
 816                cache_config = 2 << CODA9_CACHE_PAGEMERGE_OFFSET;
 817        } else {
 818                /* Luma 0x2 page, 4x4 cache, chroma 0x2 page, 4x3 cache size */
 819                cache_size = 0x02440243;
 820                cache_config = 1 << CODA9_CACHE_PAGEMERGE_OFFSET;
 821        }
 822        coda_write(ctx->dev, cache_size, CODA9_CMD_SET_FRAME_CACHE_SIZE);
 823        if (fourcc == V4L2_PIX_FMT_NV12 || fourcc == V4L2_PIX_FMT_YUYV) {
 824                cache_config |= 32 << CODA9_CACHE_LUMA_BUFFER_SIZE_OFFSET |
 825                                16 << CODA9_CACHE_CR_BUFFER_SIZE_OFFSET |
 826                                0 << CODA9_CACHE_CB_BUFFER_SIZE_OFFSET;
 827        } else {
 828                cache_config |= 32 << CODA9_CACHE_LUMA_BUFFER_SIZE_OFFSET |
 829                                8 << CODA9_CACHE_CR_BUFFER_SIZE_OFFSET |
 830                                8 << CODA9_CACHE_CB_BUFFER_SIZE_OFFSET;
 831        }
 832        coda_write(ctx->dev, cache_config, CODA9_CMD_SET_FRAME_CACHE_CONFIG);
 833}
 834
 835/*
 836 * Encoder context operations
 837 */
 838
 839static int coda_encoder_reqbufs(struct coda_ctx *ctx,
 840                                struct v4l2_requestbuffers *rb)
 841{
 842        struct coda_q_data *q_data_src;
 843        int ret;
 844
 845        if (rb->type != V4L2_BUF_TYPE_VIDEO_OUTPUT)
 846                return 0;
 847
 848        if (rb->count) {
 849                q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
 850                ret = coda_alloc_context_buffers(ctx, q_data_src);
 851                if (ret < 0)
 852                        return ret;
 853        } else {
 854                coda_free_context_buffers(ctx);
 855        }
 856
 857        return 0;
 858}
 859
 860static int coda_start_encoding(struct coda_ctx *ctx)
 861{
 862        struct coda_dev *dev = ctx->dev;
 863        struct v4l2_device *v4l2_dev = &dev->v4l2_dev;
 864        struct coda_q_data *q_data_src, *q_data_dst;
 865        u32 bitstream_buf, bitstream_size;
 866        struct vb2_v4l2_buffer *buf;
 867        int gamma, ret, value;
 868        u32 dst_fourcc;
 869        int num_fb;
 870        u32 stride;
 871
 872        q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
 873        q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
 874        dst_fourcc = q_data_dst->fourcc;
 875
 876        buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
 877        bitstream_buf = vb2_dma_contig_plane_dma_addr(&buf->vb2_buf, 0);
 878        bitstream_size = q_data_dst->sizeimage;
 879
 880        if (!coda_is_initialized(dev)) {
 881                v4l2_err(v4l2_dev, "coda is not initialized.\n");
 882                return -EFAULT;
 883        }
 884
 885        if (dst_fourcc == V4L2_PIX_FMT_JPEG) {
 886                if (!ctx->params.jpeg_qmat_tab[0])
 887                        ctx->params.jpeg_qmat_tab[0] = kmalloc(64, GFP_KERNEL);
 888                if (!ctx->params.jpeg_qmat_tab[1])
 889                        ctx->params.jpeg_qmat_tab[1] = kmalloc(64, GFP_KERNEL);
 890                coda_set_jpeg_compression_quality(ctx, ctx->params.jpeg_quality);
 891        }
 892
 893        mutex_lock(&dev->coda_mutex);
 894
 895        coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
 896        coda_write(dev, bitstream_buf, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
 897        coda_write(dev, bitstream_buf, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
 898        switch (dev->devtype->product) {
 899        case CODA_DX6:
 900                coda_write(dev, CODADX6_STREAM_BUF_DYNALLOC_EN |
 901                        CODADX6_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
 902                break;
 903        case CODA_960:
 904                coda_write(dev, 0, CODA9_GDI_WPROT_RGN_EN);
 905                /* fallthrough */
 906        case CODA_HX4:
 907        case CODA_7541:
 908                coda_write(dev, CODA7_STREAM_BUF_DYNALLOC_EN |
 909                        CODA7_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
 910                break;
 911        }
 912
 913        ctx->frame_mem_ctrl &= ~(CODA_FRAME_CHROMA_INTERLEAVE | (0x3 << 9) |
 914                                 CODA9_FRAME_TILED2LINEAR);
 915        if (q_data_src->fourcc == V4L2_PIX_FMT_NV12)
 916                ctx->frame_mem_ctrl |= CODA_FRAME_CHROMA_INTERLEAVE;
 917        if (ctx->tiled_map_type == GDI_TILED_FRAME_MB_RASTER_MAP)
 918                ctx->frame_mem_ctrl |= (0x3 << 9) | CODA9_FRAME_TILED2LINEAR;
 919        coda_write(dev, ctx->frame_mem_ctrl, CODA_REG_BIT_FRAME_MEM_CTRL);
 920
 921        if (dev->devtype->product == CODA_DX6) {
 922                /* Configure the coda */
 923                coda_write(dev, dev->iram.paddr,
 924                           CODADX6_REG_BIT_SEARCH_RAM_BASE_ADDR);
 925        }
 926
 927        /* Could set rotation here if needed */
 928        value = 0;
 929        switch (dev->devtype->product) {
 930        case CODA_DX6:
 931                value = (q_data_src->width & CODADX6_PICWIDTH_MASK)
 932                        << CODADX6_PICWIDTH_OFFSET;
 933                value |= (q_data_src->height & CODADX6_PICHEIGHT_MASK)
 934                         << CODA_PICHEIGHT_OFFSET;
 935                break;
 936        case CODA_HX4:
 937        case CODA_7541:
 938                if (dst_fourcc == V4L2_PIX_FMT_H264) {
 939                        value = (round_up(q_data_src->width, 16) &
 940                                 CODA7_PICWIDTH_MASK) << CODA7_PICWIDTH_OFFSET;
 941                        value |= (round_up(q_data_src->height, 16) &
 942                                 CODA7_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
 943                        break;
 944                }
 945                /* fallthrough */
 946        case CODA_960:
 947                value = (q_data_src->width & CODA7_PICWIDTH_MASK)
 948                        << CODA7_PICWIDTH_OFFSET;
 949                value |= (q_data_src->height & CODA7_PICHEIGHT_MASK)
 950                         << CODA_PICHEIGHT_OFFSET;
 951        }
 952        coda_write(dev, value, CODA_CMD_ENC_SEQ_SRC_SIZE);
 953        if (dst_fourcc == V4L2_PIX_FMT_JPEG)
 954                ctx->params.framerate = 0;
 955        coda_write(dev, ctx->params.framerate,
 956                   CODA_CMD_ENC_SEQ_SRC_F_RATE);
 957
 958        ctx->params.codec_mode = ctx->codec->mode;
 959        switch (dst_fourcc) {
 960        case V4L2_PIX_FMT_MPEG4:
 961                if (dev->devtype->product == CODA_960)
 962                        coda_write(dev, CODA9_STD_MPEG4,
 963                                   CODA_CMD_ENC_SEQ_COD_STD);
 964                else
 965                        coda_write(dev, CODA_STD_MPEG4,
 966                                   CODA_CMD_ENC_SEQ_COD_STD);
 967                coda_write(dev, 0, CODA_CMD_ENC_SEQ_MP4_PARA);
 968                break;
 969        case V4L2_PIX_FMT_H264:
 970                if (dev->devtype->product == CODA_960)
 971                        coda_write(dev, CODA9_STD_H264,
 972                                   CODA_CMD_ENC_SEQ_COD_STD);
 973                else
 974                        coda_write(dev, CODA_STD_H264,
 975                                   CODA_CMD_ENC_SEQ_COD_STD);
 976                if (ctx->params.h264_deblk_enabled) {
 977                        value = ((ctx->params.h264_deblk_alpha &
 978                                  CODA_264PARAM_DEBLKFILTEROFFSETALPHA_MASK) <<
 979                                 CODA_264PARAM_DEBLKFILTEROFFSETALPHA_OFFSET) |
 980                                ((ctx->params.h264_deblk_beta &
 981                                  CODA_264PARAM_DEBLKFILTEROFFSETBETA_MASK) <<
 982                                 CODA_264PARAM_DEBLKFILTEROFFSETBETA_OFFSET);
 983                } else {
 984                        value = 1 << CODA_264PARAM_DISABLEDEBLK_OFFSET;
 985                }
 986                coda_write(dev, value, CODA_CMD_ENC_SEQ_264_PARA);
 987                break;
 988        case V4L2_PIX_FMT_JPEG:
 989                coda_write(dev, 0, CODA_CMD_ENC_SEQ_JPG_PARA);
 990                coda_write(dev, ctx->params.jpeg_restart_interval,
 991                                CODA_CMD_ENC_SEQ_JPG_RST_INTERVAL);
 992                coda_write(dev, 0, CODA_CMD_ENC_SEQ_JPG_THUMB_EN);
 993                coda_write(dev, 0, CODA_CMD_ENC_SEQ_JPG_THUMB_SIZE);
 994                coda_write(dev, 0, CODA_CMD_ENC_SEQ_JPG_THUMB_OFFSET);
 995
 996                coda_jpeg_write_tables(ctx);
 997                break;
 998        default:
 999                v4l2_err(v4l2_dev,
1000                         "dst format (0x%08x) invalid.\n", dst_fourcc);
1001                ret = -EINVAL;
1002                goto out;
1003        }
1004
1005        /*
1006         * slice mode and GOP size registers are used for thumb size/offset
1007         * in JPEG mode
1008         */
1009        if (dst_fourcc != V4L2_PIX_FMT_JPEG) {
1010                switch (ctx->params.slice_mode) {
1011                case V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE:
1012                        value = 0;
1013                        break;
1014                case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB:
1015                        value  = (ctx->params.slice_max_mb &
1016                                  CODA_SLICING_SIZE_MASK)
1017                                 << CODA_SLICING_SIZE_OFFSET;
1018                        value |= (1 & CODA_SLICING_UNIT_MASK)
1019                                 << CODA_SLICING_UNIT_OFFSET;
1020                        value |=  1 & CODA_SLICING_MODE_MASK;
1021                        break;
1022                case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES:
1023                        value  = (ctx->params.slice_max_bits &
1024                                  CODA_SLICING_SIZE_MASK)
1025                                 << CODA_SLICING_SIZE_OFFSET;
1026                        value |= (0 & CODA_SLICING_UNIT_MASK)
1027                                 << CODA_SLICING_UNIT_OFFSET;
1028                        value |=  1 & CODA_SLICING_MODE_MASK;
1029                        break;
1030                }
1031                coda_write(dev, value, CODA_CMD_ENC_SEQ_SLICE_MODE);
1032                value = ctx->params.gop_size;
1033                coda_write(dev, value, CODA_CMD_ENC_SEQ_GOP_SIZE);
1034        }
1035
1036        if (ctx->params.bitrate) {
1037                /* Rate control enabled */
1038                value = (ctx->params.bitrate & CODA_RATECONTROL_BITRATE_MASK)
1039                        << CODA_RATECONTROL_BITRATE_OFFSET;
1040                value |=  1 & CODA_RATECONTROL_ENABLE_MASK;
1041                value |= (ctx->params.vbv_delay &
1042                          CODA_RATECONTROL_INITIALDELAY_MASK)
1043                         << CODA_RATECONTROL_INITIALDELAY_OFFSET;
1044                if (dev->devtype->product == CODA_960)
1045                        value |= BIT(31); /* disable autoskip */
1046        } else {
1047                value = 0;
1048        }
1049        coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_PARA);
1050
1051        coda_write(dev, ctx->params.vbv_size, CODA_CMD_ENC_SEQ_RC_BUF_SIZE);
1052        coda_write(dev, ctx->params.intra_refresh,
1053                   CODA_CMD_ENC_SEQ_INTRA_REFRESH);
1054
1055        coda_write(dev, bitstream_buf, CODA_CMD_ENC_SEQ_BB_START);
1056        coda_write(dev, bitstream_size / 1024, CODA_CMD_ENC_SEQ_BB_SIZE);
1057
1058
1059        value = 0;
1060        if (dev->devtype->product == CODA_960)
1061                gamma = CODA9_DEFAULT_GAMMA;
1062        else
1063                gamma = CODA_DEFAULT_GAMMA;
1064        if (gamma > 0) {
1065                coda_write(dev, (gamma & CODA_GAMMA_MASK) << CODA_GAMMA_OFFSET,
1066                           CODA_CMD_ENC_SEQ_RC_GAMMA);
1067        }
1068
1069        if (ctx->params.h264_min_qp || ctx->params.h264_max_qp) {
1070                coda_write(dev,
1071                           ctx->params.h264_min_qp << CODA_QPMIN_OFFSET |
1072                           ctx->params.h264_max_qp << CODA_QPMAX_OFFSET,
1073                           CODA_CMD_ENC_SEQ_RC_QP_MIN_MAX);
1074        }
1075        if (dev->devtype->product == CODA_960) {
1076                if (ctx->params.h264_max_qp)
1077                        value |= 1 << CODA9_OPTION_RCQPMAX_OFFSET;
1078                if (CODA_DEFAULT_GAMMA > 0)
1079                        value |= 1 << CODA9_OPTION_GAMMA_OFFSET;
1080        } else {
1081                if (CODA_DEFAULT_GAMMA > 0) {
1082                        if (dev->devtype->product == CODA_DX6)
1083                                value |= 1 << CODADX6_OPTION_GAMMA_OFFSET;
1084                        else
1085                                value |= 1 << CODA7_OPTION_GAMMA_OFFSET;
1086                }
1087                if (ctx->params.h264_min_qp)
1088                        value |= 1 << CODA7_OPTION_RCQPMIN_OFFSET;
1089                if (ctx->params.h264_max_qp)
1090                        value |= 1 << CODA7_OPTION_RCQPMAX_OFFSET;
1091        }
1092        coda_write(dev, value, CODA_CMD_ENC_SEQ_OPTION);
1093
1094        coda_write(dev, 0, CODA_CMD_ENC_SEQ_RC_INTERVAL_MODE);
1095
1096        coda_setup_iram(ctx);
1097
1098        if (dst_fourcc == V4L2_PIX_FMT_H264) {
1099                switch (dev->devtype->product) {
1100                case CODA_DX6:
1101                        value = FMO_SLICE_SAVE_BUF_SIZE << 7;
1102                        coda_write(dev, value, CODADX6_CMD_ENC_SEQ_FMO);
1103                        break;
1104                case CODA_HX4:
1105                case CODA_7541:
1106                        coda_write(dev, ctx->iram_info.search_ram_paddr,
1107                                        CODA7_CMD_ENC_SEQ_SEARCH_BASE);
1108                        coda_write(dev, ctx->iram_info.search_ram_size,
1109                                        CODA7_CMD_ENC_SEQ_SEARCH_SIZE);
1110                        break;
1111                case CODA_960:
1112                        coda_write(dev, 0, CODA9_CMD_ENC_SEQ_ME_OPTION);
1113                        coda_write(dev, 0, CODA9_CMD_ENC_SEQ_INTRA_WEIGHT);
1114                }
1115        }
1116
1117        ret = coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT);
1118        if (ret < 0) {
1119                v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
1120                goto out;
1121        }
1122
1123        if (coda_read(dev, CODA_RET_ENC_SEQ_SUCCESS) == 0) {
1124                v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT failed\n");
1125                ret = -EFAULT;
1126                goto out;
1127        }
1128        ctx->initialized = 1;
1129
1130        if (dst_fourcc != V4L2_PIX_FMT_JPEG) {
1131                if (dev->devtype->product == CODA_960)
1132                        ctx->num_internal_frames = 4;
1133                else
1134                        ctx->num_internal_frames = 2;
1135                ret = coda_alloc_framebuffers(ctx, q_data_src, dst_fourcc);
1136                if (ret < 0) {
1137                        v4l2_err(v4l2_dev, "failed to allocate framebuffers\n");
1138                        goto out;
1139                }
1140                num_fb = 2;
1141                stride = q_data_src->bytesperline;
1142        } else {
1143                ctx->num_internal_frames = 0;
1144                num_fb = 0;
1145                stride = 0;
1146        }
1147        coda_write(dev, num_fb, CODA_CMD_SET_FRAME_BUF_NUM);
1148        coda_write(dev, stride, CODA_CMD_SET_FRAME_BUF_STRIDE);
1149
1150        if (dev->devtype->product == CODA_HX4 ||
1151            dev->devtype->product == CODA_7541) {
1152                coda_write(dev, q_data_src->bytesperline,
1153                                CODA7_CMD_SET_FRAME_SOURCE_BUF_STRIDE);
1154        }
1155        if (dev->devtype->product != CODA_DX6) {
1156                coda_write(dev, ctx->iram_info.buf_bit_use,
1157                                CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
1158                coda_write(dev, ctx->iram_info.buf_ip_ac_dc_use,
1159                                CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
1160                coda_write(dev, ctx->iram_info.buf_dbk_y_use,
1161                                CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
1162                coda_write(dev, ctx->iram_info.buf_dbk_c_use,
1163                                CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
1164                coda_write(dev, ctx->iram_info.buf_ovl_use,
1165                                CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
1166                if (dev->devtype->product == CODA_960) {
1167                        coda_write(dev, ctx->iram_info.buf_btp_use,
1168                                        CODA9_CMD_SET_FRAME_AXI_BTP_ADDR);
1169
1170                        coda9_set_frame_cache(ctx, q_data_src->fourcc);
1171
1172                        /* FIXME */
1173                        coda_write(dev, ctx->internal_frames[2].paddr,
1174                                   CODA9_CMD_SET_FRAME_SUBSAMP_A);
1175                        coda_write(dev, ctx->internal_frames[3].paddr,
1176                                   CODA9_CMD_SET_FRAME_SUBSAMP_B);
1177                }
1178        }
1179
1180        ret = coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF);
1181        if (ret < 0) {
1182                v4l2_err(v4l2_dev, "CODA_COMMAND_SET_FRAME_BUF timeout\n");
1183                goto out;
1184        }
1185
1186        /* Save stream headers */
1187        buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
1188        switch (dst_fourcc) {
1189        case V4L2_PIX_FMT_H264:
1190                /*
1191                 * Get SPS in the first frame and copy it to an
1192                 * intermediate buffer.
1193                 */
1194                ret = coda_encode_header(ctx, buf, CODA_HEADER_H264_SPS,
1195                                         &ctx->vpu_header[0][0],
1196                                         &ctx->vpu_header_size[0]);
1197                if (ret < 0)
1198                        goto out;
1199
1200                /*
1201                 * Get PPS in the first frame and copy it to an
1202                 * intermediate buffer.
1203                 */
1204                ret = coda_encode_header(ctx, buf, CODA_HEADER_H264_PPS,
1205                                         &ctx->vpu_header[1][0],
1206                                         &ctx->vpu_header_size[1]);
1207                if (ret < 0)
1208                        goto out;
1209
1210                /*
1211                 * Length of H.264 headers is variable and thus it might not be
1212                 * aligned for the coda to append the encoded frame. In that is
1213                 * the case a filler NAL must be added to header 2.
1214                 */
1215                ctx->vpu_header_size[2] = coda_h264_padding(
1216                                        (ctx->vpu_header_size[0] +
1217                                         ctx->vpu_header_size[1]),
1218                                         ctx->vpu_header[2]);
1219                break;
1220        case V4L2_PIX_FMT_MPEG4:
1221                /*
1222                 * Get VOS in the first frame and copy it to an
1223                 * intermediate buffer
1224                 */
1225                ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VOS,
1226                                         &ctx->vpu_header[0][0],
1227                                         &ctx->vpu_header_size[0]);
1228                if (ret < 0)
1229                        goto out;
1230
1231                ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VIS,
1232                                         &ctx->vpu_header[1][0],
1233                                         &ctx->vpu_header_size[1]);
1234                if (ret < 0)
1235                        goto out;
1236
1237                ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VOL,
1238                                         &ctx->vpu_header[2][0],
1239                                         &ctx->vpu_header_size[2]);
1240                if (ret < 0)
1241                        goto out;
1242                break;
1243        default:
1244                /* No more formats need to save headers at the moment */
1245                break;
1246        }
1247
1248out:
1249        mutex_unlock(&dev->coda_mutex);
1250        return ret;
1251}
1252
1253static int coda_prepare_encode(struct coda_ctx *ctx)
1254{
1255        struct coda_q_data *q_data_src, *q_data_dst;
1256        struct vb2_v4l2_buffer *src_buf, *dst_buf;
1257        struct coda_dev *dev = ctx->dev;
1258        int force_ipicture;
1259        int quant_param = 0;
1260        u32 pic_stream_buffer_addr, pic_stream_buffer_size;
1261        u32 rot_mode = 0;
1262        u32 dst_fourcc;
1263        u32 reg;
1264
1265        src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx);
1266        dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
1267        q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1268        q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1269        dst_fourcc = q_data_dst->fourcc;
1270
1271        src_buf->sequence = ctx->osequence;
1272        dst_buf->sequence = ctx->osequence;
1273        ctx->osequence++;
1274
1275        force_ipicture = ctx->params.force_ipicture;
1276        if (force_ipicture)
1277                ctx->params.force_ipicture = false;
1278        else if (ctx->params.gop_size != 0 &&
1279                 (src_buf->sequence % ctx->params.gop_size) == 0)
1280                force_ipicture = 1;
1281
1282        /*
1283         * Workaround coda firmware BUG that only marks the first
1284         * frame as IDR. This is a problem for some decoders that can't
1285         * recover when a frame is lost.
1286         */
1287        if (!force_ipicture) {
1288                src_buf->flags |= V4L2_BUF_FLAG_PFRAME;
1289                src_buf->flags &= ~V4L2_BUF_FLAG_KEYFRAME;
1290        } else {
1291                src_buf->flags |= V4L2_BUF_FLAG_KEYFRAME;
1292                src_buf->flags &= ~V4L2_BUF_FLAG_PFRAME;
1293        }
1294
1295        if (dev->devtype->product == CODA_960)
1296                coda_set_gdi_regs(ctx);
1297
1298        /*
1299         * Copy headers in front of the first frame and forced I frames for
1300         * H.264 only. In MPEG4 they are already copied by the CODA.
1301         */
1302        if (src_buf->sequence == 0 || force_ipicture) {
1303                pic_stream_buffer_addr =
1304                        vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 0) +
1305                        ctx->vpu_header_size[0] +
1306                        ctx->vpu_header_size[1] +
1307                        ctx->vpu_header_size[2];
1308                pic_stream_buffer_size = q_data_dst->sizeimage -
1309                        ctx->vpu_header_size[0] -
1310                        ctx->vpu_header_size[1] -
1311                        ctx->vpu_header_size[2];
1312                memcpy(vb2_plane_vaddr(&dst_buf->vb2_buf, 0),
1313                       &ctx->vpu_header[0][0], ctx->vpu_header_size[0]);
1314                memcpy(vb2_plane_vaddr(&dst_buf->vb2_buf, 0)
1315                        + ctx->vpu_header_size[0], &ctx->vpu_header[1][0],
1316                        ctx->vpu_header_size[1]);
1317                memcpy(vb2_plane_vaddr(&dst_buf->vb2_buf, 0)
1318                        + ctx->vpu_header_size[0] + ctx->vpu_header_size[1],
1319                        &ctx->vpu_header[2][0], ctx->vpu_header_size[2]);
1320        } else {
1321                pic_stream_buffer_addr =
1322                        vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 0);
1323                pic_stream_buffer_size = q_data_dst->sizeimage;
1324        }
1325
1326        if (force_ipicture) {
1327                switch (dst_fourcc) {
1328                case V4L2_PIX_FMT_H264:
1329                        quant_param = ctx->params.h264_intra_qp;
1330                        break;
1331                case V4L2_PIX_FMT_MPEG4:
1332                        quant_param = ctx->params.mpeg4_intra_qp;
1333                        break;
1334                case V4L2_PIX_FMT_JPEG:
1335                        quant_param = 30;
1336                        break;
1337                default:
1338                        v4l2_warn(&ctx->dev->v4l2_dev,
1339                                "cannot set intra qp, fmt not supported\n");
1340                        break;
1341                }
1342        } else {
1343                switch (dst_fourcc) {
1344                case V4L2_PIX_FMT_H264:
1345                        quant_param = ctx->params.h264_inter_qp;
1346                        break;
1347                case V4L2_PIX_FMT_MPEG4:
1348                        quant_param = ctx->params.mpeg4_inter_qp;
1349                        break;
1350                default:
1351                        v4l2_warn(&ctx->dev->v4l2_dev,
1352                                "cannot set inter qp, fmt not supported\n");
1353                        break;
1354                }
1355        }
1356
1357        /* submit */
1358        if (ctx->params.rot_mode)
1359                rot_mode = CODA_ROT_MIR_ENABLE | ctx->params.rot_mode;
1360        coda_write(dev, rot_mode, CODA_CMD_ENC_PIC_ROT_MODE);
1361        coda_write(dev, quant_param, CODA_CMD_ENC_PIC_QS);
1362
1363        if (dev->devtype->product == CODA_960) {
1364                coda_write(dev, 4/*FIXME: 0*/, CODA9_CMD_ENC_PIC_SRC_INDEX);
1365                coda_write(dev, q_data_src->width, CODA9_CMD_ENC_PIC_SRC_STRIDE);
1366                coda_write(dev, 0, CODA9_CMD_ENC_PIC_SUB_FRAME_SYNC);
1367
1368                reg = CODA9_CMD_ENC_PIC_SRC_ADDR_Y;
1369        } else {
1370                reg = CODA_CMD_ENC_PIC_SRC_ADDR_Y;
1371        }
1372        coda_write_base(ctx, q_data_src, src_buf, reg);
1373
1374        coda_write(dev, force_ipicture << 1 & 0x2,
1375                   CODA_CMD_ENC_PIC_OPTION);
1376
1377        coda_write(dev, pic_stream_buffer_addr, CODA_CMD_ENC_PIC_BB_START);
1378        coda_write(dev, pic_stream_buffer_size / 1024,
1379                   CODA_CMD_ENC_PIC_BB_SIZE);
1380
1381        if (!ctx->streamon_out) {
1382                /* After streamoff on the output side, set stream end flag */
1383                ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
1384                coda_write(dev, ctx->bit_stream_param,
1385                           CODA_REG_BIT_BIT_STREAM_PARAM);
1386        }
1387
1388        if (dev->devtype->product != CODA_DX6)
1389                coda_write(dev, ctx->iram_info.axi_sram_use,
1390                                CODA7_REG_BIT_AXI_SRAM_USE);
1391
1392        trace_coda_enc_pic_run(ctx, src_buf);
1393
1394        coda_command_async(ctx, CODA_COMMAND_PIC_RUN);
1395
1396        return 0;
1397}
1398
1399static void coda_finish_encode(struct coda_ctx *ctx)
1400{
1401        struct vb2_v4l2_buffer *src_buf, *dst_buf;
1402        struct coda_dev *dev = ctx->dev;
1403        u32 wr_ptr, start_ptr;
1404
1405        src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
1406        dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
1407
1408        trace_coda_enc_pic_done(ctx, dst_buf);
1409
1410        /* Get results from the coda */
1411        start_ptr = coda_read(dev, CODA_CMD_ENC_PIC_BB_START);
1412        wr_ptr = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
1413
1414        /* Calculate bytesused field */
1415        if (dst_buf->sequence == 0 ||
1416            src_buf->flags & V4L2_BUF_FLAG_KEYFRAME) {
1417                vb2_set_plane_payload(&dst_buf->vb2_buf, 0, wr_ptr - start_ptr +
1418                                        ctx->vpu_header_size[0] +
1419                                        ctx->vpu_header_size[1] +
1420                                        ctx->vpu_header_size[2]);
1421        } else {
1422                vb2_set_plane_payload(&dst_buf->vb2_buf, 0, wr_ptr - start_ptr);
1423        }
1424
1425        v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, "frame size = %u\n",
1426                 wr_ptr - start_ptr);
1427
1428        coda_read(dev, CODA_RET_ENC_PIC_SLICE_NUM);
1429        coda_read(dev, CODA_RET_ENC_PIC_FLAG);
1430
1431        if (coda_read(dev, CODA_RET_ENC_PIC_TYPE) == 0) {
1432                dst_buf->flags |= V4L2_BUF_FLAG_KEYFRAME;
1433                dst_buf->flags &= ~V4L2_BUF_FLAG_PFRAME;
1434        } else {
1435                dst_buf->flags |= V4L2_BUF_FLAG_PFRAME;
1436                dst_buf->flags &= ~V4L2_BUF_FLAG_KEYFRAME;
1437        }
1438
1439        dst_buf->vb2_buf.timestamp = src_buf->vb2_buf.timestamp;
1440        dst_buf->field = src_buf->field;
1441        dst_buf->flags &= ~V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
1442        dst_buf->flags |=
1443                src_buf->flags & V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
1444        dst_buf->timecode = src_buf->timecode;
1445
1446        v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
1447
1448        dst_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
1449        coda_m2m_buf_done(ctx, dst_buf, VB2_BUF_STATE_DONE);
1450
1451        ctx->gopcounter--;
1452        if (ctx->gopcounter < 0)
1453                ctx->gopcounter = ctx->params.gop_size - 1;
1454
1455        v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1456                "job finished: encoding frame (%d) (%s)\n",
1457                dst_buf->sequence,
1458                (dst_buf->flags & V4L2_BUF_FLAG_KEYFRAME) ?
1459                "KEYFRAME" : "PFRAME");
1460}
1461
1462static void coda_seq_end_work(struct work_struct *work)
1463{
1464        struct coda_ctx *ctx = container_of(work, struct coda_ctx, seq_end_work);
1465        struct coda_dev *dev = ctx->dev;
1466
1467        mutex_lock(&ctx->buffer_mutex);
1468        mutex_lock(&dev->coda_mutex);
1469
1470        if (ctx->initialized == 0)
1471                goto out;
1472
1473        v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1474                 "%d: %s: sent command 'SEQ_END' to coda\n", ctx->idx,
1475                 __func__);
1476        if (coda_command_sync(ctx, CODA_COMMAND_SEQ_END)) {
1477                v4l2_err(&dev->v4l2_dev,
1478                         "CODA_COMMAND_SEQ_END failed\n");
1479        }
1480
1481        /*
1482         * FIXME: Sometimes h.264 encoding fails with 8-byte sequences missing
1483         * from the output stream after the h.264 decoder has run. Resetting the
1484         * hardware after the decoder has finished seems to help.
1485         */
1486        if (dev->devtype->product == CODA_960)
1487                coda_hw_reset(ctx);
1488
1489        kfifo_init(&ctx->bitstream_fifo,
1490                ctx->bitstream.vaddr, ctx->bitstream.size);
1491
1492        coda_free_framebuffers(ctx);
1493
1494        ctx->initialized = 0;
1495
1496out:
1497        mutex_unlock(&dev->coda_mutex);
1498        mutex_unlock(&ctx->buffer_mutex);
1499}
1500
1501static void coda_bit_release(struct coda_ctx *ctx)
1502{
1503        mutex_lock(&ctx->buffer_mutex);
1504        coda_free_framebuffers(ctx);
1505        coda_free_context_buffers(ctx);
1506        coda_free_bitstream_buffer(ctx);
1507        mutex_unlock(&ctx->buffer_mutex);
1508}
1509
1510const struct coda_context_ops coda_bit_encode_ops = {
1511        .queue_init = coda_encoder_queue_init,
1512        .reqbufs = coda_encoder_reqbufs,
1513        .start_streaming = coda_start_encoding,
1514        .prepare_run = coda_prepare_encode,
1515        .finish_run = coda_finish_encode,
1516        .seq_end_work = coda_seq_end_work,
1517        .release = coda_bit_release,
1518};
1519
1520/*
1521 * Decoder context operations
1522 */
1523
1524static int coda_alloc_bitstream_buffer(struct coda_ctx *ctx,
1525                                       struct coda_q_data *q_data)
1526{
1527        if (ctx->bitstream.vaddr)
1528                return 0;
1529
1530        ctx->bitstream.size = roundup_pow_of_two(q_data->sizeimage * 2);
1531        ctx->bitstream.vaddr = dma_alloc_wc(&ctx->dev->plat_dev->dev,
1532                                            ctx->bitstream.size,
1533                                            &ctx->bitstream.paddr, GFP_KERNEL);
1534        if (!ctx->bitstream.vaddr) {
1535                v4l2_err(&ctx->dev->v4l2_dev,
1536                         "failed to allocate bitstream ringbuffer");
1537                return -ENOMEM;
1538        }
1539        kfifo_init(&ctx->bitstream_fifo,
1540                   ctx->bitstream.vaddr, ctx->bitstream.size);
1541
1542        return 0;
1543}
1544
1545static void coda_free_bitstream_buffer(struct coda_ctx *ctx)
1546{
1547        if (ctx->bitstream.vaddr == NULL)
1548                return;
1549
1550        dma_free_wc(&ctx->dev->plat_dev->dev, ctx->bitstream.size,
1551                    ctx->bitstream.vaddr, ctx->bitstream.paddr);
1552        ctx->bitstream.vaddr = NULL;
1553        kfifo_init(&ctx->bitstream_fifo, NULL, 0);
1554}
1555
1556static int coda_decoder_reqbufs(struct coda_ctx *ctx,
1557                                struct v4l2_requestbuffers *rb)
1558{
1559        struct coda_q_data *q_data_src;
1560        int ret;
1561
1562        if (rb->type != V4L2_BUF_TYPE_VIDEO_OUTPUT)
1563                return 0;
1564
1565        if (rb->count) {
1566                q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1567                ret = coda_alloc_context_buffers(ctx, q_data_src);
1568                if (ret < 0)
1569                        return ret;
1570                ret = coda_alloc_bitstream_buffer(ctx, q_data_src);
1571                if (ret < 0) {
1572                        coda_free_context_buffers(ctx);
1573                        return ret;
1574                }
1575        } else {
1576                coda_free_bitstream_buffer(ctx);
1577                coda_free_context_buffers(ctx);
1578        }
1579
1580        return 0;
1581}
1582
1583static bool coda_reorder_enable(struct coda_ctx *ctx)
1584{
1585        const char * const *profile_names;
1586        const char * const *level_names;
1587        struct coda_dev *dev = ctx->dev;
1588        int profile, level;
1589
1590        if (dev->devtype->product != CODA_HX4 &&
1591            dev->devtype->product != CODA_7541 &&
1592            dev->devtype->product != CODA_960)
1593                return false;
1594
1595        if (ctx->codec->src_fourcc == V4L2_PIX_FMT_JPEG)
1596                return false;
1597
1598        if (ctx->codec->src_fourcc != V4L2_PIX_FMT_H264)
1599                return true;
1600
1601        profile = coda_h264_profile(ctx->params.h264_profile_idc);
1602        if (profile < 0) {
1603                v4l2_warn(&dev->v4l2_dev, "Invalid H264 Profile: %d\n",
1604                         ctx->params.h264_profile_idc);
1605                return false;
1606        }
1607
1608        level = coda_h264_level(ctx->params.h264_level_idc);
1609        if (level < 0) {
1610                v4l2_warn(&dev->v4l2_dev, "Invalid H264 Level: %d\n",
1611                         ctx->params.h264_level_idc);
1612                return false;
1613        }
1614
1615        profile_names = v4l2_ctrl_get_menu(V4L2_CID_MPEG_VIDEO_H264_PROFILE);
1616        level_names = v4l2_ctrl_get_menu(V4L2_CID_MPEG_VIDEO_H264_LEVEL);
1617
1618        v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "H264 Profile/Level: %s L%s\n",
1619                 profile_names[profile], level_names[level]);
1620
1621        /* Baseline profile does not support reordering */
1622        return profile > V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE;
1623}
1624
1625static int __coda_start_decoding(struct coda_ctx *ctx)
1626{
1627        struct coda_q_data *q_data_src, *q_data_dst;
1628        u32 bitstream_buf, bitstream_size;
1629        struct coda_dev *dev = ctx->dev;
1630        int width, height;
1631        u32 src_fourcc, dst_fourcc;
1632        u32 val;
1633        int ret;
1634
1635        v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1636                 "Video Data Order Adapter: %s\n",
1637                 ctx->use_vdoa ? "Enabled" : "Disabled");
1638
1639        /* Start decoding */
1640        q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1641        q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1642        bitstream_buf = ctx->bitstream.paddr;
1643        bitstream_size = ctx->bitstream.size;
1644        src_fourcc = q_data_src->fourcc;
1645        dst_fourcc = q_data_dst->fourcc;
1646
1647        coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
1648
1649        /* Update coda bitstream read and write pointers from kfifo */
1650        coda_kfifo_sync_to_device_full(ctx);
1651
1652        ctx->frame_mem_ctrl &= ~(CODA_FRAME_CHROMA_INTERLEAVE | (0x3 << 9) |
1653                                 CODA9_FRAME_TILED2LINEAR);
1654        if (dst_fourcc == V4L2_PIX_FMT_NV12 || dst_fourcc == V4L2_PIX_FMT_YUYV)
1655                ctx->frame_mem_ctrl |= CODA_FRAME_CHROMA_INTERLEAVE;
1656        if (ctx->tiled_map_type == GDI_TILED_FRAME_MB_RASTER_MAP)
1657                ctx->frame_mem_ctrl |= (0x3 << 9) |
1658                        ((ctx->use_vdoa) ? 0 : CODA9_FRAME_TILED2LINEAR);
1659        coda_write(dev, ctx->frame_mem_ctrl, CODA_REG_BIT_FRAME_MEM_CTRL);
1660
1661        ctx->display_idx = -1;
1662        ctx->frm_dis_flg = 0;
1663        coda_write(dev, 0, CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
1664
1665        coda_write(dev, bitstream_buf, CODA_CMD_DEC_SEQ_BB_START);
1666        coda_write(dev, bitstream_size / 1024, CODA_CMD_DEC_SEQ_BB_SIZE);
1667        val = 0;
1668        if (coda_reorder_enable(ctx))
1669                val |= CODA_REORDER_ENABLE;
1670        if (ctx->codec->src_fourcc == V4L2_PIX_FMT_JPEG)
1671                val |= CODA_NO_INT_ENABLE;
1672        coda_write(dev, val, CODA_CMD_DEC_SEQ_OPTION);
1673
1674        ctx->params.codec_mode = ctx->codec->mode;
1675        if (dev->devtype->product == CODA_960 &&
1676            src_fourcc == V4L2_PIX_FMT_MPEG4)
1677                ctx->params.codec_mode_aux = CODA_MP4_AUX_MPEG4;
1678        else
1679                ctx->params.codec_mode_aux = 0;
1680        if (src_fourcc == V4L2_PIX_FMT_MPEG4) {
1681                coda_write(dev, CODA_MP4_CLASS_MPEG4,
1682                           CODA_CMD_DEC_SEQ_MP4_ASP_CLASS);
1683        }
1684        if (src_fourcc == V4L2_PIX_FMT_H264) {
1685                if (dev->devtype->product == CODA_HX4 ||
1686                    dev->devtype->product == CODA_7541) {
1687                        coda_write(dev, ctx->psbuf.paddr,
1688                                        CODA_CMD_DEC_SEQ_PS_BB_START);
1689                        coda_write(dev, (CODA7_PS_BUF_SIZE / 1024),
1690                                        CODA_CMD_DEC_SEQ_PS_BB_SIZE);
1691                }
1692                if (dev->devtype->product == CODA_960) {
1693                        coda_write(dev, 0, CODA_CMD_DEC_SEQ_X264_MV_EN);
1694                        coda_write(dev, 512, CODA_CMD_DEC_SEQ_SPP_CHUNK_SIZE);
1695                }
1696        }
1697        if (dev->devtype->product != CODA_960)
1698                coda_write(dev, 0, CODA_CMD_DEC_SEQ_SRC_SIZE);
1699
1700        ctx->bit_stream_param = CODA_BIT_DEC_SEQ_INIT_ESCAPE;
1701        ret = coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT);
1702        ctx->bit_stream_param = 0;
1703        if (ret) {
1704                v4l2_err(&dev->v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
1705                return ret;
1706        }
1707        ctx->initialized = 1;
1708
1709        /* Update kfifo out pointer from coda bitstream read pointer */
1710        coda_kfifo_sync_from_device(ctx);
1711
1712        if (coda_read(dev, CODA_RET_DEC_SEQ_SUCCESS) == 0) {
1713                v4l2_err(&dev->v4l2_dev,
1714                        "CODA_COMMAND_SEQ_INIT failed, error code = %d\n",
1715                        coda_read(dev, CODA_RET_DEC_SEQ_ERR_REASON));
1716                return -EAGAIN;
1717        }
1718
1719        val = coda_read(dev, CODA_RET_DEC_SEQ_SRC_SIZE);
1720        if (dev->devtype->product == CODA_DX6) {
1721                width = (val >> CODADX6_PICWIDTH_OFFSET) & CODADX6_PICWIDTH_MASK;
1722                height = val & CODADX6_PICHEIGHT_MASK;
1723        } else {
1724                width = (val >> CODA7_PICWIDTH_OFFSET) & CODA7_PICWIDTH_MASK;
1725                height = val & CODA7_PICHEIGHT_MASK;
1726        }
1727
1728        if (width > q_data_dst->bytesperline || height > q_data_dst->height) {
1729                v4l2_err(&dev->v4l2_dev, "stream is %dx%d, not %dx%d\n",
1730                         width, height, q_data_dst->bytesperline,
1731                         q_data_dst->height);
1732                return -EINVAL;
1733        }
1734
1735        width = round_up(width, 16);
1736        height = round_up(height, 16);
1737
1738        v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "%s instance %d now: %dx%d\n",
1739                 __func__, ctx->idx, width, height);
1740
1741        ctx->num_internal_frames = coda_read(dev, CODA_RET_DEC_SEQ_FRAME_NEED);
1742        /*
1743         * If the VDOA is used, the decoder needs one additional frame,
1744         * because the frames are freed when the next frame is decoded.
1745         * Otherwise there are visible errors in the decoded frames (green
1746         * regions in displayed frames) and a broken order of frames (earlier
1747         * frames are sporadically displayed after later frames).
1748         */
1749        if (ctx->use_vdoa)
1750                ctx->num_internal_frames += 1;
1751        if (ctx->num_internal_frames > CODA_MAX_FRAMEBUFFERS) {
1752                v4l2_err(&dev->v4l2_dev,
1753                         "not enough framebuffers to decode (%d < %d)\n",
1754                         CODA_MAX_FRAMEBUFFERS, ctx->num_internal_frames);
1755                return -EINVAL;
1756        }
1757
1758        if (src_fourcc == V4L2_PIX_FMT_H264) {
1759                u32 left_right;
1760                u32 top_bottom;
1761
1762                left_right = coda_read(dev, CODA_RET_DEC_SEQ_CROP_LEFT_RIGHT);
1763                top_bottom = coda_read(dev, CODA_RET_DEC_SEQ_CROP_TOP_BOTTOM);
1764
1765                q_data_dst->rect.left = (left_right >> 10) & 0x3ff;
1766                q_data_dst->rect.top = (top_bottom >> 10) & 0x3ff;
1767                q_data_dst->rect.width = width - q_data_dst->rect.left -
1768                                         (left_right & 0x3ff);
1769                q_data_dst->rect.height = height - q_data_dst->rect.top -
1770                                          (top_bottom & 0x3ff);
1771        }
1772
1773        ret = coda_alloc_framebuffers(ctx, q_data_dst, src_fourcc);
1774        if (ret < 0) {
1775                v4l2_err(&dev->v4l2_dev, "failed to allocate framebuffers\n");
1776                return ret;
1777        }
1778
1779        /* Tell the decoder how many frame buffers we allocated. */
1780        coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM);
1781        coda_write(dev, width, CODA_CMD_SET_FRAME_BUF_STRIDE);
1782
1783        if (dev->devtype->product != CODA_DX6) {
1784                /* Set secondary AXI IRAM */
1785                coda_setup_iram(ctx);
1786
1787                coda_write(dev, ctx->iram_info.buf_bit_use,
1788                                CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
1789                coda_write(dev, ctx->iram_info.buf_ip_ac_dc_use,
1790                                CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
1791                coda_write(dev, ctx->iram_info.buf_dbk_y_use,
1792                                CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
1793                coda_write(dev, ctx->iram_info.buf_dbk_c_use,
1794                                CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
1795                coda_write(dev, ctx->iram_info.buf_ovl_use,
1796                                CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
1797                if (dev->devtype->product == CODA_960) {
1798                        coda_write(dev, ctx->iram_info.buf_btp_use,
1799                                        CODA9_CMD_SET_FRAME_AXI_BTP_ADDR);
1800
1801                        coda_write(dev, -1, CODA9_CMD_SET_FRAME_DELAY);
1802                        coda9_set_frame_cache(ctx, dst_fourcc);
1803                }
1804        }
1805
1806        if (src_fourcc == V4L2_PIX_FMT_H264) {
1807                coda_write(dev, ctx->slicebuf.paddr,
1808                                CODA_CMD_SET_FRAME_SLICE_BB_START);
1809                coda_write(dev, ctx->slicebuf.size / 1024,
1810                                CODA_CMD_SET_FRAME_SLICE_BB_SIZE);
1811        }
1812
1813        if (dev->devtype->product == CODA_HX4 ||
1814            dev->devtype->product == CODA_7541) {
1815                int max_mb_x = 1920 / 16;
1816                int max_mb_y = 1088 / 16;
1817                int max_mb_num = max_mb_x * max_mb_y;
1818
1819                coda_write(dev, max_mb_num << 16 | max_mb_x << 8 | max_mb_y,
1820                                CODA7_CMD_SET_FRAME_MAX_DEC_SIZE);
1821        } else if (dev->devtype->product == CODA_960) {
1822                int max_mb_x = 1920 / 16;
1823                int max_mb_y = 1088 / 16;
1824                int max_mb_num = max_mb_x * max_mb_y;
1825
1826                coda_write(dev, max_mb_num << 16 | max_mb_x << 8 | max_mb_y,
1827                                CODA9_CMD_SET_FRAME_MAX_DEC_SIZE);
1828        }
1829
1830        if (coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF)) {
1831                v4l2_err(&ctx->dev->v4l2_dev,
1832                         "CODA_COMMAND_SET_FRAME_BUF timeout\n");
1833                return -ETIMEDOUT;
1834        }
1835
1836        return 0;
1837}
1838
1839static int coda_start_decoding(struct coda_ctx *ctx)
1840{
1841        struct coda_dev *dev = ctx->dev;
1842        int ret;
1843
1844        mutex_lock(&dev->coda_mutex);
1845        ret = __coda_start_decoding(ctx);
1846        mutex_unlock(&dev->coda_mutex);
1847
1848        return ret;
1849}
1850
1851static int coda_prepare_decode(struct coda_ctx *ctx)
1852{
1853        struct vb2_v4l2_buffer *dst_buf;
1854        struct coda_dev *dev = ctx->dev;
1855        struct coda_q_data *q_data_dst;
1856        struct coda_buffer_meta *meta;
1857        unsigned long flags;
1858        u32 rot_mode = 0;
1859        u32 reg_addr, reg_stride;
1860
1861        dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
1862        q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1863
1864        /* Try to copy source buffer contents into the bitstream ringbuffer */
1865        mutex_lock(&ctx->bitstream_mutex);
1866        coda_fill_bitstream(ctx, NULL);
1867        mutex_unlock(&ctx->bitstream_mutex);
1868
1869        if (coda_get_bitstream_payload(ctx) < 512 &&
1870            (!(ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG))) {
1871                v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1872                         "bitstream payload: %d, skipping\n",
1873                         coda_get_bitstream_payload(ctx));
1874                v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx);
1875                return -EAGAIN;
1876        }
1877
1878        /* Run coda_start_decoding (again) if not yet initialized */
1879        if (!ctx->initialized) {
1880                int ret = __coda_start_decoding(ctx);
1881
1882                if (ret < 0) {
1883                        v4l2_err(&dev->v4l2_dev, "failed to start decoding\n");
1884                        v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx);
1885                        return -EAGAIN;
1886                } else {
1887                        ctx->initialized = 1;
1888                }
1889        }
1890
1891        if (dev->devtype->product == CODA_960)
1892                coda_set_gdi_regs(ctx);
1893
1894        if (ctx->use_vdoa &&
1895            ctx->display_idx >= 0 &&
1896            ctx->display_idx < ctx->num_internal_frames) {
1897                vdoa_device_run(ctx->vdoa,
1898                                vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 0),
1899                                ctx->internal_frames[ctx->display_idx].paddr);
1900        } else {
1901                if (dev->devtype->product == CODA_960) {
1902                        /*
1903                         * The CODA960 seems to have an internal list of
1904                         * buffers with 64 entries that includes the
1905                         * registered frame buffers as well as the rotator
1906                         * buffer output.
1907                         *
1908                         * ROT_INDEX needs to be < 0x40, but >
1909                         * ctx->num_internal_frames.
1910                         */
1911                        coda_write(dev,
1912                                   CODA_MAX_FRAMEBUFFERS + dst_buf->vb2_buf.index,
1913                                   CODA9_CMD_DEC_PIC_ROT_INDEX);
1914
1915                        reg_addr = CODA9_CMD_DEC_PIC_ROT_ADDR_Y;
1916                        reg_stride = CODA9_CMD_DEC_PIC_ROT_STRIDE;
1917                } else {
1918                        reg_addr = CODA_CMD_DEC_PIC_ROT_ADDR_Y;
1919                        reg_stride = CODA_CMD_DEC_PIC_ROT_STRIDE;
1920                }
1921                coda_write_base(ctx, q_data_dst, dst_buf, reg_addr);
1922                coda_write(dev, q_data_dst->bytesperline, reg_stride);
1923
1924                rot_mode = CODA_ROT_MIR_ENABLE | ctx->params.rot_mode;
1925        }
1926
1927        coda_write(dev, rot_mode, CODA_CMD_DEC_PIC_ROT_MODE);
1928
1929        switch (dev->devtype->product) {
1930        case CODA_DX6:
1931                /* TBD */
1932        case CODA_HX4:
1933        case CODA_7541:
1934                coda_write(dev, CODA_PRE_SCAN_EN, CODA_CMD_DEC_PIC_OPTION);
1935                break;
1936        case CODA_960:
1937                /* 'hardcode to use interrupt disable mode'? */
1938                coda_write(dev, (1 << 10), CODA_CMD_DEC_PIC_OPTION);
1939                break;
1940        }
1941
1942        coda_write(dev, 0, CODA_CMD_DEC_PIC_SKIP_NUM);
1943
1944        coda_write(dev, 0, CODA_CMD_DEC_PIC_BB_START);
1945        coda_write(dev, 0, CODA_CMD_DEC_PIC_START_BYTE);
1946
1947        if (dev->devtype->product != CODA_DX6)
1948                coda_write(dev, ctx->iram_info.axi_sram_use,
1949                                CODA7_REG_BIT_AXI_SRAM_USE);
1950
1951        spin_lock_irqsave(&ctx->buffer_meta_lock, flags);
1952        meta = list_first_entry_or_null(&ctx->buffer_meta_list,
1953                                        struct coda_buffer_meta, list);
1954
1955        if (meta && ctx->codec->src_fourcc == V4L2_PIX_FMT_JPEG) {
1956
1957                /* If this is the last buffer in the bitstream, add padding */
1958                if (meta->end == (ctx->bitstream_fifo.kfifo.in &
1959                                  ctx->bitstream_fifo.kfifo.mask)) {
1960                        static unsigned char buf[512];
1961                        unsigned int pad;
1962
1963                        /* Pad to multiple of 256 and then add 256 more */
1964                        pad = ((0 - meta->end) & 0xff) + 256;
1965
1966                        memset(buf, 0xff, sizeof(buf));
1967
1968                        kfifo_in(&ctx->bitstream_fifo, buf, pad);
1969                }
1970        }
1971        spin_unlock_irqrestore(&ctx->buffer_meta_lock, flags);
1972
1973        coda_kfifo_sync_to_device_full(ctx);
1974
1975        /* Clear decode success flag */
1976        coda_write(dev, 0, CODA_RET_DEC_PIC_SUCCESS);
1977
1978        trace_coda_dec_pic_run(ctx, meta);
1979
1980        coda_command_async(ctx, CODA_COMMAND_PIC_RUN);
1981
1982        return 0;
1983}
1984
1985static void coda_finish_decode(struct coda_ctx *ctx)
1986{
1987        struct coda_dev *dev = ctx->dev;
1988        struct coda_q_data *q_data_src;
1989        struct coda_q_data *q_data_dst;
1990        struct vb2_v4l2_buffer *dst_buf;
1991        struct coda_buffer_meta *meta;
1992        unsigned long payload;
1993        unsigned long flags;
1994        int width, height;
1995        int decoded_idx;
1996        int display_idx;
1997        u32 src_fourcc;
1998        int success;
1999        u32 err_mb;
2000        int err_vdoa = 0;
2001        u32 val;
2002
2003        /* Update kfifo out pointer from coda bitstream read pointer */
2004        coda_kfifo_sync_from_device(ctx);
2005
2006        /*
2007         * in stream-end mode, the read pointer can overshoot the write pointer
2008         * by up to 512 bytes
2009         */
2010        if (ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG) {
2011                if (coda_get_bitstream_payload(ctx) >= ctx->bitstream.size - 512)
2012                        kfifo_init(&ctx->bitstream_fifo,
2013                                ctx->bitstream.vaddr, ctx->bitstream.size);
2014        }
2015
2016        q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
2017        src_fourcc = q_data_src->fourcc;
2018
2019        val = coda_read(dev, CODA_RET_DEC_PIC_SUCCESS);
2020        if (val != 1)
2021                pr_err("DEC_PIC_SUCCESS = %d\n", val);
2022
2023        success = val & 0x1;
2024        if (!success)
2025                v4l2_err(&dev->v4l2_dev, "decode failed\n");
2026
2027        if (src_fourcc == V4L2_PIX_FMT_H264) {
2028                if (val & (1 << 3))
2029                        v4l2_err(&dev->v4l2_dev,
2030                                 "insufficient PS buffer space (%d bytes)\n",
2031                                 ctx->psbuf.size);
2032                if (val & (1 << 2))
2033                        v4l2_err(&dev->v4l2_dev,
2034                                 "insufficient slice buffer space (%d bytes)\n",
2035                                 ctx->slicebuf.size);
2036        }
2037
2038        val = coda_read(dev, CODA_RET_DEC_PIC_SIZE);
2039        width = (val >> 16) & 0xffff;
2040        height = val & 0xffff;
2041
2042        q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
2043
2044        /* frame crop information */
2045        if (src_fourcc == V4L2_PIX_FMT_H264) {
2046                u32 left_right;
2047                u32 top_bottom;
2048
2049                left_right = coda_read(dev, CODA_RET_DEC_PIC_CROP_LEFT_RIGHT);
2050                top_bottom = coda_read(dev, CODA_RET_DEC_PIC_CROP_TOP_BOTTOM);
2051
2052                if (left_right == 0xffffffff && top_bottom == 0xffffffff) {
2053                        /* Keep current crop information */
2054                } else {
2055                        struct v4l2_rect *rect = &q_data_dst->rect;
2056
2057                        rect->left = left_right >> 16 & 0xffff;
2058                        rect->top = top_bottom >> 16 & 0xffff;
2059                        rect->width = width - rect->left -
2060                                      (left_right & 0xffff);
2061                        rect->height = height - rect->top -
2062                                       (top_bottom & 0xffff);
2063                }
2064        } else {
2065                /* no cropping */
2066        }
2067
2068        err_mb = coda_read(dev, CODA_RET_DEC_PIC_ERR_MB);
2069        if (err_mb > 0)
2070                v4l2_err(&dev->v4l2_dev,
2071                         "errors in %d macroblocks\n", err_mb);
2072
2073        if (dev->devtype->product == CODA_HX4 ||
2074            dev->devtype->product == CODA_7541) {
2075                val = coda_read(dev, CODA_RET_DEC_PIC_OPTION);
2076                if (val == 0) {
2077                        /* not enough bitstream data */
2078                        v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2079                                 "prescan failed: %d\n", val);
2080                        ctx->hold = true;
2081                        return;
2082                }
2083        }
2084
2085        /* Wait until the VDOA finished writing the previous display frame */
2086        if (ctx->use_vdoa &&
2087            ctx->display_idx >= 0 &&
2088            ctx->display_idx < ctx->num_internal_frames) {
2089                err_vdoa = vdoa_wait_for_completion(ctx->vdoa);
2090        }
2091
2092        ctx->frm_dis_flg = coda_read(dev,
2093                                     CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
2094
2095        /* The previous display frame was copied out and can be overwritten */
2096        if (ctx->display_idx >= 0 &&
2097            ctx->display_idx < ctx->num_internal_frames) {
2098                ctx->frm_dis_flg &= ~(1 << ctx->display_idx);
2099                coda_write(dev, ctx->frm_dis_flg,
2100                                CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
2101        }
2102
2103        /*
2104         * The index of the last decoded frame, not necessarily in
2105         * display order, and the index of the next display frame.
2106         * The latter could have been decoded in a previous run.
2107         */
2108        decoded_idx = coda_read(dev, CODA_RET_DEC_PIC_CUR_IDX);
2109        display_idx = coda_read(dev, CODA_RET_DEC_PIC_FRAME_IDX);
2110
2111        if (decoded_idx == -1) {
2112                /* no frame was decoded, but we might have a display frame */
2113                if (display_idx >= 0 && display_idx < ctx->num_internal_frames)
2114                        ctx->sequence_offset++;
2115                else if (ctx->display_idx < 0)
2116                        ctx->hold = true;
2117        } else if (decoded_idx == -2) {
2118                /* no frame was decoded, we still return remaining buffers */
2119        } else if (decoded_idx < 0 || decoded_idx >= ctx->num_internal_frames) {
2120                v4l2_err(&dev->v4l2_dev,
2121                         "decoded frame index out of range: %d\n", decoded_idx);
2122        } else {
2123                val = coda_read(dev, CODA_RET_DEC_PIC_FRAME_NUM) - 1;
2124                val -= ctx->sequence_offset;
2125                spin_lock_irqsave(&ctx->buffer_meta_lock, flags);
2126                if (!list_empty(&ctx->buffer_meta_list)) {
2127                        meta = list_first_entry(&ctx->buffer_meta_list,
2128                                              struct coda_buffer_meta, list);
2129                        list_del(&meta->list);
2130                        ctx->num_metas--;
2131                        spin_unlock_irqrestore(&ctx->buffer_meta_lock, flags);
2132                        /*
2133                         * Clamp counters to 16 bits for comparison, as the HW
2134                         * counter rolls over at this point for h.264. This
2135                         * may be different for other formats, but using 16 bits
2136                         * should be enough to detect most errors and saves us
2137                         * from doing different things based on the format.
2138                         */
2139                        if ((val & 0xffff) != (meta->sequence & 0xffff)) {
2140                                v4l2_err(&dev->v4l2_dev,
2141                                         "sequence number mismatch (%d(%d) != %d)\n",
2142                                         val, ctx->sequence_offset,
2143                                         meta->sequence);
2144                        }
2145                        ctx->frame_metas[decoded_idx] = *meta;
2146                        kfree(meta);
2147                } else {
2148                        spin_unlock_irqrestore(&ctx->buffer_meta_lock, flags);
2149                        v4l2_err(&dev->v4l2_dev, "empty timestamp list!\n");
2150                        memset(&ctx->frame_metas[decoded_idx], 0,
2151                               sizeof(struct coda_buffer_meta));
2152                        ctx->frame_metas[decoded_idx].sequence = val;
2153                        ctx->sequence_offset++;
2154                }
2155
2156                trace_coda_dec_pic_done(ctx, &ctx->frame_metas[decoded_idx]);
2157
2158                val = coda_read(dev, CODA_RET_DEC_PIC_TYPE) & 0x7;
2159                if (val == 0)
2160                        ctx->frame_types[decoded_idx] = V4L2_BUF_FLAG_KEYFRAME;
2161                else if (val == 1)
2162                        ctx->frame_types[decoded_idx] = V4L2_BUF_FLAG_PFRAME;
2163                else
2164                        ctx->frame_types[decoded_idx] = V4L2_BUF_FLAG_BFRAME;
2165
2166                ctx->frame_errors[decoded_idx] = err_mb;
2167        }
2168
2169        if (display_idx == -1) {
2170                /*
2171                 * no more frames to be decoded, but there could still
2172                 * be rotator output to dequeue
2173                 */
2174                ctx->hold = true;
2175        } else if (display_idx == -3) {
2176                /* possibly prescan failure */
2177        } else if (display_idx < 0 || display_idx >= ctx->num_internal_frames) {
2178                v4l2_err(&dev->v4l2_dev,
2179                         "presentation frame index out of range: %d\n",
2180                         display_idx);
2181        }
2182
2183        /* If a frame was copied out, return it */
2184        if (ctx->display_idx >= 0 &&
2185            ctx->display_idx < ctx->num_internal_frames) {
2186                dst_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
2187                dst_buf->sequence = ctx->osequence++;
2188
2189                dst_buf->field = V4L2_FIELD_NONE;
2190                dst_buf->flags &= ~(V4L2_BUF_FLAG_KEYFRAME |
2191                                             V4L2_BUF_FLAG_PFRAME |
2192                                             V4L2_BUF_FLAG_BFRAME);
2193                dst_buf->flags |= ctx->frame_types[ctx->display_idx];
2194                meta = &ctx->frame_metas[ctx->display_idx];
2195                dst_buf->timecode = meta->timecode;
2196                dst_buf->vb2_buf.timestamp = meta->timestamp;
2197
2198                trace_coda_dec_rot_done(ctx, dst_buf, meta);
2199
2200                switch (q_data_dst->fourcc) {
2201                case V4L2_PIX_FMT_YUYV:
2202                        payload = width * height * 2;
2203                        break;
2204                case V4L2_PIX_FMT_YUV420:
2205                case V4L2_PIX_FMT_YVU420:
2206                case V4L2_PIX_FMT_NV12:
2207                default:
2208                        payload = width * height * 3 / 2;
2209                        break;
2210                case V4L2_PIX_FMT_YUV422P:
2211                        payload = width * height * 2;
2212                        break;
2213                }
2214                vb2_set_plane_payload(&dst_buf->vb2_buf, 0, payload);
2215
2216                if (ctx->frame_errors[ctx->display_idx] || err_vdoa)
2217                        coda_m2m_buf_done(ctx, dst_buf, VB2_BUF_STATE_ERROR);
2218                else
2219                        coda_m2m_buf_done(ctx, dst_buf, VB2_BUF_STATE_DONE);
2220
2221                v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2222                        "job finished: decoding frame (%d) (%s)\n",
2223                        dst_buf->sequence,
2224                        (dst_buf->flags & V4L2_BUF_FLAG_KEYFRAME) ?
2225                        "KEYFRAME" : "PFRAME");
2226        } else {
2227                v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2228                        "job finished: no frame decoded\n");
2229        }
2230
2231        /* The rotator will copy the current display frame next time */
2232        ctx->display_idx = display_idx;
2233}
2234
2235static void coda_decode_timeout(struct coda_ctx *ctx)
2236{
2237        struct vb2_v4l2_buffer *dst_buf;
2238
2239        /*
2240         * For now this only handles the case where we would deadlock with
2241         * userspace, i.e. userspace issued DEC_CMD_STOP and waits for EOS,
2242         * but after a failed decode run we would hold the context and wait for
2243         * userspace to queue more buffers.
2244         */
2245        if (!(ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG))
2246                return;
2247
2248        dst_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
2249        dst_buf->sequence = ctx->qsequence - 1;
2250
2251        coda_m2m_buf_done(ctx, dst_buf, VB2_BUF_STATE_ERROR);
2252}
2253
2254const struct coda_context_ops coda_bit_decode_ops = {
2255        .queue_init = coda_decoder_queue_init,
2256        .reqbufs = coda_decoder_reqbufs,
2257        .start_streaming = coda_start_decoding,
2258        .prepare_run = coda_prepare_decode,
2259        .finish_run = coda_finish_decode,
2260        .run_timeout = coda_decode_timeout,
2261        .seq_end_work = coda_seq_end_work,
2262        .release = coda_bit_release,
2263};
2264
2265irqreturn_t coda_irq_handler(int irq, void *data)
2266{
2267        struct coda_dev *dev = data;
2268        struct coda_ctx *ctx;
2269
2270        /* read status register to attend the IRQ */
2271        coda_read(dev, CODA_REG_BIT_INT_STATUS);
2272        coda_write(dev, CODA_REG_BIT_INT_CLEAR_SET,
2273                      CODA_REG_BIT_INT_CLEAR);
2274
2275        ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev);
2276        if (ctx == NULL) {
2277                v4l2_err(&dev->v4l2_dev,
2278                         "Instance released before the end of transaction\n");
2279                mutex_unlock(&dev->coda_mutex);
2280                return IRQ_HANDLED;
2281        }
2282
2283        trace_coda_bit_done(ctx);
2284
2285        if (ctx->aborting) {
2286                v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
2287                         "task has been aborted\n");
2288        }
2289
2290        if (coda_isbusy(ctx->dev)) {
2291                v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
2292                         "coda is still busy!!!!\n");
2293                return IRQ_NONE;
2294        }
2295
2296        complete(&ctx->completion);
2297
2298        return IRQ_HANDLED;
2299}
2300