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130#ifndef MPI_IOC_H
131#define MPI_IOC_H
132
133
134
135
136
137
138
139
140
141
142
143
144typedef struct _MSG_IOC_INIT
145{
146 U8 WhoInit;
147 U8 Reserved;
148 U8 ChainOffset;
149 U8 Function;
150 U8 Flags;
151 U8 MaxDevices;
152 U8 MaxBuses;
153 U8 MsgFlags;
154 U32 MsgContext;
155 U16 ReplyFrameSize;
156 U8 Reserved1[2];
157 U32 HostMfaHighAddr;
158 U32 SenseBufferHighAddr;
159 U32 ReplyFifoHostSignalingAddr;
160 SGE_SIMPLE_UNION HostPageBufferSGE;
161 U16 MsgVersion;
162 U16 HeaderVersion;
163} MSG_IOC_INIT, MPI_POINTER PTR_MSG_IOC_INIT,
164 IOCInit_t, MPI_POINTER pIOCInit_t;
165
166
167#define MPI_WHOINIT_NO_ONE (0x00)
168#define MPI_WHOINIT_SYSTEM_BIOS (0x01)
169#define MPI_WHOINIT_ROM_BIOS (0x02)
170#define MPI_WHOINIT_PCI_PEER (0x03)
171#define MPI_WHOINIT_HOST_DRIVER (0x04)
172#define MPI_WHOINIT_MANUFACTURER (0x05)
173
174
175#define MPI_IOCINIT_FLAGS_HOST_PAGE_BUFFER_PERSISTENT (0x04)
176#define MPI_IOCINIT_FLAGS_REPLY_FIFO_HOST_SIGNAL (0x02)
177#define MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE (0x01)
178
179
180#define MPI_IOCINIT_MSGVERSION_MAJOR_MASK (0xFF00)
181#define MPI_IOCINIT_MSGVERSION_MAJOR_SHIFT (8)
182#define MPI_IOCINIT_MSGVERSION_MINOR_MASK (0x00FF)
183#define MPI_IOCINIT_MSGVERSION_MINOR_SHIFT (0)
184
185
186#define MPI_IOCINIT_HEADERVERSION_UNIT_MASK (0xFF00)
187#define MPI_IOCINIT_HEADERVERSION_UNIT_SHIFT (8)
188#define MPI_IOCINIT_HEADERVERSION_DEV_MASK (0x00FF)
189#define MPI_IOCINIT_HEADERVERSION_DEV_SHIFT (0)
190
191
192typedef struct _MSG_IOC_INIT_REPLY
193{
194 U8 WhoInit;
195 U8 Reserved;
196 U8 MsgLength;
197 U8 Function;
198 U8 Flags;
199 U8 MaxDevices;
200 U8 MaxBuses;
201 U8 MsgFlags;
202 U32 MsgContext;
203 U16 Reserved2;
204 U16 IOCStatus;
205 U32 IOCLogInfo;
206} MSG_IOC_INIT_REPLY, MPI_POINTER PTR_MSG_IOC_INIT_REPLY,
207 IOCInitReply_t, MPI_POINTER pIOCInitReply_t;
208
209
210
211
212
213
214
215typedef struct _MSG_IOC_FACTS
216{
217 U8 Reserved[2];
218 U8 ChainOffset;
219 U8 Function;
220 U8 Reserved1[3];
221 U8 MsgFlags;
222 U32 MsgContext;
223} MSG_IOC_FACTS, MPI_POINTER PTR_IOC_FACTS,
224 IOCFacts_t, MPI_POINTER pIOCFacts_t;
225
226typedef struct _MPI_FW_VERSION_STRUCT
227{
228 U8 Dev;
229 U8 Unit;
230 U8 Minor;
231 U8 Major;
232} MPI_FW_VERSION_STRUCT;
233
234typedef union _MPI_FW_VERSION
235{
236 MPI_FW_VERSION_STRUCT Struct;
237 U32 Word;
238} MPI_FW_VERSION;
239
240
241typedef struct _MSG_IOC_FACTS_REPLY
242{
243 U16 MsgVersion;
244 U8 MsgLength;
245 U8 Function;
246 U16 HeaderVersion;
247 U8 IOCNumber;
248 U8 MsgFlags;
249 U32 MsgContext;
250 U16 IOCExceptions;
251 U16 IOCStatus;
252 U32 IOCLogInfo;
253 U8 MaxChainDepth;
254 U8 WhoInit;
255 U8 BlockSize;
256 U8 Flags;
257 U16 ReplyQueueDepth;
258 U16 RequestFrameSize;
259 U16 Reserved_0101_FWVersion;
260 U16 ProductID;
261 U32 CurrentHostMfaHighAddr;
262 U16 GlobalCredits;
263 U8 NumberOfPorts;
264 U8 EventState;
265 U32 CurrentSenseBufferHighAddr;
266 U16 CurReplyFrameSize;
267 U8 MaxDevices;
268 U8 MaxBuses;
269 U32 FWImageSize;
270 U32 IOCCapabilities;
271 MPI_FW_VERSION FWVersion;
272 U16 HighPriorityQueueDepth;
273 U16 Reserved2;
274 SGE_SIMPLE_UNION HostPageBufferSGE;
275 U32 ReplyFifoHostSignalingAddr;
276} MSG_IOC_FACTS_REPLY, MPI_POINTER PTR_MSG_IOC_FACTS_REPLY,
277 IOCFactsReply_t, MPI_POINTER pIOCFactsReply_t;
278
279#define MPI_IOCFACTS_MSGVERSION_MAJOR_MASK (0xFF00)
280#define MPI_IOCFACTS_MSGVERSION_MAJOR_SHIFT (8)
281#define MPI_IOCFACTS_MSGVERSION_MINOR_MASK (0x00FF)
282#define MPI_IOCFACTS_MSGVERSION_MINOR_SHIFT (0)
283
284#define MPI_IOCFACTS_HDRVERSION_UNIT_MASK (0xFF00)
285#define MPI_IOCFACTS_HDRVERSION_UNIT_SHIFT (8)
286#define MPI_IOCFACTS_HDRVERSION_DEV_MASK (0x00FF)
287#define MPI_IOCFACTS_HDRVERSION_DEV_SHIFT (0)
288
289#define MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL (0x0001)
290#define MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID (0x0002)
291#define MPI_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL (0x0004)
292#define MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL (0x0008)
293#define MPI_IOCFACTS_EXCEPT_METADATA_UNSUPPORTED (0x0010)
294
295#define MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT (0x01)
296#define MPI_IOCFACTS_FLAGS_REPLY_FIFO_HOST_SIGNAL (0x02)
297#define MPI_IOCFACTS_FLAGS_HOST_PAGE_BUFFER_PERSISTENT (0x04)
298
299#define MPI_IOCFACTS_EVENTSTATE_DISABLED (0x00)
300#define MPI_IOCFACTS_EVENTSTATE_ENABLED (0x01)
301
302#define MPI_IOCFACTS_CAPABILITY_HIGH_PRI_Q (0x00000001)
303#define MPI_IOCFACTS_CAPABILITY_REPLY_HOST_SIGNAL (0x00000002)
304#define MPI_IOCFACTS_CAPABILITY_QUEUE_FULL_HANDLING (0x00000004)
305#define MPI_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER (0x00000008)
306#define MPI_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER (0x00000010)
307#define MPI_IOCFACTS_CAPABILITY_EXTENDED_BUFFER (0x00000020)
308#define MPI_IOCFACTS_CAPABILITY_EEDP (0x00000040)
309#define MPI_IOCFACTS_CAPABILITY_BIDIRECTIONAL (0x00000080)
310#define MPI_IOCFACTS_CAPABILITY_MULTICAST (0x00000100)
311#define MPI_IOCFACTS_CAPABILITY_SCSIIO32 (0x00000200)
312#define MPI_IOCFACTS_CAPABILITY_NO_SCSIIO16 (0x00000400)
313#define MPI_IOCFACTS_CAPABILITY_TLR (0x00000800)
314
315
316
317
318
319
320
321
322
323
324
325
326typedef struct _MSG_PORT_FACTS
327{
328 U8 Reserved[2];
329 U8 ChainOffset;
330 U8 Function;
331 U8 Reserved1[2];
332 U8 PortNumber;
333 U8 MsgFlags;
334 U32 MsgContext;
335} MSG_PORT_FACTS, MPI_POINTER PTR_MSG_PORT_FACTS,
336 PortFacts_t, MPI_POINTER pPortFacts_t;
337
338typedef struct _MSG_PORT_FACTS_REPLY
339{
340 U16 Reserved;
341 U8 MsgLength;
342 U8 Function;
343 U16 Reserved1;
344 U8 PortNumber;
345 U8 MsgFlags;
346 U32 MsgContext;
347 U16 Reserved2;
348 U16 IOCStatus;
349 U32 IOCLogInfo;
350 U8 Reserved3;
351 U8 PortType;
352 U16 MaxDevices;
353 U16 PortSCSIID;
354 U16 ProtocolFlags;
355 U16 MaxPostedCmdBuffers;
356 U16 MaxPersistentIDs;
357 U16 MaxLanBuckets;
358 U8 MaxInitiators;
359 U8 Reserved4;
360 U32 Reserved5;
361} MSG_PORT_FACTS_REPLY, MPI_POINTER PTR_MSG_PORT_FACTS_REPLY,
362 PortFactsReply_t, MPI_POINTER pPortFactsReply_t;
363
364
365
366
367#define MPI_PORTFACTS_PORTTYPE_INACTIVE (0x00)
368#define MPI_PORTFACTS_PORTTYPE_SCSI (0x01)
369#define MPI_PORTFACTS_PORTTYPE_FC (0x10)
370#define MPI_PORTFACTS_PORTTYPE_ISCSI (0x20)
371#define MPI_PORTFACTS_PORTTYPE_SAS (0x30)
372
373
374
375#define MPI_PORTFACTS_PROTOCOL_LOGBUSADDR (0x01)
376#define MPI_PORTFACTS_PROTOCOL_LAN (0x02)
377#define MPI_PORTFACTS_PROTOCOL_TARGET (0x04)
378#define MPI_PORTFACTS_PROTOCOL_INITIATOR (0x08)
379
380
381
382
383
384
385typedef struct _MSG_PORT_ENABLE
386{
387 U8 Reserved[2];
388 U8 ChainOffset;
389 U8 Function;
390 U8 Reserved1[2];
391 U8 PortNumber;
392 U8 MsgFlags;
393 U32 MsgContext;
394} MSG_PORT_ENABLE, MPI_POINTER PTR_MSG_PORT_ENABLE,
395 PortEnable_t, MPI_POINTER pPortEnable_t;
396
397typedef struct _MSG_PORT_ENABLE_REPLY
398{
399 U8 Reserved[2];
400 U8 MsgLength;
401 U8 Function;
402 U8 Reserved1[2];
403 U8 PortNumber;
404 U8 MsgFlags;
405 U32 MsgContext;
406 U16 Reserved2;
407 U16 IOCStatus;
408 U32 IOCLogInfo;
409} MSG_PORT_ENABLE_REPLY, MPI_POINTER PTR_MSG_PORT_ENABLE_REPLY,
410 PortEnableReply_t, MPI_POINTER pPortEnableReply_t;
411
412
413
414
415
416
417
418
419
420
421
422
423typedef struct _MSG_EVENT_NOTIFY
424{
425 U8 Switch;
426 U8 Reserved;
427 U8 ChainOffset;
428 U8 Function;
429 U8 Reserved1[3];
430 U8 MsgFlags;
431 U32 MsgContext;
432} MSG_EVENT_NOTIFY, MPI_POINTER PTR_MSG_EVENT_NOTIFY,
433 EventNotification_t, MPI_POINTER pEventNotification_t;
434
435
436
437typedef struct _MSG_EVENT_NOTIFY_REPLY
438{
439 U16 EventDataLength;
440 U8 MsgLength;
441 U8 Function;
442 U8 Reserved1[2];
443 U8 AckRequired;
444 U8 MsgFlags;
445 U32 MsgContext;
446 U8 Reserved2[2];
447 U16 IOCStatus;
448 U32 IOCLogInfo;
449 U32 Event;
450 U32 EventContext;
451 U32 Data[1];
452} MSG_EVENT_NOTIFY_REPLY, MPI_POINTER PTR_MSG_EVENT_NOTIFY_REPLY,
453 EventNotificationReply_t, MPI_POINTER pEventNotificationReply_t;
454
455
456
457typedef struct _MSG_EVENT_ACK
458{
459 U8 Reserved[2];
460 U8 ChainOffset;
461 U8 Function;
462 U8 Reserved1[3];
463 U8 MsgFlags;
464 U32 MsgContext;
465 U32 Event;
466 U32 EventContext;
467} MSG_EVENT_ACK, MPI_POINTER PTR_MSG_EVENT_ACK,
468 EventAck_t, MPI_POINTER pEventAck_t;
469
470typedef struct _MSG_EVENT_ACK_REPLY
471{
472 U8 Reserved[2];
473 U8 MsgLength;
474 U8 Function;
475 U8 Reserved1[3];
476 U8 MsgFlags;
477 U32 MsgContext;
478 U16 Reserved2;
479 U16 IOCStatus;
480 U32 IOCLogInfo;
481} MSG_EVENT_ACK_REPLY, MPI_POINTER PTR_MSG_EVENT_ACK_REPLY,
482 EventAckReply_t, MPI_POINTER pEventAckReply_t;
483
484
485
486#define MPI_EVENT_NOTIFICATION_SWITCH_OFF (0x00)
487#define MPI_EVENT_NOTIFICATION_SWITCH_ON (0x01)
488
489
490
491#define MPI_EVENT_NONE (0x00000000)
492#define MPI_EVENT_LOG_DATA (0x00000001)
493#define MPI_EVENT_STATE_CHANGE (0x00000002)
494#define MPI_EVENT_UNIT_ATTENTION (0x00000003)
495#define MPI_EVENT_IOC_BUS_RESET (0x00000004)
496#define MPI_EVENT_EXT_BUS_RESET (0x00000005)
497#define MPI_EVENT_RESCAN (0x00000006)
498#define MPI_EVENT_LINK_STATUS_CHANGE (0x00000007)
499#define MPI_EVENT_LOOP_STATE_CHANGE (0x00000008)
500#define MPI_EVENT_LOGOUT (0x00000009)
501#define MPI_EVENT_EVENT_CHANGE (0x0000000A)
502#define MPI_EVENT_INTEGRATED_RAID (0x0000000B)
503#define MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE (0x0000000C)
504#define MPI_EVENT_ON_BUS_TIMER_EXPIRED (0x0000000D)
505#define MPI_EVENT_QUEUE_FULL (0x0000000E)
506#define MPI_EVENT_SAS_DEVICE_STATUS_CHANGE (0x0000000F)
507#define MPI_EVENT_SAS_SES (0x00000010)
508#define MPI_EVENT_PERSISTENT_TABLE_FULL (0x00000011)
509#define MPI_EVENT_SAS_PHY_LINK_STATUS (0x00000012)
510#define MPI_EVENT_SAS_DISCOVERY_ERROR (0x00000013)
511#define MPI_EVENT_IR_RESYNC_UPDATE (0x00000014)
512#define MPI_EVENT_IR2 (0x00000015)
513#define MPI_EVENT_SAS_DISCOVERY (0x00000016)
514#define MPI_EVENT_SAS_BROADCAST_PRIMITIVE (0x00000017)
515#define MPI_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE (0x00000018)
516#define MPI_EVENT_SAS_INIT_TABLE_OVERFLOW (0x00000019)
517#define MPI_EVENT_SAS_SMP_ERROR (0x0000001A)
518#define MPI_EVENT_SAS_EXPANDER_STATUS_CHANGE (0x0000001B)
519#define MPI_EVENT_LOG_ENTRY_ADDED (0x00000021)
520
521
522
523#define MPI_EVENT_NOTIFICATION_ACK_NOT_REQUIRED (0x00)
524#define MPI_EVENT_NOTIFICATION_ACK_REQUIRED (0x01)
525
526
527
528typedef struct _EVENT_DATA_EVENT_CHANGE
529{
530 U8 EventState;
531 U8 Reserved;
532 U16 Reserved1;
533} EVENT_DATA_EVENT_CHANGE, MPI_POINTER PTR_EVENT_DATA_EVENT_CHANGE,
534 EventDataEventChange_t, MPI_POINTER pEventDataEventChange_t;
535
536
537
538
539#define MPI_EVENT_DATA_LOG_ENTRY_DATA_LENGTH (0x1C)
540typedef struct _EVENT_DATA_LOG_ENTRY
541{
542 U32 TimeStamp;
543 U32 Reserved1;
544 U16 LogSequence;
545 U16 LogEntryQualifier;
546 U8 LogData[MPI_EVENT_DATA_LOG_ENTRY_DATA_LENGTH];
547} EVENT_DATA_LOG_ENTRY, MPI_POINTER PTR_EVENT_DATA_LOG_ENTRY,
548 MpiEventDataLogEntry_t, MPI_POINTER pMpiEventDataLogEntry_t;
549
550typedef struct _EVENT_DATA_LOG_ENTRY_ADDED
551{
552 U16 LogSequence;
553 U16 Reserved1;
554 U32 Reserved2;
555 EVENT_DATA_LOG_ENTRY LogEntry;
556} EVENT_DATA_LOG_ENTRY_ADDED, MPI_POINTER PTR_EVENT_DATA_LOG_ENTRY_ADDED,
557 MpiEventDataLogEntryAdded_t, MPI_POINTER pMpiEventDataLogEntryAdded_t;
558
559
560
561typedef struct _EVENT_DATA_SCSI
562{
563 U8 TargetID;
564 U8 BusPort;
565 U16 Reserved;
566} EVENT_DATA_SCSI, MPI_POINTER PTR_EVENT_DATA_SCSI,
567 EventDataScsi_t, MPI_POINTER pEventDataScsi_t;
568
569
570
571typedef struct _EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE
572{
573 U8 TargetID;
574 U8 Bus;
575 U8 ReasonCode;
576 U8 LUN;
577 U8 ASC;
578 U8 ASCQ;
579 U16 Reserved;
580} EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE,
581 MPI_POINTER PTR_EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE,
582 MpiEventDataScsiDeviceStatusChange_t,
583 MPI_POINTER pMpiEventDataScsiDeviceStatusChange_t;
584
585
586#define MPI_EVENT_SCSI_DEV_STAT_RC_ADDED (0x03)
587#define MPI_EVENT_SCSI_DEV_STAT_RC_NOT_RESPONDING (0x04)
588#define MPI_EVENT_SCSI_DEV_STAT_RC_SMART_DATA (0x05)
589
590
591
592typedef struct _EVENT_DATA_SAS_DEVICE_STATUS_CHANGE
593{
594 U8 TargetID;
595 U8 Bus;
596 U8 ReasonCode;
597 U8 Reserved;
598 U8 ASC;
599 U8 ASCQ;
600 U16 DevHandle;
601 U32 DeviceInfo;
602 U16 ParentDevHandle;
603 U8 PhyNum;
604 U8 Reserved1;
605 U64 SASAddress;
606 U8 LUN[8];
607 U16 TaskTag;
608 U16 Reserved2;
609} EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
610 MPI_POINTER PTR_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
611 MpiEventDataSasDeviceStatusChange_t,
612 MPI_POINTER pMpiEventDataSasDeviceStatusChange_t;
613
614
615#define MPI_EVENT_SAS_DEV_STAT_RC_ADDED (0x03)
616#define MPI_EVENT_SAS_DEV_STAT_RC_NOT_RESPONDING (0x04)
617#define MPI_EVENT_SAS_DEV_STAT_RC_SMART_DATA (0x05)
618#define MPI_EVENT_SAS_DEV_STAT_RC_NO_PERSIST_ADDED (0x06)
619#define MPI_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED (0x07)
620#define MPI_EVENT_SAS_DEV_STAT_RC_INTERNAL_DEVICE_RESET (0x08)
621#define MPI_EVENT_SAS_DEV_STAT_RC_TASK_ABORT_INTERNAL (0x09)
622#define MPI_EVENT_SAS_DEV_STAT_RC_ABORT_TASK_SET_INTERNAL (0x0A)
623#define MPI_EVENT_SAS_DEV_STAT_RC_CLEAR_TASK_SET_INTERNAL (0x0B)
624#define MPI_EVENT_SAS_DEV_STAT_RC_QUERY_TASK_INTERNAL (0x0C)
625#define MPI_EVENT_SAS_DEV_STAT_RC_ASYNC_NOTIFICATION (0x0D)
626#define MPI_EVENT_SAS_DEV_STAT_RC_CMPL_INTERNAL_DEV_RESET (0x0E)
627#define MPI_EVENT_SAS_DEV_STAT_RC_CMPL_TASK_ABORT_INTERNAL (0x0F)
628
629
630
631
632typedef struct _EVENT_DATA_QUEUE_FULL
633{
634 U8 TargetID;
635 U8 Bus;
636 U16 CurrentDepth;
637} EVENT_DATA_QUEUE_FULL, MPI_POINTER PTR_EVENT_DATA_QUEUE_FULL,
638 EventDataQueueFull_t, MPI_POINTER pEventDataQueueFull_t;
639
640
641
642typedef struct _EVENT_DATA_RAID
643{
644 U8 VolumeID;
645 U8 VolumeBus;
646 U8 ReasonCode;
647 U8 PhysDiskNum;
648 U8 ASC;
649 U8 ASCQ;
650 U16 Reserved;
651 U32 SettingsStatus;
652} EVENT_DATA_RAID, MPI_POINTER PTR_EVENT_DATA_RAID,
653 MpiEventDataRaid_t, MPI_POINTER pMpiEventDataRaid_t;
654
655
656#define MPI_EVENT_RAID_RC_VOLUME_CREATED (0x00)
657#define MPI_EVENT_RAID_RC_VOLUME_DELETED (0x01)
658#define MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED (0x02)
659#define MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED (0x03)
660#define MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED (0x04)
661#define MPI_EVENT_RAID_RC_PHYSDISK_CREATED (0x05)
662#define MPI_EVENT_RAID_RC_PHYSDISK_DELETED (0x06)
663#define MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED (0x07)
664#define MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED (0x08)
665#define MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED (0x09)
666#define MPI_EVENT_RAID_RC_SMART_DATA (0x0A)
667#define MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED (0x0B)
668
669
670
671
672typedef struct _MPI_EVENT_DATA_IR_RESYNC_UPDATE
673{
674 U8 VolumeID;
675 U8 VolumeBus;
676 U8 ResyncComplete;
677 U8 Reserved1;
678 U32 Reserved2;
679} MPI_EVENT_DATA_IR_RESYNC_UPDATE,
680 MPI_POINTER PTR_MPI_EVENT_DATA_IR_RESYNC_UPDATE,
681 MpiEventDataIrResyncUpdate_t, MPI_POINTER pMpiEventDataIrResyncUpdate_t;
682
683
684
685
686typedef struct _IR2_STATE_CHANGED
687{
688 U16 PreviousState;
689 U16 NewState;
690} IR2_STATE_CHANGED, MPI_POINTER PTR_IR2_STATE_CHANGED;
691
692typedef struct _IR2_PD_INFO
693{
694 U16 DeviceHandle;
695 U8 TruncEnclosureHandle;
696 U8 TruncatedSlot;
697} IR2_PD_INFO, MPI_POINTER PTR_IR2_PD_INFO;
698
699typedef union _MPI_IR2_RC_EVENT_DATA
700{
701 IR2_STATE_CHANGED StateChanged;
702 U32 Lba;
703 IR2_PD_INFO PdInfo;
704} MPI_IR2_RC_EVENT_DATA, MPI_POINTER PTR_MPI_IR2_RC_EVENT_DATA;
705
706typedef struct _MPI_EVENT_DATA_IR2
707{
708 U8 TargetID;
709 U8 Bus;
710 U8 ReasonCode;
711 U8 PhysDiskNum;
712 MPI_IR2_RC_EVENT_DATA IR2EventData;
713} MPI_EVENT_DATA_IR2, MPI_POINTER PTR_MPI_EVENT_DATA_IR2,
714 MpiEventDataIR2_t, MPI_POINTER pMpiEventDataIR2_t;
715
716
717#define MPI_EVENT_IR2_RC_LD_STATE_CHANGED (0x01)
718#define MPI_EVENT_IR2_RC_PD_STATE_CHANGED (0x02)
719#define MPI_EVENT_IR2_RC_BAD_BLOCK_TABLE_FULL (0x03)
720#define MPI_EVENT_IR2_RC_PD_INSERTED (0x04)
721#define MPI_EVENT_IR2_RC_PD_REMOVED (0x05)
722#define MPI_EVENT_IR2_RC_FOREIGN_CFG_DETECTED (0x06)
723#define MPI_EVENT_IR2_RC_REBUILD_MEDIUM_ERROR (0x07)
724#define MPI_EVENT_IR2_RC_DUAL_PORT_ADDED (0x08)
725#define MPI_EVENT_IR2_RC_DUAL_PORT_REMOVED (0x09)
726
727
728#define MPI_LD_STATE_OPTIMAL (0x00)
729#define MPI_LD_STATE_DEGRADED (0x01)
730#define MPI_LD_STATE_FAILED (0x02)
731#define MPI_LD_STATE_MISSING (0x03)
732#define MPI_LD_STATE_OFFLINE (0x04)
733
734
735#define MPI_PD_STATE_ONLINE (0x00)
736#define MPI_PD_STATE_MISSING (0x01)
737#define MPI_PD_STATE_NOT_COMPATIBLE (0x02)
738#define MPI_PD_STATE_FAILED (0x03)
739#define MPI_PD_STATE_INITIALIZING (0x04)
740#define MPI_PD_STATE_OFFLINE_AT_HOST_REQUEST (0x05)
741#define MPI_PD_STATE_FAILED_AT_HOST_REQUEST (0x06)
742#define MPI_PD_STATE_OFFLINE_FOR_ANOTHER_REASON (0xFF)
743
744
745
746typedef struct _EVENT_DATA_LINK_STATUS
747{
748 U8 State;
749 U8 Reserved;
750 U16 Reserved1;
751 U8 Reserved2;
752 U8 Port;
753 U16 Reserved3;
754} EVENT_DATA_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_LINK_STATUS,
755 EventDataLinkStatus_t, MPI_POINTER pEventDataLinkStatus_t;
756
757#define MPI_EVENT_LINK_STATUS_FAILURE (0x00000000)
758#define MPI_EVENT_LINK_STATUS_ACTIVE (0x00000001)
759
760
761
762typedef struct _EVENT_DATA_LOOP_STATE
763{
764 U8 Character4;
765 U8 Character3;
766 U8 Type;
767 U8 Reserved;
768 U8 Reserved1;
769 U8 Port;
770 U16 Reserved2;
771} EVENT_DATA_LOOP_STATE, MPI_POINTER PTR_EVENT_DATA_LOOP_STATE,
772 EventDataLoopState_t, MPI_POINTER pEventDataLoopState_t;
773
774#define MPI_EVENT_LOOP_STATE_CHANGE_LIP (0x0001)
775#define MPI_EVENT_LOOP_STATE_CHANGE_LPE (0x0002)
776#define MPI_EVENT_LOOP_STATE_CHANGE_LPB (0x0003)
777
778
779
780typedef struct _EVENT_DATA_LOGOUT
781{
782 U32 NPortID;
783 U8 AliasIndex;
784 U8 Port;
785 U16 Reserved1;
786} EVENT_DATA_LOGOUT, MPI_POINTER PTR_EVENT_DATA_LOGOUT,
787 EventDataLogout_t, MPI_POINTER pEventDataLogout_t;
788
789#define MPI_EVENT_LOGOUT_ALL_ALIASES (0xFF)
790
791
792
793typedef struct _EVENT_DATA_SAS_SES
794{
795 U8 PhyNum;
796 U8 Port;
797 U8 PortWidth;
798 U8 Reserved1;
799} EVENT_DATA_SAS_SES, MPI_POINTER PTR_EVENT_DATA_SAS_SES,
800 MpiEventDataSasSes_t, MPI_POINTER pMpiEventDataSasSes_t;
801
802
803
804typedef struct _EVENT_DATA_SAS_BROADCAST_PRIMITIVE
805{
806 U8 PhyNum;
807 U8 Port;
808 U8 PortWidth;
809 U8 Primitive;
810} EVENT_DATA_SAS_BROADCAST_PRIMITIVE,
811 MPI_POINTER PTR_EVENT_DATA_SAS_BROADCAST_PRIMITIVE,
812 MpiEventDataSasBroadcastPrimitive_t,
813 MPI_POINTER pMpiEventDataSasBroadcastPrimitive_t;
814
815#define MPI_EVENT_PRIMITIVE_CHANGE (0x01)
816#define MPI_EVENT_PRIMITIVE_EXPANDER (0x03)
817#define MPI_EVENT_PRIMITIVE_ASYNCHRONOUS_EVENT (0x04)
818#define MPI_EVENT_PRIMITIVE_RESERVED3 (0x05)
819#define MPI_EVENT_PRIMITIVE_RESERVED4 (0x06)
820#define MPI_EVENT_PRIMITIVE_CHANGE0_RESERVED (0x07)
821#define MPI_EVENT_PRIMITIVE_CHANGE1_RESERVED (0x08)
822
823
824
825typedef struct _EVENT_DATA_SAS_PHY_LINK_STATUS
826{
827 U8 PhyNum;
828 U8 LinkRates;
829 U16 DevHandle;
830 U64 SASAddress;
831} EVENT_DATA_SAS_PHY_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_SAS_PHY_LINK_STATUS,
832 MpiEventDataSasPhyLinkStatus_t, MPI_POINTER pMpiEventDataSasPhyLinkStatus_t;
833
834
835#define MPI_EVENT_SAS_PLS_LR_CURRENT_MASK (0xF0)
836#define MPI_EVENT_SAS_PLS_LR_CURRENT_SHIFT (4)
837#define MPI_EVENT_SAS_PLS_LR_PREVIOUS_MASK (0x0F)
838#define MPI_EVENT_SAS_PLS_LR_PREVIOUS_SHIFT (0)
839#define MPI_EVENT_SAS_PLS_LR_RATE_UNKNOWN (0x00)
840#define MPI_EVENT_SAS_PLS_LR_RATE_PHY_DISABLED (0x01)
841#define MPI_EVENT_SAS_PLS_LR_RATE_FAILED_SPEED_NEGOTIATION (0x02)
842#define MPI_EVENT_SAS_PLS_LR_RATE_SATA_OOB_COMPLETE (0x03)
843#define MPI_EVENT_SAS_PLS_LR_RATE_1_5 (0x08)
844#define MPI_EVENT_SAS_PLS_LR_RATE_3_0 (0x09)
845#define MPI_EVENT_SAS_PLS_LR_RATE_6_0 (0x0A)
846
847
848
849typedef struct _EVENT_DATA_SAS_DISCOVERY
850{
851 U32 DiscoveryStatus;
852 U32 Reserved1;
853} EVENT_DATA_SAS_DISCOVERY, MPI_POINTER PTR_EVENT_DATA_SAS_DISCOVERY,
854 EventDataSasDiscovery_t, MPI_POINTER pEventDataSasDiscovery_t;
855
856#define MPI_EVENT_SAS_DSCVRY_COMPLETE (0x00000000)
857#define MPI_EVENT_SAS_DSCVRY_IN_PROGRESS (0x00000001)
858#define MPI_EVENT_SAS_DSCVRY_PHY_BITS_MASK (0xFFFF0000)
859#define MPI_EVENT_SAS_DSCVRY_PHY_BITS_SHIFT (16)
860
861
862
863typedef struct _EVENT_DATA_DISCOVERY_ERROR
864{
865 U32 DiscoveryStatus;
866 U8 Port;
867 U8 Reserved1;
868 U16 Reserved2;
869} EVENT_DATA_DISCOVERY_ERROR, MPI_POINTER PTR_EVENT_DATA_DISCOVERY_ERROR,
870 EventDataDiscoveryError_t, MPI_POINTER pEventDataDiscoveryError_t;
871
872#define MPI_EVENT_DSCVRY_ERR_DS_LOOP_DETECTED (0x00000001)
873#define MPI_EVENT_DSCVRY_ERR_DS_UNADDRESSABLE_DEVICE (0x00000002)
874#define MPI_EVENT_DSCVRY_ERR_DS_MULTIPLE_PORTS (0x00000004)
875#define MPI_EVENT_DSCVRY_ERR_DS_EXPANDER_ERR (0x00000008)
876#define MPI_EVENT_DSCVRY_ERR_DS_SMP_TIMEOUT (0x00000010)
877#define MPI_EVENT_DSCVRY_ERR_DS_OUT_ROUTE_ENTRIES (0x00000020)
878#define MPI_EVENT_DSCVRY_ERR_DS_INDEX_NOT_EXIST (0x00000040)
879#define MPI_EVENT_DSCVRY_ERR_DS_SMP_FUNCTION_FAILED (0x00000080)
880#define MPI_EVENT_DSCVRY_ERR_DS_SMP_CRC_ERROR (0x00000100)
881#define MPI_EVENT_DSCVRY_ERR_DS_MULTPL_SUBTRACTIVE (0x00000200)
882#define MPI_EVENT_DSCVRY_ERR_DS_TABLE_TO_TABLE (0x00000400)
883#define MPI_EVENT_DSCVRY_ERR_DS_UNSUPPORTED_DEVICE (0x00000800)
884#define MPI_EVENT_DSCVRY_ERR_DS_MAX_SATA_TARGETS (0x00001000)
885#define MPI_EVENT_DSCVRY_ERR_DS_MULTI_PORT_DOMAIN (0x00002000)
886#define MPI_EVENT_DSCVRY_ERR_DS_SATA_INIT_FAILURE (0x00004000)
887
888
889
890typedef struct _EVENT_DATA_SAS_SMP_ERROR
891{
892 U8 Status;
893 U8 Port;
894 U8 SMPFunctionResult;
895 U8 Reserved1;
896 U64 SASAddress;
897} EVENT_DATA_SAS_SMP_ERROR, MPI_POINTER PTR_EVENT_DATA_SAS_SMP_ERROR,
898 MpiEventDataSasSmpError_t, MPI_POINTER pMpiEventDataSasSmpError_t;
899
900
901#define MPI_EVENT_SAS_SMP_FUNCTION_RESULT_VALID (0x00)
902#define MPI_EVENT_SAS_SMP_CRC_ERROR (0x01)
903#define MPI_EVENT_SAS_SMP_TIMEOUT (0x02)
904#define MPI_EVENT_SAS_SMP_NO_DESTINATION (0x03)
905#define MPI_EVENT_SAS_SMP_BAD_DESTINATION (0x04)
906
907
908
909typedef struct _EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE
910{
911 U8 ReasonCode;
912 U8 Port;
913 U16 DevHandle;
914 U64 SASAddress;
915} EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE,
916 MPI_POINTER PTR_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE,
917 MpiEventDataSasInitDevStatusChange_t,
918 MPI_POINTER pMpiEventDataSasInitDevStatusChange_t;
919
920
921#define MPI_EVENT_SAS_INIT_RC_ADDED (0x01)
922#define MPI_EVENT_SAS_INIT_RC_REMOVED (0x02)
923#define MPI_EVENT_SAS_INIT_RC_INACCESSIBLE (0x03)
924
925
926
927typedef struct _EVENT_DATA_SAS_INIT_TABLE_OVERFLOW
928{
929 U8 MaxInit;
930 U8 CurrentInit;
931 U16 Reserved1;
932 U64 SASAddress;
933} EVENT_DATA_SAS_INIT_TABLE_OVERFLOW,
934 MPI_POINTER PTR_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW,
935 MpiEventDataSasInitTableOverflow_t,
936 MPI_POINTER pMpiEventDataSasInitTableOverflow_t;
937
938
939
940typedef struct _EVENT_DATA_SAS_EXPANDER_STATUS_CHANGE
941{
942 U8 ReasonCode;
943 U8 Reserved1;
944 U16 Reserved2;
945 U8 PhysicalPort;
946 U8 Reserved3;
947 U16 EnclosureHandle;
948 U64 SASAddress;
949 U32 DiscoveryStatus;
950 U16 DevHandle;
951 U16 ParentDevHandle;
952 U16 ExpanderChangeCount;
953 U16 ExpanderRouteIndexes;
954 U8 NumPhys;
955 U8 SASLevel;
956 U8 Flags;
957 U8 Reserved4;
958} EVENT_DATA_SAS_EXPANDER_STATUS_CHANGE,
959 MPI_POINTER PTR_EVENT_DATA_SAS_EXPANDER_STATUS_CHANGE,
960 MpiEventDataSasExpanderStatusChange_t,
961 MPI_POINTER pMpiEventDataSasExpanderStatusChange_t;
962
963
964#define MPI_EVENT_SAS_EXP_RC_ADDED (0x00)
965#define MPI_EVENT_SAS_EXP_RC_NOT_RESPONDING (0x01)
966
967
968#define MPI_EVENT_SAS_EXP_DS_LOOP_DETECTED (0x00000001)
969#define MPI_EVENT_SAS_EXP_DS_UNADDRESSABLE_DEVICE (0x00000002)
970#define MPI_EVENT_SAS_EXP_DS_MULTIPLE_PORTS (0x00000004)
971#define MPI_EVENT_SAS_EXP_DS_EXPANDER_ERR (0x00000008)
972#define MPI_EVENT_SAS_EXP_DS_SMP_TIMEOUT (0x00000010)
973#define MPI_EVENT_SAS_EXP_DS_OUT_ROUTE_ENTRIES (0x00000020)
974#define MPI_EVENT_SAS_EXP_DS_INDEX_NOT_EXIST (0x00000040)
975#define MPI_EVENT_SAS_EXP_DS_SMP_FUNCTION_FAILED (0x00000080)
976#define MPI_EVENT_SAS_EXP_DS_SMP_CRC_ERROR (0x00000100)
977#define MPI_EVENT_SAS_EXP_DS_SUBTRACTIVE_LINK (0x00000200)
978#define MPI_EVENT_SAS_EXP_DS_TABLE_LINK (0x00000400)
979#define MPI_EVENT_SAS_EXP_DS_UNSUPPORTED_DEVICE (0x00000800)
980
981
982#define MPI_EVENT_SAS_EXP_FLAGS_ROUTE_TABLE_CONFIG (0x02)
983#define MPI_EVENT_SAS_EXP_FLAGS_CONFIG_IN_PROGRESS (0x01)
984
985
986
987
988
989
990
991
992
993
994
995
996
997typedef struct _MSG_FW_DOWNLOAD
998{
999 U8 ImageType;
1000 U8 Reserved;
1001 U8 ChainOffset;
1002 U8 Function;
1003 U8 Reserved1[3];
1004 U8 MsgFlags;
1005 U32 MsgContext;
1006 SGE_MPI_UNION SGL;
1007} MSG_FW_DOWNLOAD, MPI_POINTER PTR_MSG_FW_DOWNLOAD,
1008 FWDownload_t, MPI_POINTER pFWDownload_t;
1009
1010#define MPI_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT (0x01)
1011
1012#define MPI_FW_DOWNLOAD_ITYPE_RESERVED (0x00)
1013#define MPI_FW_DOWNLOAD_ITYPE_FW (0x01)
1014#define MPI_FW_DOWNLOAD_ITYPE_BIOS (0x02)
1015#define MPI_FW_DOWNLOAD_ITYPE_NVDATA (0x03)
1016#define MPI_FW_DOWNLOAD_ITYPE_BOOTLOADER (0x04)
1017#define MPI_FW_DOWNLOAD_ITYPE_MANUFACTURING (0x06)
1018#define MPI_FW_DOWNLOAD_ITYPE_CONFIG_1 (0x07)
1019#define MPI_FW_DOWNLOAD_ITYPE_CONFIG_2 (0x08)
1020#define MPI_FW_DOWNLOAD_ITYPE_MEGARAID (0x09)
1021#define MPI_FW_DOWNLOAD_ITYPE_COMMON_BOOT_BLOCK (0x0B)
1022
1023
1024typedef struct _FWDownloadTCSGE
1025{
1026 U8 Reserved;
1027 U8 ContextSize;
1028 U8 DetailsLength;
1029 U8 Flags;
1030 U32 Reserved_0100_Checksum;
1031 U32 ImageOffset;
1032 U32 ImageSize;
1033} FW_DOWNLOAD_TCSGE, MPI_POINTER PTR_FW_DOWNLOAD_TCSGE,
1034 FWDownloadTCSGE_t, MPI_POINTER pFWDownloadTCSGE_t;
1035
1036
1037typedef struct _MSG_FW_DOWNLOAD_REPLY
1038{
1039 U8 ImageType;
1040 U8 Reserved;
1041 U8 MsgLength;
1042 U8 Function;
1043 U8 Reserved1[3];
1044 U8 MsgFlags;
1045 U32 MsgContext;
1046 U16 Reserved2;
1047 U16 IOCStatus;
1048 U32 IOCLogInfo;
1049} MSG_FW_DOWNLOAD_REPLY, MPI_POINTER PTR_MSG_FW_DOWNLOAD_REPLY,
1050 FWDownloadReply_t, MPI_POINTER pFWDownloadReply_t;
1051
1052
1053
1054
1055
1056
1057typedef struct _MSG_FW_UPLOAD
1058{
1059 U8 ImageType;
1060 U8 Reserved;
1061 U8 ChainOffset;
1062 U8 Function;
1063 U8 Reserved1[3];
1064 U8 MsgFlags;
1065 U32 MsgContext;
1066 SGE_MPI_UNION SGL;
1067} MSG_FW_UPLOAD, MPI_POINTER PTR_MSG_FW_UPLOAD,
1068 FWUpload_t, MPI_POINTER pFWUpload_t;
1069
1070#define MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM (0x00)
1071#define MPI_FW_UPLOAD_ITYPE_FW_FLASH (0x01)
1072#define MPI_FW_UPLOAD_ITYPE_BIOS_FLASH (0x02)
1073#define MPI_FW_UPLOAD_ITYPE_NVDATA (0x03)
1074#define MPI_FW_UPLOAD_ITYPE_BOOTLOADER (0x04)
1075#define MPI_FW_UPLOAD_ITYPE_FW_BACKUP (0x05)
1076#define MPI_FW_UPLOAD_ITYPE_MANUFACTURING (0x06)
1077#define MPI_FW_UPLOAD_ITYPE_CONFIG_1 (0x07)
1078#define MPI_FW_UPLOAD_ITYPE_CONFIG_2 (0x08)
1079#define MPI_FW_UPLOAD_ITYPE_MEGARAID (0x09)
1080#define MPI_FW_UPLOAD_ITYPE_COMPLETE (0x0A)
1081#define MPI_FW_UPLOAD_ITYPE_COMMON_BOOT_BLOCK (0x0B)
1082
1083typedef struct _FWUploadTCSGE
1084{
1085 U8 Reserved;
1086 U8 ContextSize;
1087 U8 DetailsLength;
1088 U8 Flags;
1089 U32 Reserved1;
1090 U32 ImageOffset;
1091 U32 ImageSize;
1092} FW_UPLOAD_TCSGE, MPI_POINTER PTR_FW_UPLOAD_TCSGE,
1093 FWUploadTCSGE_t, MPI_POINTER pFWUploadTCSGE_t;
1094
1095
1096typedef struct _MSG_FW_UPLOAD_REPLY
1097{
1098 U8 ImageType;
1099 U8 Reserved;
1100 U8 MsgLength;
1101 U8 Function;
1102 U8 Reserved1[3];
1103 U8 MsgFlags;
1104 U32 MsgContext;
1105 U16 Reserved2;
1106 U16 IOCStatus;
1107 U32 IOCLogInfo;
1108 U32 ActualImageSize;
1109} MSG_FW_UPLOAD_REPLY, MPI_POINTER PTR_MSG_FW_UPLOAD_REPLY,
1110 FWUploadReply_t, MPI_POINTER pFWUploadReply_t;
1111
1112
1113typedef struct _MPI_FW_HEADER
1114{
1115 U32 ArmBranchInstruction0;
1116 U32 Signature0;
1117 U32 Signature1;
1118 U32 Signature2;
1119 U32 ArmBranchInstruction1;
1120 U32 ArmBranchInstruction2;
1121 U32 Reserved;
1122 U32 Checksum;
1123 U16 VendorId;
1124 U16 ProductId;
1125 MPI_FW_VERSION FWVersion;
1126 U32 SeqCodeVersion;
1127 U32 ImageSize;
1128 U32 NextImageHeaderOffset;
1129 U32 LoadStartAddress;
1130 U32 IopResetVectorValue;
1131 U32 IopResetRegAddr;
1132 U32 VersionNameWhat;
1133 U8 VersionName[32];
1134 U32 VendorNameWhat;
1135 U8 VendorName[32];
1136} MPI_FW_HEADER, MPI_POINTER PTR_MPI_FW_HEADER,
1137 MpiFwHeader_t, MPI_POINTER pMpiFwHeader_t;
1138
1139#define MPI_FW_HEADER_WHAT_SIGNATURE (0x29232840)
1140
1141
1142#define MPI_FW_HEADER_PID_TYPE_MASK (0xF000)
1143#define MPI_FW_HEADER_PID_TYPE_SCSI (0x0000)
1144#define MPI_FW_HEADER_PID_TYPE_FC (0x1000)
1145#define MPI_FW_HEADER_PID_TYPE_SAS (0x2000)
1146
1147#define MPI_FW_HEADER_SIGNATURE_0 (0x5AEAA55A)
1148#define MPI_FW_HEADER_SIGNATURE_1 (0xA55AEAA5)
1149#define MPI_FW_HEADER_SIGNATURE_2 (0x5AA55AEA)
1150
1151#define MPI_FW_HEADER_PID_PROD_MASK (0x0F00)
1152#define MPI_FW_HEADER_PID_PROD_INITIATOR_SCSI (0x0100)
1153#define MPI_FW_HEADER_PID_PROD_TARGET_INITIATOR_SCSI (0x0200)
1154#define MPI_FW_HEADER_PID_PROD_TARGET_SCSI (0x0300)
1155#define MPI_FW_HEADER_PID_PROD_IM_SCSI (0x0400)
1156#define MPI_FW_HEADER_PID_PROD_IS_SCSI (0x0500)
1157#define MPI_FW_HEADER_PID_PROD_CTX_SCSI (0x0600)
1158#define MPI_FW_HEADER_PID_PROD_IR_SCSI (0x0700)
1159
1160#define MPI_FW_HEADER_PID_FAMILY_MASK (0x00FF)
1161
1162#define MPI_FW_HEADER_PID_FAMILY_1030A0_SCSI (0x0001)
1163#define MPI_FW_HEADER_PID_FAMILY_1030B0_SCSI (0x0002)
1164#define MPI_FW_HEADER_PID_FAMILY_1030B1_SCSI (0x0003)
1165#define MPI_FW_HEADER_PID_FAMILY_1030C0_SCSI (0x0004)
1166#define MPI_FW_HEADER_PID_FAMILY_1020A0_SCSI (0x0005)
1167#define MPI_FW_HEADER_PID_FAMILY_1020B0_SCSI (0x0006)
1168#define MPI_FW_HEADER_PID_FAMILY_1020B1_SCSI (0x0007)
1169#define MPI_FW_HEADER_PID_FAMILY_1020C0_SCSI (0x0008)
1170#define MPI_FW_HEADER_PID_FAMILY_1035A0_SCSI (0x0009)
1171#define MPI_FW_HEADER_PID_FAMILY_1035B0_SCSI (0x000A)
1172#define MPI_FW_HEADER_PID_FAMILY_1030TA0_SCSI (0x000B)
1173#define MPI_FW_HEADER_PID_FAMILY_1020TA0_SCSI (0x000C)
1174
1175#define MPI_FW_HEADER_PID_FAMILY_909_FC (0x0000)
1176#define MPI_FW_HEADER_PID_FAMILY_919_FC (0x0001)
1177#define MPI_FW_HEADER_PID_FAMILY_919X_FC (0x0002)
1178#define MPI_FW_HEADER_PID_FAMILY_919XL_FC (0x0003)
1179#define MPI_FW_HEADER_PID_FAMILY_939X_FC (0x0004)
1180#define MPI_FW_HEADER_PID_FAMILY_959_FC (0x0005)
1181#define MPI_FW_HEADER_PID_FAMILY_949E_FC (0x0006)
1182
1183#define MPI_FW_HEADER_PID_FAMILY_1064_SAS (0x0001)
1184#define MPI_FW_HEADER_PID_FAMILY_1068_SAS (0x0002)
1185#define MPI_FW_HEADER_PID_FAMILY_1078_SAS (0x0003)
1186#define MPI_FW_HEADER_PID_FAMILY_106xE_SAS (0x0004)
1187
1188typedef struct _MPI_EXT_IMAGE_HEADER
1189{
1190 U8 ImageType;
1191 U8 Reserved;
1192 U16 Reserved1;
1193 U32 Checksum;
1194 U32 ImageSize;
1195 U32 NextImageHeaderOffset;
1196 U32 LoadStartAddress;
1197 U32 Reserved2;
1198} MPI_EXT_IMAGE_HEADER, MPI_POINTER PTR_MPI_EXT_IMAGE_HEADER,
1199 MpiExtImageHeader_t, MPI_POINTER pMpiExtImageHeader_t;
1200
1201
1202#define MPI_EXT_IMAGE_TYPE_UNSPECIFIED (0x00)
1203#define MPI_EXT_IMAGE_TYPE_FW (0x01)
1204#define MPI_EXT_IMAGE_TYPE_NVDATA (0x03)
1205#define MPI_EXT_IMAGE_TYPE_BOOTLOADER (0x04)
1206#define MPI_EXT_IMAGE_TYPE_INITIALIZATION (0x05)
1207
1208#endif
1209