LXR linux/drivers/mtd/nand/raw/nand

   1/*
   2 * Copyright (C) 2017 Free Electrons
   3 * Copyright (C) 2017 NextThing Co
   4 *
   5 * Author: Boris Brezillon <boris.brezillon@free-electrons.com>
   6 *
   7 * This program is free software; you can redistribute it and/or modify
   8 * it under the terms of the GNU General Public License as published by
   9 * the Free Software Foundation; either version 2 of the License, or
  10 * (at your option) any later version.
  11 *
  12 * This program is distributed in the hope that it will be useful,
  13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 * GNU General Public License for more details.
  16 */
  17
  18#include <linux/mtd/rawnand.h>
  19
  20static void toshiba_nand_decode_id(struct nand_chip *chip)
  21{
  22        struct mtd_info *mtd = nand_to_mtd(chip);
  23
  24        nand_decode_ext_id(chip);
  25
  26        /*
  27         * Toshiba 24nm raw SLC (i.e., not BENAND) have 32B OOB per
  28         * 512B page. For Toshiba SLC, we decode the 5th/6th byte as
  29         * follows:
  30         * - ID byte 6, bits[2:0]: 100b -> 43nm, 101b -> 32nm,
  31         *                         110b -> 24nm
  32         * - ID byte 5, bit[7]:    1 -> BENAND, 0 -> raw SLC
  33         */
  34        if (chip->id.len >= 6 && nand_is_slc(chip) &&
  35            (chip->id.data[5] & 0x7) == 0x6 /* 24nm */ &&
  36            !(chip->id.data[4] & 0x80) /* !BENAND */)
  37                mtd->oobsize = 32 * mtd->writesize >> 9;
  38
  39        /*
  40         * Extract ECC requirements from 6th id byte.
  41         * For Toshiba SLC, ecc requrements are as follows:
  42         *  - 43nm: 1 bit ECC for each 512Byte is required.
  43         *  - 32nm: 4 bit ECC for each 512Byte is required.
  44         *  - 24nm: 8 bit ECC for each 512Byte is required.
  45         */
  46        if (chip->id.len >= 6 && nand_is_slc(chip)) {
  47                chip->ecc_step_ds = 512;
  48                switch (chip->id.data[5] & 0x7) {
  49                case 0x4:
  50                        chip->ecc_strength_ds = 1;
  51                        break;
  52                case 0x5:
  53                        chip->ecc_strength_ds = 4;
  54                        break;
  55                case 0x6:
  56                        chip->ecc_strength_ds = 8;
  57                        break;
  58                default:
  59                        WARN(1, "Could not get ECC info");
  60                        chip->ecc_step_ds = 0;
  61                        break;
  62                }
  63        }
  64}
  65
  66static int toshiba_nand_init(struct nand_chip *chip)
  67{
  68        if (nand_is_slc(chip))
  69                chip->bbt_options |= NAND_BBT_SCAN2NDPAGE;
  70
  71        return 0;
  72}
  73
  74const struct nand_manufacturer_ops toshiba_nand_manuf_ops = {
  75        .detect = toshiba_nand_decode_id,
  76        .init = toshiba_nand_init,
  77};
  78