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11#include <linux/slab.h>
12#include <linux/module.h>
13#include <linux/platform_device.h>
14#include <linux/of.h>
15#include <linux/mtd/mtd.h>
16#include <linux/mtd/rawnand.h>
17#include <linux/mtd/partitions.h>
18#include <linux/clk.h>
19#include <linux/err.h>
20#include <linux/io.h>
21#include <asm/sizes.h>
22#include <linux/platform_data/mtd-orion_nand.h>
23
24struct orion_nand_info {
25 struct nand_chip chip;
26 struct clk *clk;
27};
28
29static void orion_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
30{
31 struct nand_chip *nc = mtd_to_nand(mtd);
32 struct orion_nand_data *board = nand_get_controller_data(nc);
33 u32 offs;
34
35 if (cmd == NAND_CMD_NONE)
36 return;
37
38 if (ctrl & NAND_CLE)
39 offs = (1 << board->cle);
40 else if (ctrl & NAND_ALE)
41 offs = (1 << board->ale);
42 else
43 return;
44
45 if (nc->options & NAND_BUSWIDTH_16)
46 offs <<= 1;
47
48 writeb(cmd, nc->IO_ADDR_W + offs);
49}
50
51static void orion_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
52{
53 struct nand_chip *chip = mtd_to_nand(mtd);
54 void __iomem *io_base = chip->IO_ADDR_R;
55#if __LINUX_ARM_ARCH__ >= 5
56 uint64_t *buf64;
57#endif
58 int i = 0;
59
60 while (len && (unsigned long)buf & 7) {
61 *buf++ = readb(io_base);
62 len--;
63 }
64#if __LINUX_ARM_ARCH__ >= 5
65 buf64 = (uint64_t *)buf;
66 while (i < len/8) {
67
68
69
70
71
72 register uint64_t x asm ("r2");
73
74 asm volatile ("ldrd\t%0, [%1]" : "=&r" (x) : "r" (io_base));
75 buf64[i++] = x;
76 }
77 i *= 8;
78#else
79 readsl(io_base, buf, len/4);
80 i = len / 4 * 4;
81#endif
82 while (i < len)
83 buf[i++] = readb(io_base);
84}
85
86static int __init orion_nand_probe(struct platform_device *pdev)
87{
88 struct orion_nand_info *info;
89 struct mtd_info *mtd;
90 struct nand_chip *nc;
91 struct orion_nand_data *board;
92 struct resource *res;
93 void __iomem *io_base;
94 int ret = 0;
95 u32 val = 0;
96
97 info = devm_kzalloc(&pdev->dev,
98 sizeof(struct orion_nand_info),
99 GFP_KERNEL);
100 if (!info)
101 return -ENOMEM;
102 nc = &info->chip;
103 mtd = nand_to_mtd(nc);
104
105 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
106 io_base = devm_ioremap_resource(&pdev->dev, res);
107
108 if (IS_ERR(io_base))
109 return PTR_ERR(io_base);
110
111 if (pdev->dev.of_node) {
112 board = devm_kzalloc(&pdev->dev, sizeof(struct orion_nand_data),
113 GFP_KERNEL);
114 if (!board)
115 return -ENOMEM;
116 if (!of_property_read_u32(pdev->dev.of_node, "cle", &val))
117 board->cle = (u8)val;
118 else
119 board->cle = 0;
120 if (!of_property_read_u32(pdev->dev.of_node, "ale", &val))
121 board->ale = (u8)val;
122 else
123 board->ale = 1;
124 if (!of_property_read_u32(pdev->dev.of_node,
125 "bank-width", &val))
126 board->width = (u8)val * 8;
127 else
128 board->width = 8;
129 if (!of_property_read_u32(pdev->dev.of_node,
130 "chip-delay", &val))
131 board->chip_delay = (u8)val;
132 } else {
133 board = dev_get_platdata(&pdev->dev);
134 }
135
136 mtd->dev.parent = &pdev->dev;
137
138 nand_set_controller_data(nc, board);
139 nand_set_flash_node(nc, pdev->dev.of_node);
140 nc->IO_ADDR_R = nc->IO_ADDR_W = io_base;
141 nc->cmd_ctrl = orion_nand_cmd_ctrl;
142 nc->read_buf = orion_nand_read_buf;
143 nc->ecc.mode = NAND_ECC_SOFT;
144 nc->ecc.algo = NAND_ECC_HAMMING;
145
146 if (board->chip_delay)
147 nc->chip_delay = board->chip_delay;
148
149 WARN(board->width > 16,
150 "%d bit bus width out of range",
151 board->width);
152
153 if (board->width == 16)
154 nc->options |= NAND_BUSWIDTH_16;
155
156 if (board->dev_ready)
157 nc->dev_ready = board->dev_ready;
158
159 platform_set_drvdata(pdev, info);
160
161
162
163 info->clk = devm_clk_get(&pdev->dev, NULL);
164 if (IS_ERR(info->clk)) {
165 ret = PTR_ERR(info->clk);
166 if (ret == -ENOENT) {
167 info->clk = NULL;
168 } else {
169 dev_err(&pdev->dev, "failed to get clock!\n");
170 return ret;
171 }
172 }
173
174 ret = clk_prepare_enable(info->clk);
175 if (ret) {
176 dev_err(&pdev->dev, "failed to prepare clock!\n");
177 return ret;
178 }
179
180 ret = nand_scan(mtd, 1);
181 if (ret)
182 goto no_dev;
183
184 mtd->name = "orion_nand";
185 ret = mtd_device_register(mtd, board->parts, board->nr_parts);
186 if (ret) {
187 nand_release(mtd);
188 goto no_dev;
189 }
190
191 return 0;
192
193no_dev:
194 clk_disable_unprepare(info->clk);
195 return ret;
196}
197
198static int orion_nand_remove(struct platform_device *pdev)
199{
200 struct orion_nand_info *info = platform_get_drvdata(pdev);
201 struct nand_chip *chip = &info->chip;
202 struct mtd_info *mtd = nand_to_mtd(chip);
203
204 nand_release(mtd);
205
206 clk_disable_unprepare(info->clk);
207
208 return 0;
209}
210
211#ifdef CONFIG_OF
212static const struct of_device_id orion_nand_of_match_table[] = {
213 { .compatible = "marvell,orion-nand", },
214 {},
215};
216MODULE_DEVICE_TABLE(of, orion_nand_of_match_table);
217#endif
218
219static struct platform_driver orion_nand_driver = {
220 .remove = orion_nand_remove,
221 .driver = {
222 .name = "orion_nand",
223 .of_match_table = of_match_ptr(orion_nand_of_match_table),
224 },
225};
226
227module_platform_driver_probe(orion_nand_driver, orion_nand_probe);
228
229MODULE_LICENSE("GPL");
230MODULE_AUTHOR("Tzachi Perelstein");
231MODULE_DESCRIPTION("NAND glue for Orion platforms");
232MODULE_ALIAS("platform:orion_nand");
233
