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62#include <linux/kernel.h>
63#include <linux/string.h>
64#include <linux/errno.h>
65#include <linux/ioport.h>
66#include <linux/slab.h>
67#include <linux/interrupt.h>
68#include <linux/delay.h>
69#include <linux/init.h>
70#include <linux/netdevice.h>
71#include <linux/etherdevice.h>
72#include <linux/skbuff.h>
73#include <linux/module.h>
74#include <linux/bitops.h>
75
76#include <asm/io.h>
77#include <asm/dma.h>
78
79#include "ni65.h"
80
81
82
83
84
85
86
87
88#undef XMT_VIA_SKB
89#undef RCV_VIA_SKB
90#define RCV_PARANOIA_CHECK
91
92#define MID_PERFORMANCE
93
94#if defined( LOW_PERFORMANCE )
95 static int isa0=7,isa1=7,csr80=0x0c10;
96#elif defined( MID_PERFORMANCE )
97 static int isa0=5,isa1=5,csr80=0x2810;
98#else
99 static int isa0=4,isa1=4,csr80=0x0017;
100#endif
101
102
103
104
105#define NI65_ID0 0x00
106#define NI65_ID1 0x55
107#define NI65_EB_ID0 0x52
108#define NI65_EB_ID1 0x44
109#define NE2100_ID0 0x57
110#define NE2100_ID1 0x57
111
112#define PORT p->cmdr_addr
113
114
115
116
117#if 1
118#define RMDNUM 16
119#define RMDNUMMASK 0x80000000
120#else
121#define RMDNUM 8
122#define RMDNUMMASK 0x60000000
123#endif
124
125#if 0
126#define TMDNUM 1
127#define TMDNUMMASK 0x00000000
128#else
129#define TMDNUM 4
130#define TMDNUMMASK 0x40000000
131#endif
132
133
134#define R_BUF_SIZE 1544
135#define T_BUF_SIZE 1544
136
137
138
139
140#define L_DATAREG 0x00
141#define L_ADDRREG 0x02
142#define L_RESET 0x04
143#define L_CONFIG 0x05
144#define L_BUSIF 0x06
145
146
147
148
149
150#define CSR0 0x00
151#define CSR1 0x01
152#define CSR2 0x02
153#define CSR3 0x03
154
155#define INIT_RING_BEFORE_START 0x1
156#define FULL_RESET_ON_ERROR 0x2
157
158#if 0
159#define writereg(val,reg) {outw(reg,PORT+L_ADDRREG);inw(PORT+L_ADDRREG); \
160 outw(val,PORT+L_DATAREG);inw(PORT+L_DATAREG);}
161#define readreg(reg) (outw(reg,PORT+L_ADDRREG),inw(PORT+L_ADDRREG),\
162 inw(PORT+L_DATAREG))
163#if 0
164#define writedatareg(val) {outw(val,PORT+L_DATAREG);inw(PORT+L_DATAREG);}
165#else
166#define writedatareg(val) { writereg(val,CSR0); }
167#endif
168#else
169#define writereg(val,reg) {outw(reg,PORT+L_ADDRREG);outw(val,PORT+L_DATAREG);}
170#define readreg(reg) (outw(reg,PORT+L_ADDRREG),inw(PORT+L_DATAREG))
171#define writedatareg(val) { writereg(val,CSR0); }
172#endif
173
174static unsigned char ni_vendor[] = { 0x02,0x07,0x01 };
175
176static struct card {
177 unsigned char id0,id1;
178 short id_offset;
179 short total_size;
180 short cmd_offset;
181 short addr_offset;
182 unsigned char *vendor_id;
183 char *cardname;
184 unsigned long config;
185} cards[] = {
186 {
187 .id0 = NI65_ID0,
188 .id1 = NI65_ID1,
189 .id_offset = 0x0e,
190 .total_size = 0x10,
191 .cmd_offset = 0x0,
192 .addr_offset = 0x8,
193 .vendor_id = ni_vendor,
194 .cardname = "ni6510",
195 .config = 0x1,
196 },
197 {
198 .id0 = NI65_EB_ID0,
199 .id1 = NI65_EB_ID1,
200 .id_offset = 0x0e,
201 .total_size = 0x18,
202 .cmd_offset = 0x10,
203 .addr_offset = 0x0,
204 .vendor_id = ni_vendor,
205 .cardname = "ni6510 EtherBlaster",
206 .config = 0x2,
207 },
208 {
209 .id0 = NE2100_ID0,
210 .id1 = NE2100_ID1,
211 .id_offset = 0x0e,
212 .total_size = 0x18,
213 .cmd_offset = 0x10,
214 .addr_offset = 0x0,
215 .vendor_id = NULL,
216 .cardname = "generic NE2100",
217 .config = 0x0,
218 },
219};
220#define NUM_CARDS 3
221
222struct priv
223{
224 struct rmd rmdhead[RMDNUM];
225 struct tmd tmdhead[TMDNUM];
226 struct init_block ib;
227 int rmdnum;
228 int tmdnum,tmdlast;
229#ifdef RCV_VIA_SKB
230 struct sk_buff *recv_skb[RMDNUM];
231#else
232 void *recvbounce[RMDNUM];
233#endif
234#ifdef XMT_VIA_SKB
235 struct sk_buff *tmd_skb[TMDNUM];
236#endif
237 void *tmdbounce[TMDNUM];
238 int tmdbouncenum;
239 int lock,xmit_queued;
240
241 void *self;
242 int cmdr_addr;
243 int cardno;
244 int features;
245 spinlock_t ring_lock;
246};
247
248static int ni65_probe1(struct net_device *dev,int);
249static irqreturn_t ni65_interrupt(int irq, void * dev_id);
250static void ni65_recv_intr(struct net_device *dev,int);
251static void ni65_xmit_intr(struct net_device *dev,int);
252static int ni65_open(struct net_device *dev);
253static int ni65_lance_reinit(struct net_device *dev);
254static void ni65_init_lance(struct priv *p,unsigned char*,int,int);
255static netdev_tx_t ni65_send_packet(struct sk_buff *skb,
256 struct net_device *dev);
257static void ni65_timeout(struct net_device *dev);
258static int ni65_close(struct net_device *dev);
259static int ni65_alloc_buffer(struct net_device *dev);
260static void ni65_free_buffer(struct priv *p);
261static void set_multicast_list(struct net_device *dev);
262
263static int irqtab[] __initdata = { 9,12,15,5 };
264static int dmatab[] __initdata = { 0,3,5,6,7 };
265
266static int debuglevel = 1;
267
268
269
270
271static void ni65_set_performance(struct priv *p)
272{
273 writereg(CSR0_STOP | CSR0_CLRALL,CSR0);
274
275 if( !(cards[p->cardno].config & 0x02) )
276 return;
277
278 outw(80,PORT+L_ADDRREG);
279 if(inw(PORT+L_ADDRREG) != 80)
280 return;
281
282 writereg( (csr80 & 0x3fff) ,80);
283 outw(0,PORT+L_ADDRREG);
284 outw((short)isa0,PORT+L_BUSIF);
285 outw(1,PORT+L_ADDRREG);
286 outw((short)isa1,PORT+L_BUSIF);
287
288 outw(CSR0,PORT+L_ADDRREG);
289}
290
291
292
293
294static int ni65_open(struct net_device *dev)
295{
296 struct priv *p = dev->ml_priv;
297 int irqval = request_irq(dev->irq, ni65_interrupt,0,
298 cards[p->cardno].cardname,dev);
299 if (irqval) {
300 printk(KERN_ERR "%s: unable to get IRQ %d (irqval=%d).\n",
301 dev->name,dev->irq, irqval);
302 return -EAGAIN;
303 }
304
305 if(ni65_lance_reinit(dev))
306 {
307 netif_start_queue(dev);
308 return 0;
309 }
310 else
311 {
312 free_irq(dev->irq,dev);
313 return -EAGAIN;
314 }
315}
316
317
318
319
320static int ni65_close(struct net_device *dev)
321{
322 struct priv *p = dev->ml_priv;
323
324 netif_stop_queue(dev);
325
326 outw(inw(PORT+L_RESET),PORT+L_RESET);
327
328#ifdef XMT_VIA_SKB
329 {
330 int i;
331 for(i=0;i<TMDNUM;i++)
332 {
333 if(p->tmd_skb[i]) {
334 dev_kfree_skb(p->tmd_skb[i]);
335 p->tmd_skb[i] = NULL;
336 }
337 }
338 }
339#endif
340 free_irq(dev->irq,dev);
341 return 0;
342}
343
344static void cleanup_card(struct net_device *dev)
345{
346 struct priv *p = dev->ml_priv;
347 disable_dma(dev->dma);
348 free_dma(dev->dma);
349 release_region(dev->base_addr, cards[p->cardno].total_size);
350 ni65_free_buffer(p);
351}
352
353
354static int irq;
355static int io;
356static int dma;
357
358
359
360
361struct net_device * __init ni65_probe(int unit)
362{
363 struct net_device *dev = alloc_etherdev(0);
364 static const int ports[] = { 0x360, 0x300, 0x320, 0x340, 0 };
365 const int *port;
366 int err = 0;
367
368 if (!dev)
369 return ERR_PTR(-ENOMEM);
370
371 if (unit >= 0) {
372 sprintf(dev->name, "eth%d", unit);
373 netdev_boot_setup_check(dev);
374 irq = dev->irq;
375 dma = dev->dma;
376 } else {
377 dev->base_addr = io;
378 }
379
380 if (dev->base_addr > 0x1ff) {
381 err = ni65_probe1(dev, dev->base_addr);
382 } else if (dev->base_addr > 0) {
383 err = -ENXIO;
384 } else {
385 for (port = ports; *port && ni65_probe1(dev, *port); port++)
386 ;
387 if (!*port)
388 err = -ENODEV;
389 }
390 if (err)
391 goto out;
392
393 err = register_netdev(dev);
394 if (err)
395 goto out1;
396 return dev;
397out1:
398 cleanup_card(dev);
399out:
400 free_netdev(dev);
401 return ERR_PTR(err);
402}
403
404static const struct net_device_ops ni65_netdev_ops = {
405 .ndo_open = ni65_open,
406 .ndo_stop = ni65_close,
407 .ndo_start_xmit = ni65_send_packet,
408 .ndo_tx_timeout = ni65_timeout,
409 .ndo_set_rx_mode = set_multicast_list,
410 .ndo_set_mac_address = eth_mac_addr,
411 .ndo_validate_addr = eth_validate_addr,
412};
413
414
415
416
417static int __init ni65_probe1(struct net_device *dev,int ioaddr)
418{
419 int i,j;
420 struct priv *p;
421 unsigned long flags;
422
423 dev->irq = irq;
424 dev->dma = dma;
425
426 for(i=0;i<NUM_CARDS;i++) {
427 if(!request_region(ioaddr, cards[i].total_size, cards[i].cardname))
428 continue;
429 if(cards[i].id_offset >= 0) {
430 if(inb(ioaddr+cards[i].id_offset+0) != cards[i].id0 ||
431 inb(ioaddr+cards[i].id_offset+1) != cards[i].id1) {
432 release_region(ioaddr, cards[i].total_size);
433 continue;
434 }
435 }
436 if(cards[i].vendor_id) {
437 for(j=0;j<3;j++)
438 if(inb(ioaddr+cards[i].addr_offset+j) != cards[i].vendor_id[j]) {
439 release_region(ioaddr, cards[i].total_size);
440 continue;
441 }
442 }
443 break;
444 }
445 if(i == NUM_CARDS)
446 return -ENODEV;
447
448 for(j=0;j<6;j++)
449 dev->dev_addr[j] = inb(ioaddr+cards[i].addr_offset+j);
450
451 if( (j=ni65_alloc_buffer(dev)) < 0) {
452 release_region(ioaddr, cards[i].total_size);
453 return j;
454 }
455 p = dev->ml_priv;
456 p->cmdr_addr = ioaddr + cards[i].cmd_offset;
457 p->cardno = i;
458 spin_lock_init(&p->ring_lock);
459
460 printk(KERN_INFO "%s: %s found at %#3x, ", dev->name, cards[p->cardno].cardname , ioaddr);
461
462 outw(inw(PORT+L_RESET),PORT+L_RESET);
463 if( (j=readreg(CSR0)) != 0x4) {
464 printk("failed.\n");
465 printk(KERN_ERR "%s: Can't RESET card: %04x\n", dev->name, j);
466 ni65_free_buffer(p);
467 release_region(ioaddr, cards[p->cardno].total_size);
468 return -EAGAIN;
469 }
470
471 outw(88,PORT+L_ADDRREG);
472 if(inw(PORT+L_ADDRREG) == 88) {
473 unsigned long v;
474 v = inw(PORT+L_DATAREG);
475 v <<= 16;
476 outw(89,PORT+L_ADDRREG);
477 v |= inw(PORT+L_DATAREG);
478 printk("Version %#08lx, ",v);
479 p->features = INIT_RING_BEFORE_START;
480 }
481 else {
482 printk("ancient LANCE, ");
483 p->features = 0x0;
484 }
485
486 if(test_bit(0,&cards[i].config)) {
487 dev->irq = irqtab[(inw(ioaddr+L_CONFIG)>>2)&3];
488 dev->dma = dmatab[inw(ioaddr+L_CONFIG)&3];
489 printk("IRQ %d (from card), DMA %d (from card).\n",dev->irq,dev->dma);
490 }
491 else {
492 if(dev->dma == 0) {
493
494 unsigned long dma_channels =
495 ((inb(DMA1_STAT_REG) >> 4) & 0x0f)
496 | (inb(DMA2_STAT_REG) & 0xf0);
497 for(i=1;i<5;i++) {
498 int dma = dmatab[i];
499 if(test_bit(dma,&dma_channels) || request_dma(dma,"ni6510"))
500 continue;
501
502 flags=claim_dma_lock();
503 disable_dma(dma);
504 set_dma_mode(dma,DMA_MODE_CASCADE);
505 enable_dma(dma);
506 release_dma_lock(flags);
507
508 ni65_init_lance(p,dev->dev_addr,0,0);
509
510 flags=claim_dma_lock();
511 disable_dma(dma);
512 free_dma(dma);
513 release_dma_lock(flags);
514
515 if(readreg(CSR0) & CSR0_IDON)
516 break;
517 }
518 if(i == 5) {
519 printk("failed.\n");
520 printk(KERN_ERR "%s: Can't detect DMA channel!\n", dev->name);
521 ni65_free_buffer(p);
522 release_region(ioaddr, cards[p->cardno].total_size);
523 return -EAGAIN;
524 }
525 dev->dma = dmatab[i];
526 printk("DMA %d (autodetected), ",dev->dma);
527 }
528 else
529 printk("DMA %d (assigned), ",dev->dma);
530
531 if(dev->irq < 2)
532 {
533 unsigned long irq_mask;
534
535 ni65_init_lance(p,dev->dev_addr,0,0);
536 irq_mask = probe_irq_on();
537 writereg(CSR0_INIT|CSR0_INEA,CSR0);
538 msleep(20);
539 dev->irq = probe_irq_off(irq_mask);
540 if(!dev->irq)
541 {
542 printk("Failed to detect IRQ line!\n");
543 ni65_free_buffer(p);
544 release_region(ioaddr, cards[p->cardno].total_size);
545 return -EAGAIN;
546 }
547 printk("IRQ %d (autodetected).\n",dev->irq);
548 }
549 else
550 printk("IRQ %d (assigned).\n",dev->irq);
551 }
552
553 if(request_dma(dev->dma, cards[p->cardno].cardname ) != 0)
554 {
555 printk(KERN_ERR "%s: Can't request dma-channel %d\n",dev->name,(int) dev->dma);
556 ni65_free_buffer(p);
557 release_region(ioaddr, cards[p->cardno].total_size);
558 return -EAGAIN;
559 }
560
561 dev->base_addr = ioaddr;
562 dev->netdev_ops = &ni65_netdev_ops;
563 dev->watchdog_timeo = HZ/2;
564
565 return 0;
566}
567
568
569
570
571static void ni65_init_lance(struct priv *p,unsigned char *daddr,int filter,int mode)
572{
573 int i;
574 u32 pib;
575
576 writereg(CSR0_CLRALL|CSR0_STOP,CSR0);
577
578 for(i=0;i<6;i++)
579 p->ib.eaddr[i] = daddr[i];
580
581 for(i=0;i<8;i++)
582 p->ib.filter[i] = filter;
583 p->ib.mode = mode;
584
585 p->ib.trp = (u32) isa_virt_to_bus(p->tmdhead) | TMDNUMMASK;
586 p->ib.rrp = (u32) isa_virt_to_bus(p->rmdhead) | RMDNUMMASK;
587 writereg(0,CSR3);
588 pib = (u32) isa_virt_to_bus(&p->ib);
589 writereg(pib & 0xffff,CSR1);
590 writereg(pib >> 16,CSR2);
591
592 writereg(CSR0_INIT,CSR0);
593
594 for(i=0;i<32;i++)
595 {
596 mdelay(4);
597 if(inw(PORT+L_DATAREG) & (CSR0_IDON | CSR0_MERR) )
598 break;
599 }
600}
601
602
603
604
605static void *ni65_alloc_mem(struct net_device *dev,char *what,int size,int type)
606{
607 struct sk_buff *skb=NULL;
608 unsigned char *ptr;
609 void *ret;
610
611 if(type) {
612 ret = skb = alloc_skb(2+16+size,GFP_KERNEL|GFP_DMA);
613 if(!skb) {
614 printk(KERN_WARNING "%s: unable to allocate %s memory.\n",dev->name,what);
615 return NULL;
616 }
617 skb_reserve(skb,2+16);
618 skb_put(skb,R_BUF_SIZE);
619 ptr = skb->data;
620 }
621 else {
622 ret = ptr = kmalloc(T_BUF_SIZE,GFP_KERNEL | GFP_DMA);
623 if(!ret)
624 return NULL;
625 }
626 if( (u32) virt_to_phys(ptr+size) > 0x1000000) {
627 printk(KERN_WARNING "%s: unable to allocate %s memory in lower 16MB!\n",dev->name,what);
628 if(type)
629 kfree_skb(skb);
630 else
631 kfree(ptr);
632 return NULL;
633 }
634 return ret;
635}
636
637
638
639
640static int ni65_alloc_buffer(struct net_device *dev)
641{
642 unsigned char *ptr;
643 struct priv *p;
644 int i;
645
646
647
648
649 ptr = ni65_alloc_mem(dev,"BUFFER",sizeof(struct priv)+8,0);
650 if(!ptr)
651 return -ENOMEM;
652
653 p = dev->ml_priv = (struct priv *) (((unsigned long) ptr + 7) & ~0x7);
654 memset((char *)p, 0, sizeof(struct priv));
655 p->self = ptr;
656
657 for(i=0;i<TMDNUM;i++)
658 {
659#ifdef XMT_VIA_SKB
660 p->tmd_skb[i] = NULL;
661#endif
662 p->tmdbounce[i] = ni65_alloc_mem(dev,"XMIT",T_BUF_SIZE,0);
663 if(!p->tmdbounce[i]) {
664 ni65_free_buffer(p);
665 return -ENOMEM;
666 }
667 }
668
669 for(i=0;i<RMDNUM;i++)
670 {
671#ifdef RCV_VIA_SKB
672 p->recv_skb[i] = ni65_alloc_mem(dev,"RECV",R_BUF_SIZE,1);
673 if(!p->recv_skb[i]) {
674 ni65_free_buffer(p);
675 return -ENOMEM;
676 }
677#else
678 p->recvbounce[i] = ni65_alloc_mem(dev,"RECV",R_BUF_SIZE,0);
679 if(!p->recvbounce[i]) {
680 ni65_free_buffer(p);
681 return -ENOMEM;
682 }
683#endif
684 }
685
686 return 0;
687}
688
689
690
691
692static void ni65_free_buffer(struct priv *p)
693{
694 int i;
695
696 if(!p)
697 return;
698
699 for(i=0;i<TMDNUM;i++) {
700 kfree(p->tmdbounce[i]);
701#ifdef XMT_VIA_SKB
702 if(p->tmd_skb[i])
703 dev_kfree_skb(p->tmd_skb[i]);
704#endif
705 }
706
707 for(i=0;i<RMDNUM;i++)
708 {
709#ifdef RCV_VIA_SKB
710 if(p->recv_skb[i])
711 dev_kfree_skb(p->recv_skb[i]);
712#else
713 kfree(p->recvbounce[i]);
714#endif
715 }
716 kfree(p->self);
717}
718
719
720
721
722
723static void ni65_stop_start(struct net_device *dev,struct priv *p)
724{
725 int csr0 = CSR0_INEA;
726
727 writedatareg(CSR0_STOP);
728
729 if(debuglevel > 1)
730 printk(KERN_DEBUG "ni65_stop_start\n");
731
732 if(p->features & INIT_RING_BEFORE_START) {
733 int i;
734#ifdef XMT_VIA_SKB
735 struct sk_buff *skb_save[TMDNUM];
736#endif
737 unsigned long buffer[TMDNUM];
738 short blen[TMDNUM];
739
740 if(p->xmit_queued) {
741 while(1) {
742 if((p->tmdhead[p->tmdlast].u.s.status & XMIT_OWN))
743 break;
744 p->tmdlast = (p->tmdlast + 1) & (TMDNUM-1);
745 if(p->tmdlast == p->tmdnum)
746 break;
747 }
748 }
749
750 for(i=0;i<TMDNUM;i++) {
751 struct tmd *tmdp = p->tmdhead + i;
752#ifdef XMT_VIA_SKB
753 skb_save[i] = p->tmd_skb[i];
754#endif
755 buffer[i] = (u32) isa_bus_to_virt(tmdp->u.buffer);
756 blen[i] = tmdp->blen;
757 tmdp->u.s.status = 0x0;
758 }
759
760 for(i=0;i<RMDNUM;i++) {
761 struct rmd *rmdp = p->rmdhead + i;
762 rmdp->u.s.status = RCV_OWN;
763 }
764 p->tmdnum = p->xmit_queued = 0;
765 writedatareg(CSR0_STRT | csr0);
766
767 for(i=0;i<TMDNUM;i++) {
768 int num = (i + p->tmdlast) & (TMDNUM-1);
769 p->tmdhead[i].u.buffer = (u32) isa_virt_to_bus((char *)buffer[num]);
770 p->tmdhead[i].blen = blen[num];
771 if(p->tmdhead[i].u.s.status & XMIT_OWN) {
772 p->tmdnum = (p->tmdnum + 1) & (TMDNUM-1);
773 p->xmit_queued = 1;
774 writedatareg(CSR0_TDMD | CSR0_INEA | csr0);
775 }
776#ifdef XMT_VIA_SKB
777 p->tmd_skb[i] = skb_save[num];
778#endif
779 }
780 p->rmdnum = p->tmdlast = 0;
781 if(!p->lock)
782 if (p->tmdnum || !p->xmit_queued)
783 netif_wake_queue(dev);
784 netif_trans_update(dev);
785 }
786 else
787 writedatareg(CSR0_STRT | csr0);
788}
789
790
791
792
793static int ni65_lance_reinit(struct net_device *dev)
794{
795 int i;
796 struct priv *p = dev->ml_priv;
797 unsigned long flags;
798
799 p->lock = 0;
800 p->xmit_queued = 0;
801
802 flags=claim_dma_lock();
803 disable_dma(dev->dma);
804 set_dma_mode(dev->dma,DMA_MODE_CASCADE);
805 enable_dma(dev->dma);
806 release_dma_lock(flags);
807
808 outw(inw(PORT+L_RESET),PORT+L_RESET);
809 if( (i=readreg(CSR0) ) != 0x4)
810 {
811 printk(KERN_ERR "%s: can't RESET %s card: %04x\n",dev->name,
812 cards[p->cardno].cardname,(int) i);
813 flags=claim_dma_lock();
814 disable_dma(dev->dma);
815 release_dma_lock(flags);
816 return 0;
817 }
818
819 p->rmdnum = p->tmdnum = p->tmdlast = p->tmdbouncenum = 0;
820 for(i=0;i<TMDNUM;i++)
821 {
822 struct tmd *tmdp = p->tmdhead + i;
823#ifdef XMT_VIA_SKB
824 if(p->tmd_skb[i]) {
825 dev_kfree_skb(p->tmd_skb[i]);
826 p->tmd_skb[i] = NULL;
827 }
828#endif
829 tmdp->u.buffer = 0x0;
830 tmdp->u.s.status = XMIT_START | XMIT_END;
831 tmdp->blen = tmdp->status2 = 0;
832 }
833
834 for(i=0;i<RMDNUM;i++)
835 {
836 struct rmd *rmdp = p->rmdhead + i;
837#ifdef RCV_VIA_SKB
838 rmdp->u.buffer = (u32) isa_virt_to_bus(p->recv_skb[i]->data);
839#else
840 rmdp->u.buffer = (u32) isa_virt_to_bus(p->recvbounce[i]);
841#endif
842 rmdp->blen = -(R_BUF_SIZE-8);
843 rmdp->mlen = 0;
844 rmdp->u.s.status = RCV_OWN;
845 }
846
847 if(dev->flags & IFF_PROMISC)
848 ni65_init_lance(p,dev->dev_addr,0x00,M_PROM);
849 else if (netdev_mc_count(dev) || dev->flags & IFF_ALLMULTI)
850 ni65_init_lance(p,dev->dev_addr,0xff,0x0);
851 else
852 ni65_init_lance(p,dev->dev_addr,0x00,0x00);
853
854
855
856
857
858
859 if(inw(PORT+L_DATAREG) & CSR0_IDON) {
860 ni65_set_performance(p);
861
862 writedatareg(CSR0_CLRALL | CSR0_INEA | CSR0_STRT);
863 return 1;
864 }
865 printk(KERN_ERR "%s: can't init lance, status: %04x\n",dev->name,(int) inw(PORT+L_DATAREG));
866 flags=claim_dma_lock();
867 disable_dma(dev->dma);
868 release_dma_lock(flags);
869 return 0;
870}
871
872
873
874
875static irqreturn_t ni65_interrupt(int irq, void * dev_id)
876{
877 int csr0 = 0;
878 struct net_device *dev = dev_id;
879 struct priv *p;
880 int bcnt = 32;
881
882 p = dev->ml_priv;
883
884 spin_lock(&p->ring_lock);
885
886 while(--bcnt) {
887 csr0 = inw(PORT+L_DATAREG);
888
889#if 0
890 writedatareg( (csr0 & CSR0_CLRALL) );
891#else
892 writedatareg( (csr0 & CSR0_CLRALL) | CSR0_INEA );
893#endif
894
895 if(!(csr0 & (CSR0_ERR | CSR0_RINT | CSR0_TINT)))
896 break;
897
898 if(csr0 & CSR0_RINT)
899 ni65_recv_intr(dev,csr0);
900 if(csr0 & CSR0_TINT)
901 ni65_xmit_intr(dev,csr0);
902
903 if(csr0 & CSR0_ERR)
904 {
905 if(debuglevel > 1)
906 printk(KERN_ERR "%s: general error: %04x.\n",dev->name,csr0);
907 if(csr0 & CSR0_BABL)
908 dev->stats.tx_errors++;
909 if(csr0 & CSR0_MISS) {
910 int i;
911 for(i=0;i<RMDNUM;i++)
912 printk("%02x ",p->rmdhead[i].u.s.status);
913 printk("\n");
914 dev->stats.rx_errors++;
915 }
916 if(csr0 & CSR0_MERR) {
917 if(debuglevel > 1)
918 printk(KERN_ERR "%s: Ooops .. memory error: %04x.\n",dev->name,csr0);
919 ni65_stop_start(dev,p);
920 }
921 }
922 }
923
924#ifdef RCV_PARANOIA_CHECK
925{
926 int j;
927 for(j=0;j<RMDNUM;j++)
928 {
929 int i, num2;
930 for(i=RMDNUM-1;i>0;i--) {
931 num2 = (p->rmdnum + i) & (RMDNUM-1);
932 if(!(p->rmdhead[num2].u.s.status & RCV_OWN))
933 break;
934 }
935
936 if(i) {
937 int k, num1;
938 for(k=0;k<RMDNUM;k++) {
939 num1 = (p->rmdnum + k) & (RMDNUM-1);
940 if(!(p->rmdhead[num1].u.s.status & RCV_OWN))
941 break;
942 }
943 if(!k)
944 break;
945
946 if(debuglevel > 0)
947 {
948 char buf[256],*buf1;
949 buf1 = buf;
950 for(k=0;k<RMDNUM;k++) {
951 sprintf(buf1,"%02x ",(p->rmdhead[k].u.s.status));
952 buf1 += 3;
953 }
954 *buf1 = 0;
955 printk(KERN_ERR "%s: Ooops, receive ring corrupted %2d %2d | %s\n",dev->name,p->rmdnum,i,buf);
956 }
957
958 p->rmdnum = num1;
959 ni65_recv_intr(dev,csr0);
960 if((p->rmdhead[num2].u.s.status & RCV_OWN))
961 break;
962 }
963 else
964 break;
965 }
966}
967#endif
968
969 if( (csr0 & (CSR0_RXON | CSR0_TXON)) != (CSR0_RXON | CSR0_TXON) ) {
970 printk(KERN_DEBUG "%s: RX or TX was offline -> restart\n",dev->name);
971 ni65_stop_start(dev,p);
972 }
973 else
974 writedatareg(CSR0_INEA);
975
976 spin_unlock(&p->ring_lock);
977 return IRQ_HANDLED;
978}
979
980
981
982
983
984static void ni65_xmit_intr(struct net_device *dev,int csr0)
985{
986 struct priv *p = dev->ml_priv;
987
988 while(p->xmit_queued)
989 {
990 struct tmd *tmdp = p->tmdhead + p->tmdlast;
991 int tmdstat = tmdp->u.s.status;
992
993 if(tmdstat & XMIT_OWN)
994 break;
995
996 if(tmdstat & XMIT_ERR)
997 {
998#if 0
999 if(tmdp->status2 & XMIT_TDRMASK && debuglevel > 3)
1000 printk(KERN_ERR "%s: tdr-problems (e.g. no resistor)\n",dev->name);
1001#endif
1002
1003 if(tmdp->status2 & XMIT_RTRY)
1004 dev->stats.tx_aborted_errors++;
1005 if(tmdp->status2 & XMIT_LCAR)
1006 dev->stats.tx_carrier_errors++;
1007 if(tmdp->status2 & (XMIT_BUFF | XMIT_UFLO )) {
1008
1009 dev->stats.tx_fifo_errors++;
1010 if(debuglevel > 0)
1011 printk(KERN_ERR "%s: Xmit FIFO/BUFF error\n",dev->name);
1012 if(p->features & INIT_RING_BEFORE_START) {
1013 tmdp->u.s.status = XMIT_OWN | XMIT_START | XMIT_END;
1014 ni65_stop_start(dev,p);
1015 break;
1016 }
1017 else
1018 ni65_stop_start(dev,p);
1019 }
1020 if(debuglevel > 2)
1021 printk(KERN_ERR "%s: xmit-error: %04x %02x-%04x\n",dev->name,csr0,(int) tmdstat,(int) tmdp->status2);
1022 if(!(csr0 & CSR0_BABL))
1023 dev->stats.tx_errors++;
1024 tmdp->status2 = 0;
1025 }
1026 else {
1027 dev->stats.tx_bytes -= (short)(tmdp->blen);
1028 dev->stats.tx_packets++;
1029 }
1030
1031#ifdef XMT_VIA_SKB
1032 if(p->tmd_skb[p->tmdlast]) {
1033 dev_kfree_skb_irq(p->tmd_skb[p->tmdlast]);
1034 p->tmd_skb[p->tmdlast] = NULL;
1035 }
1036#endif
1037
1038 p->tmdlast = (p->tmdlast + 1) & (TMDNUM-1);
1039 if(p->tmdlast == p->tmdnum)
1040 p->xmit_queued = 0;
1041 }
1042 netif_wake_queue(dev);
1043}
1044
1045
1046
1047
1048static void ni65_recv_intr(struct net_device *dev,int csr0)
1049{
1050 struct rmd *rmdp;
1051 int rmdstat,len;
1052 int cnt=0;
1053 struct priv *p = dev->ml_priv;
1054
1055 rmdp = p->rmdhead + p->rmdnum;
1056 while(!( (rmdstat = rmdp->u.s.status) & RCV_OWN))
1057 {
1058 cnt++;
1059 if( (rmdstat & (RCV_START | RCV_END | RCV_ERR)) != (RCV_START | RCV_END) )
1060 {
1061 if(!(rmdstat & RCV_ERR)) {
1062 if(rmdstat & RCV_START)
1063 {
1064 dev->stats.rx_length_errors++;
1065 printk(KERN_ERR "%s: recv, packet too long: %d\n",dev->name,rmdp->mlen & 0x0fff);
1066 }
1067 }
1068 else {
1069 if(debuglevel > 2)
1070 printk(KERN_ERR "%s: receive-error: %04x, lance-status: %04x/%04x\n",
1071 dev->name,(int) rmdstat,csr0,(int) inw(PORT+L_DATAREG) );
1072 if(rmdstat & RCV_FRAM)
1073 dev->stats.rx_frame_errors++;
1074 if(rmdstat & RCV_OFLO)
1075 dev->stats.rx_over_errors++;
1076 if(rmdstat & RCV_CRC)
1077 dev->stats.rx_crc_errors++;
1078 if(rmdstat & RCV_BUF_ERR)
1079 dev->stats.rx_fifo_errors++;
1080 }
1081 if(!(csr0 & CSR0_MISS))
1082 dev->stats.rx_errors++;
1083 }
1084 else if( (len = (rmdp->mlen & 0x0fff) - 4) >= 60)
1085 {
1086#ifdef RCV_VIA_SKB
1087 struct sk_buff *skb = alloc_skb(R_BUF_SIZE+2+16,GFP_ATOMIC);
1088 if (skb)
1089 skb_reserve(skb,16);
1090#else
1091 struct sk_buff *skb = netdev_alloc_skb(dev, len + 2);
1092#endif
1093 if(skb)
1094 {
1095 skb_reserve(skb,2);
1096#ifdef RCV_VIA_SKB
1097 if( (unsigned long) (skb->data + R_BUF_SIZE) > 0x1000000) {
1098 skb_put(skb,len);
1099 skb_copy_to_linear_data(skb, (unsigned char *)(p->recv_skb[p->rmdnum]->data),len);
1100 }
1101 else {
1102 struct sk_buff *skb1 = p->recv_skb[p->rmdnum];
1103 skb_put(skb,R_BUF_SIZE);
1104 p->recv_skb[p->rmdnum] = skb;
1105 rmdp->u.buffer = (u32) isa_virt_to_bus(skb->data);
1106 skb = skb1;
1107 skb_trim(skb,len);
1108 }
1109#else
1110 skb_put(skb,len);
1111 skb_copy_to_linear_data(skb, (unsigned char *) p->recvbounce[p->rmdnum],len);
1112#endif
1113 dev->stats.rx_packets++;
1114 dev->stats.rx_bytes += len;
1115 skb->protocol=eth_type_trans(skb,dev);
1116 netif_rx(skb);
1117 }
1118 else
1119 {
1120 printk(KERN_ERR "%s: can't alloc new sk_buff\n",dev->name);
1121 dev->stats.rx_dropped++;
1122 }
1123 }
1124 else {
1125 printk(KERN_INFO "%s: received runt packet\n",dev->name);
1126 dev->stats.rx_errors++;
1127 }
1128 rmdp->blen = -(R_BUF_SIZE-8);
1129 rmdp->mlen = 0;
1130 rmdp->u.s.status = RCV_OWN;
1131 p->rmdnum = (p->rmdnum + 1) & (RMDNUM-1);
1132 rmdp = p->rmdhead + p->rmdnum;
1133 }
1134}
1135
1136
1137
1138
1139
1140static void ni65_timeout(struct net_device *dev)
1141{
1142 int i;
1143 struct priv *p = dev->ml_priv;
1144
1145 printk(KERN_ERR "%s: xmitter timed out, try to restart!\n",dev->name);
1146 for(i=0;i<TMDNUM;i++)
1147 printk("%02x ",p->tmdhead[i].u.s.status);
1148 printk("\n");
1149 ni65_lance_reinit(dev);
1150 netif_trans_update(dev);
1151 netif_wake_queue(dev);
1152}
1153
1154
1155
1156
1157
1158static netdev_tx_t ni65_send_packet(struct sk_buff *skb,
1159 struct net_device *dev)
1160{
1161 struct priv *p = dev->ml_priv;
1162
1163 netif_stop_queue(dev);
1164
1165 if (test_and_set_bit(0, (void*)&p->lock)) {
1166 printk(KERN_ERR "%s: Queue was locked.\n", dev->name);
1167 return NETDEV_TX_BUSY;
1168 }
1169
1170 {
1171 short len = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN;
1172 struct tmd *tmdp;
1173 unsigned long flags;
1174
1175#ifdef XMT_VIA_SKB
1176 if( (unsigned long) (skb->data + skb->len) > 0x1000000) {
1177#endif
1178
1179 skb_copy_from_linear_data(skb, p->tmdbounce[p->tmdbouncenum],
1180 skb->len > T_BUF_SIZE ? T_BUF_SIZE :
1181 skb->len);
1182 if (len > skb->len)
1183 memset((char *)p->tmdbounce[p->tmdbouncenum]+skb->len, 0, len-skb->len);
1184 dev_kfree_skb (skb);
1185
1186 spin_lock_irqsave(&p->ring_lock, flags);
1187 tmdp = p->tmdhead + p->tmdnum;
1188 tmdp->u.buffer = (u32) isa_virt_to_bus(p->tmdbounce[p->tmdbouncenum]);
1189 p->tmdbouncenum = (p->tmdbouncenum + 1) & (TMDNUM - 1);
1190
1191#ifdef XMT_VIA_SKB
1192 }
1193 else {
1194 spin_lock_irqsave(&p->ring_lock, flags);
1195
1196 tmdp = p->tmdhead + p->tmdnum;
1197 tmdp->u.buffer = (u32) isa_virt_to_bus(skb->data);
1198 p->tmd_skb[p->tmdnum] = skb;
1199 }
1200#endif
1201 tmdp->blen = -len;
1202
1203 tmdp->u.s.status = XMIT_OWN | XMIT_START | XMIT_END;
1204 writedatareg(CSR0_TDMD | CSR0_INEA);
1205
1206 p->xmit_queued = 1;
1207 p->tmdnum = (p->tmdnum + 1) & (TMDNUM-1);
1208
1209 if(p->tmdnum != p->tmdlast)
1210 netif_wake_queue(dev);
1211
1212 p->lock = 0;
1213
1214 spin_unlock_irqrestore(&p->ring_lock, flags);
1215 }
1216
1217 return NETDEV_TX_OK;
1218}
1219
1220static void set_multicast_list(struct net_device *dev)
1221{
1222 if(!ni65_lance_reinit(dev))
1223 printk(KERN_ERR "%s: Can't switch card into MC mode!\n",dev->name);
1224 netif_wake_queue(dev);
1225}
1226
1227#ifdef MODULE
1228static struct net_device *dev_ni65;
1229
1230module_param_hw(irq, int, irq, 0);
1231module_param_hw(io, int, ioport, 0);
1232module_param_hw(dma, int, dma, 0);
1233MODULE_PARM_DESC(irq, "ni6510 IRQ number (ignored for some cards)");
1234MODULE_PARM_DESC(io, "ni6510 I/O base address");
1235MODULE_PARM_DESC(dma, "ni6510 ISA DMA channel (ignored for some cards)");
1236
1237int __init init_module(void)
1238{
1239 dev_ni65 = ni65_probe(-1);
1240 return PTR_ERR_OR_ZERO(dev_ni65);
1241}
1242
1243void __exit cleanup_module(void)
1244{
1245 unregister_netdev(dev_ni65);
1246 cleanup_card(dev_ni65);
1247 free_netdev(dev_ni65);
1248}
1249#endif
1250
1251MODULE_LICENSE("GPL");
1252
