LXR linux/drivers/net/ethernet/intel/fm10k/fm10k.h

   1/* SPDX-License-Identifier: GPL-2.0 */
   2/* Intel(R) Ethernet Switch Host Interface Driver
   3 * Copyright(c) 2013 - 2017 Intel Corporation.
   4 *
   5 * This program is free software; you can redistribute it and/or modify it
   6 * under the terms and conditions of the GNU General Public License,
   7 * version 2, as published by the Free Software Foundation.
   8 *
   9 * This program is distributed in the hope it will be useful, but WITHOUT
  10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12 * more details.
  13 *
  14 * The full GNU General Public License is included in this distribution in
  15 * the file called "COPYING".
  16 *
  17 * Contact Information:
  18 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  19 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  20 */
  21
  22#ifndef _FM10K_H_
  23#define _FM10K_H_
  24
  25#include <linux/types.h>
  26#include <linux/etherdevice.h>
  27#include <linux/cpumask.h>
  28#include <linux/rtnetlink.h>
  29#include <linux/if_vlan.h>
  30#include <linux/pci.h>
  31
  32#include "fm10k_pf.h"
  33#include "fm10k_vf.h"
  34
  35#define FM10K_MAX_JUMBO_FRAME_SIZE      15342   /* Maximum supported size 15K */
  36
  37#define MAX_QUEUES      FM10K_MAX_QUEUES_PF
  38
  39#define FM10K_MIN_RXD            128
  40#define FM10K_MAX_RXD           4096
  41#define FM10K_DEFAULT_RXD        256
  42
  43#define FM10K_MIN_TXD            128
  44#define FM10K_MAX_TXD           4096
  45#define FM10K_DEFAULT_TXD        256
  46#define FM10K_DEFAULT_TX_WORK    256
  47
  48#define FM10K_RXBUFFER_256        256
  49#define FM10K_RX_HDR_LEN        FM10K_RXBUFFER_256
  50#define FM10K_RXBUFFER_2048      2048
  51#define FM10K_RX_BUFSZ          FM10K_RXBUFFER_2048
  52
  53/* How many Rx Buffers do we bundle into one write to the hardware ? */
  54#define FM10K_RX_BUFFER_WRITE   16      /* Must be power of 2 */
  55
  56#define FM10K_MAX_STATIONS      63
  57struct fm10k_l2_accel {
  58        int size;
  59        u16 count;
  60        u16 dglort;
  61        struct rcu_head rcu;
  62        struct net_device *macvlan[0];
  63};
  64
  65enum fm10k_ring_state_t {
  66        __FM10K_TX_DETECT_HANG,
  67        __FM10K_HANG_CHECK_ARMED,
  68        __FM10K_TX_XPS_INIT_DONE,
  69        /* This must be last and is used to calculate BITMAP size */
  70        __FM10K_TX_STATE_SIZE__,
  71};
  72
  73#define check_for_tx_hang(ring) \
  74        test_bit(__FM10K_TX_DETECT_HANG, (ring)->state)
  75#define set_check_for_tx_hang(ring) \
  76        set_bit(__FM10K_TX_DETECT_HANG, (ring)->state)
  77#define clear_check_for_tx_hang(ring) \
  78        clear_bit(__FM10K_TX_DETECT_HANG, (ring)->state)
  79
  80struct fm10k_tx_buffer {
  81        struct fm10k_tx_desc *next_to_watch;
  82        struct sk_buff *skb;
  83        unsigned int bytecount;
  84        u16 gso_segs;
  85        u16 tx_flags;
  86        DEFINE_DMA_UNMAP_ADDR(dma);
  87        DEFINE_DMA_UNMAP_LEN(len);
  88};
  89
  90struct fm10k_rx_buffer {
  91        dma_addr_t dma;
  92        struct page *page;
  93        u32 page_offset;
  94};
  95
  96struct fm10k_queue_stats {
  97        u64 packets;
  98        u64 bytes;
  99};
 100
 101struct fm10k_tx_queue_stats {
 102        u64 restart_queue;
 103        u64 csum_err;
 104        u64 tx_busy;
 105        u64 tx_done_old;
 106        u64 csum_good;
 107};
 108
 109struct fm10k_rx_queue_stats {
 110        u64 alloc_failed;
 111        u64 csum_err;
 112        u64 errors;
 113        u64 csum_good;
 114        u64 switch_errors;
 115        u64 drops;
 116        u64 pp_errors;
 117        u64 link_errors;
 118        u64 length_errors;
 119};
 120
 121struct fm10k_ring {
 122        struct fm10k_q_vector *q_vector;/* backpointer to host q_vector */
 123        struct net_device *netdev;      /* netdev ring belongs to */
 124        struct device *dev;             /* device for DMA mapping */
 125        struct fm10k_l2_accel __rcu *l2_accel;  /* L2 acceleration list */
 126        void *desc;                     /* descriptor ring memory */
 127        union {
 128                struct fm10k_tx_buffer *tx_buffer;
 129                struct fm10k_rx_buffer *rx_buffer;
 130        };
 131        u32 __iomem *tail;
 132        DECLARE_BITMAP(state, __FM10K_TX_STATE_SIZE__);
 133        dma_addr_t dma;                 /* phys. address of descriptor ring */
 134        unsigned int size;              /* length in bytes */
 135
 136        u8 queue_index;                 /* needed for queue management */
 137        u8 reg_idx;                     /* holds the special value that gets
 138                                         * the hardware register offset
 139                                         * associated with this ring, which is
 140                                         * different for DCB and RSS modes
 141                                         */
 142        u8 qos_pc;                      /* priority class of queue */
 143        u16 vid;                        /* default VLAN ID of queue */
 144        u16 count;                      /* amount of descriptors */
 145
 146        u16 next_to_alloc;
 147        u16 next_to_use;
 148        u16 next_to_clean;
 149
 150        struct fm10k_queue_stats stats;
 151        struct u64_stats_sync syncp;
 152        union {
 153                /* Tx */
 154                struct fm10k_tx_queue_stats tx_stats;
 155                /* Rx */
 156                struct {
 157                        struct fm10k_rx_queue_stats rx_stats;
 158                        struct sk_buff *skb;
 159                };
 160        };
 161} ____cacheline_internodealigned_in_smp;
 162
 163struct fm10k_ring_container {
 164        struct fm10k_ring *ring;        /* pointer to linked list of rings */
 165        unsigned int total_bytes;       /* total bytes processed this int */
 166        unsigned int total_packets;     /* total packets processed this int */
 167        u16 work_limit;                 /* total work allowed per interrupt */
 168        u16 itr;                        /* interrupt throttle rate value */
 169        u8 itr_scale;                   /* ITR adjustment based on PCI speed */
 170        u8 count;                       /* total number of rings in vector */
 171};
 172
 173#define FM10K_ITR_MAX           0x0FFF  /* maximum value for ITR */
 174#define FM10K_ITR_10K           100     /* 100us */
 175#define FM10K_ITR_20K           50      /* 50us */
 176#define FM10K_ITR_40K           25      /* 25us */
 177#define FM10K_ITR_ADAPTIVE      0x8000  /* adaptive interrupt moderation flag */
 178
 179#define ITR_IS_ADAPTIVE(itr) (!!(itr & FM10K_ITR_ADAPTIVE))
 180
 181#define FM10K_TX_ITR_DEFAULT    FM10K_ITR_40K
 182#define FM10K_RX_ITR_DEFAULT    FM10K_ITR_20K
 183#define FM10K_ITR_ENABLE        (FM10K_ITR_AUTOMASK | FM10K_ITR_MASK_CLEAR)
 184
 185static inline struct netdev_queue *txring_txq(const struct fm10k_ring *ring)
 186{
 187        return &ring->netdev->_tx[ring->queue_index];
 188}
 189
 190/* iterator for handling rings in ring container */
 191#define fm10k_for_each_ring(pos, head) \
 192        for (pos = &(head).ring[(head).count]; (--pos) >= (head).ring;)
 193
 194#define MAX_Q_VECTORS 256
 195#define MIN_Q_VECTORS   1
 196enum fm10k_non_q_vectors {
 197        FM10K_MBX_VECTOR,
 198#define NON_Q_VECTORS_VF NON_Q_VECTORS_PF
 199        NON_Q_VECTORS_PF
 200};
 201
 202#define NON_Q_VECTORS(hw)       (((hw)->mac.type == fm10k_mac_pf) ? \
 203                                                NON_Q_VECTORS_PF : \
 204                                                NON_Q_VECTORS_VF)
 205#define MIN_MSIX_COUNT(hw)      (MIN_Q_VECTORS + NON_Q_VECTORS(hw))
 206
 207struct fm10k_q_vector {
 208        struct fm10k_intfc *interface;
 209        u32 __iomem *itr;       /* pointer to ITR register for this vector */
 210        u16 v_idx;              /* index of q_vector within interface array */
 211        struct fm10k_ring_container rx, tx;
 212
 213        struct napi_struct napi;
 214        cpumask_t affinity_mask;
 215        char name[IFNAMSIZ + 9];
 216
 217#ifdef CONFIG_DEBUG_FS
 218        struct dentry *dbg_q_vector;
 219#endif /* CONFIG_DEBUG_FS */
 220        struct rcu_head rcu;    /* to avoid race with update stats on free */
 221
 222        /* for dynamic allocation of rings associated with this q_vector */
 223        struct fm10k_ring ring[0] ____cacheline_internodealigned_in_smp;
 224};
 225
 226enum fm10k_ring_f_enum {
 227        RING_F_RSS,
 228        RING_F_QOS,
 229        RING_F_ARRAY_SIZE  /* must be last in enum set */
 230};
 231
 232struct fm10k_ring_feature {
 233        u16 limit;      /* upper limit on feature indices */
 234        u16 indices;    /* current value of indices */
 235        u16 mask;       /* Mask used for feature to ring mapping */
 236        u16 offset;     /* offset to start of feature */
 237};
 238
 239struct fm10k_iov_data {
 240        unsigned int            num_vfs;
 241        unsigned int            next_vf_mbx;
 242        struct rcu_head         rcu;
 243        struct fm10k_vf_info    vf_info[0];
 244};
 245
 246struct fm10k_udp_port {
 247        struct list_head        list;
 248        sa_family_t             sa_family;
 249        __be16                  port;
 250};
 251
 252enum fm10k_macvlan_request_type {
 253        FM10K_UC_MAC_REQUEST,
 254        FM10K_MC_MAC_REQUEST,
 255        FM10K_VLAN_REQUEST
 256};
 257
 258struct fm10k_macvlan_request {
 259        enum fm10k_macvlan_request_type type;
 260        struct list_head list;
 261        union {
 262                struct fm10k_mac_request {
 263                        u8 addr[ETH_ALEN];
 264                        u16 glort;
 265                        u16 vid;
 266                } mac;
 267                struct fm10k_vlan_request {
 268                        u32 vid;
 269                        u8 vsi;
 270                } vlan;
 271        };
 272        bool set;
 273};
 274
 275/* one work queue for entire driver */
 276extern struct workqueue_struct *fm10k_workqueue;
 277
 278/* The following enumeration contains flags which indicate or enable modified
 279 * driver behaviors. To avoid race conditions, the flags are stored in
 280 * a BITMAP in the fm10k_intfc structure. The BITMAP should be accessed using
 281 * atomic *_bit() operations.
 282 */
 283enum fm10k_flags_t {
 284        FM10K_FLAG_RESET_REQUESTED,
 285        FM10K_FLAG_RSS_FIELD_IPV4_UDP,
 286        FM10K_FLAG_RSS_FIELD_IPV6_UDP,
 287        FM10K_FLAG_SWPRI_CONFIG,
 288        /* __FM10K_FLAGS_SIZE__ is used to calculate the size of
 289         * interface->flags and must be the last value in this
 290         * enumeration.
 291         */
 292        __FM10K_FLAGS_SIZE__
 293};
 294
 295enum fm10k_state_t {
 296        __FM10K_RESETTING,
 297        __FM10K_RESET_DETACHED,
 298        __FM10K_RESET_SUSPENDED,
 299        __FM10K_DOWN,
 300        __FM10K_SERVICE_SCHED,
 301        __FM10K_SERVICE_REQUEST,
 302        __FM10K_SERVICE_DISABLE,
 303        __FM10K_MACVLAN_SCHED,
 304        __FM10K_MACVLAN_REQUEST,
 305        __FM10K_MACVLAN_DISABLE,
 306        __FM10K_LINK_DOWN,
 307        __FM10K_UPDATING_STATS,
 308        /* This value must be last and determines the BITMAP size */
 309        __FM10K_STATE_SIZE__,
 310};
 311
 312struct fm10k_intfc {
 313        unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
 314        struct net_device *netdev;
 315        struct fm10k_l2_accel *l2_accel; /* pointer to L2 acceleration list */
 316        struct pci_dev *pdev;
 317        DECLARE_BITMAP(state, __FM10K_STATE_SIZE__);
 318
 319        /* Access flag values using atomic *_bit() operations */
 320        DECLARE_BITMAP(flags, __FM10K_FLAGS_SIZE__);
 321
 322        int xcast_mode;
 323
 324        /* Tx fast path data */
 325        int num_tx_queues;
 326        u16 tx_itr;
 327
 328        /* Rx fast path data */
 329        int num_rx_queues;
 330        u16 rx_itr;
 331
 332        /* TX */
 333        struct fm10k_ring *tx_ring[MAX_QUEUES] ____cacheline_aligned_in_smp;
 334
 335        u64 restart_queue;
 336        u64 tx_busy;
 337        u64 tx_csum_errors;
 338        u64 alloc_failed;
 339        u64 rx_csum_errors;
 340
 341        u64 tx_bytes_nic;
 342        u64 tx_packets_nic;
 343        u64 rx_bytes_nic;
 344        u64 rx_packets_nic;
 345        u64 rx_drops_nic;
 346        u64 rx_overrun_pf;
 347        u64 rx_overrun_vf;
 348
 349        /* Debug Statistics */
 350        u64 hw_sm_mbx_full;
 351        u64 hw_csum_tx_good;
 352        u64 hw_csum_rx_good;
 353        u64 rx_switch_errors;
 354        u64 rx_drops;
 355        u64 rx_pp_errors;
 356        u64 rx_link_errors;
 357        u64 rx_length_errors;
 358
 359        u32 tx_timeout_count;
 360
 361        /* RX */
 362        struct fm10k_ring *rx_ring[MAX_QUEUES];
 363
 364        /* Queueing vectors */
 365        struct fm10k_q_vector *q_vector[MAX_Q_VECTORS];
 366        struct msix_entry *msix_entries;
 367        int num_q_vectors;      /* current number of q_vectors for device */
 368        struct fm10k_ring_feature ring_feature[RING_F_ARRAY_SIZE];
 369
 370        /* SR-IOV information management structure */
 371        struct fm10k_iov_data *iov_data;
 372
 373        struct fm10k_hw_stats stats;
 374        struct fm10k_hw hw;
 375        /* Mailbox lock */
 376        spinlock_t mbx_lock;
 377        u32 __iomem *uc_addr;
 378        u32 __iomem *sw_addr;
 379        u16 msg_enable;
 380        u16 tx_ring_count;
 381        u16 rx_ring_count;
 382        struct timer_list service_timer;
 383        struct work_struct service_task;
 384        unsigned long next_stats_update;
 385        unsigned long next_tx_hang_check;
 386        unsigned long last_reset;
 387        unsigned long link_down_event;
 388        bool host_ready;
 389        bool lport_map_failed;
 390
 391        u32 reta[FM10K_RETA_SIZE];
 392        u32 rssrk[FM10K_RSSRK_SIZE];
 393
 394        /* UDP encapsulation port tracking information */
 395        struct list_head vxlan_port;
 396        struct list_head geneve_port;
 397
 398        /* MAC/VLAN update queue */
 399        struct list_head macvlan_requests;
 400        struct delayed_work macvlan_task;
 401        /* MAC/VLAN update queue lock */
 402        spinlock_t macvlan_lock;
 403
 404#ifdef CONFIG_DEBUG_FS
 405        struct dentry *dbg_intfc;
 406#endif /* CONFIG_DEBUG_FS */
 407
 408#ifdef CONFIG_DCB
 409        u8 pfc_en;
 410#endif
 411        u8 rx_pause;
 412
 413        /* GLORT resources in use by PF */
 414        u16 glort;
 415        u16 glort_count;
 416
 417        /* VLAN ID for updating multicast/unicast lists */
 418        u16 vid;
 419};
 420
 421static inline void fm10k_mbx_lock(struct fm10k_intfc *interface)
 422{
 423        spin_lock(&interface->mbx_lock);
 424}
 425
 426static inline void fm10k_mbx_unlock(struct fm10k_intfc *interface)
 427{
 428        spin_unlock(&interface->mbx_lock);
 429}
 430
 431static inline int fm10k_mbx_trylock(struct fm10k_intfc *interface)
 432{
 433        return spin_trylock(&interface->mbx_lock);
 434}
 435
 436/* fm10k_test_staterr - test bits in Rx descriptor status and error fields */
 437static inline __le32 fm10k_test_staterr(union fm10k_rx_desc *rx_desc,
 438                                        const u32 stat_err_bits)
 439{
 440        return rx_desc->d.staterr & cpu_to_le32(stat_err_bits);
 441}
 442
 443/* fm10k_desc_unused - calculate if we have unused descriptors */
 444static inline u16 fm10k_desc_unused(struct fm10k_ring *ring)
 445{
 446        s16 unused = ring->next_to_clean - ring->next_to_use - 1;
 447
 448        return likely(unused < 0) ? unused + ring->count : unused;
 449}
 450
 451#define FM10K_TX_DESC(R, i)     \
 452        (&(((struct fm10k_tx_desc *)((R)->desc))[i]))
 453#define FM10K_RX_DESC(R, i)     \
 454         (&(((union fm10k_rx_desc *)((R)->desc))[i]))
 455
 456#define FM10K_MAX_TXD_PWR       14
 457#define FM10K_MAX_DATA_PER_TXD  (1u << FM10K_MAX_TXD_PWR)
 458
 459/* Tx Descriptors needed, worst case */
 460#define TXD_USE_COUNT(S)        DIV_ROUND_UP((S), FM10K_MAX_DATA_PER_TXD)
 461#define DESC_NEEDED     (MAX_SKB_FRAGS + 4)
 462
 463enum fm10k_tx_flags {
 464        /* Tx offload flags */
 465        FM10K_TX_FLAGS_CSUM     = 0x01,
 466};
 467
 468/* This structure is stored as little endian values as that is the native
 469 * format of the Rx descriptor.  The ordering of these fields is reversed
 470 * from the actual ftag header to allow for a single bswap to take care
 471 * of placing all of the values in network order
 472 */
 473union fm10k_ftag_info {
 474        __le64 ftag;
 475        struct {
 476                /* dglort and sglort combined into a single 32bit desc read */
 477                __le32 glort;
 478                /* upper 16 bits of VLAN are reserved 0 for swpri_type_user */
 479                __le32 vlan;
 480        } d;
 481        struct {
 482                __le16 dglort;
 483                __le16 sglort;
 484                __le16 vlan;
 485                __le16 swpri_type_user;
 486        } w;
 487};
 488
 489struct fm10k_cb {
 490        union {
 491                __le64 tstamp;
 492                unsigned long ts_tx_timeout;
 493        };
 494        union fm10k_ftag_info fi;
 495};
 496
 497#define FM10K_CB(skb) ((struct fm10k_cb *)(skb)->cb)
 498
 499/* main */
 500extern char fm10k_driver_name[];
 501extern const char fm10k_driver_version[];
 502int fm10k_init_queueing_scheme(struct fm10k_intfc *interface);
 503void fm10k_clear_queueing_scheme(struct fm10k_intfc *interface);
 504__be16 fm10k_tx_encap_offload(struct sk_buff *skb);
 505netdev_tx_t fm10k_xmit_frame_ring(struct sk_buff *skb,
 506                                  struct fm10k_ring *tx_ring);
 507void fm10k_tx_timeout_reset(struct fm10k_intfc *interface);
 508u64 fm10k_get_tx_pending(struct fm10k_ring *ring, bool in_sw);
 509bool fm10k_check_tx_hang(struct fm10k_ring *tx_ring);
 510void fm10k_alloc_rx_buffers(struct fm10k_ring *rx_ring, u16 cleaned_count);
 511
 512/* PCI */
 513void fm10k_mbx_free_irq(struct fm10k_intfc *);
 514int fm10k_mbx_request_irq(struct fm10k_intfc *);
 515void fm10k_qv_free_irq(struct fm10k_intfc *interface);
 516int fm10k_qv_request_irq(struct fm10k_intfc *interface);
 517int fm10k_register_pci_driver(void);
 518void fm10k_unregister_pci_driver(void);
 519void fm10k_up(struct fm10k_intfc *interface);
 520void fm10k_down(struct fm10k_intfc *interface);
 521void fm10k_update_stats(struct fm10k_intfc *interface);
 522void fm10k_service_event_schedule(struct fm10k_intfc *interface);
 523void fm10k_macvlan_schedule(struct fm10k_intfc *interface);
 524void fm10k_update_rx_drop_en(struct fm10k_intfc *interface);
 525#ifdef CONFIG_NET_POLL_CONTROLLER
 526void fm10k_netpoll(struct net_device *netdev);
 527#endif
 528
 529/* Netdev */
 530struct net_device *fm10k_alloc_netdev(const struct fm10k_info *info);
 531int fm10k_setup_rx_resources(struct fm10k_ring *);
 532int fm10k_setup_tx_resources(struct fm10k_ring *);
 533void fm10k_free_rx_resources(struct fm10k_ring *);
 534void fm10k_free_tx_resources(struct fm10k_ring *);
 535void fm10k_clean_all_rx_rings(struct fm10k_intfc *);
 536void fm10k_clean_all_tx_rings(struct fm10k_intfc *);
 537void fm10k_unmap_and_free_tx_resource(struct fm10k_ring *,
 538                                      struct fm10k_tx_buffer *);
 539void fm10k_restore_rx_state(struct fm10k_intfc *);
 540void fm10k_reset_rx_state(struct fm10k_intfc *);
 541int fm10k_setup_tc(struct net_device *dev, u8 tc);
 542int fm10k_open(struct net_device *netdev);
 543int fm10k_close(struct net_device *netdev);
 544int fm10k_queue_vlan_request(struct fm10k_intfc *interface, u32 vid,
 545                             u8 vsi, bool set);
 546int fm10k_queue_mac_request(struct fm10k_intfc *interface, u16 glort,
 547                            const unsigned char *addr, u16 vid, bool set);
 548void fm10k_clear_macvlan_queue(struct fm10k_intfc *interface,
 549                               u16 glort, bool vlans);
 550
 551/* Ethtool */
 552void fm10k_set_ethtool_ops(struct net_device *dev);
 553void fm10k_write_reta(struct fm10k_intfc *interface, const u32 *indir);
 554
 555/* IOV */
 556s32 fm10k_iov_event(struct fm10k_intfc *interface);
 557s32 fm10k_iov_mbx(struct fm10k_intfc *interface);
 558void fm10k_iov_suspend(struct pci_dev *pdev);
 559int fm10k_iov_resume(struct pci_dev *pdev);
 560void fm10k_iov_disable(struct pci_dev *pdev);
 561int fm10k_iov_configure(struct pci_dev *pdev, int num_vfs);
 562s32 fm10k_iov_update_pvid(struct fm10k_intfc *interface, u16 glort, u16 pvid);
 563int fm10k_ndo_set_vf_mac(struct net_device *netdev, int vf_idx, u8 *mac);
 564int fm10k_ndo_set_vf_vlan(struct net_device *netdev,
 565                          int vf_idx, u16 vid, u8 qos, __be16 vlan_proto);
 566int fm10k_ndo_set_vf_bw(struct net_device *netdev, int vf_idx,
 567                        int __always_unused min_rate, int max_rate);
 568int fm10k_ndo_get_vf_config(struct net_device *netdev,
 569                            int vf_idx, struct ifla_vf_info *ivi);
 570
 571/* DebugFS */
 572#ifdef CONFIG_DEBUG_FS
 573void fm10k_dbg_q_vector_init(struct fm10k_q_vector *q_vector);
 574void fm10k_dbg_q_vector_exit(struct fm10k_q_vector *q_vector);
 575void fm10k_dbg_intfc_init(struct fm10k_intfc *interface);
 576void fm10k_dbg_intfc_exit(struct fm10k_intfc *interface);
 577void fm10k_dbg_init(void);
 578void fm10k_dbg_exit(void);
 579#else
 580static inline void fm10k_dbg_q_vector_init(struct fm10k_q_vector *q_vector) {}
 581static inline void fm10k_dbg_q_vector_exit(struct fm10k_q_vector *q_vector) {}
 582static inline void fm10k_dbg_intfc_init(struct fm10k_intfc *interface) {}
 583static inline void fm10k_dbg_intfc_exit(struct fm10k_intfc *interface) {}
 584static inline void fm10k_dbg_init(void) {}
 585static inline void fm10k_dbg_exit(void) {}
 586#endif /* CONFIG_DEBUG_FS */
 587
 588/* DCB */
 589#ifdef CONFIG_DCB
 590void fm10k_dcbnl_set_ops(struct net_device *dev);
 591#else
 592static inline void fm10k_dcbnl_set_ops(struct net_device *dev) {}
 593#endif
 594#endif /* _FM10K_H_ */
 595