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12#ifndef __SXGBE_DMA_H__
13#define __SXGBE_DMA_H__
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15
16struct sxgbe_extra_stats;
17
18#define SXGBE_DMA_BLENMAP_LSHIFT 1
19#define SXGBE_DMA_TXPBL_LSHIFT 16
20#define SXGBE_DMA_RXPBL_LSHIFT 16
21#define DEFAULT_DMA_PBL 8
22
23struct sxgbe_dma_ops {
24
25 int (*init)(void __iomem *ioaddr, int fix_burst, int burst_map);
26 void (*cha_init)(void __iomem *ioaddr, int cha_num, int fix_burst,
27 int pbl, dma_addr_t dma_tx, dma_addr_t dma_rx,
28 int t_rzie, int r_rsize);
29 void (*enable_dma_transmission)(void __iomem *ioaddr, int dma_cnum);
30 void (*enable_dma_irq)(void __iomem *ioaddr, int dma_cnum);
31 void (*disable_dma_irq)(void __iomem *ioaddr, int dma_cnum);
32 void (*start_tx)(void __iomem *ioaddr, int tchannels);
33 void (*start_tx_queue)(void __iomem *ioaddr, int dma_cnum);
34 void (*stop_tx)(void __iomem *ioaddr, int tchannels);
35 void (*stop_tx_queue)(void __iomem *ioaddr, int dma_cnum);
36 void (*start_rx)(void __iomem *ioaddr, int rchannels);
37 void (*stop_rx)(void __iomem *ioaddr, int rchannels);
38 int (*tx_dma_int_status)(void __iomem *ioaddr, int channel_no,
39 struct sxgbe_extra_stats *x);
40 int (*rx_dma_int_status)(void __iomem *ioaddr, int channel_no,
41 struct sxgbe_extra_stats *x);
42
43 void (*rx_watchdog)(void __iomem *ioaddr, u32 riwt);
44
45 void (*enable_tso)(void __iomem *ioaddr, u8 chan_num);
46};
47
48const struct sxgbe_dma_ops *sxgbe_get_dma_ops(void);
49
50#endif
51