LXR linux/drivers/net/phy/mdio-bcm-unimac.c

   1/*
   2 * Broadcom UniMAC MDIO bus controller driver
   3 *
   4 * Copyright (C) 2014-2017 Broadcom
   5 *
   6 * This program is free software; you can redistribute it and/or modify
   7 * it under the terms of the GNU General Public License as published by
   8 * the Free Software Foundation; either version 2 of the License, or
   9 * (at your option) any later version.
  10 */
  11
  12#include <linux/kernel.h>
  13#include <linux/phy.h>
  14#include <linux/platform_device.h>
  15#include <linux/sched.h>
  16#include <linux/module.h>
  17#include <linux/io.h>
  18#include <linux/delay.h>
  19
  20#include <linux/of.h>
  21#include <linux/of_platform.h>
  22#include <linux/of_mdio.h>
  23
  24#include <linux/platform_data/mdio-bcm-unimac.h>
  25
  26#define MDIO_CMD                0x00
  27#define  MDIO_START_BUSY        (1 << 29)
  28#define  MDIO_READ_FAIL         (1 << 28)
  29#define  MDIO_RD                (2 << 26)
  30#define  MDIO_WR                (1 << 26)
  31#define  MDIO_PMD_SHIFT         21
  32#define  MDIO_PMD_MASK          0x1F
  33#define  MDIO_REG_SHIFT         16
  34#define  MDIO_REG_MASK          0x1F
  35
  36#define MDIO_CFG                0x04
  37#define  MDIO_C22               (1 << 0)
  38#define  MDIO_C45               0
  39#define  MDIO_CLK_DIV_SHIFT     4
  40#define  MDIO_CLK_DIV_MASK      0x3F
  41#define  MDIO_SUPP_PREAMBLE     (1 << 12)
  42
  43struct unimac_mdio_priv {
  44        struct mii_bus          *mii_bus;
  45        void __iomem            *base;
  46        int (*wait_func)        (void *wait_func_data);
  47        void                    *wait_func_data;
  48};
  49
  50static inline u32 unimac_mdio_readl(struct unimac_mdio_priv *priv, u32 offset)
  51{
  52        /* MIPS chips strapped for BE will automagically configure the
  53         * peripheral registers for CPU-native byte order.
  54         */
  55        if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
  56                return __raw_readl(priv->base + offset);
  57        else
  58                return readl_relaxed(priv->base + offset);
  59}
  60
  61static inline void unimac_mdio_writel(struct unimac_mdio_priv *priv, u32 val,
  62                                      u32 offset)
  63{
  64        if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
  65                __raw_writel(val, priv->base + offset);
  66        else
  67                writel_relaxed(val, priv->base + offset);
  68}
  69
  70static inline void unimac_mdio_start(struct unimac_mdio_priv *priv)
  71{
  72        u32 reg;
  73
  74        reg = unimac_mdio_readl(priv, MDIO_CMD);
  75        reg |= MDIO_START_BUSY;
  76        unimac_mdio_writel(priv, reg, MDIO_CMD);
  77}
  78
  79static inline unsigned int unimac_mdio_busy(struct unimac_mdio_priv *priv)
  80{
  81        return unimac_mdio_readl(priv, MDIO_CMD) & MDIO_START_BUSY;
  82}
  83
  84static int unimac_mdio_poll(void *wait_func_data)
  85{
  86        struct unimac_mdio_priv *priv = wait_func_data;
  87        unsigned int timeout = 1000;
  88
  89        do {
  90                if (!unimac_mdio_busy(priv))
  91                        return 0;
  92
  93                usleep_range(1000, 2000);
  94        } while (--timeout);
  95
  96        if (!timeout)
  97                return -ETIMEDOUT;
  98
  99        return 0;
 100}
 101
 102static int unimac_mdio_read(struct mii_bus *bus, int phy_id, int reg)
 103{
 104        struct unimac_mdio_priv *priv = bus->priv;
 105        int ret;
 106        u32 cmd;
 107
 108        /* Prepare the read operation */
 109        cmd = MDIO_RD | (phy_id << MDIO_PMD_SHIFT) | (reg << MDIO_REG_SHIFT);
 110        unimac_mdio_writel(priv, cmd, MDIO_CMD);
 111
 112        /* Start MDIO transaction */
 113        unimac_mdio_start(priv);
 114
 115        ret = priv->wait_func(priv->wait_func_data);
 116        if (ret)
 117                return ret;
 118
 119        cmd = unimac_mdio_readl(priv, MDIO_CMD);
 120
 121        /* Some broken devices are known not to release the line during
 122         * turn-around, e.g: Broadcom BCM53125 external switches, so check for
 123         * that condition here and ignore the MDIO controller read failure
 124         * indication.
 125         */
 126        if (!(bus->phy_ignore_ta_mask & 1 << phy_id) && (cmd & MDIO_READ_FAIL))
 127                return -EIO;
 128
 129        return cmd & 0xffff;
 130}
 131
 132static int unimac_mdio_write(struct mii_bus *bus, int phy_id,
 133                             int reg, u16 val)
 134{
 135        struct unimac_mdio_priv *priv = bus->priv;
 136        u32 cmd;
 137
 138        /* Prepare the write operation */
 139        cmd = MDIO_WR | (phy_id << MDIO_PMD_SHIFT) |
 140                (reg << MDIO_REG_SHIFT) | (0xffff & val);
 141        unimac_mdio_writel(priv, cmd, MDIO_CMD);
 142
 143        unimac_mdio_start(priv);
 144
 145        return priv->wait_func(priv->wait_func_data);
 146}
 147
 148/* Workaround for integrated BCM7xxx Gigabit PHYs which have a problem with
 149 * their internal MDIO management controller making them fail to successfully
 150 * be read from or written to for the first transaction.  We insert a dummy
 151 * BMSR read here to make sure that phy_get_device() and get_phy_id() can
 152 * correctly read the PHY MII_PHYSID1/2 registers and successfully register a
 153 * PHY device for this peripheral.
 154 *
 155 * Once the PHY driver is registered, we can workaround subsequent reads from
 156 * there (e.g: during system-wide power management).
 157 *
 158 * bus->reset is invoked before mdiobus_scan during mdiobus_register and is
 159 * therefore the right location to stick that workaround. Since we do not want
 160 * to read from non-existing PHYs, we either use bus->phy_mask or do a manual
 161 * Device Tree scan to limit the search area.
 162 */
 163static int unimac_mdio_reset(struct mii_bus *bus)
 164{
 165        struct device_node *np = bus->dev.of_node;
 166        struct device_node *child;
 167        u32 read_mask = 0;
 168        int addr;
 169
 170        if (!np) {
 171                read_mask = ~bus->phy_mask;
 172        } else {
 173                for_each_available_child_of_node(np, child) {
 174                        addr = of_mdio_parse_addr(&bus->dev, child);
 175                        if (addr < 0)
 176                                continue;
 177
 178                        read_mask |= 1 << addr;
 179                }
 180        }
 181
 182        for (addr = 0; addr < PHY_MAX_ADDR; addr++) {
 183                if (read_mask & 1 << addr) {
 184                        dev_dbg(&bus->dev, "Workaround for PHY @ %d\n", addr);
 185                        mdiobus_read(bus, addr, MII_BMSR);
 186                }
 187        }
 188
 189        return 0;
 190}
 191
 192static int unimac_mdio_probe(struct platform_device *pdev)
 193{
 194        struct unimac_mdio_pdata *pdata = pdev->dev.platform_data;
 195        struct unimac_mdio_priv *priv;
 196        struct device_node *np;
 197        struct mii_bus *bus;
 198        struct resource *r;
 199        int ret;
 200
 201        np = pdev->dev.of_node;
 202
 203        priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
 204        if (!priv)
 205                return -ENOMEM;
 206
 207        r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 208        if (!r)
 209                return -EINVAL;
 210
 211        /* Just ioremap, as this MDIO block is usually integrated into an
 212         * Ethernet MAC controller register range
 213         */
 214        priv->base = devm_ioremap(&pdev->dev, r->start, resource_size(r));
 215        if (!priv->base) {
 216                dev_err(&pdev->dev, "failed to remap register\n");
 217                return -ENOMEM;
 218        }
 219
 220        priv->mii_bus = mdiobus_alloc();
 221        if (!priv->mii_bus)
 222                return -ENOMEM;
 223
 224        bus = priv->mii_bus;
 225        bus->priv = priv;
 226        if (pdata) {
 227                bus->name = pdata->bus_name;
 228                priv->wait_func = pdata->wait_func;
 229                priv->wait_func_data = pdata->wait_func_data;
 230                bus->phy_mask = ~pdata->phy_mask;
 231        } else {
 232                bus->name = "unimac MII bus";
 233                priv->wait_func_data = priv;
 234                priv->wait_func = unimac_mdio_poll;
 235        }
 236        bus->parent = &pdev->dev;
 237        bus->read = unimac_mdio_read;
 238        bus->write = unimac_mdio_write;
 239        bus->reset = unimac_mdio_reset;
 240        snprintf(bus->id, MII_BUS_ID_SIZE, "%s-%d", pdev->name, pdev->id);
 241
 242        ret = of_mdiobus_register(bus, np);
 243        if (ret) {
 244                dev_err(&pdev->dev, "MDIO bus registration failed\n");
 245                goto out_mdio_free;
 246        }
 247
 248        platform_set_drvdata(pdev, priv);
 249
 250        dev_info(&pdev->dev, "Broadcom UniMAC MDIO bus at 0x%p\n", priv->base);
 251
 252        return 0;
 253
 254out_mdio_free:
 255        mdiobus_free(bus);
 256        return ret;
 257}
 258
 259static int unimac_mdio_remove(struct platform_device *pdev)
 260{
 261        struct unimac_mdio_priv *priv = platform_get_drvdata(pdev);
 262
 263        mdiobus_unregister(priv->mii_bus);
 264        mdiobus_free(priv->mii_bus);
 265
 266        return 0;
 267}
 268
 269static const struct of_device_id unimac_mdio_ids[] = {
 270        { .compatible = "brcm,genet-mdio-v5", },
 271        { .compatible = "brcm,genet-mdio-v4", },
 272        { .compatible = "brcm,genet-mdio-v3", },
 273        { .compatible = "brcm,genet-mdio-v2", },
 274        { .compatible = "brcm,genet-mdio-v1", },
 275        { .compatible = "brcm,unimac-mdio", },
 276        { /* sentinel */ },
 277};
 278MODULE_DEVICE_TABLE(of, unimac_mdio_ids);
 279
 280static struct platform_driver unimac_mdio_driver = {
 281        .driver = {
 282                .name = UNIMAC_MDIO_DRV_NAME,
 283                .of_match_table = unimac_mdio_ids,
 284        },
 285        .probe  = unimac_mdio_probe,
 286        .remove = unimac_mdio_remove,
 287};
 288module_platform_driver(unimac_mdio_driver);
 289
 290MODULE_AUTHOR("Broadcom Corporation");
 291MODULE_DESCRIPTION("Broadcom UniMAC MDIO bus controller");
 292MODULE_LICENSE("GPL");
 293MODULE_ALIAS("platform:" UNIMAC_MDIO_DRV_NAME);
 294