linux/drivers/net/wireless/ath/wil6210/txrx.c
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   1/*
   2 * Copyright (c) 2012-2017 Qualcomm Atheros, Inc.
   3 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
   4 *
   5 * Permission to use, copy, modify, and/or distribute this software for any
   6 * purpose with or without fee is hereby granted, provided that the above
   7 * copyright notice and this permission notice appear in all copies.
   8 *
   9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16 */
  17
  18#include <linux/etherdevice.h>
  19#include <net/ieee80211_radiotap.h>
  20#include <linux/if_arp.h>
  21#include <linux/moduleparam.h>
  22#include <linux/ip.h>
  23#include <linux/ipv6.h>
  24#include <net/ipv6.h>
  25#include <linux/prefetch.h>
  26
  27#include "wil6210.h"
  28#include "wmi.h"
  29#include "txrx.h"
  30#include "trace.h"
  31
  32static bool rtap_include_phy_info;
  33module_param(rtap_include_phy_info, bool, 0444);
  34MODULE_PARM_DESC(rtap_include_phy_info,
  35                 " Include PHY info in the radiotap header, default - no");
  36
  37bool rx_align_2;
  38module_param(rx_align_2, bool, 0444);
  39MODULE_PARM_DESC(rx_align_2, " align Rx buffers on 4*n+2, default - no");
  40
  41bool rx_large_buf;
  42module_param(rx_large_buf, bool, 0444);
  43MODULE_PARM_DESC(rx_large_buf, " allocate 8KB RX buffers, default - no");
  44
  45static inline uint wil_rx_snaplen(void)
  46{
  47        return rx_align_2 ? 6 : 0;
  48}
  49
  50static inline int wil_vring_is_empty(struct vring *vring)
  51{
  52        return vring->swhead == vring->swtail;
  53}
  54
  55static inline u32 wil_vring_next_tail(struct vring *vring)
  56{
  57        return (vring->swtail + 1) % vring->size;
  58}
  59
  60static inline void wil_vring_advance_head(struct vring *vring, int n)
  61{
  62        vring->swhead = (vring->swhead + n) % vring->size;
  63}
  64
  65static inline int wil_vring_is_full(struct vring *vring)
  66{
  67        return wil_vring_next_tail(vring) == vring->swhead;
  68}
  69
  70/* Used space in Tx Vring */
  71static inline int wil_vring_used_tx(struct vring *vring)
  72{
  73        u32 swhead = vring->swhead;
  74        u32 swtail = vring->swtail;
  75        return (vring->size + swhead - swtail) % vring->size;
  76}
  77
  78/* Available space in Tx Vring */
  79static inline int wil_vring_avail_tx(struct vring *vring)
  80{
  81        return vring->size - wil_vring_used_tx(vring) - 1;
  82}
  83
  84/* wil_vring_wmark_low - low watermark for available descriptor space */
  85static inline int wil_vring_wmark_low(struct vring *vring)
  86{
  87        return vring->size/8;
  88}
  89
  90/* wil_vring_wmark_high - high watermark for available descriptor space */
  91static inline int wil_vring_wmark_high(struct vring *vring)
  92{
  93        return vring->size/4;
  94}
  95
  96/* returns true if num avail descriptors is lower than wmark_low */
  97static inline int wil_vring_avail_low(struct vring *vring)
  98{
  99        return wil_vring_avail_tx(vring) < wil_vring_wmark_low(vring);
 100}
 101
 102/* returns true if num avail descriptors is higher than wmark_high */
 103static inline int wil_vring_avail_high(struct vring *vring)
 104{
 105        return wil_vring_avail_tx(vring) > wil_vring_wmark_high(vring);
 106}
 107
 108/* returns true when all tx vrings are empty */
 109bool wil_is_tx_idle(struct wil6210_priv *wil)
 110{
 111        int i;
 112        unsigned long data_comp_to;
 113
 114        for (i = 0; i < WIL6210_MAX_TX_RINGS; i++) {
 115                struct vring *vring = &wil->vring_tx[i];
 116                int vring_index = vring - wil->vring_tx;
 117                struct vring_tx_data *txdata = &wil->vring_tx_data[vring_index];
 118
 119                spin_lock(&txdata->lock);
 120
 121                if (!vring->va || !txdata->enabled) {
 122                        spin_unlock(&txdata->lock);
 123                        continue;
 124                }
 125
 126                data_comp_to = jiffies + msecs_to_jiffies(
 127                                        WIL_DATA_COMPLETION_TO_MS);
 128                if (test_bit(wil_status_napi_en, wil->status)) {
 129                        while (!wil_vring_is_empty(vring)) {
 130                                if (time_after(jiffies, data_comp_to)) {
 131                                        wil_dbg_pm(wil,
 132                                                   "TO waiting for idle tx\n");
 133                                        spin_unlock(&txdata->lock);
 134                                        return false;
 135                                }
 136                                wil_dbg_ratelimited(wil,
 137                                                    "tx vring is not empty -> NAPI\n");
 138                                spin_unlock(&txdata->lock);
 139                                napi_synchronize(&wil->napi_tx);
 140                                msleep(20);
 141                                spin_lock(&txdata->lock);
 142                                if (!vring->va || !txdata->enabled)
 143                                        break;
 144                        }
 145                }
 146
 147                spin_unlock(&txdata->lock);
 148        }
 149
 150        return true;
 151}
 152
 153/* wil_val_in_range - check if value in [min,max) */
 154static inline bool wil_val_in_range(int val, int min, int max)
 155{
 156        return val >= min && val < max;
 157}
 158
 159static int wil_vring_alloc(struct wil6210_priv *wil, struct vring *vring)
 160{
 161        struct device *dev = wil_to_dev(wil);
 162        size_t sz = vring->size * sizeof(vring->va[0]);
 163        uint i;
 164
 165        wil_dbg_misc(wil, "vring_alloc:\n");
 166
 167        BUILD_BUG_ON(sizeof(vring->va[0]) != 32);
 168
 169        vring->swhead = 0;
 170        vring->swtail = 0;
 171        vring->ctx = kcalloc(vring->size, sizeof(vring->ctx[0]), GFP_KERNEL);
 172        if (!vring->ctx) {
 173                vring->va = NULL;
 174                return -ENOMEM;
 175        }
 176
 177        /* vring->va should be aligned on its size rounded up to power of 2
 178         * This is granted by the dma_alloc_coherent.
 179         *
 180         * HW has limitation that all vrings addresses must share the same
 181         * upper 16 msb bits part of 48 bits address. To workaround that,
 182         * if we are using more than 32 bit addresses switch to 32 bit
 183         * allocation before allocating vring memory.
 184         *
 185         * There's no check for the return value of dma_set_mask_and_coherent,
 186         * since we assume if we were able to set the mask during
 187         * initialization in this system it will not fail if we set it again
 188         */
 189        if (wil->dma_addr_size > 32)
 190                dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
 191
 192        vring->va = dma_alloc_coherent(dev, sz, &vring->pa, GFP_KERNEL);
 193        if (!vring->va) {
 194                kfree(vring->ctx);
 195                vring->ctx = NULL;
 196                return -ENOMEM;
 197        }
 198
 199        if (wil->dma_addr_size > 32)
 200                dma_set_mask_and_coherent(dev,
 201                                          DMA_BIT_MASK(wil->dma_addr_size));
 202
 203        /* initially, all descriptors are SW owned
 204         * For Tx and Rx, ownership bit is at the same location, thus
 205         * we can use any
 206         */
 207        for (i = 0; i < vring->size; i++) {
 208                volatile struct vring_tx_desc *_d = &vring->va[i].tx;
 209
 210                _d->dma.status = TX_DMA_STATUS_DU;
 211        }
 212
 213        wil_dbg_misc(wil, "vring[%d] 0x%p:%pad 0x%p\n", vring->size,
 214                     vring->va, &vring->pa, vring->ctx);
 215
 216        return 0;
 217}
 218
 219static void wil_txdesc_unmap(struct device *dev, struct vring_tx_desc *d,
 220                             struct wil_ctx *ctx)
 221{
 222        dma_addr_t pa = wil_desc_addr(&d->dma.addr);
 223        u16 dmalen = le16_to_cpu(d->dma.length);
 224
 225        switch (ctx->mapped_as) {
 226        case wil_mapped_as_single:
 227                dma_unmap_single(dev, pa, dmalen, DMA_TO_DEVICE);
 228                break;
 229        case wil_mapped_as_page:
 230                dma_unmap_page(dev, pa, dmalen, DMA_TO_DEVICE);
 231                break;
 232        default:
 233                break;
 234        }
 235}
 236
 237static void wil_vring_free(struct wil6210_priv *wil, struct vring *vring,
 238                           int tx)
 239{
 240        struct device *dev = wil_to_dev(wil);
 241        size_t sz = vring->size * sizeof(vring->va[0]);
 242
 243        lockdep_assert_held(&wil->mutex);
 244        if (tx) {
 245                int vring_index = vring - wil->vring_tx;
 246
 247                wil_dbg_misc(wil, "free Tx vring %d [%d] 0x%p:%pad 0x%p\n",
 248                             vring_index, vring->size, vring->va,
 249                             &vring->pa, vring->ctx);
 250        } else {
 251                wil_dbg_misc(wil, "free Rx vring [%d] 0x%p:%pad 0x%p\n",
 252                             vring->size, vring->va,
 253                             &vring->pa, vring->ctx);
 254        }
 255
 256        while (!wil_vring_is_empty(vring)) {
 257                dma_addr_t pa;
 258                u16 dmalen;
 259                struct wil_ctx *ctx;
 260
 261                if (tx) {
 262                        struct vring_tx_desc dd, *d = &dd;
 263                        volatile struct vring_tx_desc *_d =
 264                                        &vring->va[vring->swtail].tx;
 265
 266                        ctx = &vring->ctx[vring->swtail];
 267                        if (!ctx) {
 268                                wil_dbg_txrx(wil,
 269                                             "ctx(%d) was already completed\n",
 270                                             vring->swtail);
 271                                vring->swtail = wil_vring_next_tail(vring);
 272                                continue;
 273                        }
 274                        *d = *_d;
 275                        wil_txdesc_unmap(dev, d, ctx);
 276                        if (ctx->skb)
 277                                dev_kfree_skb_any(ctx->skb);
 278                        vring->swtail = wil_vring_next_tail(vring);
 279                } else { /* rx */
 280                        struct vring_rx_desc dd, *d = &dd;
 281                        volatile struct vring_rx_desc *_d =
 282                                        &vring->va[vring->swhead].rx;
 283
 284                        ctx = &vring->ctx[vring->swhead];
 285                        *d = *_d;
 286                        pa = wil_desc_addr(&d->dma.addr);
 287                        dmalen = le16_to_cpu(d->dma.length);
 288                        dma_unmap_single(dev, pa, dmalen, DMA_FROM_DEVICE);
 289                        kfree_skb(ctx->skb);
 290                        wil_vring_advance_head(vring, 1);
 291                }
 292        }
 293        dma_free_coherent(dev, sz, (void *)vring->va, vring->pa);
 294        kfree(vring->ctx);
 295        vring->pa = 0;
 296        vring->va = NULL;
 297        vring->ctx = NULL;
 298}
 299
 300/**
 301 * Allocate one skb for Rx VRING
 302 *
 303 * Safe to call from IRQ
 304 */
 305static int wil_vring_alloc_skb(struct wil6210_priv *wil, struct vring *vring,
 306                               u32 i, int headroom)
 307{
 308        struct device *dev = wil_to_dev(wil);
 309        unsigned int sz = wil->rx_buf_len + ETH_HLEN + wil_rx_snaplen();
 310        struct vring_rx_desc dd, *d = &dd;
 311        volatile struct vring_rx_desc *_d = &vring->va[i].rx;
 312        dma_addr_t pa;
 313        struct sk_buff *skb = dev_alloc_skb(sz + headroom);
 314
 315        if (unlikely(!skb))
 316                return -ENOMEM;
 317
 318        skb_reserve(skb, headroom);
 319        skb_put(skb, sz);
 320
 321        pa = dma_map_single(dev, skb->data, skb->len, DMA_FROM_DEVICE);
 322        if (unlikely(dma_mapping_error(dev, pa))) {
 323                kfree_skb(skb);
 324                return -ENOMEM;
 325        }
 326
 327        d->dma.d0 = RX_DMA_D0_CMD_DMA_RT | RX_DMA_D0_CMD_DMA_IT;
 328        wil_desc_addr_set(&d->dma.addr, pa);
 329        /* ip_length don't care */
 330        /* b11 don't care */
 331        /* error don't care */
 332        d->dma.status = 0; /* BIT(0) should be 0 for HW_OWNED */
 333        d->dma.length = cpu_to_le16(sz);
 334        *_d = *d;
 335        vring->ctx[i].skb = skb;
 336
 337        return 0;
 338}
 339
 340/**
 341 * Adds radiotap header
 342 *
 343 * Any error indicated as "Bad FCS"
 344 *
 345 * Vendor data for 04:ce:14-1 (Wilocity-1) consists of:
 346 *  - Rx descriptor: 32 bytes
 347 *  - Phy info
 348 */
 349static void wil_rx_add_radiotap_header(struct wil6210_priv *wil,
 350                                       struct sk_buff *skb)
 351{
 352        struct wil6210_rtap {
 353                struct ieee80211_radiotap_header rthdr;
 354                /* fields should be in the order of bits in rthdr.it_present */
 355                /* flags */
 356                u8 flags;
 357                /* channel */
 358                __le16 chnl_freq __aligned(2);
 359                __le16 chnl_flags;
 360                /* MCS */
 361                u8 mcs_present;
 362                u8 mcs_flags;
 363                u8 mcs_index;
 364        } __packed;
 365        struct wil6210_rtap_vendor {
 366                struct wil6210_rtap rtap;
 367                /* vendor */
 368                u8 vendor_oui[3] __aligned(2);
 369                u8 vendor_ns;
 370                __le16 vendor_skip;
 371                u8 vendor_data[0];
 372        } __packed;
 373        struct vring_rx_desc *d = wil_skb_rxdesc(skb);
 374        struct wil6210_rtap_vendor *rtap_vendor;
 375        int rtap_len = sizeof(struct wil6210_rtap);
 376        int phy_length = 0; /* phy info header size, bytes */
 377        static char phy_data[128];
 378        struct ieee80211_channel *ch = wil->monitor_chandef.chan;
 379
 380        if (rtap_include_phy_info) {
 381                rtap_len = sizeof(*rtap_vendor) + sizeof(*d);
 382                /* calculate additional length */
 383                if (d->dma.status & RX_DMA_STATUS_PHY_INFO) {
 384                        /**
 385                         * PHY info starts from 8-byte boundary
 386                         * there are 8-byte lines, last line may be partially
 387                         * written (HW bug), thus FW configures for last line
 388                         * to be excessive. Driver skips this last line.
 389                         */
 390                        int len = min_t(int, 8 + sizeof(phy_data),
 391                                        wil_rxdesc_phy_length(d));
 392
 393                        if (len > 8) {
 394                                void *p = skb_tail_pointer(skb);
 395                                void *pa = PTR_ALIGN(p, 8);
 396
 397                                if (skb_tailroom(skb) >= len + (pa - p)) {
 398                                        phy_length = len - 8;
 399                                        memcpy(phy_data, pa, phy_length);
 400                                }
 401                        }
 402                }
 403                rtap_len += phy_length;
 404        }
 405
 406        if (skb_headroom(skb) < rtap_len &&
 407            pskb_expand_head(skb, rtap_len, 0, GFP_ATOMIC)) {
 408                wil_err(wil, "Unable to expand headroom to %d\n", rtap_len);
 409                return;
 410        }
 411
 412        rtap_vendor = skb_push(skb, rtap_len);
 413        memset(rtap_vendor, 0, rtap_len);
 414
 415        rtap_vendor->rtap.rthdr.it_version = PKTHDR_RADIOTAP_VERSION;
 416        rtap_vendor->rtap.rthdr.it_len = cpu_to_le16(rtap_len);
 417        rtap_vendor->rtap.rthdr.it_present = cpu_to_le32(
 418                        (1 << IEEE80211_RADIOTAP_FLAGS) |
 419                        (1 << IEEE80211_RADIOTAP_CHANNEL) |
 420                        (1 << IEEE80211_RADIOTAP_MCS));
 421        if (d->dma.status & RX_DMA_STATUS_ERROR)
 422                rtap_vendor->rtap.flags |= IEEE80211_RADIOTAP_F_BADFCS;
 423
 424        rtap_vendor->rtap.chnl_freq = cpu_to_le16(ch ? ch->center_freq : 58320);
 425        rtap_vendor->rtap.chnl_flags = cpu_to_le16(0);
 426
 427        rtap_vendor->rtap.mcs_present = IEEE80211_RADIOTAP_MCS_HAVE_MCS;
 428        rtap_vendor->rtap.mcs_flags = 0;
 429        rtap_vendor->rtap.mcs_index = wil_rxdesc_mcs(d);
 430
 431        if (rtap_include_phy_info) {
 432                rtap_vendor->rtap.rthdr.it_present |= cpu_to_le32(1 <<
 433                                IEEE80211_RADIOTAP_VENDOR_NAMESPACE);
 434                /* OUI for Wilocity 04:ce:14 */
 435                rtap_vendor->vendor_oui[0] = 0x04;
 436                rtap_vendor->vendor_oui[1] = 0xce;
 437                rtap_vendor->vendor_oui[2] = 0x14;
 438                rtap_vendor->vendor_ns = 1;
 439                /* Rx descriptor + PHY data  */
 440                rtap_vendor->vendor_skip = cpu_to_le16(sizeof(*d) +
 441                                                       phy_length);
 442                memcpy(rtap_vendor->vendor_data, (void *)d, sizeof(*d));
 443                memcpy(rtap_vendor->vendor_data + sizeof(*d), phy_data,
 444                       phy_length);
 445        }
 446}
 447
 448/* similar to ieee80211_ version, but FC contain only 1-st byte */
 449static inline int wil_is_back_req(u8 fc)
 450{
 451        return (fc & (IEEE80211_FCTL_FTYPE | IEEE80211_FCTL_STYPE)) ==
 452               (IEEE80211_FTYPE_CTL | IEEE80211_STYPE_BACK_REQ);
 453}
 454
 455bool wil_is_rx_idle(struct wil6210_priv *wil)
 456{
 457        struct vring_rx_desc *_d;
 458        struct vring *vring = &wil->vring_rx;
 459
 460        _d = (struct vring_rx_desc *)&vring->va[vring->swhead].rx;
 461        if (_d->dma.status & RX_DMA_STATUS_DU)
 462                return false;
 463
 464        return true;
 465}
 466
 467/**
 468 * reap 1 frame from @swhead
 469 *
 470 * Rx descriptor copied to skb->cb
 471 *
 472 * Safe to call from IRQ
 473 */
 474static struct sk_buff *wil_vring_reap_rx(struct wil6210_priv *wil,
 475                                         struct vring *vring)
 476{
 477        struct device *dev = wil_to_dev(wil);
 478        struct wil6210_vif *vif;
 479        struct net_device *ndev;
 480        volatile struct vring_rx_desc *_d;
 481        struct vring_rx_desc *d;
 482        struct sk_buff *skb;
 483        dma_addr_t pa;
 484        unsigned int snaplen = wil_rx_snaplen();
 485        unsigned int sz = wil->rx_buf_len + ETH_HLEN + snaplen;
 486        u16 dmalen;
 487        u8 ftype;
 488        int cid, mid;
 489        int i;
 490        struct wil_net_stats *stats;
 491
 492        BUILD_BUG_ON(sizeof(struct vring_rx_desc) > sizeof(skb->cb));
 493
 494again:
 495        if (unlikely(wil_vring_is_empty(vring)))
 496                return NULL;
 497
 498        i = (int)vring->swhead;
 499        _d = &vring->va[i].rx;
 500        if (unlikely(!(_d->dma.status & RX_DMA_STATUS_DU))) {
 501                /* it is not error, we just reached end of Rx done area */
 502                return NULL;
 503        }
 504
 505        skb = vring->ctx[i].skb;
 506        vring->ctx[i].skb = NULL;
 507        wil_vring_advance_head(vring, 1);
 508        if (!skb) {
 509                wil_err(wil, "No Rx skb at [%d]\n", i);
 510                goto again;
 511        }
 512        d = wil_skb_rxdesc(skb);
 513        *d = *_d;
 514        pa = wil_desc_addr(&d->dma.addr);
 515
 516        dma_unmap_single(dev, pa, sz, DMA_FROM_DEVICE);
 517        dmalen = le16_to_cpu(d->dma.length);
 518
 519        trace_wil6210_rx(i, d);
 520        wil_dbg_txrx(wil, "Rx[%3d] : %d bytes\n", i, dmalen);
 521        wil_hex_dump_txrx("RxD ", DUMP_PREFIX_NONE, 32, 4,
 522                          (const void *)d, sizeof(*d), false);
 523
 524        cid = wil_rxdesc_cid(d);
 525        mid = wil_rxdesc_mid(d);
 526        vif = wil->vifs[mid];
 527
 528        if (unlikely(!vif)) {
 529                wil_dbg_txrx(wil, "skipped RX descriptor with invalid mid %d",
 530                             mid);
 531                kfree_skb(skb);
 532                goto again;
 533        }
 534        ndev = vif_to_ndev(vif);
 535        stats = &wil->sta[cid].stats;
 536
 537        if (unlikely(dmalen > sz)) {
 538                wil_err(wil, "Rx size too large: %d bytes!\n", dmalen);
 539                stats->rx_large_frame++;
 540                kfree_skb(skb);
 541                goto again;
 542        }
 543        skb_trim(skb, dmalen);
 544
 545        prefetch(skb->data);
 546
 547        wil_hex_dump_txrx("Rx ", DUMP_PREFIX_OFFSET, 16, 1,
 548                          skb->data, skb_headlen(skb), false);
 549
 550        stats->last_mcs_rx = wil_rxdesc_mcs(d);
 551        if (stats->last_mcs_rx < ARRAY_SIZE(stats->rx_per_mcs))
 552                stats->rx_per_mcs[stats->last_mcs_rx]++;
 553
 554        /* use radiotap header only if required */
 555        if (ndev->type == ARPHRD_IEEE80211_RADIOTAP)
 556                wil_rx_add_radiotap_header(wil, skb);
 557
 558        /* no extra checks if in sniffer mode */
 559        if (ndev->type != ARPHRD_ETHER)
 560                return skb;
 561        /* Non-data frames may be delivered through Rx DMA channel (ex: BAR)
 562         * Driver should recognize it by frame type, that is found
 563         * in Rx descriptor. If type is not data, it is 802.11 frame as is
 564         */
 565        ftype = wil_rxdesc_ftype(d) << 2;
 566        if (unlikely(ftype != IEEE80211_FTYPE_DATA)) {
 567                u8 fc1 = wil_rxdesc_fc1(d);
 568                int tid = wil_rxdesc_tid(d);
 569                u16 seq = wil_rxdesc_seq(d);
 570
 571                wil_dbg_txrx(wil,
 572                             "Non-data frame FC[7:0] 0x%02x MID %d CID %d TID %d Seq 0x%03x\n",
 573                             fc1, mid, cid, tid, seq);
 574                stats->rx_non_data_frame++;
 575                if (wil_is_back_req(fc1)) {
 576                        wil_dbg_txrx(wil,
 577                                     "BAR: MID %d CID %d TID %d Seq 0x%03x\n",
 578                                     mid, cid, tid, seq);
 579                        wil_rx_bar(wil, vif, cid, tid, seq);
 580                } else {
 581                        /* print again all info. One can enable only this
 582                         * without overhead for printing every Rx frame
 583                         */
 584                        wil_dbg_txrx(wil,
 585                                     "Unhandled non-data frame FC[7:0] 0x%02x MID %d CID %d TID %d Seq 0x%03x\n",
 586                                     fc1, mid, cid, tid, seq);
 587                        wil_hex_dump_txrx("RxD ", DUMP_PREFIX_NONE, 32, 4,
 588                                          (const void *)d, sizeof(*d), false);
 589                        wil_hex_dump_txrx("Rx ", DUMP_PREFIX_OFFSET, 16, 1,
 590                                          skb->data, skb_headlen(skb), false);
 591                }
 592                kfree_skb(skb);
 593                goto again;
 594        }
 595
 596        if (unlikely(skb->len < ETH_HLEN + snaplen)) {
 597                wil_err(wil, "Short frame, len = %d\n", skb->len);
 598                stats->rx_short_frame++;
 599                kfree_skb(skb);
 600                goto again;
 601        }
 602
 603        /* L4 IDENT is on when HW calculated checksum, check status
 604         * and in case of error drop the packet
 605         * higher stack layers will handle retransmission (if required)
 606         */
 607        if (likely(d->dma.status & RX_DMA_STATUS_L4I)) {
 608                /* L4 protocol identified, csum calculated */
 609                if (likely((d->dma.error & RX_DMA_ERROR_L4_ERR) == 0))
 610                        skb->ip_summed = CHECKSUM_UNNECESSARY;
 611                /* If HW reports bad checksum, let IP stack re-check it
 612                 * For example, HW don't understand Microsoft IP stack that
 613                 * mis-calculates TCP checksum - if it should be 0x0,
 614                 * it writes 0xffff in violation of RFC 1624
 615                 */
 616        }
 617
 618        if (snaplen) {
 619                /* Packet layout
 620                 * +-------+-------+---------+------------+------+
 621                 * | SA(6) | DA(6) | SNAP(6) | ETHTYPE(2) | DATA |
 622                 * +-------+-------+---------+------------+------+
 623                 * Need to remove SNAP, shifting SA and DA forward
 624                 */
 625                memmove(skb->data + snaplen, skb->data, 2 * ETH_ALEN);
 626                skb_pull(skb, snaplen);
 627        }
 628
 629        return skb;
 630}
 631
 632/**
 633 * allocate and fill up to @count buffers in rx ring
 634 * buffers posted at @swtail
 635 * Note: we have a single RX queue for servicing all VIFs, but we
 636 * allocate skbs with headroom according to main interface only. This
 637 * means it will not work with monitor interface together with other VIFs.
 638 * Currently we only support monitor interface on its own without other VIFs,
 639 * and we will need to fix this code once we add support.
 640 */
 641static int wil_rx_refill(struct wil6210_priv *wil, int count)
 642{
 643        struct net_device *ndev = wil->main_ndev;
 644        struct vring *v = &wil->vring_rx;
 645        u32 next_tail;
 646        int rc = 0;
 647        int headroom = ndev->type == ARPHRD_IEEE80211_RADIOTAP ?
 648                        WIL6210_RTAP_SIZE : 0;
 649
 650        for (; next_tail = wil_vring_next_tail(v),
 651                        (next_tail != v->swhead) && (count-- > 0);
 652                        v->swtail = next_tail) {
 653                rc = wil_vring_alloc_skb(wil, v, v->swtail, headroom);
 654                if (unlikely(rc)) {
 655                        wil_err(wil, "Error %d in wil_rx_refill[%d]\n",
 656                                rc, v->swtail);
 657                        break;
 658                }
 659        }
 660
 661        /* make sure all writes to descriptors (shared memory) are done before
 662         * committing them to HW
 663         */
 664        wmb();
 665
 666        wil_w(wil, v->hwtail, v->swtail);
 667
 668        return rc;
 669}
 670
 671/**
 672 * reverse_memcmp - Compare two areas of memory, in reverse order
 673 * @cs: One area of memory
 674 * @ct: Another area of memory
 675 * @count: The size of the area.
 676 *
 677 * Cut'n'paste from original memcmp (see lib/string.c)
 678 * with minimal modifications
 679 */
 680static int reverse_memcmp(const void *cs, const void *ct, size_t count)
 681{
 682        const unsigned char *su1, *su2;
 683        int res = 0;
 684
 685        for (su1 = cs + count - 1, su2 = ct + count - 1; count > 0;
 686             --su1, --su2, count--) {
 687                res = *su1 - *su2;
 688                if (res)
 689                        break;
 690        }
 691        return res;
 692}
 693
 694static int wil_rx_crypto_check(struct wil6210_priv *wil, struct sk_buff *skb)
 695{
 696        struct vring_rx_desc *d = wil_skb_rxdesc(skb);
 697        int cid = wil_rxdesc_cid(d);
 698        int tid = wil_rxdesc_tid(d);
 699        int key_id = wil_rxdesc_key_id(d);
 700        int mc = wil_rxdesc_mcast(d);
 701        struct wil_sta_info *s = &wil->sta[cid];
 702        struct wil_tid_crypto_rx *c = mc ? &s->group_crypto_rx :
 703                                      &s->tid_crypto_rx[tid];
 704        struct wil_tid_crypto_rx_single *cc = &c->key_id[key_id];
 705        const u8 *pn = (u8 *)&d->mac.pn_15_0;
 706
 707        if (!cc->key_set) {
 708                wil_err_ratelimited(wil,
 709                                    "Key missing. CID %d TID %d MCast %d KEY_ID %d\n",
 710                                    cid, tid, mc, key_id);
 711                return -EINVAL;
 712        }
 713
 714        if (reverse_memcmp(pn, cc->pn, IEEE80211_GCMP_PN_LEN) <= 0) {
 715                wil_err_ratelimited(wil,
 716                                    "Replay attack. CID %d TID %d MCast %d KEY_ID %d PN %6phN last %6phN\n",
 717                                    cid, tid, mc, key_id, pn, cc->pn);
 718                return -EINVAL;
 719        }
 720        memcpy(cc->pn, pn, IEEE80211_GCMP_PN_LEN);
 721
 722        return 0;
 723}
 724
 725/*
 726 * Pass Rx packet to the netif. Update statistics.
 727 * Called in softirq context (NAPI poll).
 728 */
 729void wil_netif_rx_any(struct sk_buff *skb, struct net_device *ndev)
 730{
 731        gro_result_t rc = GRO_NORMAL;
 732        struct wil6210_vif *vif = ndev_to_vif(ndev);
 733        struct wil6210_priv *wil = ndev_to_wil(ndev);
 734        struct wireless_dev *wdev = vif_to_wdev(vif);
 735        unsigned int len = skb->len;
 736        struct vring_rx_desc *d = wil_skb_rxdesc(skb);
 737        int cid = wil_rxdesc_cid(d); /* always 0..7, no need to check */
 738        int security = wil_rxdesc_security(d);
 739        struct ethhdr *eth = (void *)skb->data;
 740        /* here looking for DA, not A1, thus Rxdesc's 'mcast' indication
 741         * is not suitable, need to look at data
 742         */
 743        int mcast = is_multicast_ether_addr(eth->h_dest);
 744        struct wil_net_stats *stats = &wil->sta[cid].stats;
 745        struct sk_buff *xmit_skb = NULL;
 746        static const char * const gro_res_str[] = {
 747                [GRO_MERGED]            = "GRO_MERGED",
 748                [GRO_MERGED_FREE]       = "GRO_MERGED_FREE",
 749                [GRO_HELD]              = "GRO_HELD",
 750                [GRO_NORMAL]            = "GRO_NORMAL",
 751                [GRO_DROP]              = "GRO_DROP",
 752        };
 753
 754        if (ndev->features & NETIF_F_RXHASH)
 755                /* fake L4 to ensure it won't be re-calculated later
 756                 * set hash to any non-zero value to activate rps
 757                 * mechanism, core will be chosen according
 758                 * to user-level rps configuration.
 759                 */
 760                skb_set_hash(skb, 1, PKT_HASH_TYPE_L4);
 761
 762        skb_orphan(skb);
 763
 764        if (security && (wil_rx_crypto_check(wil, skb) != 0)) {
 765                rc = GRO_DROP;
 766                dev_kfree_skb(skb);
 767                stats->rx_replay++;
 768                goto stats;
 769        }
 770
 771        if (wdev->iftype == NL80211_IFTYPE_AP && !vif->ap_isolate) {
 772                if (mcast) {
 773                        /* send multicast frames both to higher layers in
 774                         * local net stack and back to the wireless medium
 775                         */
 776                        xmit_skb = skb_copy(skb, GFP_ATOMIC);
 777                } else {
 778                        int xmit_cid = wil_find_cid(wil, vif->mid,
 779                                                    eth->h_dest);
 780
 781                        if (xmit_cid >= 0) {
 782                                /* The destination station is associated to
 783                                 * this AP (in this VLAN), so send the frame
 784                                 * directly to it and do not pass it to local
 785                                 * net stack.
 786                                 */
 787                                xmit_skb = skb;
 788                                skb = NULL;
 789                        }
 790                }
 791        }
 792        if (xmit_skb) {
 793                /* Send to wireless media and increase priority by 256 to
 794                 * keep the received priority instead of reclassifying
 795                 * the frame (see cfg80211_classify8021d).
 796                 */
 797                xmit_skb->dev = ndev;
 798                xmit_skb->priority += 256;
 799                xmit_skb->protocol = htons(ETH_P_802_3);
 800                skb_reset_network_header(xmit_skb);
 801                skb_reset_mac_header(xmit_skb);
 802                wil_dbg_txrx(wil, "Rx -> Tx %d bytes\n", len);
 803                dev_queue_xmit(xmit_skb);
 804        }
 805
 806        if (skb) { /* deliver to local stack */
 807                skb->protocol = eth_type_trans(skb, ndev);
 808                skb->dev = ndev;
 809                rc = napi_gro_receive(&wil->napi_rx, skb);
 810                wil_dbg_txrx(wil, "Rx complete %d bytes => %s\n",
 811                             len, gro_res_str[rc]);
 812        }
 813stats:
 814        /* statistics. rc set to GRO_NORMAL for AP bridging */
 815        if (unlikely(rc == GRO_DROP)) {
 816                ndev->stats.rx_dropped++;
 817                stats->rx_dropped++;
 818                wil_dbg_txrx(wil, "Rx drop %d bytes\n", len);
 819        } else {
 820                ndev->stats.rx_packets++;
 821                stats->rx_packets++;
 822                ndev->stats.rx_bytes += len;
 823                stats->rx_bytes += len;
 824                if (mcast)
 825                        ndev->stats.multicast++;
 826        }
 827}
 828
 829/**
 830 * Proceed all completed skb's from Rx VRING
 831 *
 832 * Safe to call from NAPI poll, i.e. softirq with interrupts enabled
 833 */
 834void wil_rx_handle(struct wil6210_priv *wil, int *quota)
 835{
 836        struct net_device *ndev = wil->main_ndev;
 837        struct wireless_dev *wdev = ndev->ieee80211_ptr;
 838        struct vring *v = &wil->vring_rx;
 839        struct sk_buff *skb;
 840
 841        if (unlikely(!v->va)) {
 842                wil_err(wil, "Rx IRQ while Rx not yet initialized\n");
 843                return;
 844        }
 845        wil_dbg_txrx(wil, "rx_handle\n");
 846        while ((*quota > 0) && (NULL != (skb = wil_vring_reap_rx(wil, v)))) {
 847                (*quota)--;
 848
 849                /* monitor is currently supported on main interface only */
 850                if (wdev->iftype == NL80211_IFTYPE_MONITOR) {
 851                        skb->dev = ndev;
 852                        skb_reset_mac_header(skb);
 853                        skb->ip_summed = CHECKSUM_UNNECESSARY;
 854                        skb->pkt_type = PACKET_OTHERHOST;
 855                        skb->protocol = htons(ETH_P_802_2);
 856                        wil_netif_rx_any(skb, ndev);
 857                } else {
 858                        wil_rx_reorder(wil, skb);
 859                }
 860        }
 861        wil_rx_refill(wil, v->size);
 862}
 863
 864static void wil_rx_buf_len_init(struct wil6210_priv *wil)
 865{
 866        wil->rx_buf_len = rx_large_buf ?
 867                WIL_MAX_ETH_MTU : TXRX_BUF_LEN_DEFAULT - WIL_MAX_MPDU_OVERHEAD;
 868        if (mtu_max > wil->rx_buf_len) {
 869                /* do not allow RX buffers to be smaller than mtu_max, for
 870                 * backward compatibility (mtu_max parameter was also used
 871                 * to support receiving large packets)
 872                 */
 873                wil_info(wil, "Override RX buffer to mtu_max(%d)\n", mtu_max);
 874                wil->rx_buf_len = mtu_max;
 875        }
 876}
 877
 878int wil_rx_init(struct wil6210_priv *wil, u16 size)
 879{
 880        struct vring *vring = &wil->vring_rx;
 881        int rc;
 882
 883        wil_dbg_misc(wil, "rx_init\n");
 884
 885        if (vring->va) {
 886                wil_err(wil, "Rx ring already allocated\n");
 887                return -EINVAL;
 888        }
 889
 890        wil_rx_buf_len_init(wil);
 891
 892        vring->size = size;
 893        rc = wil_vring_alloc(wil, vring);
 894        if (rc)
 895                return rc;
 896
 897        rc = wmi_rx_chain_add(wil, vring);
 898        if (rc)
 899                goto err_free;
 900
 901        rc = wil_rx_refill(wil, vring->size);
 902        if (rc)
 903                goto err_free;
 904
 905        return 0;
 906 err_free:
 907        wil_vring_free(wil, vring, 0);
 908
 909        return rc;
 910}
 911
 912void wil_rx_fini(struct wil6210_priv *wil)
 913{
 914        struct vring *vring = &wil->vring_rx;
 915
 916        wil_dbg_misc(wil, "rx_fini\n");
 917
 918        if (vring->va)
 919                wil_vring_free(wil, vring, 0);
 920}
 921
 922static inline void wil_tx_data_init(struct vring_tx_data *txdata)
 923{
 924        spin_lock_bh(&txdata->lock);
 925        txdata->dot1x_open = 0;
 926        txdata->enabled = 0;
 927        txdata->idle = 0;
 928        txdata->last_idle = 0;
 929        txdata->begin = 0;
 930        txdata->agg_wsize = 0;
 931        txdata->agg_timeout = 0;
 932        txdata->agg_amsdu = 0;
 933        txdata->addba_in_progress = false;
 934        txdata->mid = U8_MAX;
 935        spin_unlock_bh(&txdata->lock);
 936}
 937
 938int wil_vring_init_tx(struct wil6210_vif *vif, int id, int size,
 939                      int cid, int tid)
 940{
 941        struct wil6210_priv *wil = vif_to_wil(vif);
 942        int rc;
 943        struct wmi_vring_cfg_cmd cmd = {
 944                .action = cpu_to_le32(WMI_VRING_CMD_ADD),
 945                .vring_cfg = {
 946                        .tx_sw_ring = {
 947                                .max_mpdu_size =
 948                                        cpu_to_le16(wil_mtu2macbuf(mtu_max)),
 949                                .ring_size = cpu_to_le16(size),
 950                        },
 951                        .ringid = id,
 952                        .cidxtid = mk_cidxtid(cid, tid),
 953                        .encap_trans_type = WMI_VRING_ENC_TYPE_802_3,
 954                        .mac_ctrl = 0,
 955                        .to_resolution = 0,
 956                        .agg_max_wsize = 0,
 957                        .schd_params = {
 958                                .priority = cpu_to_le16(0),
 959                                .timeslot_us = cpu_to_le16(0xfff),
 960                        },
 961                },
 962        };
 963        struct {
 964                struct wmi_cmd_hdr wmi;
 965                struct wmi_vring_cfg_done_event cmd;
 966        } __packed reply;
 967        struct vring *vring = &wil->vring_tx[id];
 968        struct vring_tx_data *txdata = &wil->vring_tx_data[id];
 969
 970        wil_dbg_misc(wil, "vring_init_tx: max_mpdu_size %d\n",
 971                     cmd.vring_cfg.tx_sw_ring.max_mpdu_size);
 972        lockdep_assert_held(&wil->mutex);
 973
 974        if (vring->va) {
 975                wil_err(wil, "Tx ring [%d] already allocated\n", id);
 976                rc = -EINVAL;
 977                goto out;
 978        }
 979
 980        wil_tx_data_init(txdata);
 981        vring->size = size;
 982        rc = wil_vring_alloc(wil, vring);
 983        if (rc)
 984                goto out;
 985
 986        wil->vring2cid_tid[id][0] = cid;
 987        wil->vring2cid_tid[id][1] = tid;
 988
 989        cmd.vring_cfg.tx_sw_ring.ring_mem_base = cpu_to_le64(vring->pa);
 990
 991        if (!vif->privacy)
 992                txdata->dot1x_open = true;
 993        rc = wmi_call(wil, WMI_VRING_CFG_CMDID, vif->mid, &cmd, sizeof(cmd),
 994                      WMI_VRING_CFG_DONE_EVENTID, &reply, sizeof(reply), 100);
 995        if (rc)
 996                goto out_free;
 997
 998        if (reply.cmd.status != WMI_FW_STATUS_SUCCESS) {
 999                wil_err(wil, "Tx config failed, status 0x%02x\n",
1000                        reply.cmd.status);
1001                rc = -EINVAL;
1002                goto out_free;
1003        }
1004
1005        spin_lock_bh(&txdata->lock);
1006        vring->hwtail = le32_to_cpu(reply.cmd.tx_vring_tail_ptr);
1007        txdata->mid = vif->mid;
1008        txdata->enabled = 1;
1009        spin_unlock_bh(&txdata->lock);
1010
1011        if (txdata->dot1x_open && (agg_wsize >= 0))
1012                wil_addba_tx_request(wil, id, agg_wsize);
1013
1014        return 0;
1015 out_free:
1016        spin_lock_bh(&txdata->lock);
1017        txdata->dot1x_open = false;
1018        txdata->enabled = 0;
1019        spin_unlock_bh(&txdata->lock);
1020        wil_vring_free(wil, vring, 1);
1021        wil->vring2cid_tid[id][0] = WIL6210_MAX_CID;
1022        wil->vring2cid_tid[id][1] = 0;
1023
1024 out:
1025
1026        return rc;
1027}
1028
1029int wil_vring_init_bcast(struct wil6210_vif *vif, int id, int size)
1030{
1031        struct wil6210_priv *wil = vif_to_wil(vif);
1032        int rc;
1033        struct wmi_bcast_vring_cfg_cmd cmd = {
1034                .action = cpu_to_le32(WMI_VRING_CMD_ADD),
1035                .vring_cfg = {
1036                        .tx_sw_ring = {
1037                                .max_mpdu_size =
1038                                        cpu_to_le16(wil_mtu2macbuf(mtu_max)),
1039                                .ring_size = cpu_to_le16(size),
1040                        },
1041                        .ringid = id,
1042                        .encap_trans_type = WMI_VRING_ENC_TYPE_802_3,
1043                },
1044        };
1045        struct {
1046                struct wmi_cmd_hdr wmi;
1047                struct wmi_vring_cfg_done_event cmd;
1048        } __packed reply;
1049        struct vring *vring = &wil->vring_tx[id];
1050        struct vring_tx_data *txdata = &wil->vring_tx_data[id];
1051
1052        wil_dbg_misc(wil, "vring_init_bcast: max_mpdu_size %d\n",
1053                     cmd.vring_cfg.tx_sw_ring.max_mpdu_size);
1054        lockdep_assert_held(&wil->mutex);
1055
1056        if (vring->va) {
1057                wil_err(wil, "Tx ring [%d] already allocated\n", id);
1058                rc = -EINVAL;
1059                goto out;
1060        }
1061
1062        wil_tx_data_init(txdata);
1063        vring->size = size;
1064        rc = wil_vring_alloc(wil, vring);
1065        if (rc)
1066                goto out;
1067
1068        wil->vring2cid_tid[id][0] = WIL6210_MAX_CID; /* CID */
1069        wil->vring2cid_tid[id][1] = 0; /* TID */
1070
1071        cmd.vring_cfg.tx_sw_ring.ring_mem_base = cpu_to_le64(vring->pa);
1072
1073        if (!vif->privacy)
1074                txdata->dot1x_open = true;
1075        rc = wmi_call(wil, WMI_BCAST_VRING_CFG_CMDID, vif->mid,
1076                      &cmd, sizeof(cmd),
1077                      WMI_VRING_CFG_DONE_EVENTID, &reply, sizeof(reply), 100);
1078        if (rc)
1079                goto out_free;
1080
1081        if (reply.cmd.status != WMI_FW_STATUS_SUCCESS) {
1082                wil_err(wil, "Tx config failed, status 0x%02x\n",
1083                        reply.cmd.status);
1084                rc = -EINVAL;
1085                goto out_free;
1086        }
1087
1088        spin_lock_bh(&txdata->lock);
1089        vring->hwtail = le32_to_cpu(reply.cmd.tx_vring_tail_ptr);
1090        txdata->mid = vif->mid;
1091        txdata->enabled = 1;
1092        spin_unlock_bh(&txdata->lock);
1093
1094        return 0;
1095 out_free:
1096        spin_lock_bh(&txdata->lock);
1097        txdata->enabled = 0;
1098        txdata->dot1x_open = false;
1099        spin_unlock_bh(&txdata->lock);
1100        wil_vring_free(wil, vring, 1);
1101 out:
1102
1103        return rc;
1104}
1105
1106void wil_vring_fini_tx(struct wil6210_priv *wil, int id)
1107{
1108        struct vring *vring = &wil->vring_tx[id];
1109        struct vring_tx_data *txdata = &wil->vring_tx_data[id];
1110
1111        lockdep_assert_held(&wil->mutex);
1112
1113        if (!vring->va)
1114                return;
1115
1116        wil_dbg_misc(wil, "vring_fini_tx: id=%d\n", id);
1117
1118        spin_lock_bh(&txdata->lock);
1119        txdata->dot1x_open = false;
1120        txdata->mid = U8_MAX;
1121        txdata->enabled = 0; /* no Tx can be in progress or start anew */
1122        spin_unlock_bh(&txdata->lock);
1123        /* napi_synchronize waits for completion of the current NAPI but will
1124         * not prevent the next NAPI run.
1125         * Add a memory barrier to guarantee that txdata->enabled is zeroed
1126         * before napi_synchronize so that the next scheduled NAPI will not
1127         * handle this vring
1128         */
1129        wmb();
1130        /* make sure NAPI won't touch this vring */
1131        if (test_bit(wil_status_napi_en, wil->status))
1132                napi_synchronize(&wil->napi_tx);
1133
1134        wil_vring_free(wil, vring, 1);
1135}
1136
1137static struct vring *wil_find_tx_ucast(struct wil6210_priv *wil,
1138                                       struct wil6210_vif *vif,
1139                                       struct sk_buff *skb)
1140{
1141        int i;
1142        struct ethhdr *eth = (void *)skb->data;
1143        int cid = wil_find_cid(wil, vif->mid, eth->h_dest);
1144
1145        if (cid < 0)
1146                return NULL;
1147
1148        /* TODO: fix for multiple TID */
1149        for (i = 0; i < ARRAY_SIZE(wil->vring2cid_tid); i++) {
1150                if (!wil->vring_tx_data[i].dot1x_open &&
1151                    (skb->protocol != cpu_to_be16(ETH_P_PAE)))
1152                        continue;
1153                if (wil->vring2cid_tid[i][0] == cid) {
1154                        struct vring *v = &wil->vring_tx[i];
1155                        struct vring_tx_data *txdata = &wil->vring_tx_data[i];
1156
1157                        wil_dbg_txrx(wil, "find_tx_ucast: (%pM) -> [%d]\n",
1158                                     eth->h_dest, i);
1159                        if (v->va && txdata->enabled) {
1160                                return v;
1161                        } else {
1162                                wil_dbg_txrx(wil,
1163                                             "find_tx_ucast: vring[%d] not valid\n",
1164                                             i);
1165                                return NULL;
1166                        }
1167                }
1168        }
1169
1170        return NULL;
1171}
1172
1173static int wil_tx_vring(struct wil6210_priv *wil, struct wil6210_vif *vif,
1174                        struct vring *vring, struct sk_buff *skb);
1175
1176static struct vring *wil_find_tx_vring_sta(struct wil6210_priv *wil,
1177                                           struct wil6210_vif *vif,
1178                                           struct sk_buff *skb)
1179{
1180        struct vring *v;
1181        int i;
1182        u8 cid;
1183        struct vring_tx_data *txdata;
1184
1185        /* In the STA mode, it is expected to have only 1 VRING
1186         * for the AP we connected to.
1187         * find 1-st vring eligible for this skb and use it.
1188         */
1189        for (i = 0; i < WIL6210_MAX_TX_RINGS; i++) {
1190                v = &wil->vring_tx[i];
1191                txdata = &wil->vring_tx_data[i];
1192                if (!v->va || !txdata->enabled || txdata->mid != vif->mid)
1193                        continue;
1194
1195                cid = wil->vring2cid_tid[i][0];
1196                if (cid >= WIL6210_MAX_CID) /* skip BCAST */
1197                        continue;
1198
1199                if (!wil->vring_tx_data[i].dot1x_open &&
1200                    (skb->protocol != cpu_to_be16(ETH_P_PAE)))
1201                        continue;
1202
1203                wil_dbg_txrx(wil, "Tx -> ring %d\n", i);
1204
1205                return v;
1206        }
1207
1208        wil_dbg_txrx(wil, "Tx while no vrings active?\n");
1209
1210        return NULL;
1211}
1212
1213/* Use one of 2 strategies:
1214 *
1215 * 1. New (real broadcast):
1216 *    use dedicated broadcast vring
1217 * 2. Old (pseudo-DMS):
1218 *    Find 1-st vring and return it;
1219 *    duplicate skb and send it to other active vrings;
1220 *    in all cases override dest address to unicast peer's address
1221 * Use old strategy when new is not supported yet:
1222 *  - for PBSS
1223 */
1224static struct vring *wil_find_tx_bcast_1(struct wil6210_priv *wil,
1225                                         struct wil6210_vif *vif,
1226                                         struct sk_buff *skb)
1227{
1228        struct vring *v;
1229        struct vring_tx_data *txdata;
1230        int i = vif->bcast_vring;
1231
1232        if (i < 0)
1233                return NULL;
1234        v = &wil->vring_tx[i];
1235        txdata = &wil->vring_tx_data[i];
1236        if (!v->va || !txdata->enabled)
1237                return NULL;
1238        if (!wil->vring_tx_data[i].dot1x_open &&
1239            (skb->protocol != cpu_to_be16(ETH_P_PAE)))
1240                return NULL;
1241
1242        return v;
1243}
1244
1245static void wil_set_da_for_vring(struct wil6210_priv *wil,
1246                                 struct sk_buff *skb, int vring_index)
1247{
1248        struct ethhdr *eth = (void *)skb->data;
1249        int cid = wil->vring2cid_tid[vring_index][0];
1250
1251        ether_addr_copy(eth->h_dest, wil->sta[cid].addr);
1252}
1253
1254static struct vring *wil_find_tx_bcast_2(struct wil6210_priv *wil,
1255                                         struct wil6210_vif *vif,
1256                                         struct sk_buff *skb)
1257{
1258        struct vring *v, *v2;
1259        struct sk_buff *skb2;
1260        int i;
1261        u8 cid;
1262        struct ethhdr *eth = (void *)skb->data;
1263        char *src = eth->h_source;
1264        struct vring_tx_data *txdata, *txdata2;
1265
1266        /* find 1-st vring eligible for data */
1267        for (i = 0; i < WIL6210_MAX_TX_RINGS; i++) {
1268                v = &wil->vring_tx[i];
1269                txdata = &wil->vring_tx_data[i];
1270                if (!v->va || !txdata->enabled || txdata->mid != vif->mid)
1271                        continue;
1272
1273                cid = wil->vring2cid_tid[i][0];
1274                if (cid >= WIL6210_MAX_CID) /* skip BCAST */
1275                        continue;
1276                if (!wil->vring_tx_data[i].dot1x_open &&
1277                    (skb->protocol != cpu_to_be16(ETH_P_PAE)))
1278                        continue;
1279
1280                /* don't Tx back to source when re-routing Rx->Tx at the AP */
1281                if (0 == memcmp(wil->sta[cid].addr, src, ETH_ALEN))
1282                        continue;
1283
1284                goto found;
1285        }
1286
1287        wil_dbg_txrx(wil, "Tx while no vrings active?\n");
1288
1289        return NULL;
1290
1291found:
1292        wil_dbg_txrx(wil, "BCAST -> ring %d\n", i);
1293        wil_set_da_for_vring(wil, skb, i);
1294
1295        /* find other active vrings and duplicate skb for each */
1296        for (i++; i < WIL6210_MAX_TX_RINGS; i++) {
1297                v2 = &wil->vring_tx[i];
1298                txdata2 = &wil->vring_tx_data[i];
1299                if (!v2->va || txdata2->mid != vif->mid)
1300                        continue;
1301                cid = wil->vring2cid_tid[i][0];
1302                if (cid >= WIL6210_MAX_CID) /* skip BCAST */
1303                        continue;
1304                if (!wil->vring_tx_data[i].dot1x_open &&
1305                    (skb->protocol != cpu_to_be16(ETH_P_PAE)))
1306                        continue;
1307
1308                if (0 == memcmp(wil->sta[cid].addr, src, ETH_ALEN))
1309                        continue;
1310
1311                skb2 = skb_copy(skb, GFP_ATOMIC);
1312                if (skb2) {
1313                        wil_dbg_txrx(wil, "BCAST DUP -> ring %d\n", i);
1314                        wil_set_da_for_vring(wil, skb2, i);
1315                        wil_tx_vring(wil, vif, v2, skb2);
1316                } else {
1317                        wil_err(wil, "skb_copy failed\n");
1318                }
1319        }
1320
1321        return v;
1322}
1323
1324static int wil_tx_desc_map(struct vring_tx_desc *d, dma_addr_t pa, u32 len,
1325                           int vring_index)
1326{
1327        wil_desc_addr_set(&d->dma.addr, pa);
1328        d->dma.ip_length = 0;
1329        /* 0..6: mac_length; 7:ip_version 0-IP6 1-IP4*/
1330        d->dma.b11 = 0/*14 | BIT(7)*/;
1331        d->dma.error = 0;
1332        d->dma.status = 0; /* BIT(0) should be 0 for HW_OWNED */
1333        d->dma.length = cpu_to_le16((u16)len);
1334        d->dma.d0 = (vring_index << DMA_CFG_DESC_TX_0_QID_POS);
1335        d->mac.d[0] = 0;
1336        d->mac.d[1] = 0;
1337        d->mac.d[2] = 0;
1338        d->mac.ucode_cmd = 0;
1339        /* translation type:  0 - bypass; 1 - 802.3; 2 - native wifi */
1340        d->mac.d[2] = BIT(MAC_CFG_DESC_TX_2_SNAP_HDR_INSERTION_EN_POS) |
1341                      (1 << MAC_CFG_DESC_TX_2_L2_TRANSLATION_TYPE_POS);
1342
1343        return 0;
1344}
1345
1346static inline
1347void wil_tx_desc_set_nr_frags(struct vring_tx_desc *d, int nr_frags)
1348{
1349        d->mac.d[2] |= (nr_frags << MAC_CFG_DESC_TX_2_NUM_OF_DESCRIPTORS_POS);
1350}
1351
1352/**
1353 * Sets the descriptor @d up for csum and/or TSO offloading. The corresponding
1354 * @skb is used to obtain the protocol and headers length.
1355 * @tso_desc_type is a descriptor type for TSO: 0 - a header, 1 - first data,
1356 * 2 - middle, 3 - last descriptor.
1357 */
1358
1359static void wil_tx_desc_offload_setup_tso(struct vring_tx_desc *d,
1360                                          struct sk_buff *skb,
1361                                          int tso_desc_type, bool is_ipv4,
1362                                          int tcp_hdr_len, int skb_net_hdr_len)
1363{
1364        d->dma.b11 = ETH_HLEN; /* MAC header length */
1365        d->dma.b11 |= is_ipv4 << DMA_CFG_DESC_TX_OFFLOAD_CFG_L3T_IPV4_POS;
1366
1367        d->dma.d0 |= (2 << DMA_CFG_DESC_TX_0_L4_TYPE_POS);
1368        /* L4 header len: TCP header length */
1369        d->dma.d0 |= (tcp_hdr_len & DMA_CFG_DESC_TX_0_L4_LENGTH_MSK);
1370
1371        /* Setup TSO: bit and desc type */
1372        d->dma.d0 |= (BIT(DMA_CFG_DESC_TX_0_TCP_SEG_EN_POS)) |
1373                (tso_desc_type << DMA_CFG_DESC_TX_0_SEGMENT_BUF_DETAILS_POS);
1374        d->dma.d0 |= (is_ipv4 << DMA_CFG_DESC_TX_0_IPV4_CHECKSUM_EN_POS);
1375
1376        d->dma.ip_length = skb_net_hdr_len;
1377        /* Enable TCP/UDP checksum */
1378        d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_TCP_UDP_CHECKSUM_EN_POS);
1379        /* Calculate pseudo-header */
1380        d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_PSEUDO_HEADER_CALC_EN_POS);
1381}
1382
1383/**
1384 * Sets the descriptor @d up for csum. The corresponding
1385 * @skb is used to obtain the protocol and headers length.
1386 * Returns the protocol: 0 - not TCP, 1 - TCPv4, 2 - TCPv6.
1387 * Note, if d==NULL, the function only returns the protocol result.
1388 *
1389 * It is very similar to previous wil_tx_desc_offload_setup_tso. This
1390 * is "if unrolling" to optimize the critical path.
1391 */
1392
1393static int wil_tx_desc_offload_setup(struct vring_tx_desc *d,
1394                                     struct sk_buff *skb){
1395        int protocol;
1396
1397        if (skb->ip_summed != CHECKSUM_PARTIAL)
1398                return 0;
1399
1400        d->dma.b11 = ETH_HLEN; /* MAC header length */
1401
1402        switch (skb->protocol) {
1403        case cpu_to_be16(ETH_P_IP):
1404                protocol = ip_hdr(skb)->protocol;
1405                d->dma.b11 |= BIT(DMA_CFG_DESC_TX_OFFLOAD_CFG_L3T_IPV4_POS);
1406                break;
1407        case cpu_to_be16(ETH_P_IPV6):
1408                protocol = ipv6_hdr(skb)->nexthdr;
1409                break;
1410        default:
1411                return -EINVAL;
1412        }
1413
1414        switch (protocol) {
1415        case IPPROTO_TCP:
1416                d->dma.d0 |= (2 << DMA_CFG_DESC_TX_0_L4_TYPE_POS);
1417                /* L4 header len: TCP header length */
1418                d->dma.d0 |=
1419                (tcp_hdrlen(skb) & DMA_CFG_DESC_TX_0_L4_LENGTH_MSK);
1420                break;
1421        case IPPROTO_UDP:
1422                /* L4 header len: UDP header length */
1423                d->dma.d0 |=
1424                (sizeof(struct udphdr) & DMA_CFG_DESC_TX_0_L4_LENGTH_MSK);
1425                break;
1426        default:
1427                return -EINVAL;
1428        }
1429
1430        d->dma.ip_length = skb_network_header_len(skb);
1431        /* Enable TCP/UDP checksum */
1432        d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_TCP_UDP_CHECKSUM_EN_POS);
1433        /* Calculate pseudo-header */
1434        d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_PSEUDO_HEADER_CALC_EN_POS);
1435
1436        return 0;
1437}
1438
1439static inline void wil_tx_last_desc(struct vring_tx_desc *d)
1440{
1441        d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_EOP_POS) |
1442              BIT(DMA_CFG_DESC_TX_0_CMD_MARK_WB_POS) |
1443              BIT(DMA_CFG_DESC_TX_0_CMD_DMA_IT_POS);
1444}
1445
1446static inline void wil_set_tx_desc_last_tso(volatile struct vring_tx_desc *d)
1447{
1448        d->dma.d0 |= wil_tso_type_lst <<
1449                  DMA_CFG_DESC_TX_0_SEGMENT_BUF_DETAILS_POS;
1450}
1451
1452static int __wil_tx_vring_tso(struct wil6210_priv *wil, struct wil6210_vif *vif,
1453                              struct vring *vring, struct sk_buff *skb)
1454{
1455        struct device *dev = wil_to_dev(wil);
1456
1457        /* point to descriptors in shared memory */
1458        volatile struct vring_tx_desc *_desc = NULL, *_hdr_desc,
1459                                      *_first_desc = NULL;
1460
1461        /* pointers to shadow descriptors */
1462        struct vring_tx_desc desc_mem, hdr_desc_mem, first_desc_mem,
1463                             *d = &hdr_desc_mem, *hdr_desc = &hdr_desc_mem,
1464                             *first_desc = &first_desc_mem;
1465
1466        /* pointer to shadow descriptors' context */
1467        struct wil_ctx *hdr_ctx, *first_ctx = NULL;
1468
1469        int descs_used = 0; /* total number of used descriptors */
1470        int sg_desc_cnt = 0; /* number of descriptors for current mss*/
1471
1472        u32 swhead = vring->swhead;
1473        int used, avail = wil_vring_avail_tx(vring);
1474        int nr_frags = skb_shinfo(skb)->nr_frags;
1475        int min_desc_required = nr_frags + 1;
1476        int mss = skb_shinfo(skb)->gso_size;    /* payload size w/o headers */
1477        int f, len, hdrlen, headlen;
1478        int vring_index = vring - wil->vring_tx;
1479        struct vring_tx_data *txdata = &wil->vring_tx_data[vring_index];
1480        uint i = swhead;
1481        dma_addr_t pa;
1482        const skb_frag_t *frag = NULL;
1483        int rem_data = mss;
1484        int lenmss;
1485        int hdr_compensation_need = true;
1486        int desc_tso_type = wil_tso_type_first;
1487        bool is_ipv4;
1488        int tcp_hdr_len;
1489        int skb_net_hdr_len;
1490        int gso_type;
1491        int rc = -EINVAL;
1492
1493        wil_dbg_txrx(wil, "tx_vring_tso: %d bytes to vring %d\n", skb->len,
1494                     vring_index);
1495
1496        if (unlikely(!txdata->enabled))
1497                return -EINVAL;
1498
1499        /* A typical page 4K is 3-4 payloads, we assume each fragment
1500         * is a full payload, that's how min_desc_required has been
1501         * calculated. In real we might need more or less descriptors,
1502         * this is the initial check only.
1503         */
1504        if (unlikely(avail < min_desc_required)) {
1505                wil_err_ratelimited(wil,
1506                                    "TSO: Tx ring[%2d] full. No space for %d fragments\n",
1507                                    vring_index, min_desc_required);
1508                return -ENOMEM;
1509        }
1510
1511        /* Header Length = MAC header len + IP header len + TCP header len*/
1512        hdrlen = ETH_HLEN +
1513                (int)skb_network_header_len(skb) +
1514                tcp_hdrlen(skb);
1515
1516        gso_type = skb_shinfo(skb)->gso_type & (SKB_GSO_TCPV6 | SKB_GSO_TCPV4);
1517        switch (gso_type) {
1518        case SKB_GSO_TCPV4:
1519                /* TCP v4, zero out the IP length and IPv4 checksum fields
1520                 * as required by the offloading doc
1521                 */
1522                ip_hdr(skb)->tot_len = 0;
1523                ip_hdr(skb)->check = 0;
1524                is_ipv4 = true;
1525                break;
1526        case SKB_GSO_TCPV6:
1527                /* TCP v6, zero out the payload length */
1528                ipv6_hdr(skb)->payload_len = 0;
1529                is_ipv4 = false;
1530                break;
1531        default:
1532                /* other than TCPv4 or TCPv6 types are not supported for TSO.
1533                 * It is also illegal for both to be set simultaneously
1534                 */
1535                return -EINVAL;
1536        }
1537
1538        if (skb->ip_summed != CHECKSUM_PARTIAL)
1539                return -EINVAL;
1540
1541        /* tcp header length and skb network header length are fixed for all
1542         * packet's descriptors - read then once here
1543         */
1544        tcp_hdr_len = tcp_hdrlen(skb);
1545        skb_net_hdr_len = skb_network_header_len(skb);
1546
1547        _hdr_desc = &vring->va[i].tx;
1548
1549        pa = dma_map_single(dev, skb->data, hdrlen, DMA_TO_DEVICE);
1550        if (unlikely(dma_mapping_error(dev, pa))) {
1551                wil_err(wil, "TSO: Skb head DMA map error\n");
1552                goto err_exit;
1553        }
1554
1555        wil_tx_desc_map(hdr_desc, pa, hdrlen, vring_index);
1556        wil_tx_desc_offload_setup_tso(hdr_desc, skb, wil_tso_type_hdr, is_ipv4,
1557                                      tcp_hdr_len, skb_net_hdr_len);
1558        wil_tx_last_desc(hdr_desc);
1559
1560        vring->ctx[i].mapped_as = wil_mapped_as_single;
1561        hdr_ctx = &vring->ctx[i];
1562
1563        descs_used++;
1564        headlen = skb_headlen(skb) - hdrlen;
1565
1566        for (f = headlen ? -1 : 0; f < nr_frags; f++)  {
1567                if (headlen) {
1568                        len = headlen;
1569                        wil_dbg_txrx(wil, "TSO: process skb head, len %u\n",
1570                                     len);
1571                } else {
1572                        frag = &skb_shinfo(skb)->frags[f];
1573                        len = frag->size;
1574                        wil_dbg_txrx(wil, "TSO: frag[%d]: len %u\n", f, len);
1575                }
1576
1577                while (len) {
1578                        wil_dbg_txrx(wil,
1579                                     "TSO: len %d, rem_data %d, descs_used %d\n",
1580                                     len, rem_data, descs_used);
1581
1582                        if (descs_used == avail)  {
1583                                wil_err_ratelimited(wil, "TSO: ring overflow\n");
1584                                rc = -ENOMEM;
1585                                goto mem_error;
1586                        }
1587
1588                        lenmss = min_t(int, rem_data, len);
1589                        i = (swhead + descs_used) % vring->size;
1590                        wil_dbg_txrx(wil, "TSO: lenmss %d, i %d\n", lenmss, i);
1591
1592                        if (!headlen) {
1593                                pa = skb_frag_dma_map(dev, frag,
1594                                                      frag->size - len, lenmss,
1595                                                      DMA_TO_DEVICE);
1596                                vring->ctx[i].mapped_as = wil_mapped_as_page;
1597                        } else {
1598                                pa = dma_map_single(dev,
1599                                                    skb->data +
1600                                                    skb_headlen(skb) - headlen,
1601                                                    lenmss,
1602                                                    DMA_TO_DEVICE);
1603                                vring->ctx[i].mapped_as = wil_mapped_as_single;
1604                                headlen -= lenmss;
1605                        }
1606
1607                        if (unlikely(dma_mapping_error(dev, pa))) {
1608                                wil_err(wil, "TSO: DMA map page error\n");
1609                                goto mem_error;
1610                        }
1611
1612                        _desc = &vring->va[i].tx;
1613
1614                        if (!_first_desc) {
1615                                _first_desc = _desc;
1616                                first_ctx = &vring->ctx[i];
1617                                d = first_desc;
1618                        } else {
1619                                d = &desc_mem;
1620                        }
1621
1622                        wil_tx_desc_map(d, pa, lenmss, vring_index);
1623                        wil_tx_desc_offload_setup_tso(d, skb, desc_tso_type,
1624                                                      is_ipv4, tcp_hdr_len,
1625                                                      skb_net_hdr_len);
1626
1627                        /* use tso_type_first only once */
1628                        desc_tso_type = wil_tso_type_mid;
1629
1630                        descs_used++;  /* desc used so far */
1631                        sg_desc_cnt++; /* desc used for this segment */
1632                        len -= lenmss;
1633                        rem_data -= lenmss;
1634
1635                        wil_dbg_txrx(wil,
1636                                     "TSO: len %d, rem_data %d, descs_used %d, sg_desc_cnt %d,\n",
1637                                     len, rem_data, descs_used, sg_desc_cnt);
1638
1639                        /* Close the segment if reached mss size or last frag*/
1640                        if (rem_data == 0 || (f == nr_frags - 1 && len == 0)) {
1641                                if (hdr_compensation_need) {
1642                                        /* first segment include hdr desc for
1643                                         * release
1644                                         */
1645                                        hdr_ctx->nr_frags = sg_desc_cnt;
1646                                        wil_tx_desc_set_nr_frags(first_desc,
1647                                                                 sg_desc_cnt +
1648                                                                 1);
1649                                        hdr_compensation_need = false;
1650                                } else {
1651                                        wil_tx_desc_set_nr_frags(first_desc,
1652                                                                 sg_desc_cnt);
1653                                }
1654                                first_ctx->nr_frags = sg_desc_cnt - 1;
1655
1656                                wil_tx_last_desc(d);
1657
1658                                /* first descriptor may also be the last
1659                                 * for this mss - make sure not to copy
1660                                 * it twice
1661                                 */
1662                                if (first_desc != d)
1663                                        *_first_desc = *first_desc;
1664
1665                                /*last descriptor will be copied at the end
1666                                 * of this TS processing
1667                                 */
1668                                if (f < nr_frags - 1 || len > 0)
1669                                        *_desc = *d;
1670
1671                                rem_data = mss;
1672                                _first_desc = NULL;
1673                                sg_desc_cnt = 0;
1674                        } else if (first_desc != d) /* update mid descriptor */
1675                                        *_desc = *d;
1676                }
1677        }
1678
1679        /* first descriptor may also be the last.
1680         * in this case d pointer is invalid
1681         */
1682        if (_first_desc == _desc)
1683                d = first_desc;
1684
1685        /* Last data descriptor */
1686        wil_set_tx_desc_last_tso(d);
1687        *_desc = *d;
1688
1689        /* Fill the total number of descriptors in first desc (hdr)*/
1690        wil_tx_desc_set_nr_frags(hdr_desc, descs_used);
1691        *_hdr_desc = *hdr_desc;
1692
1693        /* hold reference to skb
1694         * to prevent skb release before accounting
1695         * in case of immediate "tx done"
1696         */
1697        vring->ctx[i].skb = skb_get(skb);
1698
1699        /* performance monitoring */
1700        used = wil_vring_used_tx(vring);
1701        if (wil_val_in_range(wil->vring_idle_trsh,
1702                             used, used + descs_used)) {
1703                txdata->idle += get_cycles() - txdata->last_idle;
1704                wil_dbg_txrx(wil,  "Ring[%2d] not idle %d -> %d\n",
1705                             vring_index, used, used + descs_used);
1706        }
1707
1708        /* Make sure to advance the head only after descriptor update is done.
1709         * This will prevent a race condition where the completion thread
1710         * will see the DU bit set from previous run and will handle the
1711         * skb before it was completed.
1712         */
1713        wmb();
1714
1715        /* advance swhead */
1716        wil_vring_advance_head(vring, descs_used);
1717        wil_dbg_txrx(wil, "TSO: Tx swhead %d -> %d\n", swhead, vring->swhead);
1718
1719        /* make sure all writes to descriptors (shared memory) are done before
1720         * committing them to HW
1721         */
1722        wmb();
1723
1724        wil_w(wil, vring->hwtail, vring->swhead);
1725        return 0;
1726
1727mem_error:
1728        while (descs_used > 0) {
1729                struct wil_ctx *ctx;
1730
1731                i = (swhead + descs_used - 1) % vring->size;
1732                d = (struct vring_tx_desc *)&vring->va[i].tx;
1733                _desc = &vring->va[i].tx;
1734                *d = *_desc;
1735                _desc->dma.status = TX_DMA_STATUS_DU;
1736                ctx = &vring->ctx[i];
1737                wil_txdesc_unmap(dev, d, ctx);
1738                memset(ctx, 0, sizeof(*ctx));
1739                descs_used--;
1740        }
1741err_exit:
1742        return rc;
1743}
1744
1745static int __wil_tx_vring(struct wil6210_priv *wil, struct wil6210_vif *vif,
1746                          struct vring *vring, struct sk_buff *skb)
1747{
1748        struct device *dev = wil_to_dev(wil);
1749        struct vring_tx_desc dd, *d = &dd;
1750        volatile struct vring_tx_desc *_d;
1751        u32 swhead = vring->swhead;
1752        int avail = wil_vring_avail_tx(vring);
1753        int nr_frags = skb_shinfo(skb)->nr_frags;
1754        uint f = 0;
1755        int vring_index = vring - wil->vring_tx;
1756        struct vring_tx_data *txdata = &wil->vring_tx_data[vring_index];
1757        uint i = swhead;
1758        dma_addr_t pa;
1759        int used;
1760        bool mcast = (vring_index == vif->bcast_vring);
1761        uint len = skb_headlen(skb);
1762
1763        wil_dbg_txrx(wil, "tx_vring: %d bytes to vring %d\n", skb->len,
1764                     vring_index);
1765
1766        if (unlikely(!txdata->enabled))
1767                return -EINVAL;
1768
1769        if (unlikely(avail < 1 + nr_frags)) {
1770                wil_err_ratelimited(wil,
1771                                    "Tx ring[%2d] full. No space for %d fragments\n",
1772                                    vring_index, 1 + nr_frags);
1773                return -ENOMEM;
1774        }
1775        _d = &vring->va[i].tx;
1776
1777        pa = dma_map_single(dev, skb->data, skb_headlen(skb), DMA_TO_DEVICE);
1778
1779        wil_dbg_txrx(wil, "Tx[%2d] skb %d bytes 0x%p -> %pad\n", vring_index,
1780                     skb_headlen(skb), skb->data, &pa);
1781        wil_hex_dump_txrx("Tx ", DUMP_PREFIX_OFFSET, 16, 1,
1782                          skb->data, skb_headlen(skb), false);
1783
1784        if (unlikely(dma_mapping_error(dev, pa)))
1785                return -EINVAL;
1786        vring->ctx[i].mapped_as = wil_mapped_as_single;
1787        /* 1-st segment */
1788        wil_tx_desc_map(d, pa, len, vring_index);
1789        if (unlikely(mcast)) {
1790                d->mac.d[0] |= BIT(MAC_CFG_DESC_TX_0_MCS_EN_POS); /* MCS 0 */
1791                if (unlikely(len > WIL_BCAST_MCS0_LIMIT)) /* set MCS 1 */
1792                        d->mac.d[0] |= (1 << MAC_CFG_DESC_TX_0_MCS_INDEX_POS);
1793        }
1794        /* Process TCP/UDP checksum offloading */
1795        if (unlikely(wil_tx_desc_offload_setup(d, skb))) {
1796                wil_err(wil, "Tx[%2d] Failed to set cksum, drop packet\n",
1797                        vring_index);
1798                goto dma_error;
1799        }
1800
1801        vring->ctx[i].nr_frags = nr_frags;
1802        wil_tx_desc_set_nr_frags(d, nr_frags + 1);
1803
1804        /* middle segments */
1805        for (; f < nr_frags; f++) {
1806                const struct skb_frag_struct *frag =
1807                                &skb_shinfo(skb)->frags[f];
1808                int len = skb_frag_size(frag);
1809
1810                *_d = *d;
1811                wil_dbg_txrx(wil, "Tx[%2d] desc[%4d]\n", vring_index, i);
1812                wil_hex_dump_txrx("TxD ", DUMP_PREFIX_NONE, 32, 4,
1813                                  (const void *)d, sizeof(*d), false);
1814                i = (swhead + f + 1) % vring->size;
1815                _d = &vring->va[i].tx;
1816                pa = skb_frag_dma_map(dev, frag, 0, skb_frag_size(frag),
1817                                      DMA_TO_DEVICE);
1818                if (unlikely(dma_mapping_error(dev, pa))) {
1819                        wil_err(wil, "Tx[%2d] failed to map fragment\n",
1820                                vring_index);
1821                        goto dma_error;
1822                }
1823                vring->ctx[i].mapped_as = wil_mapped_as_page;
1824                wil_tx_desc_map(d, pa, len, vring_index);
1825                /* no need to check return code -
1826                 * if it succeeded for 1-st descriptor,
1827                 * it will succeed here too
1828                 */
1829                wil_tx_desc_offload_setup(d, skb);
1830        }
1831        /* for the last seg only */
1832        d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_EOP_POS);
1833        d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_MARK_WB_POS);
1834        d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_DMA_IT_POS);
1835        *_d = *d;
1836        wil_dbg_txrx(wil, "Tx[%2d] desc[%4d]\n", vring_index, i);
1837        wil_hex_dump_txrx("TxD ", DUMP_PREFIX_NONE, 32, 4,
1838                          (const void *)d, sizeof(*d), false);
1839
1840        /* hold reference to skb
1841         * to prevent skb release before accounting
1842         * in case of immediate "tx done"
1843         */
1844        vring->ctx[i].skb = skb_get(skb);
1845
1846        /* performance monitoring */
1847        used = wil_vring_used_tx(vring);
1848        if (wil_val_in_range(wil->vring_idle_trsh,
1849                             used, used + nr_frags + 1)) {
1850                txdata->idle += get_cycles() - txdata->last_idle;
1851                wil_dbg_txrx(wil,  "Ring[%2d] not idle %d -> %d\n",
1852                             vring_index, used, used + nr_frags + 1);
1853        }
1854
1855        /* Make sure to advance the head only after descriptor update is done.
1856         * This will prevent a race condition where the completion thread
1857         * will see the DU bit set from previous run and will handle the
1858         * skb before it was completed.
1859         */
1860        wmb();
1861
1862        /* advance swhead */
1863        wil_vring_advance_head(vring, nr_frags + 1);
1864        wil_dbg_txrx(wil, "Tx[%2d] swhead %d -> %d\n", vring_index, swhead,
1865                     vring->swhead);
1866        trace_wil6210_tx(vring_index, swhead, skb->len, nr_frags);
1867
1868        /* make sure all writes to descriptors (shared memory) are done before
1869         * committing them to HW
1870         */
1871        wmb();
1872
1873        wil_w(wil, vring->hwtail, vring->swhead);
1874
1875        return 0;
1876 dma_error:
1877        /* unmap what we have mapped */
1878        nr_frags = f + 1; /* frags mapped + one for skb head */
1879        for (f = 0; f < nr_frags; f++) {
1880                struct wil_ctx *ctx;
1881
1882                i = (swhead + f) % vring->size;
1883                ctx = &vring->ctx[i];
1884                _d = &vring->va[i].tx;
1885                *d = *_d;
1886                _d->dma.status = TX_DMA_STATUS_DU;
1887                wil_txdesc_unmap(dev, d, ctx);
1888
1889                memset(ctx, 0, sizeof(*ctx));
1890        }
1891
1892        return -EINVAL;
1893}
1894
1895static int wil_tx_vring(struct wil6210_priv *wil, struct wil6210_vif *vif,
1896                        struct vring *vring, struct sk_buff *skb)
1897{
1898        int vring_index = vring - wil->vring_tx;
1899        struct vring_tx_data *txdata = &wil->vring_tx_data[vring_index];
1900        int rc;
1901
1902        spin_lock(&txdata->lock);
1903
1904        if (test_bit(wil_status_suspending, wil->status) ||
1905            test_bit(wil_status_suspended, wil->status) ||
1906            test_bit(wil_status_resuming, wil->status)) {
1907                wil_dbg_txrx(wil,
1908                             "suspend/resume in progress. drop packet\n");
1909                spin_unlock(&txdata->lock);
1910                return -EINVAL;
1911        }
1912
1913        rc = (skb_is_gso(skb) ? __wil_tx_vring_tso : __wil_tx_vring)
1914             (wil, vif, vring, skb);
1915
1916        spin_unlock(&txdata->lock);
1917
1918        return rc;
1919}
1920
1921/**
1922 * Check status of tx vrings and stop/wake net queues if needed
1923 * It will start/stop net queues of a specific VIF net_device.
1924 *
1925 * This function does one of two checks:
1926 * In case check_stop is true, will check if net queues need to be stopped. If
1927 * the conditions for stopping are met, netif_tx_stop_all_queues() is called.
1928 * In case check_stop is false, will check if net queues need to be waked. If
1929 * the conditions for waking are met, netif_tx_wake_all_queues() is called.
1930 * vring is the vring which is currently being modified by either adding
1931 * descriptors (tx) into it or removing descriptors (tx complete) from it. Can
1932 * be null when irrelevant (e.g. connect/disconnect events).
1933 *
1934 * The implementation is to stop net queues if modified vring has low
1935 * descriptor availability. Wake if all vrings are not in low descriptor
1936 * availability and modified vring has high descriptor availability.
1937 */
1938static inline void __wil_update_net_queues(struct wil6210_priv *wil,
1939                                           struct wil6210_vif *vif,
1940                                           struct vring *vring,
1941                                           bool check_stop)
1942{
1943        int i;
1944
1945        if (unlikely(!vif))
1946                return;
1947
1948        if (vring)
1949                wil_dbg_txrx(wil, "vring %d, mid %d, check_stop=%d, stopped=%d",
1950                             (int)(vring - wil->vring_tx), vif->mid, check_stop,
1951                             vif->net_queue_stopped);
1952        else
1953                wil_dbg_txrx(wil, "check_stop=%d, mid=%d, stopped=%d",
1954                             check_stop, vif->mid, vif->net_queue_stopped);
1955
1956        if (check_stop == vif->net_queue_stopped)
1957                /* net queues already in desired state */
1958                return;
1959
1960        if (check_stop) {
1961                if (!vring || unlikely(wil_vring_avail_low(vring))) {
1962                        /* not enough room in the vring */
1963                        netif_tx_stop_all_queues(vif_to_ndev(vif));
1964                        vif->net_queue_stopped = true;
1965                        wil_dbg_txrx(wil, "netif_tx_stop called\n");
1966                }
1967                return;
1968        }
1969
1970        /* Do not wake the queues in suspend flow */
1971        if (test_bit(wil_status_suspending, wil->status) ||
1972            test_bit(wil_status_suspended, wil->status))
1973                return;
1974
1975        /* check wake */
1976        for (i = 0; i < WIL6210_MAX_TX_RINGS; i++) {
1977                struct vring *cur_vring = &wil->vring_tx[i];
1978                struct vring_tx_data *txdata = &wil->vring_tx_data[i];
1979
1980                if (txdata->mid != vif->mid || !cur_vring->va ||
1981                    !txdata->enabled || cur_vring == vring)
1982                        continue;
1983
1984                if (wil_vring_avail_low(cur_vring)) {
1985                        wil_dbg_txrx(wil, "vring %d full, can't wake\n",
1986                                     (int)(cur_vring - wil->vring_tx));
1987                        return;
1988                }
1989        }
1990
1991        if (!vring || wil_vring_avail_high(vring)) {
1992                /* enough room in the vring */
1993                wil_dbg_txrx(wil, "calling netif_tx_wake\n");
1994                netif_tx_wake_all_queues(vif_to_ndev(vif));
1995                vif->net_queue_stopped = false;
1996        }
1997}
1998
1999void wil_update_net_queues(struct wil6210_priv *wil, struct wil6210_vif *vif,
2000                           struct vring *vring, bool check_stop)
2001{
2002        spin_lock(&wil->net_queue_lock);
2003        __wil_update_net_queues(wil, vif, vring, check_stop);
2004        spin_unlock(&wil->net_queue_lock);
2005}
2006
2007void wil_update_net_queues_bh(struct wil6210_priv *wil, struct wil6210_vif *vif,
2008                              struct vring *vring, bool check_stop)
2009{
2010        spin_lock_bh(&wil->net_queue_lock);
2011        __wil_update_net_queues(wil, vif, vring, check_stop);
2012        spin_unlock_bh(&wil->net_queue_lock);
2013}
2014
2015netdev_tx_t wil_start_xmit(struct sk_buff *skb, struct net_device *ndev)
2016{
2017        struct wil6210_vif *vif = ndev_to_vif(ndev);
2018        struct wil6210_priv *wil = vif_to_wil(vif);
2019        struct ethhdr *eth = (void *)skb->data;
2020        bool bcast = is_multicast_ether_addr(eth->h_dest);
2021        struct vring *vring;
2022        static bool pr_once_fw;
2023        int rc;
2024
2025        wil_dbg_txrx(wil, "start_xmit\n");
2026        if (unlikely(!test_bit(wil_status_fwready, wil->status))) {
2027                if (!pr_once_fw) {
2028                        wil_err(wil, "FW not ready\n");
2029                        pr_once_fw = true;
2030                }
2031                goto drop;
2032        }
2033        if (unlikely(!test_bit(wil_vif_fwconnected, vif->status))) {
2034                wil_dbg_ratelimited(wil,
2035                                    "VIF not connected, packet dropped\n");
2036                goto drop;
2037        }
2038        if (unlikely(vif->wdev.iftype == NL80211_IFTYPE_MONITOR)) {
2039                wil_err(wil, "Xmit in monitor mode not supported\n");
2040                goto drop;
2041        }
2042        pr_once_fw = false;
2043
2044        /* find vring */
2045        if (vif->wdev.iftype == NL80211_IFTYPE_STATION && !vif->pbss) {
2046                /* in STA mode (ESS), all to same VRING (to AP) */
2047                vring = wil_find_tx_vring_sta(wil, vif, skb);
2048        } else if (bcast) {
2049                if (vif->pbss)
2050                        /* in pbss, no bcast VRING - duplicate skb in
2051                         * all stations VRINGs
2052                         */
2053                        vring = wil_find_tx_bcast_2(wil, vif, skb);
2054                else if (vif->wdev.iftype == NL80211_IFTYPE_AP)
2055                        /* AP has a dedicated bcast VRING */
2056                        vring = wil_find_tx_bcast_1(wil, vif, skb);
2057                else
2058                        /* unexpected combination, fallback to duplicating
2059                         * the skb in all stations VRINGs
2060                         */
2061                        vring = wil_find_tx_bcast_2(wil, vif, skb);
2062        } else {
2063                /* unicast, find specific VRING by dest. address */
2064                vring = wil_find_tx_ucast(wil, vif, skb);
2065        }
2066        if (unlikely(!vring)) {
2067                wil_dbg_txrx(wil, "No Tx VRING found for %pM\n", eth->h_dest);
2068                goto drop;
2069        }
2070        /* set up vring entry */
2071        rc = wil_tx_vring(wil, vif, vring, skb);
2072
2073        switch (rc) {
2074        case 0:
2075                /* shall we stop net queues? */
2076                wil_update_net_queues_bh(wil, vif, vring, true);
2077                /* statistics will be updated on the tx_complete */
2078                dev_kfree_skb_any(skb);
2079                return NETDEV_TX_OK;
2080        case -ENOMEM:
2081                return NETDEV_TX_BUSY;
2082        default:
2083                break; /* goto drop; */
2084        }
2085 drop:
2086        ndev->stats.tx_dropped++;
2087        dev_kfree_skb_any(skb);
2088
2089        return NET_XMIT_DROP;
2090}
2091
2092static inline bool wil_need_txstat(struct sk_buff *skb)
2093{
2094        struct ethhdr *eth = (void *)skb->data;
2095
2096        return is_unicast_ether_addr(eth->h_dest) && skb->sk &&
2097               (skb_shinfo(skb)->tx_flags & SKBTX_WIFI_STATUS);
2098}
2099
2100static inline void wil_consume_skb(struct sk_buff *skb, bool acked)
2101{
2102        if (unlikely(wil_need_txstat(skb)))
2103                skb_complete_wifi_ack(skb, acked);
2104        else
2105                acked ? dev_consume_skb_any(skb) : dev_kfree_skb_any(skb);
2106}
2107
2108/**
2109 * Clean up transmitted skb's from the Tx VRING
2110 *
2111 * Return number of descriptors cleared
2112 *
2113 * Safe to call from IRQ
2114 */
2115int wil_tx_complete(struct wil6210_vif *vif, int ringid)
2116{
2117        struct wil6210_priv *wil = vif_to_wil(vif);
2118        struct net_device *ndev = vif_to_ndev(vif);
2119        struct device *dev = wil_to_dev(wil);
2120        struct vring *vring = &wil->vring_tx[ringid];
2121        struct vring_tx_data *txdata = &wil->vring_tx_data[ringid];
2122        int done = 0;
2123        int cid = wil->vring2cid_tid[ringid][0];
2124        struct wil_net_stats *stats = NULL;
2125        volatile struct vring_tx_desc *_d;
2126        int used_before_complete;
2127        int used_new;
2128
2129        if (unlikely(!vring->va)) {
2130                wil_err(wil, "Tx irq[%d]: vring not initialized\n", ringid);
2131                return 0;
2132        }
2133
2134        if (unlikely(!txdata->enabled)) {
2135                wil_info(wil, "Tx irq[%d]: vring disabled\n", ringid);
2136                return 0;
2137        }
2138
2139        wil_dbg_txrx(wil, "tx_complete: (%d)\n", ringid);
2140
2141        used_before_complete = wil_vring_used_tx(vring);
2142
2143        if (cid < WIL6210_MAX_CID)
2144                stats = &wil->sta[cid].stats;
2145
2146        while (!wil_vring_is_empty(vring)) {
2147                int new_swtail;
2148                struct wil_ctx *ctx = &vring->ctx[vring->swtail];
2149                /**
2150                 * For the fragmented skb, HW will set DU bit only for the
2151                 * last fragment. look for it.
2152                 * In TSO the first DU will include hdr desc
2153                 */
2154                int lf = (vring->swtail + ctx->nr_frags) % vring->size;
2155                /* TODO: check we are not past head */
2156
2157                _d = &vring->va[lf].tx;
2158                if (unlikely(!(_d->dma.status & TX_DMA_STATUS_DU)))
2159                        break;
2160
2161                new_swtail = (lf + 1) % vring->size;
2162                while (vring->swtail != new_swtail) {
2163                        struct vring_tx_desc dd, *d = &dd;
2164                        u16 dmalen;
2165                        struct sk_buff *skb;
2166
2167                        ctx = &vring->ctx[vring->swtail];
2168                        skb = ctx->skb;
2169                        _d = &vring->va[vring->swtail].tx;
2170
2171                        *d = *_d;
2172
2173                        dmalen = le16_to_cpu(d->dma.length);
2174                        trace_wil6210_tx_done(ringid, vring->swtail, dmalen,
2175                                              d->dma.error);
2176                        wil_dbg_txrx(wil,
2177                                     "TxC[%2d][%3d] : %d bytes, status 0x%02x err 0x%02x\n",
2178                                     ringid, vring->swtail, dmalen,
2179                                     d->dma.status, d->dma.error);
2180                        wil_hex_dump_txrx("TxCD ", DUMP_PREFIX_NONE, 32, 4,
2181                                          (const void *)d, sizeof(*d), false);
2182
2183                        wil_txdesc_unmap(dev, d, ctx);
2184
2185                        if (skb) {
2186                                if (likely(d->dma.error == 0)) {
2187                                        ndev->stats.tx_packets++;
2188                                        ndev->stats.tx_bytes += skb->len;
2189                                        if (stats) {
2190                                                stats->tx_packets++;
2191                                                stats->tx_bytes += skb->len;
2192                                        }
2193                                } else {
2194                                        ndev->stats.tx_errors++;
2195                                        if (stats)
2196                                                stats->tx_errors++;
2197                                }
2198                                wil_consume_skb(skb, d->dma.error == 0);
2199                        }
2200                        memset(ctx, 0, sizeof(*ctx));
2201                        /* Make sure the ctx is zeroed before updating the tail
2202                         * to prevent a case where wil_tx_vring will see
2203                         * this descriptor as used and handle it before ctx zero
2204                         * is completed.
2205                         */
2206                        wmb();
2207                        /* There is no need to touch HW descriptor:
2208                         * - ststus bit TX_DMA_STATUS_DU is set by design,
2209                         *   so hardware will not try to process this desc.,
2210                         * - rest of descriptor will be initialized on Tx.
2211                         */
2212                        vring->swtail = wil_vring_next_tail(vring);
2213                        done++;
2214                }
2215        }
2216
2217        /* performance monitoring */
2218        used_new = wil_vring_used_tx(vring);
2219        if (wil_val_in_range(wil->vring_idle_trsh,
2220                             used_new, used_before_complete)) {
2221                wil_dbg_txrx(wil, "Ring[%2d] idle %d -> %d\n",
2222                             ringid, used_before_complete, used_new);
2223                txdata->last_idle = get_cycles();
2224        }
2225
2226        /* shall we wake net queues? */
2227        if (done)
2228                wil_update_net_queues(wil, vif, vring, false);
2229
2230        return done;
2231}
2232