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15#include <linux/of.h>
16#include <linux/mtd/mtd.h>
17#include <linux/mtd/partitions.h>
18#include <linux/etherdevice.h>
19#include <asm/unaligned.h>
20#include "mt7601u.h"
21#include "eeprom.h"
22#include "mac.h"
23
24static bool
25field_valid(u8 val)
26{
27 return val != 0xff;
28}
29
30static s8
31field_validate(u8 val)
32{
33 if (!field_valid(val))
34 return 0;
35
36 return val;
37}
38
39static int
40mt7601u_efuse_read(struct mt7601u_dev *dev, u16 addr, u8 *data,
41 enum mt7601u_eeprom_access_modes mode)
42{
43 u32 val;
44 int i;
45
46 val = mt76_rr(dev, MT_EFUSE_CTRL);
47 val &= ~(MT_EFUSE_CTRL_AIN |
48 MT_EFUSE_CTRL_MODE);
49 val |= FIELD_PREP(MT_EFUSE_CTRL_AIN, addr & ~0xf) |
50 FIELD_PREP(MT_EFUSE_CTRL_MODE, mode) |
51 MT_EFUSE_CTRL_KICK;
52 mt76_wr(dev, MT_EFUSE_CTRL, val);
53
54 if (!mt76_poll(dev, MT_EFUSE_CTRL, MT_EFUSE_CTRL_KICK, 0, 1000))
55 return -ETIMEDOUT;
56
57 val = mt76_rr(dev, MT_EFUSE_CTRL);
58 if ((val & MT_EFUSE_CTRL_AOUT) == MT_EFUSE_CTRL_AOUT) {
59
60
61
62 memset(data, 0xff, 16);
63 return 0;
64 }
65
66 for (i = 0; i < 4; i++) {
67 val = mt76_rr(dev, MT_EFUSE_DATA(i));
68 put_unaligned_le32(val, data + 4 * i);
69 }
70
71 return 0;
72}
73
74static int
75mt7601u_efuse_physical_size_check(struct mt7601u_dev *dev)
76{
77 const int map_reads = DIV_ROUND_UP(MT_EFUSE_USAGE_MAP_SIZE, 16);
78 u8 data[round_up(MT_EFUSE_USAGE_MAP_SIZE, 16)];
79 int ret, i;
80 u32 start = 0, end = 0, cnt_free;
81
82 for (i = 0; i < map_reads; i++) {
83 ret = mt7601u_efuse_read(dev, MT_EE_USAGE_MAP_START + i * 16,
84 data + i * 16, MT_EE_PHYSICAL_READ);
85 if (ret)
86 return ret;
87 }
88
89 for (i = 0; i < MT_EFUSE_USAGE_MAP_SIZE; i++)
90 if (!data[i]) {
91 if (!start)
92 start = MT_EE_USAGE_MAP_START + i;
93 end = MT_EE_USAGE_MAP_START + i;
94 }
95 cnt_free = end - start + 1;
96
97 if (MT_EFUSE_USAGE_MAP_SIZE - cnt_free < 5) {
98 dev_err(dev->dev, "Error: your device needs default EEPROM file and this driver doesn't support it!\n");
99 return -EINVAL;
100 }
101
102 return 0;
103}
104
105static bool
106mt7601u_has_tssi(struct mt7601u_dev *dev, u8 *eeprom)
107{
108 u16 nic_conf1 = get_unaligned_le16(eeprom + MT_EE_NIC_CONF_1);
109
110 return ~nic_conf1 && (nic_conf1 & MT_EE_NIC_CONF_1_TX_ALC_EN);
111}
112
113static void
114mt7601u_set_chip_cap(struct mt7601u_dev *dev, u8 *eeprom)
115{
116 u16 nic_conf0 = get_unaligned_le16(eeprom + MT_EE_NIC_CONF_0);
117 u16 nic_conf1 = get_unaligned_le16(eeprom + MT_EE_NIC_CONF_1);
118
119 if (!field_valid(nic_conf1 & 0xff))
120 nic_conf1 &= 0xff00;
121
122 dev->ee->tssi_enabled = mt7601u_has_tssi(dev, eeprom) &&
123 !(nic_conf1 & MT_EE_NIC_CONF_1_TEMP_TX_ALC);
124
125 if (nic_conf1 & MT_EE_NIC_CONF_1_HW_RF_CTRL)
126 dev_err(dev->dev,
127 "Error: this driver does not support HW RF ctrl\n");
128
129 if (!field_valid(nic_conf0 >> 8))
130 return;
131
132 if (FIELD_GET(MT_EE_NIC_CONF_0_RX_PATH, nic_conf0) > 1 ||
133 FIELD_GET(MT_EE_NIC_CONF_0_TX_PATH, nic_conf0) > 1)
134 dev_err(dev->dev,
135 "Error: device has more than 1 RX/TX stream!\n");
136}
137
138static void mt7601u_set_channel_target_power(struct mt7601u_dev *dev,
139 u8 *eeprom, u8 max_pwr)
140{
141 u8 trgt_pwr = eeprom[MT_EE_TX_TSSI_TARGET_POWER];
142
143 if (trgt_pwr > max_pwr || !trgt_pwr) {
144 dev_warn(dev->dev, "Error: EEPROM trgt power invalid %hhx!\n",
145 trgt_pwr);
146 trgt_pwr = 0x20;
147 }
148
149 memset(dev->ee->chan_pwr, trgt_pwr, sizeof(dev->ee->chan_pwr));
150}
151
152static void
153mt7601u_set_channel_power(struct mt7601u_dev *dev, u8 *eeprom)
154{
155 u32 i, val;
156 u8 max_pwr;
157
158 val = mt7601u_rr(dev, MT_TX_ALC_CFG_0);
159 max_pwr = FIELD_GET(MT_TX_ALC_CFG_0_LIMIT_0, val);
160
161 if (mt7601u_has_tssi(dev, eeprom)) {
162 mt7601u_set_channel_target_power(dev, eeprom, max_pwr);
163 return;
164 }
165
166 for (i = 0; i < 14; i++) {
167 s8 power = field_validate(eeprom[MT_EE_TX_POWER_OFFSET + i]);
168
169 if (power > max_pwr || power < 0)
170 power = MT7601U_DEFAULT_TX_POWER;
171
172 dev->ee->chan_pwr[i] = power;
173 }
174}
175
176static void
177mt7601u_set_country_reg(struct mt7601u_dev *dev, u8 *eeprom)
178{
179
180
181
182 static const struct reg_channel_bounds chan_bounds[] = {
183
184 { 1, 11 }, { 1, 13 }, { 10, 2 }, { 10, 4 },
185 { 14, 1 }, { 1, 14 }, { 3, 7 }, { 5, 9 },
186
187 { 1, 11 }, { 1, 14 }
188 };
189 u8 val = eeprom[MT_EE_COUNTRY_REGION];
190 int idx = -1;
191
192 if (val < 8)
193 idx = val;
194 if (val > 31 && val < 33)
195 idx = val - 32 + 8;
196
197 if (idx != -1)
198 dev_info(dev->dev,
199 "EEPROM country region %02hhx (channels %hhd-%hhd)\n",
200 val, chan_bounds[idx].start,
201 chan_bounds[idx].start + chan_bounds[idx].num - 1);
202 else
203 idx = 5;
204
205 dev->ee->reg = chan_bounds[idx];
206
207
208
209
210}
211
212static void
213mt7601u_set_rf_freq_off(struct mt7601u_dev *dev, u8 *eeprom)
214{
215 u8 comp;
216
217 dev->ee->rf_freq_off = field_validate(eeprom[MT_EE_FREQ_OFFSET]);
218 comp = field_validate(eeprom[MT_EE_FREQ_OFFSET_COMPENSATION]);
219
220 if (comp & BIT(7))
221 dev->ee->rf_freq_off -= comp & 0x7f;
222 else
223 dev->ee->rf_freq_off += comp;
224}
225
226static void
227mt7601u_set_rssi_offset(struct mt7601u_dev *dev, u8 *eeprom)
228{
229 int i;
230 s8 *rssi_offset = dev->ee->rssi_offset;
231
232 for (i = 0; i < 2; i++) {
233 rssi_offset[i] = eeprom[MT_EE_RSSI_OFFSET + i];
234
235 if (rssi_offset[i] < -10 || rssi_offset[i] > 10) {
236 dev_warn(dev->dev,
237 "Warning: EEPROM RSSI is invalid %02hhx\n",
238 rssi_offset[i]);
239 rssi_offset[i] = 0;
240 }
241 }
242}
243
244static void
245mt7601u_extra_power_over_mac(struct mt7601u_dev *dev)
246{
247 u32 val;
248
249 val = ((mt7601u_rr(dev, MT_TX_PWR_CFG_1) & 0x0000ff00) >> 8);
250 val |= ((mt7601u_rr(dev, MT_TX_PWR_CFG_2) & 0x0000ff00) << 8);
251 mt7601u_wr(dev, MT_TX_PWR_CFG_7, val);
252
253 val = ((mt7601u_rr(dev, MT_TX_PWR_CFG_4) & 0x0000ff00) >> 8);
254 mt7601u_wr(dev, MT_TX_PWR_CFG_9, val);
255}
256
257static void
258mt7601u_set_power_rate(struct power_per_rate *rate, s8 delta, u8 value)
259{
260
261 if (value == 0xff)
262 return;
263
264 rate->raw = s6_validate(value);
265 rate->bw20 = s6_to_int(value);
266
267 rate->bw40 = rate->bw20 + delta;
268}
269
270static void
271mt7601u_save_power_rate(struct mt7601u_dev *dev, s8 delta, u32 val, int i)
272{
273 struct mt7601u_rate_power *t = &dev->ee->power_rate_table;
274
275 switch (i) {
276 case 0:
277 mt7601u_set_power_rate(&t->cck[0], delta, (val >> 0) & 0xff);
278 mt7601u_set_power_rate(&t->cck[1], delta, (val >> 8) & 0xff);
279
280 dev->ee->real_cck_bw20[0] = t->cck[0].bw20;
281 dev->ee->real_cck_bw20[1] = t->cck[1].bw20;
282
283 mt7601u_set_power_rate(&t->ofdm[0], delta, (val >> 16) & 0xff);
284 mt7601u_set_power_rate(&t->ofdm[1], delta, (val >> 24) & 0xff);
285 break;
286 case 1:
287 mt7601u_set_power_rate(&t->ofdm[2], delta, (val >> 0) & 0xff);
288 mt7601u_set_power_rate(&t->ofdm[3], delta, (val >> 8) & 0xff);
289 mt7601u_set_power_rate(&t->ht[0], delta, (val >> 16) & 0xff);
290 mt7601u_set_power_rate(&t->ht[1], delta, (val >> 24) & 0xff);
291 break;
292 case 2:
293 mt7601u_set_power_rate(&t->ht[2], delta, (val >> 0) & 0xff);
294 mt7601u_set_power_rate(&t->ht[3], delta, (val >> 8) & 0xff);
295 break;
296 }
297}
298
299static s8
300get_delta(u8 val)
301{
302 s8 ret;
303
304 if (!field_valid(val) || !(val & BIT(7)))
305 return 0;
306
307 ret = val & 0x1f;
308 if (ret > 8)
309 ret = 8;
310 if (val & BIT(6))
311 ret = -ret;
312
313 return ret;
314}
315
316static void
317mt7601u_config_tx_power_per_rate(struct mt7601u_dev *dev, u8 *eeprom)
318{
319 u32 val;
320 s8 bw40_delta;
321 int i;
322
323 bw40_delta = get_delta(eeprom[MT_EE_TX_POWER_DELTA_BW40]);
324
325 for (i = 0; i < 5; i++) {
326 val = get_unaligned_le32(eeprom + MT_EE_TX_POWER_BYRATE(i));
327
328 mt7601u_save_power_rate(dev, bw40_delta, val, i);
329
330 if (~val)
331 mt7601u_wr(dev, MT_TX_PWR_CFG_0 + i * 4, val);
332 }
333
334 mt7601u_extra_power_over_mac(dev);
335}
336
337static void
338mt7601u_init_tssi_params(struct mt7601u_dev *dev, u8 *eeprom)
339{
340 struct tssi_data *d = &dev->ee->tssi_data;
341
342 if (!dev->ee->tssi_enabled)
343 return;
344
345 d->slope = eeprom[MT_EE_TX_TSSI_SLOPE];
346 d->tx0_delta_offset = eeprom[MT_EE_TX_TSSI_OFFSET] * 1024;
347 d->offset[0] = eeprom[MT_EE_TX_TSSI_OFFSET_GROUP];
348 d->offset[1] = eeprom[MT_EE_TX_TSSI_OFFSET_GROUP + 1];
349 d->offset[2] = eeprom[MT_EE_TX_TSSI_OFFSET_GROUP + 2];
350}
351
352int
353mt7601u_eeprom_init(struct mt7601u_dev *dev)
354{
355 u8 *eeprom;
356 int i, ret;
357
358 ret = mt7601u_efuse_physical_size_check(dev);
359 if (ret)
360 return ret;
361
362 dev->ee = devm_kzalloc(dev->dev, sizeof(*dev->ee), GFP_KERNEL);
363 if (!dev->ee)
364 return -ENOMEM;
365
366 eeprom = kmalloc(MT7601U_EEPROM_SIZE, GFP_KERNEL);
367 if (!eeprom)
368 return -ENOMEM;
369
370 for (i = 0; i + 16 <= MT7601U_EEPROM_SIZE; i += 16) {
371 ret = mt7601u_efuse_read(dev, i, eeprom + i, MT_EE_READ);
372 if (ret)
373 goto out;
374 }
375
376 if (eeprom[MT_EE_VERSION_EE] > MT7601U_EE_MAX_VER)
377 dev_warn(dev->dev,
378 "Warning: unsupported EEPROM version %02hhx\n",
379 eeprom[MT_EE_VERSION_EE]);
380 dev_info(dev->dev, "EEPROM ver:%02hhx fae:%02hhx\n",
381 eeprom[MT_EE_VERSION_EE], eeprom[MT_EE_VERSION_FAE]);
382
383 mt7601u_set_macaddr(dev, eeprom + MT_EE_MAC_ADDR);
384 mt7601u_set_chip_cap(dev, eeprom);
385 mt7601u_set_channel_power(dev, eeprom);
386 mt7601u_set_country_reg(dev, eeprom);
387 mt7601u_set_rf_freq_off(dev, eeprom);
388 mt7601u_set_rssi_offset(dev, eeprom);
389 dev->ee->ref_temp = eeprom[MT_EE_REF_TEMP];
390 dev->ee->lna_gain = eeprom[MT_EE_LNA_GAIN];
391
392 mt7601u_config_tx_power_per_rate(dev, eeprom);
393
394 mt7601u_init_tssi_params(dev, eeprom);
395out:
396 kfree(eeprom);
397 return ret;
398}
399
