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26#include "../wifi.h"
27#include "../core.h"
28#include "../pci.h"
29#include "../base.h"
30#include "reg.h"
31#include "def.h"
32#include "phy.h"
33#include "dm.h"
34#include "../rtl8192c/dm_common.h"
35#include "../rtl8192c/fw_common.h"
36#include "../rtl8192c/phy_common.h"
37#include "hw.h"
38#include "rf.h"
39#include "sw.h"
40#include "trx.h"
41#include "led.h"
42
43#include <linux/module.h>
44
45static void rtl92c_init_aspm_vars(struct ieee80211_hw *hw)
46{
47 struct rtl_priv *rtlpriv = rtl_priv(hw);
48 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
49
50
51 rtlpci->const_amdpci_aspm = 0;
52
53
54
55
56
57
58
59
60
61
62 rtlpci->const_pci_aspm = 3;
63
64
65 rtlpci->const_devicepci_aspm_setting = 0x03;
66
67
68 rtlpci->const_hostpci_aspm_setting = 0x02;
69
70
71
72
73
74
75
76
77
78 rtlpci->const_hwsw_rfoff_d3 = 0;
79
80
81
82
83
84
85
86
87 rtlpci->const_support_pciaspm = rtlpriv->cfg->mod_params->aspm_support;
88}
89
90int rtl92c_init_sw_vars(struct ieee80211_hw *hw)
91{
92 int err;
93 struct rtl_priv *rtlpriv = rtl_priv(hw);
94 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
95 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
96 char *fw_name;
97
98 rtl8192ce_bt_reg_init(hw);
99
100 rtlpriv->dm.dm_initialgain_enable = true;
101 rtlpriv->dm.dm_flag = 0;
102 rtlpriv->dm.disable_framebursting = false;
103 rtlpriv->dm.thermalvalue = 0;
104 rtlpci->transmit_config = CFENDFORM | BIT(12) | BIT(13);
105
106
107 rtlpriv->rtlhal.current_bandtype = BAND_ON_2_4G;
108 rtlpriv->rtlhal.bandset = BAND_ON_2_4G;
109 rtlpriv->rtlhal.macphymode = SINGLEMAC_SINGLEPHY;
110
111 rtlpci->receive_config = (RCR_APPFCS |
112 RCR_AMF |
113 RCR_ADF |
114 RCR_APP_MIC |
115 RCR_APP_ICV |
116 RCR_AICV |
117 RCR_ACRC32 |
118 RCR_AB |
119 RCR_AM |
120 RCR_APM |
121 RCR_APP_PHYST_RXFF | RCR_HTC_LOC_CTRL | 0);
122
123 rtlpci->irq_mask[0] =
124 (u32) (IMR_ROK |
125 IMR_VODOK |
126 IMR_VIDOK |
127 IMR_BEDOK |
128 IMR_BKDOK |
129 IMR_MGNTDOK |
130 IMR_HIGHDOK | IMR_BDOK | IMR_RDU | IMR_RXFOVW | 0);
131
132 rtlpci->irq_mask[1] = (u32) (IMR_CPWM | IMR_C2HCMD | 0);
133
134
135 rtlpriv->psc.inactiveps = rtlpriv->cfg->mod_params->inactiveps;
136 rtlpriv->psc.swctrl_lps = rtlpriv->cfg->mod_params->swctrl_lps;
137 rtlpriv->psc.fwctrl_lps = rtlpriv->cfg->mod_params->fwctrl_lps;
138 rtlpriv->cfg->mod_params->sw_crypto =
139 rtlpriv->cfg->mod_params->sw_crypto;
140 if (!rtlpriv->psc.inactiveps)
141 pr_info("rtl8192ce: Power Save off (module option)\n");
142 if (!rtlpriv->psc.fwctrl_lps)
143 pr_info("rtl8192ce: FW Power Save off (module option)\n");
144 rtlpriv->psc.reg_fwctrl_lps = 3;
145 rtlpriv->psc.reg_max_lps_awakeintvl = 5;
146
147
148 rtl92c_init_aspm_vars(hw);
149
150 if (rtlpriv->psc.reg_fwctrl_lps == 1)
151 rtlpriv->psc.fwctrl_psmode = FW_PS_MIN_MODE;
152 else if (rtlpriv->psc.reg_fwctrl_lps == 2)
153 rtlpriv->psc.fwctrl_psmode = FW_PS_MAX_MODE;
154 else if (rtlpriv->psc.reg_fwctrl_lps == 3)
155 rtlpriv->psc.fwctrl_psmode = FW_PS_DTIM_MODE;
156
157
158 rtlpriv->rtlhal.pfirmware = vzalloc(0x4000);
159 if (!rtlpriv->rtlhal.pfirmware) {
160 pr_err("Can't alloc buffer for fw\n");
161 return 1;
162 }
163
164
165 if (IS_VENDOR_UMC_A_CUT(rtlhal->version) &&
166 !IS_92C_SERIAL(rtlhal->version))
167 fw_name = "rtlwifi/rtl8192cfwU.bin";
168 else if (IS_81XXC_VENDOR_UMC_B_CUT(rtlhal->version))
169 fw_name = "rtlwifi/rtl8192cfwU_B.bin";
170 else
171 fw_name = "rtlwifi/rtl8192cfw.bin";
172
173 rtlpriv->max_fw_size = 0x4000;
174 pr_info("Using firmware %s\n", fw_name);
175 err = request_firmware_nowait(THIS_MODULE, 1, fw_name,
176 rtlpriv->io.dev, GFP_KERNEL, hw,
177 rtl_fw_cb);
178 if (err) {
179 pr_err("Failed to request firmware!\n");
180 vfree(rtlpriv->rtlhal.pfirmware);
181 rtlpriv->rtlhal.pfirmware = NULL;
182 return 1;
183 }
184
185 return 0;
186}
187
188void rtl92c_deinit_sw_vars(struct ieee80211_hw *hw)
189{
190 struct rtl_priv *rtlpriv = rtl_priv(hw);
191
192 if (rtlpriv->rtlhal.pfirmware) {
193 vfree(rtlpriv->rtlhal.pfirmware);
194 rtlpriv->rtlhal.pfirmware = NULL;
195 }
196}
197
198static struct rtl_hal_ops rtl8192ce_hal_ops = {
199 .init_sw_vars = rtl92c_init_sw_vars,
200 .deinit_sw_vars = rtl92c_deinit_sw_vars,
201 .read_eeprom_info = rtl92ce_read_eeprom_info,
202 .interrupt_recognized = rtl92ce_interrupt_recognized,
203 .hw_init = rtl92ce_hw_init,
204 .hw_disable = rtl92ce_card_disable,
205 .hw_suspend = rtl92ce_suspend,
206 .hw_resume = rtl92ce_resume,
207 .enable_interrupt = rtl92ce_enable_interrupt,
208 .disable_interrupt = rtl92ce_disable_interrupt,
209 .set_network_type = rtl92ce_set_network_type,
210 .set_chk_bssid = rtl92ce_set_check_bssid,
211 .set_qos = rtl92ce_set_qos,
212 .set_bcn_reg = rtl92ce_set_beacon_related_registers,
213 .set_bcn_intv = rtl92ce_set_beacon_interval,
214 .update_interrupt_mask = rtl92ce_update_interrupt_mask,
215 .get_hw_reg = rtl92ce_get_hw_reg,
216 .set_hw_reg = rtl92ce_set_hw_reg,
217 .update_rate_tbl = rtl92ce_update_hal_rate_tbl,
218 .fill_tx_desc = rtl92ce_tx_fill_desc,
219 .fill_tx_cmddesc = rtl92ce_tx_fill_cmddesc,
220 .query_rx_desc = rtl92ce_rx_query_desc,
221 .set_channel_access = rtl92ce_update_channel_access_setting,
222 .radio_onoff_checking = rtl92ce_gpio_radio_on_off_checking,
223 .set_bw_mode = rtl92c_phy_set_bw_mode,
224 .switch_channel = rtl92c_phy_sw_chnl,
225 .dm_watchdog = rtl92c_dm_watchdog,
226 .scan_operation_backup = rtl_phy_scan_operation_backup,
227 .set_rf_power_state = rtl92c_phy_set_rf_power_state,
228 .led_control = rtl92ce_led_control,
229 .set_desc = rtl92ce_set_desc,
230 .get_desc = rtl92ce_get_desc,
231 .is_tx_desc_closed = rtl92ce_is_tx_desc_closed,
232 .tx_polling = rtl92ce_tx_polling,
233 .enable_hw_sec = rtl92ce_enable_hw_security_config,
234 .set_key = rtl92ce_set_key,
235 .init_sw_leds = rtl92ce_init_sw_leds,
236 .get_bbreg = rtl92c_phy_query_bb_reg,
237 .set_bbreg = rtl92c_phy_set_bb_reg,
238 .set_rfreg = rtl92ce_phy_set_rf_reg,
239 .get_rfreg = rtl92c_phy_query_rf_reg,
240 .phy_rf6052_config = rtl92ce_phy_rf6052_config,
241 .phy_rf6052_set_cck_txpower = rtl92ce_phy_rf6052_set_cck_txpower,
242 .phy_rf6052_set_ofdm_txpower = rtl92ce_phy_rf6052_set_ofdm_txpower,
243 .config_bb_with_headerfile = _rtl92ce_phy_config_bb_with_headerfile,
244 .config_bb_with_pgheaderfile = _rtl92ce_phy_config_bb_with_pgheaderfile,
245 .phy_lc_calibrate = _rtl92ce_phy_lc_calibrate,
246 .phy_set_bw_mode_callback = rtl92ce_phy_set_bw_mode_callback,
247 .dm_dynamic_txpower = rtl92ce_dm_dynamic_txpower,
248 .get_btc_status = rtl_btc_status_false,
249};
250
251static struct rtl_mod_params rtl92ce_mod_params = {
252 .sw_crypto = false,
253 .inactiveps = true,
254 .swctrl_lps = false,
255 .fwctrl_lps = true,
256 .aspm_support = 1,
257 .debug_level = 0,
258 .debug_mask = 0,
259};
260
261static const struct rtl_hal_cfg rtl92ce_hal_cfg = {
262 .bar_id = 2,
263 .write_readback = true,
264 .name = "rtl92c_pci",
265 .ops = &rtl8192ce_hal_ops,
266 .mod_params = &rtl92ce_mod_params,
267
268 .maps[SYS_ISO_CTRL] = REG_SYS_ISO_CTRL,
269 .maps[SYS_FUNC_EN] = REG_SYS_FUNC_EN,
270 .maps[SYS_CLK] = REG_SYS_CLKR,
271 .maps[MAC_RCR_AM] = AM,
272 .maps[MAC_RCR_AB] = AB,
273 .maps[MAC_RCR_ACRC32] = ACRC32,
274 .maps[MAC_RCR_ACF] = ACF,
275 .maps[MAC_RCR_AAP] = AAP,
276 .maps[MAC_HIMR] = REG_HIMR,
277 .maps[MAC_HIMRE] = REG_HIMRE,
278
279 .maps[EFUSE_TEST] = REG_EFUSE_TEST,
280 .maps[EFUSE_CTRL] = REG_EFUSE_CTRL,
281 .maps[EFUSE_CLK] = 0,
282 .maps[EFUSE_CLK_CTRL] = REG_EFUSE_CTRL,
283 .maps[EFUSE_PWC_EV12V] = PWC_EV12V,
284 .maps[EFUSE_FEN_ELDR] = FEN_ELDR,
285 .maps[EFUSE_LOADER_CLK_EN] = LOADER_CLK_EN,
286 .maps[EFUSE_ANA8M] = EFUSE_ANA8M,
287 .maps[EFUSE_HWSET_MAX_SIZE] = HWSET_MAX_SIZE,
288 .maps[EFUSE_MAX_SECTION_MAP] = EFUSE_MAX_SECTION,
289 .maps[EFUSE_REAL_CONTENT_SIZE] = EFUSE_REAL_CONTENT_LEN,
290 .maps[EFUSE_OOB_PROTECT_BYTES_LEN] = EFUSE_OOB_PROTECT_BYTES,
291
292 .maps[RWCAM] = REG_CAMCMD,
293 .maps[WCAMI] = REG_CAMWRITE,
294 .maps[RCAMO] = REG_CAMREAD,
295 .maps[CAMDBG] = REG_CAMDBG,
296 .maps[SECR] = REG_SECCFG,
297 .maps[SEC_CAM_NONE] = CAM_NONE,
298 .maps[SEC_CAM_WEP40] = CAM_WEP40,
299 .maps[SEC_CAM_TKIP] = CAM_TKIP,
300 .maps[SEC_CAM_AES] = CAM_AES,
301 .maps[SEC_CAM_WEP104] = CAM_WEP104,
302
303 .maps[RTL_IMR_BCNDMAINT6] = IMR_BCNDMAINT6,
304 .maps[RTL_IMR_BCNDMAINT5] = IMR_BCNDMAINT5,
305 .maps[RTL_IMR_BCNDMAINT4] = IMR_BCNDMAINT4,
306 .maps[RTL_IMR_BCNDMAINT3] = IMR_BCNDMAINT3,
307 .maps[RTL_IMR_BCNDMAINT2] = IMR_BCNDMAINT2,
308 .maps[RTL_IMR_BCNDMAINT1] = IMR_BCNDMAINT1,
309 .maps[RTL_IMR_BCNDOK8] = IMR_BCNDOK8,
310 .maps[RTL_IMR_BCNDOK7] = IMR_BCNDOK7,
311 .maps[RTL_IMR_BCNDOK6] = IMR_BCNDOK6,
312 .maps[RTL_IMR_BCNDOK5] = IMR_BCNDOK5,
313 .maps[RTL_IMR_BCNDOK4] = IMR_BCNDOK4,
314 .maps[RTL_IMR_BCNDOK3] = IMR_BCNDOK3,
315 .maps[RTL_IMR_BCNDOK2] = IMR_BCNDOK2,
316 .maps[RTL_IMR_BCNDOK1] = IMR_BCNDOK1,
317 .maps[RTL_IMR_TIMEOUT2] = IMR_TIMEOUT2,
318 .maps[RTL_IMR_TIMEOUT1] = IMR_TIMEOUT1,
319
320 .maps[RTL_IMR_TXFOVW] = IMR_TXFOVW,
321 .maps[RTL_IMR_PSTIMEOUT] = IMR_PSTIMEOUT,
322 .maps[RTL_IMR_BCNINT] = IMR_BCNINT,
323 .maps[RTL_IMR_RXFOVW] = IMR_RXFOVW,
324 .maps[RTL_IMR_RDU] = IMR_RDU,
325 .maps[RTL_IMR_ATIMEND] = IMR_ATIMEND,
326 .maps[RTL_IMR_BDOK] = IMR_BDOK,
327 .maps[RTL_IMR_MGNTDOK] = IMR_MGNTDOK,
328 .maps[RTL_IMR_TBDER] = IMR_TBDER,
329 .maps[RTL_IMR_HIGHDOK] = IMR_HIGHDOK,
330 .maps[RTL_IMR_TBDOK] = IMR_TBDOK,
331 .maps[RTL_IMR_BKDOK] = IMR_BKDOK,
332 .maps[RTL_IMR_BEDOK] = IMR_BEDOK,
333 .maps[RTL_IMR_VIDOK] = IMR_VIDOK,
334 .maps[RTL_IMR_VODOK] = IMR_VODOK,
335 .maps[RTL_IMR_ROK] = IMR_ROK,
336 .maps[RTL_IBSS_INT_MASKS] = (IMR_BCNINT | IMR_TBDOK | IMR_TBDER),
337
338 .maps[RTL_RC_CCK_RATE1M] = DESC_RATE1M,
339 .maps[RTL_RC_CCK_RATE2M] = DESC_RATE2M,
340 .maps[RTL_RC_CCK_RATE5_5M] = DESC_RATE5_5M,
341 .maps[RTL_RC_CCK_RATE11M] = DESC_RATE11M,
342 .maps[RTL_RC_OFDM_RATE6M] = DESC_RATE6M,
343 .maps[RTL_RC_OFDM_RATE9M] = DESC_RATE9M,
344 .maps[RTL_RC_OFDM_RATE12M] = DESC_RATE12M,
345 .maps[RTL_RC_OFDM_RATE18M] = DESC_RATE18M,
346 .maps[RTL_RC_OFDM_RATE24M] = DESC_RATE24M,
347 .maps[RTL_RC_OFDM_RATE36M] = DESC_RATE36M,
348 .maps[RTL_RC_OFDM_RATE48M] = DESC_RATE48M,
349 .maps[RTL_RC_OFDM_RATE54M] = DESC_RATE54M,
350
351 .maps[RTL_RC_HT_RATEMCS7] = DESC_RATEMCS7,
352 .maps[RTL_RC_HT_RATEMCS15] = DESC_RATEMCS15,
353};
354
355static const struct pci_device_id rtl92ce_pci_ids[] = {
356 {RTL_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8191, rtl92ce_hal_cfg)},
357 {RTL_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8178, rtl92ce_hal_cfg)},
358 {RTL_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8177, rtl92ce_hal_cfg)},
359 {RTL_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8176, rtl92ce_hal_cfg)},
360 {},
361};
362
363MODULE_DEVICE_TABLE(pci, rtl92ce_pci_ids);
364
365MODULE_AUTHOR("lizhaoming <chaoming_li@realsil.com.cn>");
366MODULE_AUTHOR("Realtek WlanFAE <wlanfae@realtek.com>");
367MODULE_AUTHOR("Larry Finger <Larry.Finger@lwfinger.net>");
368MODULE_LICENSE("GPL");
369MODULE_DESCRIPTION("Realtek 8192C/8188C 802.11n PCI wireless");
370MODULE_FIRMWARE("rtlwifi/rtl8192cfw.bin");
371MODULE_FIRMWARE("rtlwifi/rtl8192cfwU.bin");
372MODULE_FIRMWARE("rtlwifi/rtl8192cfwU_B.bin");
373
374module_param_named(swenc, rtl92ce_mod_params.sw_crypto, bool, 0444);
375module_param_named(debug_level, rtl92ce_mod_params.debug_level, int, 0644);
376module_param_named(debug_mask, rtl92ce_mod_params.debug_mask, ullong, 0644);
377module_param_named(ips, rtl92ce_mod_params.inactiveps, bool, 0444);
378module_param_named(swlps, rtl92ce_mod_params.swctrl_lps, bool, 0444);
379module_param_named(fwlps, rtl92ce_mod_params.fwctrl_lps, bool, 0444);
380module_param_named(aspm, rtl92ce_mod_params.aspm_support, int, 0444);
381MODULE_PARM_DESC(swenc, "Set to 1 for software crypto (default 0)\n");
382MODULE_PARM_DESC(ips, "Set to 0 to not use link power save (default 1)\n");
383MODULE_PARM_DESC(swlps, "Set to 1 to use SW control power save (default 0)\n");
384MODULE_PARM_DESC(fwlps, "Set to 1 to use FW control power save (default 1)\n");
385MODULE_PARM_DESC(aspm, "Set to 1 to enable ASPM (default 1)\n");
386MODULE_PARM_DESC(debug_level, "Set debug level (0-5) (default 0)");
387MODULE_PARM_DESC(debug_mask, "Set debug mask (default 0)");
388
389static SIMPLE_DEV_PM_OPS(rtlwifi_pm_ops, rtl_pci_suspend, rtl_pci_resume);
390
391static struct pci_driver rtl92ce_driver = {
392 .name = KBUILD_MODNAME,
393 .id_table = rtl92ce_pci_ids,
394 .probe = rtl_pci_probe,
395 .remove = rtl_pci_disconnect,
396 .driver.pm = &rtlwifi_pm_ops,
397};
398
399module_pci_driver(rtl92ce_driver);
400
