LXR linux/drivers/net/wireless/realtek/rtlwifi/rtl8192se/dm.h

   1/******************************************************************************
   2 *
   3 * Copyright(c) 2009-2012  Realtek Corporation.
   4 *
   5 * This program is free software; you can redistribute it and/or modify it
   6 * under the terms of version 2 of the GNU General Public License as
   7 * published by the Free Software Foundation.
   8 *
   9 * This program is distributed in the hope that it will be useful, but WITHOUT
  10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12 * more details.
  13 *
  14 * The full GNU General Public License is included in this distribution in the
  15 * file called LICENSE.
  16 *
  17 * Contact Information:
  18 * wlanfae <wlanfae@realtek.com>
  19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  20 * Hsinchu 300, Taiwan.
  21 *
  22 * Larry Finger <Larry.Finger@lwfinger.net>
  23 *
  24 *****************************************************************************/
  25#ifndef __RTL_92S_DM_H__
  26#define __RTL_92S_DM_H__
  27
  28enum dm_dig_alg {
  29        DIG_ALGO_BY_FALSE_ALARM = 0,
  30        DIG_ALGO_BY_RSSI        = 1,
  31        DIG_ALGO_BEFORE_CONNECT_BY_RSSI_AND_ALARM = 2,
  32        DIG_ALGO_BY_TOW_PORT = 3,
  33        DIG_ALGO_MAX
  34};
  35
  36enum dm_dig_two_port_alg {
  37        DIG_TWO_PORT_ALGO_RSSI = 0,
  38        DIG_TWO_PORT_ALGO_FALSE_ALARM = 1,
  39};
  40
  41enum dm_dig_dbg {
  42        DM_DBG_OFF = 0,
  43        DM_DBG_ON = 1,
  44        DM_DBG_MAX
  45};
  46
  47enum dm_dig_sta {
  48        DM_STA_DIG_OFF = 0,
  49        DM_STA_DIG_ON,
  50        DM_STA_DIG_MAX
  51};
  52
  53enum dm_ratr_sta {
  54        DM_RATR_STA_HIGH = 0,
  55        DM_RATR_STA_MIDDLEHIGH = 1,
  56        DM_RATR_STA_MIDDLE = 2,
  57        DM_RATR_STA_MIDDLELOW = 3,
  58        DM_RATR_STA_LOW = 4,
  59        DM_RATR_STA_ULTRALOW = 5,
  60        DM_RATR_STA_MAX
  61};
  62
  63#define DM_TYPE_BYFW                    0
  64#define DM_TYPE_BYDRIVER                1
  65
  66#define TX_HIGH_PWR_LEVEL_NORMAL        0
  67#define TX_HIGH_PWR_LEVEL_LEVEL1        1
  68#define TX_HIGH_PWR_LEVEL_LEVEL2        2
  69
  70#define HAL_DM_DIG_DISABLE              BIT(0)  /* Disable Dig */
  71#define HAL_DM_HIPWR_DISABLE            BIT(1)  /* Disable High Power */
  72
  73#define TX_HIGHPWR_LEVEL_NORMAL         0
  74#define TX_HIGHPWR_LEVEL_NORMAL1        1
  75#define TX_HIGHPWR_LEVEL_NORMAL2        2
  76
  77#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74
  78#define TX_POWER_NEAR_FIELD_THRESH_LVL1 67
  79
  80#define DM_DIG_HIGH_PWR_THRESH_HIGH     75
  81#define DM_DIG_HIGH_PWR_THRESH_LOW      70
  82#define DM_DIG_MIN_Netcore              0x12
  83
  84void rtl92s_dm_watchdog(struct ieee80211_hw *hw);
  85void rtl92s_dm_init(struct ieee80211_hw *hw);
  86void rtl92s_dm_init_edca_turbo(struct ieee80211_hw *hw);
  87
  88#endif
  89