LXR linux/drivers/net/wireless/realtek/rtlwifi/rtl8192se/phy.h

   1/******************************************************************************
   2 *
   3 * Copyright(c) 2009-2012  Realtek Corporation.
   4 *
   5 * This program is free software; you can redistribute it and/or modify it
   6 * under the terms of version 2 of the GNU General Public License as
   7 * published by the Free Software Foundation.
   8 *
   9 * This program is distributed in the hope that it will be useful, but WITHOUT
  10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12 * more details.
  13 *
  14 * The full GNU General Public License is included in this distribution in the
  15 * file called LICENSE.
  16 *
  17 * Contact Information:
  18 * wlanfae <wlanfae@realtek.com>
  19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  20 * Hsinchu 300, Taiwan.
  21 *
  22 * Larry Finger <Larry.Finger@lwfinger.net>
  23 *
  24 *****************************************************************************/
  25#ifndef __RTL92S_PHY_H__
  26#define __RTL92S_PHY_H__
  27
  28#define MAX_TXPWR_IDX_NMODE_92S         63
  29#define MAX_DOZE_WAITING_TIMES_9x       64
  30
  31/* Channel switch:The size of
  32 * command tables for switch channel */
  33#define MAX_PRECMD_CNT                  16
  34#define MAX_RFDEPENDCMD_CNT             16
  35#define MAX_POSTCMD_CNT                 16
  36
  37#define RF90_PATH_MAX                   4
  38#define RF6052_MAX_PATH                 2
  39
  40enum version_8192s {
  41        VERSION_8192S_ACUT,
  42        VERSION_8192S_BCUT,
  43        VERSION_8192S_CCUT
  44};
  45
  46enum swchnlcmd_id {
  47        CMDID_END,
  48        CMDID_SET_TXPOWEROWER_LEVEL,
  49        CMDID_BBREGWRITE10,
  50        CMDID_WRITEPORT_ULONG,
  51        CMDID_WRITEPORT_USHORT,
  52        CMDID_WRITEPORT_UCHAR,
  53        CMDID_RF_WRITEREG,
  54};
  55
  56struct swchnlcmd {
  57        enum swchnlcmd_id cmdid;
  58        u32 para1;
  59        u32 para2;
  60        u32 msdelay;
  61};
  62
  63enum baseband_config_type {
  64        /* Radio Path A */
  65        BASEBAND_CONFIG_PHY_REG = 0,
  66        /* Radio Path B */
  67        BASEBAND_CONFIG_AGC_TAB = 1,
  68};
  69
  70#define hal_get_firmwareversion(rtlpriv) \
  71        (((struct rt_firmware *)(rtlpriv->rtlhal.pfirmware))->firmwareversion)
  72
  73u32 rtl92s_phy_query_bb_reg(struct ieee80211_hw *hw, u32 regaddr, u32 bitmask);
  74void rtl92s_phy_set_bb_reg(struct ieee80211_hw *hw, u32 regaddr, u32 bitmask,
  75                           u32 data);
  76void rtl92s_phy_scan_operation_backup(struct ieee80211_hw *hw, u8 operation);
  77u32 rtl92s_phy_query_rf_reg(struct ieee80211_hw *hw, enum radio_path rfpath,
  78                            u32 regaddr, u32 bitmask);
  79void rtl92s_phy_set_rf_reg(struct ieee80211_hw *hw,     enum radio_path rfpath,
  80                           u32 regaddr, u32 bitmask, u32 data);
  81void rtl92s_phy_set_bw_mode(struct ieee80211_hw *hw,
  82                            enum nl80211_channel_type ch_type);
  83u8 rtl92s_phy_sw_chnl(struct ieee80211_hw *hw);
  84bool rtl92s_phy_set_rf_power_state(struct ieee80211_hw *hw,
  85                                   enum rf_pwrstate rfpower_state);
  86bool rtl92s_phy_mac_config(struct ieee80211_hw *hw);
  87void rtl92s_phy_switch_ephy_parameter(struct ieee80211_hw *hw);
  88bool rtl92s_phy_bb_config(struct ieee80211_hw *hw);
  89bool rtl92s_phy_rf_config(struct ieee80211_hw *hw);
  90void rtl92s_phy_get_hw_reg_originalvalue(struct ieee80211_hw *hw);
  91void rtl92s_phy_set_txpower(struct ieee80211_hw *hw, u8 channel);
  92bool rtl92s_phy_set_fw_cmd(struct ieee80211_hw *hw, enum fwcmd_iotype fwcmd_io);
  93void rtl92s_phy_chk_fwcmd_iodone(struct ieee80211_hw *hw);
  94void rtl92s_phy_set_beacon_hwreg(struct ieee80211_hw *hw, u16 beaconinterval);
  95u8 rtl92s_phy_config_rf(struct ieee80211_hw *hw, enum radio_path rfpath) ;
  96
  97#endif
  98
  99