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10#include <linux/kernel.h>
11#include <linux/module.h>
12#include <linux/of_address.h>
13#include <linux/of_pci.h>
14#include <linux/of_platform.h>
15#include <linux/pci.h>
16#include <linux/platform_device.h>
17
18static void __iomem *versatile_pci_base;
19static void __iomem *versatile_cfg_base[2];
20
21#define PCI_IMAP(m) (versatile_pci_base + ((m) * 4))
22#define PCI_SMAP(m) (versatile_pci_base + 0x14 + ((m) * 4))
23#define PCI_SELFID (versatile_pci_base + 0xc)
24
25#define VP_PCI_DEVICE_ID 0x030010ee
26#define VP_PCI_CLASS_ID 0x0b400000
27
28static u32 pci_slot_ignore;
29
30static int __init versatile_pci_slot_ignore(char *str)
31{
32 int retval;
33 int slot;
34
35 while ((retval = get_option(&str, &slot))) {
36 if ((slot < 0) || (slot > 31))
37 pr_err("Illegal slot value: %d\n", slot);
38 else
39 pci_slot_ignore |= (1 << slot);
40 }
41 return 1;
42}
43__setup("pci_slot_ignore=", versatile_pci_slot_ignore);
44
45
46static void __iomem *versatile_map_bus(struct pci_bus *bus,
47 unsigned int devfn, int offset)
48{
49 unsigned int busnr = bus->number;
50
51 if (pci_slot_ignore & (1 << PCI_SLOT(devfn)))
52 return NULL;
53
54 return versatile_cfg_base[1] + ((busnr << 16) | (devfn << 8) | offset);
55}
56
57static struct pci_ops pci_versatile_ops = {
58 .map_bus = versatile_map_bus,
59 .read = pci_generic_config_read32,
60 .write = pci_generic_config_write,
61};
62
63static int versatile_pci_parse_request_of_pci_ranges(struct device *dev,
64 struct list_head *res)
65{
66 int err, mem = 1, res_valid = 0;
67 struct device_node *np = dev->of_node;
68 resource_size_t iobase;
69 struct resource_entry *win, *tmp;
70
71 err = of_pci_get_host_bridge_resources(np, 0, 0xff, res, &iobase);
72 if (err)
73 return err;
74
75 err = devm_request_pci_bus_resources(dev, res);
76 if (err)
77 goto out_release_res;
78
79 resource_list_for_each_entry_safe(win, tmp, res) {
80 struct resource *res = win->res;
81
82 switch (resource_type(res)) {
83 case IORESOURCE_IO:
84 err = pci_remap_iospace(res, iobase);
85 if (err) {
86 dev_warn(dev, "error %d: failed to map resource %pR\n",
87 err, res);
88 resource_list_destroy_entry(win);
89 }
90 break;
91 case IORESOURCE_MEM:
92 res_valid |= !(res->flags & IORESOURCE_PREFETCH);
93
94 writel(res->start >> 28, PCI_IMAP(mem));
95 writel(PHYS_OFFSET >> 28, PCI_SMAP(mem));
96 mem++;
97
98 break;
99 }
100 }
101
102 if (res_valid)
103 return 0;
104
105 dev_err(dev, "non-prefetchable memory resource required\n");
106 err = -EINVAL;
107
108out_release_res:
109 pci_free_resource_list(res);
110 return err;
111}
112
113static int versatile_pci_probe(struct platform_device *pdev)
114{
115 struct device *dev = &pdev->dev;
116 struct resource *res;
117 int ret, i, myslot = -1;
118 u32 val;
119 void __iomem *local_pci_cfg_base;
120 struct pci_bus *bus, *child;
121 struct pci_host_bridge *bridge;
122 LIST_HEAD(pci_res);
123
124 bridge = devm_pci_alloc_host_bridge(dev, 0);
125 if (!bridge)
126 return -ENOMEM;
127
128 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
129 versatile_pci_base = devm_ioremap_resource(dev, res);
130 if (IS_ERR(versatile_pci_base))
131 return PTR_ERR(versatile_pci_base);
132
133 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
134 versatile_cfg_base[0] = devm_ioremap_resource(dev, res);
135 if (IS_ERR(versatile_cfg_base[0]))
136 return PTR_ERR(versatile_cfg_base[0]);
137
138 res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
139 versatile_cfg_base[1] = devm_pci_remap_cfg_resource(dev, res);
140 if (IS_ERR(versatile_cfg_base[1]))
141 return PTR_ERR(versatile_cfg_base[1]);
142
143 ret = versatile_pci_parse_request_of_pci_ranges(dev, &pci_res);
144 if (ret)
145 return ret;
146
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149
150
151 for (i = 0; i < 32; i++) {
152 if ((readl(versatile_cfg_base[0] + (i << 11) + PCI_VENDOR_ID) == VP_PCI_DEVICE_ID) &&
153 (readl(versatile_cfg_base[0] + (i << 11) + PCI_CLASS_REVISION) == VP_PCI_CLASS_ID)) {
154 myslot = i;
155 break;
156 }
157 }
158 if (myslot == -1) {
159 dev_err(dev, "Cannot find PCI core!\n");
160 return -EIO;
161 }
162
163
164
165 pci_slot_ignore |= (1 << myslot);
166
167 dev_info(dev, "PCI core found (slot %d)\n", myslot);
168
169 writel(myslot, PCI_SELFID);
170 local_pci_cfg_base = versatile_cfg_base[1] + (myslot << 11);
171
172 val = readl(local_pci_cfg_base + PCI_COMMAND);
173 val |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE;
174 writel(val, local_pci_cfg_base + PCI_COMMAND);
175
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177
178
179 writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_0);
180 writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_1);
181 writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_2);
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193
194 writel(0, versatile_cfg_base[0] + PCI_INTERRUPT_LINE);
195
196 pci_add_flags(PCI_ENABLE_PROC_DOMAINS);
197 pci_add_flags(PCI_REASSIGN_ALL_BUS);
198
199 list_splice_init(&pci_res, &bridge->windows);
200 bridge->dev.parent = dev;
201 bridge->sysdata = NULL;
202 bridge->busnr = 0;
203 bridge->ops = &pci_versatile_ops;
204 bridge->map_irq = of_irq_parse_and_map_pci;
205 bridge->swizzle_irq = pci_common_swizzle;
206
207 ret = pci_scan_root_bus_bridge(bridge);
208 if (ret < 0)
209 return ret;
210
211 bus = bridge->bus;
212
213 pci_assign_unassigned_bus_resources(bus);
214 list_for_each_entry(child, &bus->children, node)
215 pcie_bus_configure_settings(child);
216 pci_bus_add_devices(bus);
217
218 return 0;
219}
220
221static const struct of_device_id versatile_pci_of_match[] = {
222 { .compatible = "arm,versatile-pci", },
223 { },
224};
225MODULE_DEVICE_TABLE(of, versatile_pci_of_match);
226
227static struct platform_driver versatile_pci_driver = {
228 .driver = {
229 .name = "versatile-pci",
230 .of_match_table = versatile_pci_of_match,
231 .suppress_bind_attrs = true,
232 },
233 .probe = versatile_pci_probe,
234};
235module_platform_driver(versatile_pci_driver);
236
237MODULE_DESCRIPTION("Versatile PCI driver");
238MODULE_LICENSE("GPL v2");
239
