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120#ifndef NCR5380_io_delay
121#define NCR5380_io_delay(x)
122#endif
123
124#ifndef NCR5380_acquire_dma_irq
125#define NCR5380_acquire_dma_irq(x) (1)
126#endif
127
128#ifndef NCR5380_release_dma_irq
129#define NCR5380_release_dma_irq(x)
130#endif
131
132static int do_abort(struct Scsi_Host *);
133static void do_reset(struct Scsi_Host *);
134
135
136
137
138
139
140
141
142static inline void initialize_SCp(struct scsi_cmnd *cmd)
143{
144
145
146
147
148
149 if (scsi_bufflen(cmd)) {
150 cmd->SCp.buffer = scsi_sglist(cmd);
151 cmd->SCp.buffers_residual = scsi_sg_count(cmd) - 1;
152 cmd->SCp.ptr = sg_virt(cmd->SCp.buffer);
153 cmd->SCp.this_residual = cmd->SCp.buffer->length;
154 } else {
155 cmd->SCp.buffer = NULL;
156 cmd->SCp.buffers_residual = 0;
157 cmd->SCp.ptr = NULL;
158 cmd->SCp.this_residual = 0;
159 }
160
161 cmd->SCp.Status = 0;
162 cmd->SCp.Message = 0;
163}
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184static int NCR5380_poll_politely2(struct NCR5380_hostdata *hostdata,
185 unsigned int reg1, u8 bit1, u8 val1,
186 unsigned int reg2, u8 bit2, u8 val2,
187 unsigned long wait)
188{
189 unsigned long n = hostdata->poll_loops;
190 unsigned long deadline = jiffies + wait;
191
192 do {
193 if ((NCR5380_read(reg1) & bit1) == val1)
194 return 0;
195 if ((NCR5380_read(reg2) & bit2) == val2)
196 return 0;
197 cpu_relax();
198 } while (n--);
199
200 if (irqs_disabled() || in_interrupt())
201 return -ETIMEDOUT;
202
203
204 while (time_is_after_jiffies(deadline)) {
205 schedule_timeout_uninterruptible(1);
206 if ((NCR5380_read(reg1) & bit1) == val1)
207 return 0;
208 if ((NCR5380_read(reg2) & bit2) == val2)
209 return 0;
210 }
211
212 return -ETIMEDOUT;
213}
214
215#if NDEBUG
216static struct {
217 unsigned char mask;
218 const char *name;
219} signals[] = {
220 {SR_DBP, "PARITY"},
221 {SR_RST, "RST"},
222 {SR_BSY, "BSY"},
223 {SR_REQ, "REQ"},
224 {SR_MSG, "MSG"},
225 {SR_CD, "CD"},
226 {SR_IO, "IO"},
227 {SR_SEL, "SEL"},
228 {0, NULL}
229},
230basrs[] = {
231 {BASR_END_DMA_TRANSFER, "END OF DMA"},
232 {BASR_DRQ, "DRQ"},
233 {BASR_PARITY_ERROR, "PARITY ERROR"},
234 {BASR_IRQ, "IRQ"},
235 {BASR_PHASE_MATCH, "PHASE MATCH"},
236 {BASR_BUSY_ERROR, "BUSY ERROR"},
237 {BASR_ATN, "ATN"},
238 {BASR_ACK, "ACK"},
239 {0, NULL}
240},
241icrs[] = {
242 {ICR_ASSERT_RST, "ASSERT RST"},
243 {ICR_ARBITRATION_PROGRESS, "ARB. IN PROGRESS"},
244 {ICR_ARBITRATION_LOST, "LOST ARB."},
245 {ICR_ASSERT_ACK, "ASSERT ACK"},
246 {ICR_ASSERT_BSY, "ASSERT BSY"},
247 {ICR_ASSERT_SEL, "ASSERT SEL"},
248 {ICR_ASSERT_ATN, "ASSERT ATN"},
249 {ICR_ASSERT_DATA, "ASSERT DATA"},
250 {0, NULL}
251},
252mrs[] = {
253 {MR_BLOCK_DMA_MODE, "BLOCK DMA MODE"},
254 {MR_TARGET, "TARGET"},
255 {MR_ENABLE_PAR_CHECK, "PARITY CHECK"},
256 {MR_ENABLE_PAR_INTR, "PARITY INTR"},
257 {MR_ENABLE_EOP_INTR, "EOP INTR"},
258 {MR_MONITOR_BSY, "MONITOR BSY"},
259 {MR_DMA_MODE, "DMA MODE"},
260 {MR_ARBITRATE, "ARBITRATE"},
261 {0, NULL}
262};
263
264
265
266
267
268
269
270
271static void NCR5380_print(struct Scsi_Host *instance)
272{
273 struct NCR5380_hostdata *hostdata = shost_priv(instance);
274 unsigned char status, data, basr, mr, icr, i;
275
276 data = NCR5380_read(CURRENT_SCSI_DATA_REG);
277 status = NCR5380_read(STATUS_REG);
278 mr = NCR5380_read(MODE_REG);
279 icr = NCR5380_read(INITIATOR_COMMAND_REG);
280 basr = NCR5380_read(BUS_AND_STATUS_REG);
281
282 printk(KERN_DEBUG "SR = 0x%02x : ", status);
283 for (i = 0; signals[i].mask; ++i)
284 if (status & signals[i].mask)
285 printk(KERN_CONT "%s, ", signals[i].name);
286 printk(KERN_CONT "\nBASR = 0x%02x : ", basr);
287 for (i = 0; basrs[i].mask; ++i)
288 if (basr & basrs[i].mask)
289 printk(KERN_CONT "%s, ", basrs[i].name);
290 printk(KERN_CONT "\nICR = 0x%02x : ", icr);
291 for (i = 0; icrs[i].mask; ++i)
292 if (icr & icrs[i].mask)
293 printk(KERN_CONT "%s, ", icrs[i].name);
294 printk(KERN_CONT "\nMR = 0x%02x : ", mr);
295 for (i = 0; mrs[i].mask; ++i)
296 if (mr & mrs[i].mask)
297 printk(KERN_CONT "%s, ", mrs[i].name);
298 printk(KERN_CONT "\n");
299}
300
301static struct {
302 unsigned char value;
303 const char *name;
304} phases[] = {
305 {PHASE_DATAOUT, "DATAOUT"},
306 {PHASE_DATAIN, "DATAIN"},
307 {PHASE_CMDOUT, "CMDOUT"},
308 {PHASE_STATIN, "STATIN"},
309 {PHASE_MSGOUT, "MSGOUT"},
310 {PHASE_MSGIN, "MSGIN"},
311 {PHASE_UNKNOWN, "UNKNOWN"}
312};
313
314
315
316
317
318
319
320
321static void NCR5380_print_phase(struct Scsi_Host *instance)
322{
323 struct NCR5380_hostdata *hostdata = shost_priv(instance);
324 unsigned char status;
325 int i;
326
327 status = NCR5380_read(STATUS_REG);
328 if (!(status & SR_REQ))
329 shost_printk(KERN_DEBUG, instance, "REQ not asserted, phase unknown.\n");
330 else {
331 for (i = 0; (phases[i].value != PHASE_UNKNOWN) &&
332 (phases[i].value != (status & PHASE_MASK)); ++i)
333 ;
334 shost_printk(KERN_DEBUG, instance, "phase %s\n", phases[i].name);
335 }
336}
337#endif
338
339
340
341
342
343
344
345
346static const char *NCR5380_info(struct Scsi_Host *instance)
347{
348 struct NCR5380_hostdata *hostdata = shost_priv(instance);
349
350 return hostdata->info;
351}
352
353
354
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357
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363
364
365
366
367static int NCR5380_init(struct Scsi_Host *instance, int flags)
368{
369 struct NCR5380_hostdata *hostdata = shost_priv(instance);
370 int i;
371 unsigned long deadline;
372 unsigned long accesses_per_ms;
373
374 instance->max_lun = 7;
375
376 hostdata->host = instance;
377 hostdata->id_mask = 1 << instance->this_id;
378 hostdata->id_higher_mask = 0;
379 for (i = hostdata->id_mask; i <= 0x80; i <<= 1)
380 if (i > hostdata->id_mask)
381 hostdata->id_higher_mask |= i;
382 for (i = 0; i < 8; ++i)
383 hostdata->busy[i] = 0;
384 hostdata->dma_len = 0;
385
386 spin_lock_init(&hostdata->lock);
387 hostdata->connected = NULL;
388 hostdata->sensing = NULL;
389 INIT_LIST_HEAD(&hostdata->autosense);
390 INIT_LIST_HEAD(&hostdata->unissued);
391 INIT_LIST_HEAD(&hostdata->disconnected);
392
393 hostdata->flags = flags;
394
395 INIT_WORK(&hostdata->main_task, NCR5380_main);
396 hostdata->work_q = alloc_workqueue("ncr5380_%d",
397 WQ_UNBOUND | WQ_MEM_RECLAIM,
398 1, instance->host_no);
399 if (!hostdata->work_q)
400 return -ENOMEM;
401
402 snprintf(hostdata->info, sizeof(hostdata->info),
403 "%s, irq %d, io_port 0x%lx, base 0x%lx, can_queue %d, cmd_per_lun %d, sg_tablesize %d, this_id %d, flags { %s%s%s}",
404 instance->hostt->name, instance->irq, hostdata->io_port,
405 hostdata->base, instance->can_queue, instance->cmd_per_lun,
406 instance->sg_tablesize, instance->this_id,
407 hostdata->flags & FLAG_DMA_FIXUP ? "DMA_FIXUP " : "",
408 hostdata->flags & FLAG_NO_PSEUDO_DMA ? "NO_PSEUDO_DMA " : "",
409 hostdata->flags & FLAG_TOSHIBA_DELAY ? "TOSHIBA_DELAY " : "");
410
411 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
412 NCR5380_write(MODE_REG, MR_BASE);
413 NCR5380_write(TARGET_COMMAND_REG, 0);
414 NCR5380_write(SELECT_ENABLE_REG, 0);
415
416
417 i = 0;
418 deadline = jiffies + 1;
419 do {
420 cpu_relax();
421 } while (time_is_after_jiffies(deadline));
422 deadline += msecs_to_jiffies(256);
423 do {
424 NCR5380_read(STATUS_REG);
425 ++i;
426 cpu_relax();
427 } while (time_is_after_jiffies(deadline));
428 accesses_per_ms = i / 256;
429 hostdata->poll_loops = NCR5380_REG_POLL_TIME * accesses_per_ms / 2;
430
431 return 0;
432}
433
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447
448static int NCR5380_maybe_reset_bus(struct Scsi_Host *instance)
449{
450 struct NCR5380_hostdata *hostdata = shost_priv(instance);
451 int pass;
452
453 for (pass = 1; (NCR5380_read(STATUS_REG) & SR_BSY) && pass <= 6; ++pass) {
454 switch (pass) {
455 case 1:
456 case 3:
457 case 5:
458 shost_printk(KERN_ERR, instance, "SCSI bus busy, waiting up to five seconds\n");
459 NCR5380_poll_politely(hostdata,
460 STATUS_REG, SR_BSY, 0, 5 * HZ);
461 break;
462 case 2:
463 shost_printk(KERN_ERR, instance, "bus busy, attempting abort\n");
464 do_abort(instance);
465 break;
466 case 4:
467 shost_printk(KERN_ERR, instance, "bus busy, attempting reset\n");
468 do_reset(instance);
469
470
471
472
473 if (hostdata->flags & FLAG_TOSHIBA_DELAY)
474 msleep(2500);
475 else
476 msleep(500);
477 break;
478 case 6:
479 shost_printk(KERN_ERR, instance, "bus locked solid\n");
480 return -ENXIO;
481 }
482 }
483 return 0;
484}
485
486
487
488
489
490
491
492
493static void NCR5380_exit(struct Scsi_Host *instance)
494{
495 struct NCR5380_hostdata *hostdata = shost_priv(instance);
496
497 cancel_work_sync(&hostdata->main_task);
498 destroy_workqueue(hostdata->work_q);
499}
500
501
502
503
504
505
506
507static void complete_cmd(struct Scsi_Host *instance,
508 struct scsi_cmnd *cmd)
509{
510 struct NCR5380_hostdata *hostdata = shost_priv(instance);
511
512 dsprintk(NDEBUG_QUEUES, instance, "complete_cmd: cmd %p\n", cmd);
513
514 if (hostdata->sensing == cmd) {
515
516 if ((cmd->result & 0xff) != SAM_STAT_GOOD) {
517 scsi_eh_restore_cmnd(cmd, &hostdata->ses);
518 set_host_byte(cmd, DID_ERROR);
519 } else
520 scsi_eh_restore_cmnd(cmd, &hostdata->ses);
521 hostdata->sensing = NULL;
522 }
523
524 hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
525
526 cmd->scsi_done(cmd);
527}
528
529
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538
539static int NCR5380_queue_command(struct Scsi_Host *instance,
540 struct scsi_cmnd *cmd)
541{
542 struct NCR5380_hostdata *hostdata = shost_priv(instance);
543 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
544 unsigned long flags;
545
546#if (NDEBUG & NDEBUG_NO_WRITE)
547 switch (cmd->cmnd[0]) {
548 case WRITE_6:
549 case WRITE_10:
550 shost_printk(KERN_DEBUG, instance, "WRITE attempted with NDEBUG_NO_WRITE set\n");
551 cmd->result = (DID_ERROR << 16);
552 cmd->scsi_done(cmd);
553 return 0;
554 }
555#endif
556
557 cmd->result = 0;
558
559 if (!NCR5380_acquire_dma_irq(instance))
560 return SCSI_MLQUEUE_HOST_BUSY;
561
562 spin_lock_irqsave(&hostdata->lock, flags);
563
564
565
566
567
568
569
570
571 if (cmd->cmnd[0] == REQUEST_SENSE)
572 list_add(&ncmd->list, &hostdata->unissued);
573 else
574 list_add_tail(&ncmd->list, &hostdata->unissued);
575
576 spin_unlock_irqrestore(&hostdata->lock, flags);
577
578 dsprintk(NDEBUG_QUEUES, instance, "command %p added to %s of queue\n",
579 cmd, (cmd->cmnd[0] == REQUEST_SENSE) ? "head" : "tail");
580
581
582 queue_work(hostdata->work_q, &hostdata->main_task);
583 return 0;
584}
585
586static inline void maybe_release_dma_irq(struct Scsi_Host *instance)
587{
588 struct NCR5380_hostdata *hostdata = shost_priv(instance);
589
590
591 if (list_empty(&hostdata->disconnected) &&
592 list_empty(&hostdata->unissued) &&
593 list_empty(&hostdata->autosense) &&
594 !hostdata->connected &&
595 !hostdata->selecting) {
596 NCR5380_release_dma_irq(instance);
597 }
598}
599
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610
611static struct scsi_cmnd *dequeue_next_cmd(struct Scsi_Host *instance)
612{
613 struct NCR5380_hostdata *hostdata = shost_priv(instance);
614 struct NCR5380_cmd *ncmd;
615 struct scsi_cmnd *cmd;
616
617 if (hostdata->sensing || list_empty(&hostdata->autosense)) {
618 list_for_each_entry(ncmd, &hostdata->unissued, list) {
619 cmd = NCR5380_to_scmd(ncmd);
620 dsprintk(NDEBUG_QUEUES, instance, "dequeue: cmd=%p target=%d busy=0x%02x lun=%llu\n",
621 cmd, scmd_id(cmd), hostdata->busy[scmd_id(cmd)], cmd->device->lun);
622
623 if (!(hostdata->busy[scmd_id(cmd)] & (1 << cmd->device->lun))) {
624 list_del(&ncmd->list);
625 dsprintk(NDEBUG_QUEUES, instance,
626 "dequeue: removed %p from issue queue\n", cmd);
627 return cmd;
628 }
629 }
630 } else {
631
632 ncmd = list_first_entry(&hostdata->autosense,
633 struct NCR5380_cmd, list);
634 list_del(&ncmd->list);
635 cmd = NCR5380_to_scmd(ncmd);
636 dsprintk(NDEBUG_QUEUES, instance,
637 "dequeue: removed %p from autosense queue\n", cmd);
638 scsi_eh_prep_cmnd(cmd, &hostdata->ses, NULL, 0, ~0);
639 hostdata->sensing = cmd;
640 return cmd;
641 }
642 return NULL;
643}
644
645static void requeue_cmd(struct Scsi_Host *instance, struct scsi_cmnd *cmd)
646{
647 struct NCR5380_hostdata *hostdata = shost_priv(instance);
648 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
649
650 if (hostdata->sensing == cmd) {
651 scsi_eh_restore_cmnd(cmd, &hostdata->ses);
652 list_add(&ncmd->list, &hostdata->autosense);
653 hostdata->sensing = NULL;
654 } else
655 list_add(&ncmd->list, &hostdata->unissued);
656}
657
658
659
660
661
662
663
664
665
666
667static void NCR5380_main(struct work_struct *work)
668{
669 struct NCR5380_hostdata *hostdata =
670 container_of(work, struct NCR5380_hostdata, main_task);
671 struct Scsi_Host *instance = hostdata->host;
672 int done;
673
674 do {
675 done = 1;
676
677 spin_lock_irq(&hostdata->lock);
678 while (!hostdata->connected && !hostdata->selecting) {
679 struct scsi_cmnd *cmd = dequeue_next_cmd(instance);
680
681 if (!cmd)
682 break;
683
684 dsprintk(NDEBUG_MAIN, instance, "main: dequeued %p\n", cmd);
685
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696
697
698
699 if (!NCR5380_select(instance, cmd)) {
700 dsprintk(NDEBUG_MAIN, instance, "main: select complete\n");
701 maybe_release_dma_irq(instance);
702 } else {
703 dsprintk(NDEBUG_MAIN | NDEBUG_QUEUES, instance,
704 "main: select failed, returning %p to queue\n", cmd);
705 requeue_cmd(instance, cmd);
706 }
707 }
708 if (hostdata->connected && !hostdata->dma_len) {
709 dsprintk(NDEBUG_MAIN, instance, "main: performing information transfer\n");
710 NCR5380_information_transfer(instance);
711 done = 0;
712 }
713 spin_unlock_irq(&hostdata->lock);
714 if (!done)
715 cond_resched();
716 } while (!done);
717}
718
719
720
721
722
723
724
725
726
727static void NCR5380_dma_complete(struct Scsi_Host *instance)
728{
729 struct NCR5380_hostdata *hostdata = shost_priv(instance);
730 int transferred;
731 unsigned char **data;
732 int *count;
733 int saved_data = 0, overrun = 0;
734 unsigned char p;
735
736 if (hostdata->read_overruns) {
737 p = hostdata->connected->SCp.phase;
738 if (p & SR_IO) {
739 udelay(10);
740 if ((NCR5380_read(BUS_AND_STATUS_REG) &
741 (BASR_PHASE_MATCH | BASR_ACK)) ==
742 (BASR_PHASE_MATCH | BASR_ACK)) {
743 saved_data = NCR5380_read(INPUT_DATA_REG);
744 overrun = 1;
745 dsprintk(NDEBUG_DMA, instance, "read overrun handled\n");
746 }
747 }
748 }
749
750#ifdef CONFIG_SUN3
751 if ((sun3scsi_dma_finish(rq_data_dir(hostdata->connected->request)))) {
752 pr_err("scsi%d: overrun in UDC counter -- not prepared to deal with this!\n",
753 instance->host_no);
754 BUG();
755 }
756
757 if ((NCR5380_read(BUS_AND_STATUS_REG) & (BASR_PHASE_MATCH | BASR_ACK)) ==
758 (BASR_PHASE_MATCH | BASR_ACK)) {
759 pr_err("scsi%d: BASR %02x\n", instance->host_no,
760 NCR5380_read(BUS_AND_STATUS_REG));
761 pr_err("scsi%d: bus stuck in data phase -- probably a single byte overrun!\n",
762 instance->host_no);
763 BUG();
764 }
765#endif
766
767 NCR5380_write(MODE_REG, MR_BASE);
768 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
769 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
770
771 transferred = hostdata->dma_len - NCR5380_dma_residual(hostdata);
772 hostdata->dma_len = 0;
773
774 data = (unsigned char **)&hostdata->connected->SCp.ptr;
775 count = &hostdata->connected->SCp.this_residual;
776 *data += transferred;
777 *count -= transferred;
778
779 if (hostdata->read_overruns) {
780 int cnt, toPIO;
781
782 if ((NCR5380_read(STATUS_REG) & PHASE_MASK) == p && (p & SR_IO)) {
783 cnt = toPIO = hostdata->read_overruns;
784 if (overrun) {
785 dsprintk(NDEBUG_DMA, instance,
786 "Got an input overrun, using saved byte\n");
787 *(*data)++ = saved_data;
788 (*count)--;
789 cnt--;
790 toPIO--;
791 }
792 if (toPIO > 0) {
793 dsprintk(NDEBUG_DMA, instance,
794 "Doing %d byte PIO to 0x%p\n", cnt, *data);
795 NCR5380_transfer_pio(instance, &p, &cnt, data);
796 *count -= toPIO - cnt;
797 }
798 }
799 }
800}
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835
836static irqreturn_t __maybe_unused NCR5380_intr(int irq, void *dev_id)
837{
838 struct Scsi_Host *instance = dev_id;
839 struct NCR5380_hostdata *hostdata = shost_priv(instance);
840 int handled = 0;
841 unsigned char basr;
842 unsigned long flags;
843
844 spin_lock_irqsave(&hostdata->lock, flags);
845
846 basr = NCR5380_read(BUS_AND_STATUS_REG);
847 if (basr & BASR_IRQ) {
848 unsigned char mr = NCR5380_read(MODE_REG);
849 unsigned char sr = NCR5380_read(STATUS_REG);
850
851 dsprintk(NDEBUG_INTR, instance, "IRQ %d, BASR 0x%02x, SR 0x%02x, MR 0x%02x\n",
852 irq, basr, sr, mr);
853
854 if ((mr & MR_DMA_MODE) || (mr & MR_MONITOR_BSY)) {
855
856
857
858
859
860 dsprintk(NDEBUG_INTR, instance, "interrupt in DMA mode\n");
861
862 if (hostdata->connected) {
863 NCR5380_dma_complete(instance);
864 queue_work(hostdata->work_q, &hostdata->main_task);
865 } else {
866 NCR5380_write(MODE_REG, MR_BASE);
867 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
868 }
869 } else if ((NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_mask) &&
870 (sr & (SR_SEL | SR_IO | SR_BSY | SR_RST)) == (SR_SEL | SR_IO)) {
871
872 NCR5380_write(SELECT_ENABLE_REG, 0);
873 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
874
875 dsprintk(NDEBUG_INTR, instance, "interrupt with SEL and IO\n");
876
877 if (!hostdata->connected) {
878 NCR5380_reselect(instance);
879 queue_work(hostdata->work_q, &hostdata->main_task);
880 }
881 if (!hostdata->connected)
882 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
883 } else {
884
885 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
886
887 dsprintk(NDEBUG_INTR, instance, "unknown interrupt\n");
888#ifdef SUN3_SCSI_VME
889 dregs->csr |= CSR_DMA_ENABLE;
890#endif
891 }
892 handled = 1;
893 } else {
894 dsprintk(NDEBUG_INTR, instance, "interrupt without IRQ bit\n");
895#ifdef SUN3_SCSI_VME
896 dregs->csr |= CSR_DMA_ENABLE;
897#endif
898 }
899
900 spin_unlock_irqrestore(&hostdata->lock, flags);
901
902 return IRQ_RETVAL(handled);
903}
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934static struct scsi_cmnd *NCR5380_select(struct Scsi_Host *instance,
935 struct scsi_cmnd *cmd)
936 __releases(&hostdata->lock) __acquires(&hostdata->lock)
937{
938 struct NCR5380_hostdata *hostdata = shost_priv(instance);
939 unsigned char tmp[3], phase;
940 unsigned char *data;
941 int len;
942 int err;
943
944 NCR5380_dprint(NDEBUG_ARBITRATION, instance);
945 dsprintk(NDEBUG_ARBITRATION, instance, "starting arbitration, id = %d\n",
946 instance->this_id);
947
948
949
950
951
952
953
954
955 hostdata->selecting = cmd;
956
957
958
959
960
961
962 NCR5380_write(TARGET_COMMAND_REG, 0);
963
964
965
966
967
968 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask);
969 NCR5380_write(MODE_REG, MR_ARBITRATE);
970
971
972
973
974
975 spin_unlock_irq(&hostdata->lock);
976 err = NCR5380_poll_politely2(hostdata, MODE_REG, MR_ARBITRATE, 0,
977 INITIATOR_COMMAND_REG, ICR_ARBITRATION_PROGRESS,
978 ICR_ARBITRATION_PROGRESS, HZ);
979 spin_lock_irq(&hostdata->lock);
980 if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) {
981
982 goto out;
983 }
984 if (!hostdata->selecting) {
985
986 NCR5380_write(MODE_REG, MR_BASE);
987 goto out;
988 }
989 if (err < 0) {
990 NCR5380_write(MODE_REG, MR_BASE);
991 shost_printk(KERN_ERR, instance,
992 "select: arbitration timeout\n");
993 goto out;
994 }
995 spin_unlock_irq(&hostdata->lock);
996
997
998 udelay(3);
999
1000
1001 if ((NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST) ||
1002 (NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_higher_mask) ||
1003 (NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST)) {
1004 NCR5380_write(MODE_REG, MR_BASE);
1005 dsprintk(NDEBUG_ARBITRATION, instance, "lost arbitration, deasserting MR_ARBITRATE\n");
1006 spin_lock_irq(&hostdata->lock);
1007 goto out;
1008 }
1009
1010
1011
1012
1013
1014 NCR5380_write(INITIATOR_COMMAND_REG,
1015 ICR_BASE | ICR_ASSERT_SEL | ICR_ASSERT_BSY);
1016
1017
1018
1019
1020
1021
1022 if (hostdata->flags & FLAG_TOSHIBA_DELAY)
1023 udelay(15);
1024 else
1025 udelay(2);
1026
1027 spin_lock_irq(&hostdata->lock);
1028
1029
1030 if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE))
1031 goto out;
1032
1033 if (!hostdata->selecting) {
1034 NCR5380_write(MODE_REG, MR_BASE);
1035 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1036 goto out;
1037 }
1038
1039 dsprintk(NDEBUG_ARBITRATION, instance, "won arbitration\n");
1040
1041
1042
1043
1044
1045
1046 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask | (1 << scmd_id(cmd)));
1047
1048
1049
1050
1051
1052
1053
1054 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY |
1055 ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_SEL);
1056 NCR5380_write(MODE_REG, MR_BASE);
1057
1058
1059
1060
1061
1062 NCR5380_write(SELECT_ENABLE_REG, 0);
1063
1064 spin_unlock_irq(&hostdata->lock);
1065
1066
1067
1068
1069
1070 udelay(1);
1071
1072
1073 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA |
1074 ICR_ASSERT_ATN | ICR_ASSERT_SEL);
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093 udelay(1);
1094
1095 dsprintk(NDEBUG_SELECTION, instance, "selecting target %d\n", scmd_id(cmd));
1096
1097
1098
1099
1100
1101
1102 err = NCR5380_poll_politely(hostdata, STATUS_REG, SR_BSY, SR_BSY,
1103 msecs_to_jiffies(250));
1104
1105 if ((NCR5380_read(STATUS_REG) & (SR_SEL | SR_IO)) == (SR_SEL | SR_IO)) {
1106 spin_lock_irq(&hostdata->lock);
1107 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1108 NCR5380_reselect(instance);
1109 if (!hostdata->connected)
1110 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
1111 shost_printk(KERN_ERR, instance, "reselection after won arbitration?\n");
1112 goto out;
1113 }
1114
1115 if (err < 0) {
1116 spin_lock_irq(&hostdata->lock);
1117 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1118 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
1119
1120 if (hostdata->selecting) {
1121 cmd->result = DID_BAD_TARGET << 16;
1122 complete_cmd(instance, cmd);
1123 dsprintk(NDEBUG_SELECTION, instance, "target did not respond within 250ms\n");
1124 cmd = NULL;
1125 }
1126 goto out;
1127 }
1128
1129
1130
1131
1132
1133
1134
1135 udelay(1);
1136
1137 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148 err = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ);
1149 spin_lock_irq(&hostdata->lock);
1150 if (err < 0) {
1151 shost_printk(KERN_ERR, instance, "select: REQ timeout\n");
1152 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1153 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
1154 goto out;
1155 }
1156 if (!hostdata->selecting) {
1157 do_abort(instance);
1158 goto out;
1159 }
1160
1161 dsprintk(NDEBUG_SELECTION, instance, "target %d selected, going into MESSAGE OUT phase.\n",
1162 scmd_id(cmd));
1163 tmp[0] = IDENTIFY(((instance->irq == NO_IRQ) ? 0 : 1), cmd->device->lun);
1164
1165 len = 1;
1166 data = tmp;
1167 phase = PHASE_MSGOUT;
1168 NCR5380_transfer_pio(instance, &phase, &len, &data);
1169 if (len) {
1170 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1171 cmd->result = DID_ERROR << 16;
1172 complete_cmd(instance, cmd);
1173 dsprintk(NDEBUG_SELECTION, instance, "IDENTIFY message transfer failed\n");
1174 cmd = NULL;
1175 goto out;
1176 }
1177
1178 dsprintk(NDEBUG_SELECTION, instance, "nexus established.\n");
1179
1180 hostdata->connected = cmd;
1181 hostdata->busy[cmd->device->id] |= 1 << cmd->device->lun;
1182
1183#ifdef SUN3_SCSI_VME
1184 dregs->csr |= CSR_INTR;
1185#endif
1186
1187 initialize_SCp(cmd);
1188
1189 cmd = NULL;
1190
1191out:
1192 if (!hostdata->selecting)
1193 return NULL;
1194 hostdata->selecting = NULL;
1195 return cmd;
1196}
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223static int NCR5380_transfer_pio(struct Scsi_Host *instance,
1224 unsigned char *phase, int *count,
1225 unsigned char **data)
1226{
1227 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1228 unsigned char p = *phase, tmp;
1229 int c = *count;
1230 unsigned char *d = *data;
1231
1232
1233
1234
1235
1236
1237
1238 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
1239
1240 do {
1241
1242
1243
1244
1245
1246 if (NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ) < 0)
1247 break;
1248
1249 dsprintk(NDEBUG_HANDSHAKE, instance, "REQ asserted\n");
1250
1251
1252 if ((NCR5380_read(STATUS_REG) & PHASE_MASK) != p) {
1253 dsprintk(NDEBUG_PIO, instance, "phase mismatch\n");
1254 NCR5380_dprint_phase(NDEBUG_PIO, instance);
1255 break;
1256 }
1257
1258
1259 if (!(p & SR_IO))
1260 NCR5380_write(OUTPUT_DATA_REG, *d);
1261 else
1262 *d = NCR5380_read(CURRENT_SCSI_DATA_REG);
1263
1264 ++d;
1265
1266
1267
1268
1269
1270
1271
1272
1273 if (!(p & SR_IO)) {
1274 if (!((p & SR_MSG) && c > 1)) {
1275 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
1276 NCR5380_dprint(NDEBUG_PIO, instance);
1277 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1278 ICR_ASSERT_DATA | ICR_ASSERT_ACK);
1279 } else {
1280 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1281 ICR_ASSERT_DATA | ICR_ASSERT_ATN);
1282 NCR5380_dprint(NDEBUG_PIO, instance);
1283 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1284 ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
1285 }
1286 } else {
1287 NCR5380_dprint(NDEBUG_PIO, instance);
1288 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK);
1289 }
1290
1291 if (NCR5380_poll_politely(hostdata,
1292 STATUS_REG, SR_REQ, 0, 5 * HZ) < 0)
1293 break;
1294
1295 dsprintk(NDEBUG_HANDSHAKE, instance, "REQ negated, handshake complete\n");
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308 if (!(p == PHASE_MSGIN && c == 1)) {
1309 if (p == PHASE_MSGOUT && c > 1)
1310 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1311 else
1312 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1313 }
1314 } while (--c);
1315
1316 dsprintk(NDEBUG_PIO, instance, "residual %d\n", c);
1317
1318 *count = c;
1319 *data = d;
1320 tmp = NCR5380_read(STATUS_REG);
1321
1322
1323
1324
1325 if ((tmp & SR_REQ) || ((tmp & SR_IO) && c == 0))
1326 *phase = tmp & PHASE_MASK;
1327 else
1328 *phase = PHASE_UNKNOWN;
1329
1330 if (!c || (*phase == p))
1331 return 0;
1332 else
1333 return -1;
1334}
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348static void do_reset(struct Scsi_Host *instance)
1349{
1350 struct NCR5380_hostdata __maybe_unused *hostdata = shost_priv(instance);
1351 unsigned long flags;
1352
1353 local_irq_save(flags);
1354 NCR5380_write(TARGET_COMMAND_REG,
1355 PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK));
1356 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST);
1357 udelay(50);
1358 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1359 (void)NCR5380_read(RESET_PARITY_INTERRUPT_REG);
1360 local_irq_restore(flags);
1361}
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371static int do_abort(struct Scsi_Host *instance)
1372{
1373 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1374 unsigned char *msgptr, phase, tmp;
1375 int len;
1376 int rc;
1377
1378
1379 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391 rc = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, 10 * HZ);
1392 if (rc < 0)
1393 goto timeout;
1394
1395 tmp = NCR5380_read(STATUS_REG) & PHASE_MASK;
1396
1397 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
1398
1399 if (tmp != PHASE_MSGOUT) {
1400 NCR5380_write(INITIATOR_COMMAND_REG,
1401 ICR_BASE | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
1402 rc = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, 0, 3 * HZ);
1403 if (rc < 0)
1404 goto timeout;
1405 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1406 }
1407
1408 tmp = ABORT;
1409 msgptr = &tmp;
1410 len = 1;
1411 phase = PHASE_MSGOUT;
1412 NCR5380_transfer_pio(instance, &phase, &len, &msgptr);
1413
1414
1415
1416
1417
1418
1419 return len ? -1 : 0;
1420
1421timeout:
1422 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1423 return -1;
1424}
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440
1441
1442
1443
1444
1445static int NCR5380_transfer_dma(struct Scsi_Host *instance,
1446 unsigned char *phase, int *count,
1447 unsigned char **data)
1448{
1449 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1450 int c = *count;
1451 unsigned char p = *phase;
1452 unsigned char *d = *data;
1453 unsigned char tmp;
1454 int result = 0;
1455
1456 if ((tmp = (NCR5380_read(STATUS_REG) & PHASE_MASK)) != p) {
1457 *phase = tmp;
1458 return -1;
1459 }
1460
1461 hostdata->connected->SCp.phase = p;
1462
1463 if (p & SR_IO) {
1464 if (hostdata->read_overruns)
1465 c -= hostdata->read_overruns;
1466 else if (hostdata->flags & FLAG_DMA_FIXUP)
1467 --c;
1468 }
1469
1470 dsprintk(NDEBUG_DMA, instance, "initializing DMA %s: length %d, address %p\n",
1471 (p & SR_IO) ? "receive" : "send", c, d);
1472
1473#ifdef CONFIG_SUN3
1474
1475 sun3scsi_dma_start(c, *data);
1476#endif
1477
1478 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
1479 NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY |
1480 MR_ENABLE_EOP_INTR);
1481
1482 if (!(hostdata->flags & FLAG_LATE_DMA_SETUP)) {
1483
1484
1485
1486 if (p & SR_IO)
1487 result = NCR5380_dma_recv_setup(hostdata, d, c);
1488 else
1489 result = NCR5380_dma_send_setup(hostdata, d, c);
1490 }
1491
1492
1493
1494
1495
1496
1497 if (p & SR_IO) {
1498 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1499 NCR5380_io_delay(1);
1500 NCR5380_write(START_DMA_INITIATOR_RECEIVE_REG, 0);
1501 } else {
1502 NCR5380_io_delay(1);
1503 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
1504 NCR5380_io_delay(1);
1505 NCR5380_write(START_DMA_SEND_REG, 0);
1506 NCR5380_io_delay(1);
1507 }
1508
1509#ifdef CONFIG_SUN3
1510#ifdef SUN3_SCSI_VME
1511 dregs->csr |= CSR_DMA_ENABLE;
1512#endif
1513 sun3_dma_active = 1;
1514#endif
1515
1516 if (hostdata->flags & FLAG_LATE_DMA_SETUP) {
1517
1518
1519
1520 if (p & SR_IO)
1521 result = NCR5380_dma_recv_setup(hostdata, d, c);
1522 else
1523 result = NCR5380_dma_send_setup(hostdata, d, c);
1524 }
1525
1526
1527 if (result < 0)
1528 return result;
1529
1530
1531 if (result > 0) {
1532 hostdata->dma_len = result;
1533 return 0;
1534 }
1535
1536
1537 hostdata->dma_len = c;
1538
1539
1540
1541
1542
1543
1544
1545
1546
1547
1548
1549
1550
1551
1552
1553
1554
1555
1556
1557
1558
1559
1560
1561
1562
1563
1564
1565
1566
1567
1568
1569
1570
1571
1572
1573 if (hostdata->flags & FLAG_DMA_FIXUP) {
1574 if (p & SR_IO) {
1575
1576
1577
1578
1579
1580
1581
1582
1583
1584
1585
1586
1587
1588
1589
1590 if (NCR5380_poll_politely(hostdata, BUS_AND_STATUS_REG,
1591 BASR_DRQ, BASR_DRQ, HZ) < 0) {
1592 result = -1;
1593 shost_printk(KERN_ERR, instance, "PDMA read: DRQ timeout\n");
1594 }
1595 if (NCR5380_poll_politely(hostdata, STATUS_REG,
1596 SR_REQ, 0, HZ) < 0) {
1597 result = -1;
1598 shost_printk(KERN_ERR, instance, "PDMA read: !REQ timeout\n");
1599 }
1600 d[*count - 1] = NCR5380_read(INPUT_DATA_REG);
1601 } else {
1602
1603
1604
1605
1606 if (NCR5380_poll_politely2(hostdata,
1607 BUS_AND_STATUS_REG, BASR_DRQ, BASR_DRQ,
1608 BUS_AND_STATUS_REG, BASR_PHASE_MATCH, 0, HZ) < 0) {
1609 result = -1;
1610 shost_printk(KERN_ERR, instance, "PDMA write: DRQ and phase timeout\n");
1611 }
1612 }
1613 }
1614
1615 NCR5380_dma_complete(instance);
1616 return result;
1617}
1618
1619
1620
1621
1622
1623
1624
1625
1626
1627
1628
1629
1630
1631
1632
1633
1634
1635
1636static void NCR5380_information_transfer(struct Scsi_Host *instance)
1637 __releases(&hostdata->lock) __acquires(&hostdata->lock)
1638{
1639 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1640 unsigned char msgout = NOP;
1641 int sink = 0;
1642 int len;
1643 int transfersize;
1644 unsigned char *data;
1645 unsigned char phase, tmp, extended_msg[10], old_phase = 0xff;
1646 struct scsi_cmnd *cmd;
1647
1648#ifdef SUN3_SCSI_VME
1649 dregs->csr |= CSR_INTR;
1650#endif
1651
1652 while ((cmd = hostdata->connected)) {
1653 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
1654
1655 tmp = NCR5380_read(STATUS_REG);
1656
1657 if (tmp & SR_REQ) {
1658 phase = (tmp & PHASE_MASK);
1659 if (phase != old_phase) {
1660 old_phase = phase;
1661 NCR5380_dprint_phase(NDEBUG_INFORMATION, instance);
1662 }
1663#ifdef CONFIG_SUN3
1664 if (phase == PHASE_CMDOUT &&
1665 sun3_dma_setup_done != cmd) {
1666 int count;
1667
1668 if (!cmd->SCp.this_residual && cmd->SCp.buffers_residual) {
1669 ++cmd->SCp.buffer;
1670 --cmd->SCp.buffers_residual;
1671 cmd->SCp.this_residual = cmd->SCp.buffer->length;
1672 cmd->SCp.ptr = sg_virt(cmd->SCp.buffer);
1673 }
1674
1675 count = sun3scsi_dma_xfer_len(hostdata, cmd);
1676
1677 if (count > 0) {
1678 if (rq_data_dir(cmd->request))
1679 sun3scsi_dma_send_setup(hostdata,
1680 cmd->SCp.ptr, count);
1681 else
1682 sun3scsi_dma_recv_setup(hostdata,
1683 cmd->SCp.ptr, count);
1684 sun3_dma_setup_done = cmd;
1685 }
1686#ifdef SUN3_SCSI_VME
1687 dregs->csr |= CSR_INTR;
1688#endif
1689 }
1690#endif
1691
1692 if (sink && (phase != PHASE_MSGOUT)) {
1693 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
1694
1695 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN |
1696 ICR_ASSERT_ACK);
1697 while (NCR5380_read(STATUS_REG) & SR_REQ)
1698 ;
1699 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1700 ICR_ASSERT_ATN);
1701 sink = 0;
1702 continue;
1703 }
1704
1705 switch (phase) {
1706 case PHASE_DATAOUT:
1707#if (NDEBUG & NDEBUG_NO_DATAOUT)
1708 shost_printk(KERN_DEBUG, instance, "NDEBUG_NO_DATAOUT set, attempted DATAOUT aborted\n");
1709 sink = 1;
1710 do_abort(instance);
1711 cmd->result = DID_ERROR << 16;
1712 complete_cmd(instance, cmd);
1713 hostdata->connected = NULL;
1714 return;
1715#endif
1716 case PHASE_DATAIN:
1717
1718
1719
1720
1721
1722 if (!cmd->SCp.this_residual && cmd->SCp.buffers_residual) {
1723 ++cmd->SCp.buffer;
1724 --cmd->SCp.buffers_residual;
1725 cmd->SCp.this_residual = cmd->SCp.buffer->length;
1726 cmd->SCp.ptr = sg_virt(cmd->SCp.buffer);
1727 dsprintk(NDEBUG_INFORMATION, instance, "%d bytes and %d buffers left\n",
1728 cmd->SCp.this_residual,
1729 cmd->SCp.buffers_residual);
1730 }
1731
1732
1733
1734
1735
1736
1737
1738
1739
1740
1741
1742 transfersize = 0;
1743 if (!cmd->device->borken)
1744 transfersize = NCR5380_dma_xfer_len(hostdata, cmd);
1745
1746 if (transfersize > 0) {
1747 len = transfersize;
1748 if (NCR5380_transfer_dma(instance, &phase,
1749 &len, (unsigned char **)&cmd->SCp.ptr)) {
1750
1751
1752
1753
1754
1755 scmd_printk(KERN_INFO, cmd,
1756 "switching to slow handshake\n");
1757 cmd->device->borken = 1;
1758 sink = 1;
1759 do_abort(instance);
1760 cmd->result = DID_ERROR << 16;
1761
1762 }
1763 } else {
1764
1765
1766
1767 transfersize = min(cmd->SCp.this_residual,
1768 NCR5380_PIO_CHUNK_SIZE);
1769 len = transfersize;
1770 NCR5380_transfer_pio(instance, &phase, &len,
1771 (unsigned char **)&cmd->SCp.ptr);
1772 cmd->SCp.this_residual -= transfersize - len;
1773 }
1774#ifdef CONFIG_SUN3
1775 if (sun3_dma_setup_done == cmd)
1776 sun3_dma_setup_done = NULL;
1777#endif
1778 return;
1779 case PHASE_MSGIN:
1780 len = 1;
1781 data = &tmp;
1782 NCR5380_transfer_pio(instance, &phase, &len, &data);
1783 cmd->SCp.Message = tmp;
1784
1785 switch (tmp) {
1786 case ABORT:
1787 case COMMAND_COMPLETE:
1788
1789 sink = 1;
1790 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1791 dsprintk(NDEBUG_QUEUES, instance,
1792 "COMMAND COMPLETE %p target %d lun %llu\n",
1793 cmd, scmd_id(cmd), cmd->device->lun);
1794
1795 hostdata->connected = NULL;
1796
1797 cmd->result &= ~0xffff;
1798 cmd->result |= cmd->SCp.Status;
1799 cmd->result |= cmd->SCp.Message << 8;
1800
1801 if (cmd->cmnd[0] == REQUEST_SENSE)
1802 complete_cmd(instance, cmd);
1803 else {
1804 if (cmd->SCp.Status == SAM_STAT_CHECK_CONDITION ||
1805 cmd->SCp.Status == SAM_STAT_COMMAND_TERMINATED) {
1806 dsprintk(NDEBUG_QUEUES, instance, "autosense: adding cmd %p to tail of autosense queue\n",
1807 cmd);
1808 list_add_tail(&ncmd->list,
1809 &hostdata->autosense);
1810 } else
1811 complete_cmd(instance, cmd);
1812 }
1813
1814
1815
1816
1817
1818 NCR5380_write(TARGET_COMMAND_REG, 0);
1819
1820
1821 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
1822
1823 maybe_release_dma_irq(instance);
1824 return;
1825 case MESSAGE_REJECT:
1826
1827 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1828 switch (hostdata->last_message) {
1829 case HEAD_OF_QUEUE_TAG:
1830 case ORDERED_QUEUE_TAG:
1831 case SIMPLE_QUEUE_TAG:
1832 cmd->device->simple_tags = 0;
1833 hostdata->busy[cmd->device->id] |= (1 << (cmd->device->lun & 0xFF));
1834 break;
1835 default:
1836 break;
1837 }
1838 break;
1839 case DISCONNECT:
1840
1841 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1842 hostdata->connected = NULL;
1843 list_add(&ncmd->list, &hostdata->disconnected);
1844 dsprintk(NDEBUG_INFORMATION | NDEBUG_QUEUES,
1845 instance, "connected command %p for target %d lun %llu moved to disconnected queue\n",
1846 cmd, scmd_id(cmd), cmd->device->lun);
1847
1848
1849
1850
1851
1852 NCR5380_write(TARGET_COMMAND_REG, 0);
1853
1854
1855 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
1856#ifdef SUN3_SCSI_VME
1857 dregs->csr |= CSR_DMA_ENABLE;
1858#endif
1859 return;
1860
1861
1862
1863
1864
1865
1866
1867
1868
1869
1870 case SAVE_POINTERS:
1871 case RESTORE_POINTERS:
1872
1873 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1874 break;
1875 case EXTENDED_MESSAGE:
1876
1877
1878
1879
1880 extended_msg[0] = EXTENDED_MESSAGE;
1881
1882 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1883
1884 spin_unlock_irq(&hostdata->lock);
1885
1886 dsprintk(NDEBUG_EXTENDED, instance, "receiving extended message\n");
1887
1888 len = 2;
1889 data = extended_msg + 1;
1890 phase = PHASE_MSGIN;
1891 NCR5380_transfer_pio(instance, &phase, &len, &data);
1892 dsprintk(NDEBUG_EXTENDED, instance, "length %d, code 0x%02x\n",
1893 (int)extended_msg[1],
1894 (int)extended_msg[2]);
1895
1896 if (!len && extended_msg[1] > 0 &&
1897 extended_msg[1] <= sizeof(extended_msg) - 2) {
1898
1899 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1900 len = extended_msg[1] - 1;
1901 data = extended_msg + 3;
1902 phase = PHASE_MSGIN;
1903
1904 NCR5380_transfer_pio(instance, &phase, &len, &data);
1905 dsprintk(NDEBUG_EXTENDED, instance, "message received, residual %d\n",
1906 len);
1907
1908 switch (extended_msg[2]) {
1909 case EXTENDED_SDTR:
1910 case EXTENDED_WDTR:
1911 tmp = 0;
1912 }
1913 } else if (len) {
1914 shost_printk(KERN_ERR, instance, "error receiving extended message\n");
1915 tmp = 0;
1916 } else {
1917 shost_printk(KERN_NOTICE, instance, "extended message code %02x length %d is too long\n",
1918 extended_msg[2], extended_msg[1]);
1919 tmp = 0;
1920 }
1921
1922 spin_lock_irq(&hostdata->lock);
1923 if (!hostdata->connected)
1924 return;
1925
1926
1927
1928
1929
1930
1931
1932 default:
1933 if (tmp == EXTENDED_MESSAGE)
1934 scmd_printk(KERN_INFO, cmd,
1935 "rejecting unknown extended message code %02x, length %d\n",
1936 extended_msg[2], extended_msg[1]);
1937 else if (tmp)
1938 scmd_printk(KERN_INFO, cmd,
1939 "rejecting unknown message code %02x\n",
1940 tmp);
1941
1942 msgout = MESSAGE_REJECT;
1943 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1944 break;
1945 }
1946 break;
1947 case PHASE_MSGOUT:
1948 len = 1;
1949 data = &msgout;
1950 hostdata->last_message = msgout;
1951 NCR5380_transfer_pio(instance, &phase, &len, &data);
1952 if (msgout == ABORT) {
1953 hostdata->connected = NULL;
1954 cmd->result = DID_ERROR << 16;
1955 complete_cmd(instance, cmd);
1956 maybe_release_dma_irq(instance);
1957 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
1958 return;
1959 }
1960 msgout = NOP;
1961 break;
1962 case PHASE_CMDOUT:
1963 len = cmd->cmd_len;
1964 data = cmd->cmnd;
1965
1966
1967
1968
1969
1970 NCR5380_transfer_pio(instance, &phase, &len, &data);
1971 break;
1972 case PHASE_STATIN:
1973 len = 1;
1974 data = &tmp;
1975 NCR5380_transfer_pio(instance, &phase, &len, &data);
1976 cmd->SCp.Status = tmp;
1977 break;
1978 default:
1979 shost_printk(KERN_ERR, instance, "unknown phase\n");
1980 NCR5380_dprint(NDEBUG_ANY, instance);
1981 }
1982 } else {
1983 spin_unlock_irq(&hostdata->lock);
1984 NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ);
1985 spin_lock_irq(&hostdata->lock);
1986 }
1987 }
1988}
1989
1990
1991
1992
1993
1994
1995
1996
1997
1998
1999
2000static void NCR5380_reselect(struct Scsi_Host *instance)
2001{
2002 struct NCR5380_hostdata *hostdata = shost_priv(instance);
2003 unsigned char target_mask;
2004 unsigned char lun;
2005 unsigned char msg[3];
2006 struct NCR5380_cmd *ncmd;
2007 struct scsi_cmnd *tmp;
2008
2009
2010
2011
2012
2013
2014 NCR5380_write(MODE_REG, MR_BASE);
2015
2016 target_mask = NCR5380_read(CURRENT_SCSI_DATA_REG) & ~(hostdata->id_mask);
2017
2018 dsprintk(NDEBUG_RESELECTION, instance, "reselect\n");
2019
2020
2021
2022
2023
2024
2025
2026
2027
2028
2029 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY);
2030 if (NCR5380_poll_politely(hostdata,
2031 STATUS_REG, SR_SEL, 0, 2 * HZ) < 0) {
2032 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2033 return;
2034 }
2035 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2036
2037
2038
2039
2040
2041 if (NCR5380_poll_politely(hostdata,
2042 STATUS_REG, SR_REQ, SR_REQ, 2 * HZ) < 0) {
2043 do_abort(instance);
2044 return;
2045 }
2046
2047#ifdef CONFIG_SUN3
2048
2049 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(PHASE_MSGIN));
2050
2051
2052 msg[0] = NCR5380_read(CURRENT_SCSI_DATA_REG);
2053#else
2054 {
2055 int len = 1;
2056 unsigned char *data = msg;
2057 unsigned char phase = PHASE_MSGIN;
2058
2059 NCR5380_transfer_pio(instance, &phase, &len, &data);
2060
2061 if (len) {
2062 do_abort(instance);
2063 return;
2064 }
2065 }
2066#endif
2067
2068 if (!(msg[0] & 0x80)) {
2069 shost_printk(KERN_ERR, instance, "expecting IDENTIFY message, got ");
2070 spi_print_msg(msg);
2071 printk("\n");
2072 do_abort(instance);
2073 return;
2074 }
2075 lun = msg[0] & 0x07;
2076
2077
2078
2079
2080
2081
2082
2083
2084
2085
2086
2087
2088 tmp = NULL;
2089 list_for_each_entry(ncmd, &hostdata->disconnected, list) {
2090 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2091
2092 if (target_mask == (1 << scmd_id(cmd)) &&
2093 lun == (u8)cmd->device->lun) {
2094 list_del(&ncmd->list);
2095 tmp = cmd;
2096 break;
2097 }
2098 }
2099
2100 if (tmp) {
2101 dsprintk(NDEBUG_RESELECTION | NDEBUG_QUEUES, instance,
2102 "reselect: removed %p from disconnected queue\n", tmp);
2103 } else {
2104 shost_printk(KERN_ERR, instance, "target bitmask 0x%02x lun %d not in disconnected queue.\n",
2105 target_mask, lun);
2106
2107
2108
2109
2110 do_abort(instance);
2111 return;
2112 }
2113
2114#ifdef CONFIG_SUN3
2115 if (sun3_dma_setup_done != tmp) {
2116 int count;
2117
2118 if (!tmp->SCp.this_residual && tmp->SCp.buffers_residual) {
2119 ++tmp->SCp.buffer;
2120 --tmp->SCp.buffers_residual;
2121 tmp->SCp.this_residual = tmp->SCp.buffer->length;
2122 tmp->SCp.ptr = sg_virt(tmp->SCp.buffer);
2123 }
2124
2125 count = sun3scsi_dma_xfer_len(hostdata, tmp);
2126
2127 if (count > 0) {
2128 if (rq_data_dir(tmp->request))
2129 sun3scsi_dma_send_setup(hostdata,
2130 tmp->SCp.ptr, count);
2131 else
2132 sun3scsi_dma_recv_setup(hostdata,
2133 tmp->SCp.ptr, count);
2134 sun3_dma_setup_done = tmp;
2135 }
2136 }
2137
2138 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK);
2139#endif
2140
2141
2142 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2143
2144 hostdata->connected = tmp;
2145 dsprintk(NDEBUG_RESELECTION, instance, "nexus established, target %d, lun %llu\n",
2146 scmd_id(tmp), tmp->device->lun);
2147}
2148
2149
2150
2151
2152
2153
2154
2155static bool list_find_cmd(struct list_head *haystack,
2156 struct scsi_cmnd *needle)
2157{
2158 struct NCR5380_cmd *ncmd;
2159
2160 list_for_each_entry(ncmd, haystack, list)
2161 if (NCR5380_to_scmd(ncmd) == needle)
2162 return true;
2163 return false;
2164}
2165
2166
2167
2168
2169
2170
2171
2172static bool list_del_cmd(struct list_head *haystack,
2173 struct scsi_cmnd *needle)
2174{
2175 if (list_find_cmd(haystack, needle)) {
2176 struct NCR5380_cmd *ncmd = scsi_cmd_priv(needle);
2177
2178 list_del(&ncmd->list);
2179 return true;
2180 }
2181 return false;
2182}
2183
2184
2185
2186
2187
2188
2189
2190
2191
2192
2193
2194
2195
2196
2197
2198
2199
2200
2201
2202
2203
2204
2205
2206
2207
2208
2209
2210
2211
2212
2213static int NCR5380_abort(struct scsi_cmnd *cmd)
2214{
2215 struct Scsi_Host *instance = cmd->device->host;
2216 struct NCR5380_hostdata *hostdata = shost_priv(instance);
2217 unsigned long flags;
2218 int result = SUCCESS;
2219
2220 spin_lock_irqsave(&hostdata->lock, flags);
2221
2222#if (NDEBUG & NDEBUG_ANY)
2223 scmd_printk(KERN_INFO, cmd, __func__);
2224#endif
2225 NCR5380_dprint(NDEBUG_ANY, instance);
2226 NCR5380_dprint_phase(NDEBUG_ANY, instance);
2227
2228 if (list_del_cmd(&hostdata->unissued, cmd)) {
2229 dsprintk(NDEBUG_ABORT, instance,
2230 "abort: removed %p from issue queue\n", cmd);
2231 cmd->result = DID_ABORT << 16;
2232 cmd->scsi_done(cmd);
2233 goto out;
2234 }
2235
2236 if (hostdata->selecting == cmd) {
2237 dsprintk(NDEBUG_ABORT, instance,
2238 "abort: cmd %p == selecting\n", cmd);
2239 hostdata->selecting = NULL;
2240 cmd->result = DID_ABORT << 16;
2241 complete_cmd(instance, cmd);
2242 goto out;
2243 }
2244
2245 if (list_del_cmd(&hostdata->disconnected, cmd)) {
2246 dsprintk(NDEBUG_ABORT, instance,
2247 "abort: removed %p from disconnected list\n", cmd);
2248
2249
2250
2251 set_host_byte(cmd, DID_ERROR);
2252 complete_cmd(instance, cmd);
2253 result = FAILED;
2254 goto out;
2255 }
2256
2257 if (hostdata->connected == cmd) {
2258 dsprintk(NDEBUG_ABORT, instance, "abort: cmd %p is connected\n", cmd);
2259 hostdata->connected = NULL;
2260 hostdata->dma_len = 0;
2261 if (do_abort(instance)) {
2262 set_host_byte(cmd, DID_ERROR);
2263 complete_cmd(instance, cmd);
2264 result = FAILED;
2265 goto out;
2266 }
2267 set_host_byte(cmd, DID_ABORT);
2268 complete_cmd(instance, cmd);
2269 goto out;
2270 }
2271
2272 if (list_del_cmd(&hostdata->autosense, cmd)) {
2273 dsprintk(NDEBUG_ABORT, instance,
2274 "abort: removed %p from sense queue\n", cmd);
2275 set_host_byte(cmd, DID_ERROR);
2276 complete_cmd(instance, cmd);
2277 }
2278
2279out:
2280 if (result == FAILED)
2281 dsprintk(NDEBUG_ABORT, instance, "abort: failed to abort %p\n", cmd);
2282 else
2283 dsprintk(NDEBUG_ABORT, instance, "abort: successfully aborted %p\n", cmd);
2284
2285 queue_work(hostdata->work_q, &hostdata->main_task);
2286 maybe_release_dma_irq(instance);
2287 spin_unlock_irqrestore(&hostdata->lock, flags);
2288
2289 return result;
2290}
2291
2292
2293
2294
2295
2296
2297
2298
2299
2300static int NCR5380_host_reset(struct scsi_cmnd *cmd)
2301{
2302 struct Scsi_Host *instance = cmd->device->host;
2303 struct NCR5380_hostdata *hostdata = shost_priv(instance);
2304 int i;
2305 unsigned long flags;
2306 struct NCR5380_cmd *ncmd;
2307
2308 spin_lock_irqsave(&hostdata->lock, flags);
2309
2310#if (NDEBUG & NDEBUG_ANY)
2311 scmd_printk(KERN_INFO, cmd, __func__);
2312#endif
2313 NCR5380_dprint(NDEBUG_ANY, instance);
2314 NCR5380_dprint_phase(NDEBUG_ANY, instance);
2315
2316 do_reset(instance);
2317
2318
2319 NCR5380_write(MODE_REG, MR_BASE);
2320 NCR5380_write(TARGET_COMMAND_REG, 0);
2321 NCR5380_write(SELECT_ENABLE_REG, 0);
2322
2323
2324
2325
2326
2327
2328
2329 if (list_del_cmd(&hostdata->unissued, cmd)) {
2330 cmd->result = DID_RESET << 16;
2331 cmd->scsi_done(cmd);
2332 }
2333
2334 if (hostdata->selecting) {
2335 hostdata->selecting->result = DID_RESET << 16;
2336 complete_cmd(instance, hostdata->selecting);
2337 hostdata->selecting = NULL;
2338 }
2339
2340 list_for_each_entry(ncmd, &hostdata->disconnected, list) {
2341 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2342
2343 set_host_byte(cmd, DID_RESET);
2344 complete_cmd(instance, cmd);
2345 }
2346 INIT_LIST_HEAD(&hostdata->disconnected);
2347
2348 list_for_each_entry(ncmd, &hostdata->autosense, list) {
2349 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2350
2351 set_host_byte(cmd, DID_RESET);
2352 cmd->scsi_done(cmd);
2353 }
2354 INIT_LIST_HEAD(&hostdata->autosense);
2355
2356 if (hostdata->connected) {
2357 set_host_byte(hostdata->connected, DID_RESET);
2358 complete_cmd(instance, hostdata->connected);
2359 hostdata->connected = NULL;
2360 }
2361
2362 for (i = 0; i < 8; ++i)
2363 hostdata->busy[i] = 0;
2364 hostdata->dma_len = 0;
2365
2366 queue_work(hostdata->work_q, &hostdata->main_task);
2367 maybe_release_dma_irq(instance);
2368 spin_unlock_irqrestore(&hostdata->lock, flags);
2369
2370 return SUCCESS;
2371}
2372