linux/drivers/soc/ti/knav_qmss.h
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   1/*
   2 * Keystone Navigator QMSS driver internal header
   3 *
   4 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com
   5 * Author:      Sandeep Nair <sandeep_n@ti.com>
   6 *              Cyril Chemparathy <cyril@ti.com>
   7 *              Santosh Shilimkar <santosh.shilimkar@ti.com>
   8 *
   9 * This program is free software; you can redistribute it and/or
  10 * modify it under the terms of the GNU General Public License
  11 * version 2 as published by the Free Software Foundation.
  12 *
  13 * This program is distributed in the hope that it will be useful, but
  14 * WITHOUT ANY WARRANTY; without even the implied warranty of
  15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  16 * General Public License for more details.
  17 */
  18
  19#ifndef __KNAV_QMSS_H__
  20#define __KNAV_QMSS_H__
  21
  22#define THRESH_GTE      BIT(7)
  23#define THRESH_LT       0
  24
  25#define PDSP_CTRL_PC_MASK       0xffff0000
  26#define PDSP_CTRL_SOFT_RESET    BIT(0)
  27#define PDSP_CTRL_ENABLE        BIT(1)
  28#define PDSP_CTRL_RUNNING       BIT(15)
  29
  30#define ACC_MAX_CHANNEL         48
  31#define ACC_DEFAULT_PERIOD      25 /* usecs */
  32
  33#define ACC_CHANNEL_INT_BASE            2
  34
  35#define ACC_LIST_ENTRY_TYPE             1
  36#define ACC_LIST_ENTRY_WORDS            (1 << ACC_LIST_ENTRY_TYPE)
  37#define ACC_LIST_ENTRY_QUEUE_IDX        0
  38#define ACC_LIST_ENTRY_DESC_IDX (ACC_LIST_ENTRY_WORDS - 1)
  39
  40#define ACC_CMD_DISABLE_CHANNEL 0x80
  41#define ACC_CMD_ENABLE_CHANNEL  0x81
  42#define ACC_CFG_MULTI_QUEUE             BIT(21)
  43
  44#define ACC_INTD_OFFSET_EOI             (0x0010)
  45#define ACC_INTD_OFFSET_COUNT(ch)       (0x0300 + 4 * (ch))
  46#define ACC_INTD_OFFSET_STATUS(ch)      (0x0200 + 4 * ((ch) / 32))
  47
  48#define RANGE_MAX_IRQS                  64
  49
  50#define ACC_DESCS_MAX           SZ_1K
  51#define ACC_DESCS_MASK          (ACC_DESCS_MAX - 1)
  52#define DESC_SIZE_MASK          0xful
  53#define DESC_PTR_MASK           (~DESC_SIZE_MASK)
  54
  55#define KNAV_NAME_SIZE                  32
  56
  57enum knav_acc_result {
  58        ACC_RET_IDLE,
  59        ACC_RET_SUCCESS,
  60        ACC_RET_INVALID_COMMAND,
  61        ACC_RET_INVALID_CHANNEL,
  62        ACC_RET_INACTIVE_CHANNEL,
  63        ACC_RET_ACTIVE_CHANNEL,
  64        ACC_RET_INVALID_QUEUE,
  65        ACC_RET_INVALID_RET,
  66};
  67
  68struct knav_reg_config {
  69        u32             revision;
  70        u32             __pad1;
  71        u32             divert;
  72        u32             link_ram_base0;
  73        u32             link_ram_size0;
  74        u32             link_ram_base1;
  75        u32             __pad2[2];
  76        u32             starvation[0];
  77};
  78
  79struct knav_reg_region {
  80        u32             base;
  81        u32             start_index;
  82        u32             size_count;
  83        u32             __pad;
  84};
  85
  86struct knav_reg_pdsp_regs {
  87        u32             control;
  88        u32             status;
  89        u32             cycle_count;
  90        u32             stall_count;
  91};
  92
  93struct knav_reg_acc_command {
  94        u32             command;
  95        u32             queue_mask;
  96        u32             list_dma;
  97        u32             queue_num;
  98        u32             timer_config;
  99};
 100
 101struct knav_link_ram_block {
 102        dma_addr_t       dma;
 103        void            *virt;
 104        size_t           size;
 105};
 106
 107struct knav_acc_info {
 108        u32                      pdsp_id;
 109        u32                      start_channel;
 110        u32                      list_entries;
 111        u32                      pacing_mode;
 112        u32                      timer_count;
 113        int                      mem_size;
 114        int                      list_size;
 115        struct knav_pdsp_info   *pdsp;
 116};
 117
 118struct knav_acc_channel {
 119        u32                     channel;
 120        u32                     list_index;
 121        u32                     open_mask;
 122        u32                     *list_cpu[2];
 123        dma_addr_t              list_dma[2];
 124        char                    name[KNAV_NAME_SIZE];
 125        atomic_t                retrigger_count;
 126};
 127
 128struct knav_pdsp_info {
 129        const char                                      *name;
 130        struct knav_reg_pdsp_regs  __iomem              *regs;
 131        union {
 132                void __iomem                            *command;
 133                struct knav_reg_acc_command __iomem     *acc_command;
 134                u32 __iomem                             *qos_command;
 135        };
 136        void __iomem                                    *intd;
 137        u32 __iomem                                     *iram;
 138        u32                                             id;
 139        struct list_head                                list;
 140        bool                                            loaded;
 141        bool                                            started;
 142};
 143
 144struct knav_qmgr_info {
 145        unsigned                        start_queue;
 146        unsigned                        num_queues;
 147        struct knav_reg_config __iomem  *reg_config;
 148        struct knav_reg_region __iomem  *reg_region;
 149        struct knav_reg_queue __iomem   *reg_push, *reg_pop, *reg_peek;
 150        void __iomem                    *reg_status;
 151        struct list_head                list;
 152};
 153
 154#define KNAV_NUM_LINKRAM        2
 155
 156/**
 157 * struct knav_queue_stats:     queue statistics
 158 * pushes:                      number of push operations
 159 * pops:                        number of pop operations
 160 * push_errors:                 number of push errors
 161 * pop_errors:                  number of pop errors
 162 * notifies:                    notifier counts
 163 */
 164struct knav_queue_stats {
 165        atomic_t         pushes;
 166        atomic_t         pops;
 167        atomic_t         push_errors;
 168        atomic_t         pop_errors;
 169        atomic_t         notifies;
 170};
 171
 172/**
 173 * struct knav_reg_queue:       queue registers
 174 * @entry_count:                valid entries in the queue
 175 * @byte_count:                 total byte count in thhe queue
 176 * @packet_size:                packet size for the queue
 177 * @ptr_size_thresh:            packet pointer size threshold
 178 */
 179struct knav_reg_queue {
 180        u32             entry_count;
 181        u32             byte_count;
 182        u32             packet_size;
 183        u32             ptr_size_thresh;
 184};
 185
 186/**
 187 * struct knav_region:          qmss region info
 188 * @dma_start, dma_end:         start and end dma address
 189 * @virt_start, virt_end:       start and end virtual address
 190 * @desc_size:                  descriptor size
 191 * @used_desc:                  consumed descriptors
 192 * @id:                         region number
 193 * @num_desc:                   total descriptors
 194 * @link_index:                 index of the first descriptor
 195 * @name:                       region name
 196 * @list:                       instance in the device's region list
 197 * @pools:                      list of descriptor pools in the region
 198 */
 199struct knav_region {
 200        dma_addr_t              dma_start, dma_end;
 201        void                    *virt_start, *virt_end;
 202        unsigned                desc_size;
 203        unsigned                used_desc;
 204        unsigned                id;
 205        unsigned                num_desc;
 206        unsigned                link_index;
 207        const char              *name;
 208        struct list_head        list;
 209        struct list_head        pools;
 210};
 211
 212/**
 213 * struct knav_pool:            qmss pools
 214 * @dev:                        device pointer
 215 * @region:                     qmss region info
 216 * @queue:                      queue registers
 217 * @kdev:                       qmss device pointer
 218 * @region_offset:              offset from the base
 219 * @num_desc:                   total descriptors
 220 * @desc_size:                  descriptor size
 221 * @region_id:                  region number
 222 * @name:                       pool name
 223 * @list:                       list head
 224 * @region_inst:                instance in the region's pool list
 225 */
 226struct knav_pool {
 227        struct device                   *dev;
 228        struct knav_region              *region;
 229        struct knav_queue               *queue;
 230        struct knav_device              *kdev;
 231        int                             region_offset;
 232        int                             num_desc;
 233        int                             desc_size;
 234        int                             region_id;
 235        const char                      *name;
 236        struct list_head                list;
 237        struct list_head                region_inst;
 238};
 239
 240/**
 241 * struct knav_queue_inst:              qmss queue instace properties
 242 * @descs:                              descriptor pointer
 243 * @desc_head, desc_tail, desc_count:   descriptor counters
 244 * @acc:                                accumulator channel pointer
 245 * @kdev:                               qmss device pointer
 246 * @range:                              range info
 247 * @qmgr:                               queue manager info
 248 * @id:                                 queue instace id
 249 * @irq_num:                            irq line number
 250 * @notify_needed:                      notifier needed based on queue type
 251 * @num_notifiers:                      total notifiers
 252 * @handles:                            list head
 253 * @name:                               queue instance name
 254 * @irq_name:                           irq line name
 255 */
 256struct knav_queue_inst {
 257        u32                             *descs;
 258        atomic_t                        desc_head, desc_tail, desc_count;
 259        struct knav_acc_channel *acc;
 260        struct knav_device              *kdev;
 261        struct knav_range_info          *range;
 262        struct knav_qmgr_info           *qmgr;
 263        u32                             id;
 264        int                             irq_num;
 265        int                             notify_needed;
 266        atomic_t                        num_notifiers;
 267        struct list_head                handles;
 268        const char                      *name;
 269        const char                      *irq_name;
 270};
 271
 272/**
 273 * struct knav_queue:                   qmss queue properties
 274 * @reg_push, reg_pop, reg_peek:        push, pop queue registers
 275 * @inst:                               qmss queue instace properties
 276 * @notifier_fn:                        notifier function
 277 * @notifier_fn_arg:                    notifier function argument
 278 * @notifier_enabled:                   notier enabled for a give queue
 279 * @rcu:                                rcu head
 280 * @flags:                              queue flags
 281 * @list:                               list head
 282 */
 283struct knav_queue {
 284        struct knav_reg_queue __iomem   *reg_push, *reg_pop, *reg_peek;
 285        struct knav_queue_inst          *inst;
 286        struct knav_queue_stats stats;
 287        knav_queue_notify_fn            notifier_fn;
 288        void                            *notifier_fn_arg;
 289        atomic_t                        notifier_enabled;
 290        struct rcu_head                 rcu;
 291        unsigned                        flags;
 292        struct list_head                list;
 293};
 294
 295struct knav_device {
 296        struct device                           *dev;
 297        unsigned                                base_id;
 298        unsigned                                num_queues;
 299        unsigned                                num_queues_in_use;
 300        unsigned                                inst_shift;
 301        struct knav_link_ram_block              link_rams[KNAV_NUM_LINKRAM];
 302        void                                    *instances;
 303        struct list_head                        regions;
 304        struct list_head                        queue_ranges;
 305        struct list_head                        pools;
 306        struct list_head                        pdsps;
 307        struct list_head                        qmgrs;
 308};
 309
 310struct knav_range_ops {
 311        int     (*init_range)(struct knav_range_info *range);
 312        int     (*free_range)(struct knav_range_info *range);
 313        int     (*init_queue)(struct knav_range_info *range,
 314                              struct knav_queue_inst *inst);
 315        int     (*open_queue)(struct knav_range_info *range,
 316                              struct knav_queue_inst *inst, unsigned flags);
 317        int     (*close_queue)(struct knav_range_info *range,
 318                               struct knav_queue_inst *inst);
 319        int     (*set_notify)(struct knav_range_info *range,
 320                              struct knav_queue_inst *inst, bool enabled);
 321};
 322
 323struct knav_irq_info {
 324        int     irq;
 325        u32     cpu_map;
 326};
 327
 328struct knav_range_info {
 329        const char                      *name;
 330        struct knav_device              *kdev;
 331        unsigned                        queue_base;
 332        unsigned                        num_queues;
 333        void                            *queue_base_inst;
 334        unsigned                        flags;
 335        struct list_head                list;
 336        struct knav_range_ops           *ops;
 337        struct knav_acc_info            acc_info;
 338        struct knav_acc_channel *acc;
 339        unsigned                        num_irqs;
 340        struct knav_irq_info            irqs[RANGE_MAX_IRQS];
 341};
 342
 343#define RANGE_RESERVED          BIT(0)
 344#define RANGE_HAS_IRQ           BIT(1)
 345#define RANGE_HAS_ACCUMULATOR   BIT(2)
 346#define RANGE_MULTI_QUEUE       BIT(3)
 347
 348#define for_each_region(kdev, region)                           \
 349        list_for_each_entry(region, &kdev->regions, list)
 350
 351#define first_region(kdev)                                      \
 352        list_first_entry_or_null(&kdev->regions, \
 353                                 struct knav_region, list)
 354
 355#define for_each_queue_range(kdev, range)                       \
 356        list_for_each_entry(range, &kdev->queue_ranges, list)
 357
 358#define first_queue_range(kdev)                                 \
 359        list_first_entry_or_null(&kdev->queue_ranges, \
 360                                 struct knav_range_info, list)
 361
 362#define for_each_pool(kdev, pool)                               \
 363        list_for_each_entry(pool, &kdev->pools, list)
 364
 365#define for_each_pdsp(kdev, pdsp)                               \
 366        list_for_each_entry(pdsp, &kdev->pdsps, list)
 367
 368#define for_each_qmgr(kdev, qmgr)                               \
 369        list_for_each_entry(qmgr, &kdev->qmgrs, list)
 370
 371static inline struct knav_pdsp_info *
 372knav_find_pdsp(struct knav_device *kdev, unsigned pdsp_id)
 373{
 374        struct knav_pdsp_info *pdsp;
 375
 376        for_each_pdsp(kdev, pdsp)
 377                if (pdsp_id == pdsp->id)
 378                        return pdsp;
 379        return NULL;
 380}
 381
 382extern int knav_init_acc_range(struct knav_device *kdev,
 383                                        struct device_node *node,
 384                                        struct knav_range_info *range);
 385extern void knav_queue_notify(struct knav_queue_inst *inst);
 386
 387#endif /* __KNAV_QMSS_H__ */
 388