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6#include <linux/clk-provider.h>
7#include <linux/module.h>
8#include <linux/of_device.h>
9#include <linux/pci.h>
10#include <linux/platform_device.h>
11#include <linux/spi/pxa2xx_spi.h>
12
13#include <linux/dmaengine.h>
14#include <linux/platform_data/dma-dw.h>
15
16enum {
17 PORT_QUARK_X1000,
18 PORT_BYT,
19 PORT_MRFLD,
20 PORT_BSW0,
21 PORT_BSW1,
22 PORT_BSW2,
23 PORT_CE4100,
24 PORT_LPT,
25};
26
27struct pxa_spi_info {
28 enum pxa_ssp_type type;
29 int port_id;
30 int num_chipselect;
31 unsigned long max_clk_rate;
32
33
34 bool (*dma_filter)(struct dma_chan *chan, void *param);
35 void *tx_param;
36 void *rx_param;
37
38 int (*setup)(struct pci_dev *pdev, struct pxa_spi_info *c);
39};
40
41static struct dw_dma_slave byt_tx_param = { .dst_id = 0 };
42static struct dw_dma_slave byt_rx_param = { .src_id = 1 };
43
44static struct dw_dma_slave mrfld3_tx_param = { .dst_id = 15 };
45static struct dw_dma_slave mrfld3_rx_param = { .src_id = 14 };
46static struct dw_dma_slave mrfld5_tx_param = { .dst_id = 13 };
47static struct dw_dma_slave mrfld5_rx_param = { .src_id = 12 };
48static struct dw_dma_slave mrfld6_tx_param = { .dst_id = 11 };
49static struct dw_dma_slave mrfld6_rx_param = { .src_id = 10 };
50
51static struct dw_dma_slave bsw0_tx_param = { .dst_id = 0 };
52static struct dw_dma_slave bsw0_rx_param = { .src_id = 1 };
53static struct dw_dma_slave bsw1_tx_param = { .dst_id = 6 };
54static struct dw_dma_slave bsw1_rx_param = { .src_id = 7 };
55static struct dw_dma_slave bsw2_tx_param = { .dst_id = 8 };
56static struct dw_dma_slave bsw2_rx_param = { .src_id = 9 };
57
58static struct dw_dma_slave lpt_tx_param = { .dst_id = 0 };
59static struct dw_dma_slave lpt_rx_param = { .src_id = 1 };
60
61static bool lpss_dma_filter(struct dma_chan *chan, void *param)
62{
63 struct dw_dma_slave *dws = param;
64
65 if (dws->dma_dev != chan->device->dev)
66 return false;
67
68 chan->private = dws;
69 return true;
70}
71
72static int lpss_spi_setup(struct pci_dev *dev, struct pxa_spi_info *c)
73{
74 struct pci_dev *dma_dev;
75
76 c->num_chipselect = 1;
77 c->max_clk_rate = 50000000;
78
79 dma_dev = pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn), 0));
80
81 if (c->tx_param) {
82 struct dw_dma_slave *slave = c->tx_param;
83
84 slave->dma_dev = &dma_dev->dev;
85 slave->m_master = 0;
86 slave->p_master = 1;
87 }
88
89 if (c->rx_param) {
90 struct dw_dma_slave *slave = c->rx_param;
91
92 slave->dma_dev = &dma_dev->dev;
93 slave->m_master = 0;
94 slave->p_master = 1;
95 }
96
97 c->dma_filter = lpss_dma_filter;
98 return 0;
99}
100
101static int mrfld_spi_setup(struct pci_dev *dev, struct pxa_spi_info *c)
102{
103 struct pci_dev *dma_dev = pci_get_slot(dev->bus, PCI_DEVFN(21, 0));
104 struct dw_dma_slave *tx, *rx;
105
106 switch (PCI_FUNC(dev->devfn)) {
107 case 0:
108 c->port_id = 3;
109 c->num_chipselect = 1;
110 c->tx_param = &mrfld3_tx_param;
111 c->rx_param = &mrfld3_rx_param;
112 break;
113 case 1:
114 c->port_id = 5;
115 c->num_chipselect = 4;
116 c->tx_param = &mrfld5_tx_param;
117 c->rx_param = &mrfld5_rx_param;
118 break;
119 case 2:
120 c->port_id = 6;
121 c->num_chipselect = 1;
122 c->tx_param = &mrfld6_tx_param;
123 c->rx_param = &mrfld6_rx_param;
124 break;
125 default:
126 return -ENODEV;
127 }
128
129 tx = c->tx_param;
130 tx->dma_dev = &dma_dev->dev;
131
132 rx = c->rx_param;
133 rx->dma_dev = &dma_dev->dev;
134
135 c->dma_filter = lpss_dma_filter;
136 return 0;
137}
138
139static struct pxa_spi_info spi_info_configs[] = {
140 [PORT_CE4100] = {
141 .type = PXA25x_SSP,
142 .port_id = -1,
143 .num_chipselect = -1,
144 .max_clk_rate = 3686400,
145 },
146 [PORT_BYT] = {
147 .type = LPSS_BYT_SSP,
148 .port_id = 0,
149 .setup = lpss_spi_setup,
150 .tx_param = &byt_tx_param,
151 .rx_param = &byt_rx_param,
152 },
153 [PORT_BSW0] = {
154 .type = LPSS_BSW_SSP,
155 .port_id = 0,
156 .setup = lpss_spi_setup,
157 .tx_param = &bsw0_tx_param,
158 .rx_param = &bsw0_rx_param,
159 },
160 [PORT_BSW1] = {
161 .type = LPSS_BSW_SSP,
162 .port_id = 1,
163 .setup = lpss_spi_setup,
164 .tx_param = &bsw1_tx_param,
165 .rx_param = &bsw1_rx_param,
166 },
167 [PORT_BSW2] = {
168 .type = LPSS_BSW_SSP,
169 .port_id = 2,
170 .setup = lpss_spi_setup,
171 .tx_param = &bsw2_tx_param,
172 .rx_param = &bsw2_rx_param,
173 },
174 [PORT_MRFLD] = {
175 .type = PXA27x_SSP,
176 .max_clk_rate = 25000000,
177 .setup = mrfld_spi_setup,
178 },
179 [PORT_QUARK_X1000] = {
180 .type = QUARK_X1000_SSP,
181 .port_id = -1,
182 .num_chipselect = 1,
183 .max_clk_rate = 50000000,
184 },
185 [PORT_LPT] = {
186 .type = LPSS_LPT_SSP,
187 .port_id = 0,
188 .setup = lpss_spi_setup,
189 .tx_param = &lpt_tx_param,
190 .rx_param = &lpt_rx_param,
191 },
192};
193
194static int pxa2xx_spi_pci_probe(struct pci_dev *dev,
195 const struct pci_device_id *ent)
196{
197 struct platform_device_info pi;
198 int ret;
199 struct platform_device *pdev;
200 struct pxa2xx_spi_master spi_pdata;
201 struct ssp_device *ssp;
202 struct pxa_spi_info *c;
203 char buf[40];
204
205 ret = pcim_enable_device(dev);
206 if (ret)
207 return ret;
208
209 ret = pcim_iomap_regions(dev, 1 << 0, "PXA2xx SPI");
210 if (ret)
211 return ret;
212
213 c = &spi_info_configs[ent->driver_data];
214 if (c->setup) {
215 ret = c->setup(dev, c);
216 if (ret)
217 return ret;
218 }
219
220 memset(&spi_pdata, 0, sizeof(spi_pdata));
221 spi_pdata.num_chipselect = (c->num_chipselect > 0) ? c->num_chipselect : dev->devfn;
222 spi_pdata.dma_filter = c->dma_filter;
223 spi_pdata.tx_param = c->tx_param;
224 spi_pdata.rx_param = c->rx_param;
225 spi_pdata.enable_dma = c->rx_param && c->tx_param;
226
227 ssp = &spi_pdata.ssp;
228 ssp->phys_base = pci_resource_start(dev, 0);
229 ssp->mmio_base = pcim_iomap_table(dev)[0];
230 ssp->port_id = (c->port_id >= 0) ? c->port_id : dev->devfn;
231 ssp->type = c->type;
232
233 pci_set_master(dev);
234
235 ret = pci_alloc_irq_vectors(dev, 1, 1, PCI_IRQ_ALL_TYPES);
236 if (ret < 0)
237 return ret;
238 ssp->irq = pci_irq_vector(dev, 0);
239
240 snprintf(buf, sizeof(buf), "pxa2xx-spi.%d", ssp->port_id);
241 ssp->clk = clk_register_fixed_rate(&dev->dev, buf , NULL, 0,
242 c->max_clk_rate);
243 if (IS_ERR(ssp->clk))
244 return PTR_ERR(ssp->clk);
245
246 memset(&pi, 0, sizeof(pi));
247 pi.fwnode = dev->dev.fwnode;
248 pi.parent = &dev->dev;
249 pi.name = "pxa2xx-spi";
250 pi.id = ssp->port_id;
251 pi.data = &spi_pdata;
252 pi.size_data = sizeof(spi_pdata);
253
254 pdev = platform_device_register_full(&pi);
255 if (IS_ERR(pdev)) {
256 clk_unregister(ssp->clk);
257 return PTR_ERR(pdev);
258 }
259
260 pci_set_drvdata(dev, pdev);
261
262 return 0;
263}
264
265static void pxa2xx_spi_pci_remove(struct pci_dev *dev)
266{
267 struct platform_device *pdev = pci_get_drvdata(dev);
268 struct pxa2xx_spi_master *spi_pdata;
269
270 spi_pdata = dev_get_platdata(&pdev->dev);
271
272 platform_device_unregister(pdev);
273 clk_unregister(spi_pdata->ssp.clk);
274}
275
276static const struct pci_device_id pxa2xx_spi_pci_devices[] = {
277 { PCI_VDEVICE(INTEL, 0x0935), PORT_QUARK_X1000 },
278 { PCI_VDEVICE(INTEL, 0x0f0e), PORT_BYT },
279 { PCI_VDEVICE(INTEL, 0x1194), PORT_MRFLD },
280 { PCI_VDEVICE(INTEL, 0x228e), PORT_BSW0 },
281 { PCI_VDEVICE(INTEL, 0x2290), PORT_BSW1 },
282 { PCI_VDEVICE(INTEL, 0x22ac), PORT_BSW2 },
283 { PCI_VDEVICE(INTEL, 0x2e6a), PORT_CE4100 },
284 { PCI_VDEVICE(INTEL, 0x9ce6), PORT_LPT },
285 { },
286};
287MODULE_DEVICE_TABLE(pci, pxa2xx_spi_pci_devices);
288
289static struct pci_driver pxa2xx_spi_pci_driver = {
290 .name = "pxa2xx_spi_pci",
291 .id_table = pxa2xx_spi_pci_devices,
292 .probe = pxa2xx_spi_pci_probe,
293 .remove = pxa2xx_spi_pci_remove,
294};
295
296module_pci_driver(pxa2xx_spi_pci_driver);
297
298MODULE_DESCRIPTION("CE4100/LPSS PCI-SPI glue code for PXA's driver");
299MODULE_LICENSE("GPL v2");
300MODULE_AUTHOR("Sebastian Andrzej Siewior <bigeasy@linutronix.de>");
301
