LXR linux/drivers/staging/rtl8723bs/hal/odm

   1/******************************************************************************
   2 *
   3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
   4 *
   5 * This program is free software; you can redistribute it and/or modify it
   6 * under the terms of version 2 of the GNU General Public License as
   7 * published by the Free Software Foundation.
   8 *
   9 * This program is distributed in the hope that it will be useful, but WITHOUT
  10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12 * more details.
  13 *
  14 ******************************************************************************/
  15
  16#include "odm_precomp.h"
  17
  18void odm_DynamicBBPowerSavingInit(void *pDM_VOID)
  19{
  20        PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
  21        pPS_T pDM_PSTable = &pDM_Odm->DM_PSTable;
  22
  23        pDM_PSTable->PreCCAState = CCA_MAX;
  24        pDM_PSTable->CurCCAState = CCA_MAX;
  25        pDM_PSTable->PreRFState = RF_MAX;
  26        pDM_PSTable->CurRFState = RF_MAX;
  27        pDM_PSTable->Rssi_val_min = 0;
  28        pDM_PSTable->initialize = 0;
  29}
  30
  31void ODM_RF_Saving(void *pDM_VOID, u8 bForceInNormal)
  32{
  33        PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
  34        pPS_T pDM_PSTable = &pDM_Odm->DM_PSTable;
  35        u8 Rssi_Up_bound = 30;
  36        u8 Rssi_Low_bound = 25;
  37
  38        if (pDM_Odm->PatchID == 40) { /* RT_CID_819x_FUNAI_TV */
  39                Rssi_Up_bound = 50;
  40                Rssi_Low_bound = 45;
  41        }
  42
  43        if (pDM_PSTable->initialize == 0) {
  44
  45                pDM_PSTable->Reg874 = (PHY_QueryBBReg(pDM_Odm->Adapter, 0x874, bMaskDWord)&0x1CC000)>>14;
  46                pDM_PSTable->RegC70 = (PHY_QueryBBReg(pDM_Odm->Adapter, 0xc70, bMaskDWord)&BIT3)>>3;
  47                pDM_PSTable->Reg85C = (PHY_QueryBBReg(pDM_Odm->Adapter, 0x85c, bMaskDWord)&0xFF000000)>>24;
  48                pDM_PSTable->RegA74 = (PHY_QueryBBReg(pDM_Odm->Adapter, 0xa74, bMaskDWord)&0xF000)>>12;
  49                /* Reg818 = PHY_QueryBBReg(padapter, 0x818, bMaskDWord); */
  50                pDM_PSTable->initialize = 1;
  51        }
  52
  53        if (!bForceInNormal) {
  54                if (pDM_Odm->RSSI_Min != 0xFF) {
  55                        if (pDM_PSTable->PreRFState == RF_Normal) {
  56                                if (pDM_Odm->RSSI_Min >= Rssi_Up_bound)
  57                                        pDM_PSTable->CurRFState = RF_Save;
  58                                else
  59                                        pDM_PSTable->CurRFState = RF_Normal;
  60                        } else {
  61                                if (pDM_Odm->RSSI_Min <= Rssi_Low_bound)
  62                                        pDM_PSTable->CurRFState = RF_Normal;
  63                                else
  64                                        pDM_PSTable->CurRFState = RF_Save;
  65                        }
  66                } else
  67                        pDM_PSTable->CurRFState = RF_MAX;
  68        } else
  69                pDM_PSTable->CurRFState = RF_Normal;
  70
  71        if (pDM_PSTable->PreRFState != pDM_PSTable->CurRFState) {
  72                if (pDM_PSTable->CurRFState == RF_Save) {
  73                        PHY_SetBBReg(pDM_Odm->Adapter, 0x874, 0x1C0000, 0x2); /* Reg874[20:18]=3'b010 */
  74                        PHY_SetBBReg(pDM_Odm->Adapter, 0xc70, BIT3, 0); /* RegC70[3]= 1'b0 */
  75                        PHY_SetBBReg(pDM_Odm->Adapter, 0x85c, 0xFF000000, 0x63); /* Reg85C[31:24]= 0x63 */
  76                        PHY_SetBBReg(pDM_Odm->Adapter, 0x874, 0xC000, 0x2); /* Reg874[15:14]=2'b10 */
  77                        PHY_SetBBReg(pDM_Odm->Adapter, 0xa74, 0xF000, 0x3); /* RegA75[7:4]= 0x3 */
  78                        PHY_SetBBReg(pDM_Odm->Adapter, 0x818, BIT28, 0x0); /* Reg818[28]= 1'b0 */
  79                        PHY_SetBBReg(pDM_Odm->Adapter, 0x818, BIT28, 0x1); /* Reg818[28]= 1'b1 */
  80                } else {
  81                        PHY_SetBBReg(pDM_Odm->Adapter, 0x874, 0x1CC000, pDM_PSTable->Reg874);
  82                        PHY_SetBBReg(pDM_Odm->Adapter, 0xc70, BIT3, pDM_PSTable->RegC70);
  83                        PHY_SetBBReg(pDM_Odm->Adapter, 0x85c, 0xFF000000, pDM_PSTable->Reg85C);
  84                        PHY_SetBBReg(pDM_Odm->Adapter, 0xa74, 0xF000, pDM_PSTable->RegA74);
  85                        PHY_SetBBReg(pDM_Odm->Adapter, 0x818, BIT28, 0x0);
  86                }
  87                pDM_PSTable->PreRFState = pDM_PSTable->CurRFState;
  88        }
  89}
  90