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23#include <linux/delay.h>
24#include <linux/init.h>
25#include <linux/interrupt.h>
26#include <linux/pci.h>
27#include <linux/module.h>
28#include <linux/io.h>
29#include <linux/nospec.h>
30
31#include <sound/core.h>
32#include <sound/control.h>
33#include <sound/pcm.h>
34#include <sound/info.h>
35#include <sound/asoundef.h>
36#include <sound/initval.h>
37
38#include <asm/current.h>
39
40static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
41static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
42static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
43static bool precise_ptr[SNDRV_CARDS];
44
45module_param_array(index, int, NULL, 0444);
46MODULE_PARM_DESC(index, "Index value for RME Digi9652 (Hammerfall) soundcard.");
47module_param_array(id, charp, NULL, 0444);
48MODULE_PARM_DESC(id, "ID string for RME Digi9652 (Hammerfall) soundcard.");
49module_param_array(enable, bool, NULL, 0444);
50MODULE_PARM_DESC(enable, "Enable/disable specific RME96{52,36} soundcards.");
51module_param_array(precise_ptr, bool, NULL, 0444);
52MODULE_PARM_DESC(precise_ptr, "Enable precise pointer (doesn't work reliably).");
53MODULE_AUTHOR("Paul Davis <pbd@op.net>, Winfried Ritsch");
54MODULE_DESCRIPTION("RME Digi9652/Digi9636");
55MODULE_LICENSE("GPL");
56MODULE_SUPPORTED_DEVICE("{{RME,Hammerfall},"
57 "{RME,Hammerfall-Light}}");
58
59
60
61
62
63
64
65
66
67
68#define RME9652_NCHANNELS 26
69#define RME9636_NCHANNELS 18
70
71
72
73#define RME9652_SYNC_FROM_SPDIF 0
74#define RME9652_SYNC_FROM_ADAT1 1
75#define RME9652_SYNC_FROM_ADAT2 2
76#define RME9652_SYNC_FROM_ADAT3 3
77
78
79
80#define RME9652_SPDIFIN_OPTICAL 0
81#define RME9652_SPDIFIN_COAXIAL 1
82#define RME9652_SPDIFIN_INTERN 2
83
84
85
86#define RME9652_IRQ (1<<0)
87#define RME9652_lock_2 (1<<1)
88#define RME9652_lock_1 (1<<2)
89#define RME9652_lock_0 (1<<3)
90#define RME9652_fs48 (1<<4)
91#define RME9652_wsel_rd (1<<5)
92
93#define RME9652_sync_2 (1<<16)
94#define RME9652_sync_1 (1<<17)
95#define RME9652_sync_0 (1<<18)
96#define RME9652_DS_rd (1<<19)
97#define RME9652_tc_busy (1<<20)
98#define RME9652_tc_out (1<<21)
99#define RME9652_F_0 (1<<22)
100#define RME9652_F_1 (1<<23)
101#define RME9652_F_2 (1<<24)
102#define RME9652_ERF (1<<25)
103#define RME9652_buffer_id (1<<26)
104#define RME9652_tc_valid (1<<27)
105#define RME9652_SPDIF_READ (1<<28)
106
107#define RME9652_sync (RME9652_sync_0|RME9652_sync_1|RME9652_sync_2)
108#define RME9652_lock (RME9652_lock_0|RME9652_lock_1|RME9652_lock_2)
109#define RME9652_F (RME9652_F_0|RME9652_F_1|RME9652_F_2)
110#define rme9652_decode_spdif_rate(x) ((x)>>22)
111
112
113
114#define RME9652_buf_pos 0x000FFC0
115
116
117
118
119
120#define RME9652_REV15_buf_pos(x) ((((x)&0xE0000000)>>26)|((x)&RME9652_buf_pos))
121
122
123
124
125
126#define RME9652_IO_EXTENT 1024
127
128#define RME9652_init_buffer 0
129#define RME9652_play_buffer 32
130#define RME9652_rec_buffer 36
131#define RME9652_control_register 64
132#define RME9652_irq_clear 96
133#define RME9652_time_code 100
134#define RME9652_thru_base 128
135
136
137
138
139
140
141
142#define RME9652_status_register 0
143
144
145
146
147#define RME9652_start_bit (1<<0)
148
149#define RME9652_Master (1<<4)
150#define RME9652_IE (1<<5)
151#define RME9652_freq (1<<6)
152#define RME9652_freq1 (1<<7)
153#define RME9652_DS (1<<8)
154#define RME9652_PRO (1<<9)
155#define RME9652_EMP (1<<10)
156#define RME9652_Dolby (1<<11)
157#define RME9652_opt_out (1<<12)
158#define RME9652_wsel (1<<13)
159#define RME9652_inp_0 (1<<14)
160#define RME9652_inp_1 (1<<15)
161#define RME9652_SyncPref_ADAT2 (1<<16)
162#define RME9652_SyncPref_ADAT3 (1<<17)
163#define RME9652_SPDIF_RESET (1<<18)
164#define RME9652_SPDIF_SELECT (1<<19)
165#define RME9652_SPDIF_CLOCK (1<<20)
166#define RME9652_SPDIF_WRITE (1<<21)
167#define RME9652_ADAT1_INTERNAL (1<<22)
168
169
170
171#define RME9652_latency 0x0e
172#define rme9652_encode_latency(x) (((x)&0x7)<<1)
173#define rme9652_decode_latency(x) (((x)>>1)&0x7)
174#define rme9652_running_double_speed(s) ((s)->control_register & RME9652_DS)
175#define RME9652_inp (RME9652_inp_0|RME9652_inp_1)
176#define rme9652_encode_spdif_in(x) (((x)&0x3)<<14)
177#define rme9652_decode_spdif_in(x) (((x)>>14)&0x3)
178
179#define RME9652_SyncPref_Mask (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
180#define RME9652_SyncPref_ADAT1 0
181#define RME9652_SyncPref_SPDIF (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
182
183
184
185#define RME9652_CHANNEL_BUFFER_SAMPLES (16*1024)
186#define RME9652_CHANNEL_BUFFER_BYTES (4*RME9652_CHANNEL_BUFFER_SAMPLES)
187
188
189
190
191
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193
194
195
196
197#define RME9652_DMA_AREA_BYTES ((RME9652_NCHANNELS+1) * RME9652_CHANNEL_BUFFER_BYTES)
198#define RME9652_DMA_AREA_KILOBYTES (RME9652_DMA_AREA_BYTES/1024)
199
200struct snd_rme9652 {
201 int dev;
202
203 spinlock_t lock;
204 int irq;
205 unsigned long port;
206 void __iomem *iobase;
207
208 int precise_ptr;
209
210 u32 control_register;
211 u32 thru_bits;
212
213 u32 creg_spdif;
214 u32 creg_spdif_stream;
215
216 char *card_name;
217
218 size_t hw_offsetmask;
219 size_t prev_hw_offset;
220 size_t max_jitter;
221
222 size_t period_bytes;
223
224 unsigned char ds_channels;
225 unsigned char ss_channels;
226
227 struct snd_dma_buffer playback_dma_buf;
228 struct snd_dma_buffer capture_dma_buf;
229
230 unsigned char *capture_buffer;
231 unsigned char *playback_buffer;
232
233 pid_t capture_pid;
234 pid_t playback_pid;
235
236 struct snd_pcm_substream *capture_substream;
237 struct snd_pcm_substream *playback_substream;
238 int running;
239
240 int passthru;
241 int hw_rev;
242
243 int last_spdif_sample_rate;
244 int last_adat_sample_rate;
245
246 char *channel_map;
247
248 struct snd_card *card;
249 struct snd_pcm *pcm;
250 struct pci_dev *pci;
251 struct snd_kcontrol *spdif_ctl;
252
253};
254
255
256
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258
259
260
261
262
263static char channel_map_9652_ss[26] = {
264 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
265 18, 19, 20, 21, 22, 23, 24, 25
266};
267
268static char channel_map_9636_ss[26] = {
269 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
270
271 24, 25,
272
273 -1, -1, -1, -1, -1, -1, -1, -1
274};
275
276static char channel_map_9652_ds[26] = {
277
278 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23,
279
280 24, 25,
281
282 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
283};
284
285static char channel_map_9636_ds[26] = {
286
287 1, 3, 5, 7, 9, 11, 13, 15,
288
289 24, 25,
290
291 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
292};
293
294static int snd_hammerfall_get_buffer(struct pci_dev *pci, struct snd_dma_buffer *dmab, size_t size)
295{
296 dmab->dev.type = SNDRV_DMA_TYPE_DEV;
297 dmab->dev.dev = snd_dma_pci_data(pci);
298 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
299 size, dmab) < 0)
300 return -ENOMEM;
301 return 0;
302}
303
304static void snd_hammerfall_free_buffer(struct snd_dma_buffer *dmab, struct pci_dev *pci)
305{
306 if (dmab->area)
307 snd_dma_free_pages(dmab);
308}
309
310
311static const struct pci_device_id snd_rme9652_ids[] = {
312 {
313 .vendor = 0x10ee,
314 .device = 0x3fc4,
315 .subvendor = PCI_ANY_ID,
316 .subdevice = PCI_ANY_ID,
317 },
318 { 0, },
319};
320
321MODULE_DEVICE_TABLE(pci, snd_rme9652_ids);
322
323static inline void rme9652_write(struct snd_rme9652 *rme9652, int reg, int val)
324{
325 writel(val, rme9652->iobase + reg);
326}
327
328static inline unsigned int rme9652_read(struct snd_rme9652 *rme9652, int reg)
329{
330 return readl(rme9652->iobase + reg);
331}
332
333static inline int snd_rme9652_use_is_exclusive(struct snd_rme9652 *rme9652)
334{
335 unsigned long flags;
336 int ret = 1;
337
338 spin_lock_irqsave(&rme9652->lock, flags);
339 if ((rme9652->playback_pid != rme9652->capture_pid) &&
340 (rme9652->playback_pid >= 0) && (rme9652->capture_pid >= 0)) {
341 ret = 0;
342 }
343 spin_unlock_irqrestore(&rme9652->lock, flags);
344 return ret;
345}
346
347static inline int rme9652_adat_sample_rate(struct snd_rme9652 *rme9652)
348{
349 if (rme9652_running_double_speed(rme9652)) {
350 return (rme9652_read(rme9652, RME9652_status_register) &
351 RME9652_fs48) ? 96000 : 88200;
352 } else {
353 return (rme9652_read(rme9652, RME9652_status_register) &
354 RME9652_fs48) ? 48000 : 44100;
355 }
356}
357
358static inline void rme9652_compute_period_size(struct snd_rme9652 *rme9652)
359{
360 unsigned int i;
361
362 i = rme9652->control_register & RME9652_latency;
363 rme9652->period_bytes = 1 << ((rme9652_decode_latency(i) + 8));
364 rme9652->hw_offsetmask =
365 (rme9652->period_bytes * 2 - 1) & RME9652_buf_pos;
366 rme9652->max_jitter = 80;
367}
368
369static snd_pcm_uframes_t rme9652_hw_pointer(struct snd_rme9652 *rme9652)
370{
371 int status;
372 unsigned int offset, frag;
373 snd_pcm_uframes_t period_size = rme9652->period_bytes / 4;
374 snd_pcm_sframes_t delta;
375
376 status = rme9652_read(rme9652, RME9652_status_register);
377 if (!rme9652->precise_ptr)
378 return (status & RME9652_buffer_id) ? period_size : 0;
379 offset = status & RME9652_buf_pos;
380
381
382
383
384
385 delta = rme9652->prev_hw_offset - offset;
386 delta &= 0xffff;
387 if (delta <= (snd_pcm_sframes_t)rme9652->max_jitter * 4)
388 offset = rme9652->prev_hw_offset;
389 else
390 rme9652->prev_hw_offset = offset;
391 offset &= rme9652->hw_offsetmask;
392 offset /= 4;
393 frag = status & RME9652_buffer_id;
394
395 if (offset < period_size) {
396 if (offset > rme9652->max_jitter) {
397 if (frag)
398 dev_err(rme9652->card->dev,
399 "Unexpected hw_pointer position (bufid == 0): status: %x offset: %d\n",
400 status, offset);
401 } else if (!frag)
402 return 0;
403 offset -= rme9652->max_jitter;
404 if ((int)offset < 0)
405 offset += period_size * 2;
406 } else {
407 if (offset > period_size + rme9652->max_jitter) {
408 if (!frag)
409 dev_err(rme9652->card->dev,
410 "Unexpected hw_pointer position (bufid == 1): status: %x offset: %d\n",
411 status, offset);
412 } else if (frag)
413 return period_size;
414 offset -= rme9652->max_jitter;
415 }
416
417 return offset;
418}
419
420static inline void rme9652_reset_hw_pointer(struct snd_rme9652 *rme9652)
421{
422 int i;
423
424
425
426
427
428
429
430 for (i = 0; i < 8; i++) {
431 rme9652_write(rme9652, i * 4, 0);
432 udelay(10);
433 }
434 rme9652->prev_hw_offset = 0;
435}
436
437static inline void rme9652_start(struct snd_rme9652 *s)
438{
439 s->control_register |= (RME9652_IE | RME9652_start_bit);
440 rme9652_write(s, RME9652_control_register, s->control_register);
441}
442
443static inline void rme9652_stop(struct snd_rme9652 *s)
444{
445 s->control_register &= ~(RME9652_start_bit | RME9652_IE);
446 rme9652_write(s, RME9652_control_register, s->control_register);
447}
448
449static int rme9652_set_interrupt_interval(struct snd_rme9652 *s,
450 unsigned int frames)
451{
452 int restart = 0;
453 int n;
454
455 spin_lock_irq(&s->lock);
456
457 if ((restart = s->running)) {
458 rme9652_stop(s);
459 }
460
461 frames >>= 7;
462 n = 0;
463 while (frames) {
464 n++;
465 frames >>= 1;
466 }
467
468 s->control_register &= ~RME9652_latency;
469 s->control_register |= rme9652_encode_latency(n);
470
471 rme9652_write(s, RME9652_control_register, s->control_register);
472
473 rme9652_compute_period_size(s);
474
475 if (restart)
476 rme9652_start(s);
477
478 spin_unlock_irq(&s->lock);
479
480 return 0;
481}
482
483static int rme9652_set_rate(struct snd_rme9652 *rme9652, int rate)
484{
485 int restart;
486 int reject_if_open = 0;
487 int xrate;
488
489 if (!snd_rme9652_use_is_exclusive (rme9652)) {
490 return -EBUSY;
491 }
492
493
494
495
496
497
498
499
500
501
502
503
504 spin_lock_irq(&rme9652->lock);
505 xrate = rme9652_adat_sample_rate(rme9652);
506
507 switch (rate) {
508 case 44100:
509 if (xrate > 48000) {
510 reject_if_open = 1;
511 }
512 rate = 0;
513 break;
514 case 48000:
515 if (xrate > 48000) {
516 reject_if_open = 1;
517 }
518 rate = RME9652_freq;
519 break;
520 case 88200:
521 if (xrate < 48000) {
522 reject_if_open = 1;
523 }
524 rate = RME9652_DS;
525 break;
526 case 96000:
527 if (xrate < 48000) {
528 reject_if_open = 1;
529 }
530 rate = RME9652_DS | RME9652_freq;
531 break;
532 default:
533 spin_unlock_irq(&rme9652->lock);
534 return -EINVAL;
535 }
536
537 if (reject_if_open && (rme9652->capture_pid >= 0 || rme9652->playback_pid >= 0)) {
538 spin_unlock_irq(&rme9652->lock);
539 return -EBUSY;
540 }
541
542 if ((restart = rme9652->running)) {
543 rme9652_stop(rme9652);
544 }
545 rme9652->control_register &= ~(RME9652_freq | RME9652_DS);
546 rme9652->control_register |= rate;
547 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
548
549 if (restart) {
550 rme9652_start(rme9652);
551 }
552
553 if (rate & RME9652_DS) {
554 if (rme9652->ss_channels == RME9652_NCHANNELS) {
555 rme9652->channel_map = channel_map_9652_ds;
556 } else {
557 rme9652->channel_map = channel_map_9636_ds;
558 }
559 } else {
560 if (rme9652->ss_channels == RME9652_NCHANNELS) {
561 rme9652->channel_map = channel_map_9652_ss;
562 } else {
563 rme9652->channel_map = channel_map_9636_ss;
564 }
565 }
566
567 spin_unlock_irq(&rme9652->lock);
568 return 0;
569}
570
571static void rme9652_set_thru(struct snd_rme9652 *rme9652, int channel, int enable)
572{
573 int i;
574
575 rme9652->passthru = 0;
576
577 if (channel < 0) {
578
579
580
581 if (enable) {
582 for (i = 0; i < RME9652_NCHANNELS; i++) {
583 rme9652->thru_bits |= (1 << i);
584 rme9652_write(rme9652, RME9652_thru_base + i * 4, 1);
585 }
586 } else {
587 for (i = 0; i < RME9652_NCHANNELS; i++) {
588 rme9652->thru_bits &= ~(1 << i);
589 rme9652_write(rme9652, RME9652_thru_base + i * 4, 0);
590 }
591 }
592
593 } else {
594 int mapped_channel;
595
596 mapped_channel = rme9652->channel_map[channel];
597
598 if (enable) {
599 rme9652->thru_bits |= (1 << mapped_channel);
600 } else {
601 rme9652->thru_bits &= ~(1 << mapped_channel);
602 }
603
604 rme9652_write(rme9652,
605 RME9652_thru_base + mapped_channel * 4,
606 enable ? 1 : 0);
607 }
608}
609
610static int rme9652_set_passthru(struct snd_rme9652 *rme9652, int onoff)
611{
612 if (onoff) {
613 rme9652_set_thru(rme9652, -1, 1);
614
615
616
617
618
619 rme9652->control_register =
620 RME9652_inp_0 |
621 rme9652_encode_latency(7) |
622 RME9652_start_bit;
623
624 rme9652_reset_hw_pointer(rme9652);
625
626 rme9652_write(rme9652, RME9652_control_register,
627 rme9652->control_register);
628 rme9652->passthru = 1;
629 } else {
630 rme9652_set_thru(rme9652, -1, 0);
631 rme9652_stop(rme9652);
632 rme9652->passthru = 0;
633 }
634
635 return 0;
636}
637
638static void rme9652_spdif_set_bit (struct snd_rme9652 *rme9652, int mask, int onoff)
639{
640 if (onoff)
641 rme9652->control_register |= mask;
642 else
643 rme9652->control_register &= ~mask;
644
645 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
646}
647
648static void rme9652_spdif_write_byte (struct snd_rme9652 *rme9652, const int val)
649{
650 long mask;
651 long i;
652
653 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
654 if (val & mask)
655 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 1);
656 else
657 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 0);
658
659 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
660 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
661 }
662}
663
664static int rme9652_spdif_read_byte (struct snd_rme9652 *rme9652)
665{
666 long mask;
667 long val;
668 long i;
669
670 val = 0;
671
672 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
673 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
674 if (rme9652_read (rme9652, RME9652_status_register) & RME9652_SPDIF_READ)
675 val |= mask;
676 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
677 }
678
679 return val;
680}
681
682static void rme9652_write_spdif_codec (struct snd_rme9652 *rme9652, const int address, const int data)
683{
684 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
685 rme9652_spdif_write_byte (rme9652, 0x20);
686 rme9652_spdif_write_byte (rme9652, address);
687 rme9652_spdif_write_byte (rme9652, data);
688 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
689}
690
691
692static int rme9652_spdif_read_codec (struct snd_rme9652 *rme9652, const int address)
693{
694 int ret;
695
696 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
697 rme9652_spdif_write_byte (rme9652, 0x20);
698 rme9652_spdif_write_byte (rme9652, address);
699 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
700 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
701
702 rme9652_spdif_write_byte (rme9652, 0x21);
703 ret = rme9652_spdif_read_byte (rme9652);
704 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
705
706 return ret;
707}
708
709static void rme9652_initialize_spdif_receiver (struct snd_rme9652 *rme9652)
710{
711
712
713 rme9652->control_register |= RME9652_SPDIF_RESET;
714
715 rme9652_write_spdif_codec (rme9652, 4, 0x40);
716 rme9652_write_spdif_codec (rme9652, 17, 0x13);
717 rme9652_write_spdif_codec (rme9652, 6, 0x02);
718}
719
720static inline int rme9652_spdif_sample_rate(struct snd_rme9652 *s)
721{
722 unsigned int rate_bits;
723
724 if (rme9652_read(s, RME9652_status_register) & RME9652_ERF) {
725 return -1;
726 }
727
728 if (s->hw_rev == 15) {
729
730 int x, y, ret;
731
732 x = rme9652_spdif_read_codec (s, 30);
733
734 if (x != 0)
735 y = 48000 * 64 / x;
736 else
737 y = 0;
738
739 if (y > 30400 && y < 33600) ret = 32000;
740 else if (y > 41900 && y < 46000) ret = 44100;
741 else if (y > 46000 && y < 50400) ret = 48000;
742 else if (y > 60800 && y < 67200) ret = 64000;
743 else if (y > 83700 && y < 92000) ret = 88200;
744 else if (y > 92000 && y < 100000) ret = 96000;
745 else ret = 0;
746 return ret;
747 }
748
749 rate_bits = rme9652_read(s, RME9652_status_register) & RME9652_F;
750
751 switch (rme9652_decode_spdif_rate(rate_bits)) {
752 case 0x7:
753 return 32000;
754 break;
755
756 case 0x6:
757 return 44100;
758 break;
759
760 case 0x5:
761 return 48000;
762 break;
763
764 case 0x4:
765 return 88200;
766 break;
767
768 case 0x3:
769 return 96000;
770 break;
771
772 case 0x0:
773 return 64000;
774 break;
775
776 default:
777 dev_err(s->card->dev,
778 "%s: unknown S/PDIF input rate (bits = 0x%x)\n",
779 s->card_name, rate_bits);
780 return 0;
781 break;
782 }
783}
784
785
786
787
788
789static u32 snd_rme9652_convert_from_aes(struct snd_aes_iec958 *aes)
790{
791 u32 val = 0;
792 val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? RME9652_PRO : 0;
793 val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? RME9652_Dolby : 0;
794 if (val & RME9652_PRO)
795 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? RME9652_EMP : 0;
796 else
797 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? RME9652_EMP : 0;
798 return val;
799}
800
801static void snd_rme9652_convert_to_aes(struct snd_aes_iec958 *aes, u32 val)
802{
803 aes->status[0] = ((val & RME9652_PRO) ? IEC958_AES0_PROFESSIONAL : 0) |
804 ((val & RME9652_Dolby) ? IEC958_AES0_NONAUDIO : 0);
805 if (val & RME9652_PRO)
806 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
807 else
808 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
809}
810
811static int snd_rme9652_control_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
812{
813 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
814 uinfo->count = 1;
815 return 0;
816}
817
818static int snd_rme9652_control_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
819{
820 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
821
822 snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif);
823 return 0;
824}
825
826static int snd_rme9652_control_spdif_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
827{
828 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
829 int change;
830 u32 val;
831
832 val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
833 spin_lock_irq(&rme9652->lock);
834 change = val != rme9652->creg_spdif;
835 rme9652->creg_spdif = val;
836 spin_unlock_irq(&rme9652->lock);
837 return change;
838}
839
840static int snd_rme9652_control_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
841{
842 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
843 uinfo->count = 1;
844 return 0;
845}
846
847static int snd_rme9652_control_spdif_stream_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
848{
849 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
850
851 snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif_stream);
852 return 0;
853}
854
855static int snd_rme9652_control_spdif_stream_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
856{
857 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
858 int change;
859 u32 val;
860
861 val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
862 spin_lock_irq(&rme9652->lock);
863 change = val != rme9652->creg_spdif_stream;
864 rme9652->creg_spdif_stream = val;
865 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
866 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= val);
867 spin_unlock_irq(&rme9652->lock);
868 return change;
869}
870
871static int snd_rme9652_control_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
872{
873 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
874 uinfo->count = 1;
875 return 0;
876}
877
878static int snd_rme9652_control_spdif_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
879{
880 ucontrol->value.iec958.status[0] = kcontrol->private_value;
881 return 0;
882}
883
884#define RME9652_ADAT1_IN(xname, xindex) \
885{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
886 .info = snd_rme9652_info_adat1_in, \
887 .get = snd_rme9652_get_adat1_in, \
888 .put = snd_rme9652_put_adat1_in }
889
890static unsigned int rme9652_adat1_in(struct snd_rme9652 *rme9652)
891{
892 if (rme9652->control_register & RME9652_ADAT1_INTERNAL)
893 return 1;
894 return 0;
895}
896
897static int rme9652_set_adat1_input(struct snd_rme9652 *rme9652, int internal)
898{
899 int restart = 0;
900
901 if (internal) {
902 rme9652->control_register |= RME9652_ADAT1_INTERNAL;
903 } else {
904 rme9652->control_register &= ~RME9652_ADAT1_INTERNAL;
905 }
906
907
908
909 if ((restart = rme9652->running)) {
910 rme9652_stop(rme9652);
911 }
912
913 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
914
915 if (restart) {
916 rme9652_start(rme9652);
917 }
918
919 return 0;
920}
921
922static int snd_rme9652_info_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
923{
924 static const char * const texts[2] = {"ADAT1", "Internal"};
925
926 return snd_ctl_enum_info(uinfo, 1, 2, texts);
927}
928
929static int snd_rme9652_get_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
930{
931 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
932
933 spin_lock_irq(&rme9652->lock);
934 ucontrol->value.enumerated.item[0] = rme9652_adat1_in(rme9652);
935 spin_unlock_irq(&rme9652->lock);
936 return 0;
937}
938
939static int snd_rme9652_put_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
940{
941 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
942 int change;
943 unsigned int val;
944
945 if (!snd_rme9652_use_is_exclusive(rme9652))
946 return -EBUSY;
947 val = ucontrol->value.enumerated.item[0] % 2;
948 spin_lock_irq(&rme9652->lock);
949 change = val != rme9652_adat1_in(rme9652);
950 if (change)
951 rme9652_set_adat1_input(rme9652, val);
952 spin_unlock_irq(&rme9652->lock);
953 return change;
954}
955
956#define RME9652_SPDIF_IN(xname, xindex) \
957{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
958 .info = snd_rme9652_info_spdif_in, \
959 .get = snd_rme9652_get_spdif_in, .put = snd_rme9652_put_spdif_in }
960
961static unsigned int rme9652_spdif_in(struct snd_rme9652 *rme9652)
962{
963 return rme9652_decode_spdif_in(rme9652->control_register &
964 RME9652_inp);
965}
966
967static int rme9652_set_spdif_input(struct snd_rme9652 *rme9652, int in)
968{
969 int restart = 0;
970
971 rme9652->control_register &= ~RME9652_inp;
972 rme9652->control_register |= rme9652_encode_spdif_in(in);
973
974 if ((restart = rme9652->running)) {
975 rme9652_stop(rme9652);
976 }
977
978 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
979
980 if (restart) {
981 rme9652_start(rme9652);
982 }
983
984 return 0;
985}
986
987static int snd_rme9652_info_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
988{
989 static const char * const texts[3] = {"ADAT1", "Coaxial", "Internal"};
990
991 return snd_ctl_enum_info(uinfo, 1, 3, texts);
992}
993
994static int snd_rme9652_get_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
995{
996 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
997
998 spin_lock_irq(&rme9652->lock);
999 ucontrol->value.enumerated.item[0] = rme9652_spdif_in(rme9652);
1000 spin_unlock_irq(&rme9652->lock);
1001 return 0;
1002}
1003
1004static int snd_rme9652_put_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1005{
1006 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1007 int change;
1008 unsigned int val;
1009
1010 if (!snd_rme9652_use_is_exclusive(rme9652))
1011 return -EBUSY;
1012 val = ucontrol->value.enumerated.item[0] % 3;
1013 spin_lock_irq(&rme9652->lock);
1014 change = val != rme9652_spdif_in(rme9652);
1015 if (change)
1016 rme9652_set_spdif_input(rme9652, val);
1017 spin_unlock_irq(&rme9652->lock);
1018 return change;
1019}
1020
1021#define RME9652_SPDIF_OUT(xname, xindex) \
1022{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1023 .info = snd_rme9652_info_spdif_out, \
1024 .get = snd_rme9652_get_spdif_out, .put = snd_rme9652_put_spdif_out }
1025
1026static int rme9652_spdif_out(struct snd_rme9652 *rme9652)
1027{
1028 return (rme9652->control_register & RME9652_opt_out) ? 1 : 0;
1029}
1030
1031static int rme9652_set_spdif_output(struct snd_rme9652 *rme9652, int out)
1032{
1033 int restart = 0;
1034
1035 if (out) {
1036 rme9652->control_register |= RME9652_opt_out;
1037 } else {
1038 rme9652->control_register &= ~RME9652_opt_out;
1039 }
1040
1041 if ((restart = rme9652->running)) {
1042 rme9652_stop(rme9652);
1043 }
1044
1045 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1046
1047 if (restart) {
1048 rme9652_start(rme9652);
1049 }
1050
1051 return 0;
1052}
1053
1054#define snd_rme9652_info_spdif_out snd_ctl_boolean_mono_info
1055
1056static int snd_rme9652_get_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1057{
1058 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1059
1060 spin_lock_irq(&rme9652->lock);
1061 ucontrol->value.integer.value[0] = rme9652_spdif_out(rme9652);
1062 spin_unlock_irq(&rme9652->lock);
1063 return 0;
1064}
1065
1066static int snd_rme9652_put_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1067{
1068 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1069 int change;
1070 unsigned int val;
1071
1072 if (!snd_rme9652_use_is_exclusive(rme9652))
1073 return -EBUSY;
1074 val = ucontrol->value.integer.value[0] & 1;
1075 spin_lock_irq(&rme9652->lock);
1076 change = (int)val != rme9652_spdif_out(rme9652);
1077 rme9652_set_spdif_output(rme9652, val);
1078 spin_unlock_irq(&rme9652->lock);
1079 return change;
1080}
1081
1082#define RME9652_SYNC_MODE(xname, xindex) \
1083{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1084 .info = snd_rme9652_info_sync_mode, \
1085 .get = snd_rme9652_get_sync_mode, .put = snd_rme9652_put_sync_mode }
1086
1087static int rme9652_sync_mode(struct snd_rme9652 *rme9652)
1088{
1089 if (rme9652->control_register & RME9652_wsel) {
1090 return 2;
1091 } else if (rme9652->control_register & RME9652_Master) {
1092 return 1;
1093 } else {
1094 return 0;
1095 }
1096}
1097
1098static int rme9652_set_sync_mode(struct snd_rme9652 *rme9652, int mode)
1099{
1100 int restart = 0;
1101
1102 switch (mode) {
1103 case 0:
1104 rme9652->control_register &=
1105 ~(RME9652_Master | RME9652_wsel);
1106 break;
1107 case 1:
1108 rme9652->control_register =
1109 (rme9652->control_register & ~RME9652_wsel) | RME9652_Master;
1110 break;
1111 case 2:
1112 rme9652->control_register |=
1113 (RME9652_Master | RME9652_wsel);
1114 break;
1115 }
1116
1117 if ((restart = rme9652->running)) {
1118 rme9652_stop(rme9652);
1119 }
1120
1121 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1122
1123 if (restart) {
1124 rme9652_start(rme9652);
1125 }
1126
1127 return 0;
1128}
1129
1130static int snd_rme9652_info_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1131{
1132 static const char * const texts[3] = {
1133 "AutoSync", "Master", "Word Clock"
1134 };
1135
1136 return snd_ctl_enum_info(uinfo, 1, 3, texts);
1137}
1138
1139static int snd_rme9652_get_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1140{
1141 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1142
1143 spin_lock_irq(&rme9652->lock);
1144 ucontrol->value.enumerated.item[0] = rme9652_sync_mode(rme9652);
1145 spin_unlock_irq(&rme9652->lock);
1146 return 0;
1147}
1148
1149static int snd_rme9652_put_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1150{
1151 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1152 int change;
1153 unsigned int val;
1154
1155 val = ucontrol->value.enumerated.item[0] % 3;
1156 spin_lock_irq(&rme9652->lock);
1157 change = (int)val != rme9652_sync_mode(rme9652);
1158 rme9652_set_sync_mode(rme9652, val);
1159 spin_unlock_irq(&rme9652->lock);
1160 return change;
1161}
1162
1163#define RME9652_SYNC_PREF(xname, xindex) \
1164{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1165 .info = snd_rme9652_info_sync_pref, \
1166 .get = snd_rme9652_get_sync_pref, .put = snd_rme9652_put_sync_pref }
1167
1168static int rme9652_sync_pref(struct snd_rme9652 *rme9652)
1169{
1170 switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1171 case RME9652_SyncPref_ADAT1:
1172 return RME9652_SYNC_FROM_ADAT1;
1173 case RME9652_SyncPref_ADAT2:
1174 return RME9652_SYNC_FROM_ADAT2;
1175 case RME9652_SyncPref_ADAT3:
1176 return RME9652_SYNC_FROM_ADAT3;
1177 case RME9652_SyncPref_SPDIF:
1178 return RME9652_SYNC_FROM_SPDIF;
1179 }
1180
1181 return 0;
1182}
1183
1184static int rme9652_set_sync_pref(struct snd_rme9652 *rme9652, int pref)
1185{
1186 int restart;
1187
1188 rme9652->control_register &= ~RME9652_SyncPref_Mask;
1189 switch (pref) {
1190 case RME9652_SYNC_FROM_ADAT1:
1191 rme9652->control_register |= RME9652_SyncPref_ADAT1;
1192 break;
1193 case RME9652_SYNC_FROM_ADAT2:
1194 rme9652->control_register |= RME9652_SyncPref_ADAT2;
1195 break;
1196 case RME9652_SYNC_FROM_ADAT3:
1197 rme9652->control_register |= RME9652_SyncPref_ADAT3;
1198 break;
1199 case RME9652_SYNC_FROM_SPDIF:
1200 rme9652->control_register |= RME9652_SyncPref_SPDIF;
1201 break;
1202 }
1203
1204 if ((restart = rme9652->running)) {
1205 rme9652_stop(rme9652);
1206 }
1207
1208 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1209
1210 if (restart) {
1211 rme9652_start(rme9652);
1212 }
1213
1214 return 0;
1215}
1216
1217static int snd_rme9652_info_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1218{
1219 static const char * const texts[4] = {
1220 "IEC958 In", "ADAT1 In", "ADAT2 In", "ADAT3 In"
1221 };
1222 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1223
1224 return snd_ctl_enum_info(uinfo, 1,
1225 rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3,
1226 texts);
1227}
1228
1229static int snd_rme9652_get_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1230{
1231 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1232
1233 spin_lock_irq(&rme9652->lock);
1234 ucontrol->value.enumerated.item[0] = rme9652_sync_pref(rme9652);
1235 spin_unlock_irq(&rme9652->lock);
1236 return 0;
1237}
1238
1239static int snd_rme9652_put_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1240{
1241 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1242 int change, max;
1243 unsigned int val;
1244
1245 if (!snd_rme9652_use_is_exclusive(rme9652))
1246 return -EBUSY;
1247 max = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3;
1248 val = ucontrol->value.enumerated.item[0] % max;
1249 spin_lock_irq(&rme9652->lock);
1250 change = (int)val != rme9652_sync_pref(rme9652);
1251 rme9652_set_sync_pref(rme9652, val);
1252 spin_unlock_irq(&rme9652->lock);
1253 return change;
1254}
1255
1256static int snd_rme9652_info_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1257{
1258 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1259 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1260 uinfo->count = rme9652->ss_channels;
1261 uinfo->value.integer.min = 0;
1262 uinfo->value.integer.max = 1;
1263 return 0;
1264}
1265
1266static int snd_rme9652_get_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1267{
1268 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1269 unsigned int k;
1270 u32 thru_bits = rme9652->thru_bits;
1271
1272 for (k = 0; k < rme9652->ss_channels; ++k) {
1273 ucontrol->value.integer.value[k] = !!(thru_bits & (1 << k));
1274 }
1275 return 0;
1276}
1277
1278static int snd_rme9652_put_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1279{
1280 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1281 int change;
1282 unsigned int chn;
1283 u32 thru_bits = 0;
1284
1285 if (!snd_rme9652_use_is_exclusive(rme9652))
1286 return -EBUSY;
1287
1288 for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1289 if (ucontrol->value.integer.value[chn])
1290 thru_bits |= 1 << chn;
1291 }
1292
1293 spin_lock_irq(&rme9652->lock);
1294 change = thru_bits ^ rme9652->thru_bits;
1295 if (change) {
1296 for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1297 if (!(change & (1 << chn)))
1298 continue;
1299 rme9652_set_thru(rme9652,chn,thru_bits&(1<<chn));
1300 }
1301 }
1302 spin_unlock_irq(&rme9652->lock);
1303 return !!change;
1304}
1305
1306#define RME9652_PASSTHRU(xname, xindex) \
1307{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1308 .info = snd_rme9652_info_passthru, \
1309 .put = snd_rme9652_put_passthru, \
1310 .get = snd_rme9652_get_passthru }
1311
1312#define snd_rme9652_info_passthru snd_ctl_boolean_mono_info
1313
1314static int snd_rme9652_get_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1315{
1316 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1317
1318 spin_lock_irq(&rme9652->lock);
1319 ucontrol->value.integer.value[0] = rme9652->passthru;
1320 spin_unlock_irq(&rme9652->lock);
1321 return 0;
1322}
1323
1324static int snd_rme9652_put_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1325{
1326 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1327 int change;
1328 unsigned int val;
1329 int err = 0;
1330
1331 if (!snd_rme9652_use_is_exclusive(rme9652))
1332 return -EBUSY;
1333
1334 val = ucontrol->value.integer.value[0] & 1;
1335 spin_lock_irq(&rme9652->lock);
1336 change = (ucontrol->value.integer.value[0] != rme9652->passthru);
1337 if (change)
1338 err = rme9652_set_passthru(rme9652, val);
1339 spin_unlock_irq(&rme9652->lock);
1340 return err ? err : change;
1341}
1342
1343
1344
1345#define RME9652_SPDIF_RATE(xname, xindex) \
1346{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1347 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1348 .info = snd_rme9652_info_spdif_rate, \
1349 .get = snd_rme9652_get_spdif_rate }
1350
1351static int snd_rme9652_info_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1352{
1353 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1354 uinfo->count = 1;
1355 uinfo->value.integer.min = 0;
1356 uinfo->value.integer.max = 96000;
1357 return 0;
1358}
1359
1360static int snd_rme9652_get_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1361{
1362 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1363
1364 spin_lock_irq(&rme9652->lock);
1365 ucontrol->value.integer.value[0] = rme9652_spdif_sample_rate(rme9652);
1366 spin_unlock_irq(&rme9652->lock);
1367 return 0;
1368}
1369
1370#define RME9652_ADAT_SYNC(xname, xindex, xidx) \
1371{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1372 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1373 .info = snd_rme9652_info_adat_sync, \
1374 .get = snd_rme9652_get_adat_sync, .private_value = xidx }
1375
1376static int snd_rme9652_info_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1377{
1378 static const char * const texts[4] = {
1379 "No Lock", "Lock", "No Lock Sync", "Lock Sync"
1380 };
1381
1382 return snd_ctl_enum_info(uinfo, 1, 4, texts);
1383}
1384
1385static int snd_rme9652_get_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1386{
1387 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1388 unsigned int mask1, mask2, val;
1389
1390 switch (kcontrol->private_value) {
1391 case 0: mask1 = RME9652_lock_0; mask2 = RME9652_sync_0; break;
1392 case 1: mask1 = RME9652_lock_1; mask2 = RME9652_sync_1; break;
1393 case 2: mask1 = RME9652_lock_2; mask2 = RME9652_sync_2; break;
1394 default: return -EINVAL;
1395 }
1396 val = rme9652_read(rme9652, RME9652_status_register);
1397 ucontrol->value.enumerated.item[0] = (val & mask1) ? 1 : 0;
1398 ucontrol->value.enumerated.item[0] |= (val & mask2) ? 2 : 0;
1399 return 0;
1400}
1401
1402#define RME9652_TC_VALID(xname, xindex) \
1403{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1404 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1405 .info = snd_rme9652_info_tc_valid, \
1406 .get = snd_rme9652_get_tc_valid }
1407
1408#define snd_rme9652_info_tc_valid snd_ctl_boolean_mono_info
1409
1410static int snd_rme9652_get_tc_valid(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1411{
1412 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1413
1414 ucontrol->value.integer.value[0] =
1415 (rme9652_read(rme9652, RME9652_status_register) & RME9652_tc_valid) ? 1 : 0;
1416 return 0;
1417}
1418
1419#ifdef ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE
1420
1421
1422
1423static int snd_rme9652_get_tc_value(void *private_data,
1424 snd_kswitch_t *kswitch,
1425 snd_switch_t *uswitch)
1426{
1427 struct snd_rme9652 *s = (struct snd_rme9652 *) private_data;
1428 u32 value;
1429 int i;
1430
1431 uswitch->type = SNDRV_SW_TYPE_DWORD;
1432
1433 if ((rme9652_read(s, RME9652_status_register) &
1434 RME9652_tc_valid) == 0) {
1435 uswitch->value.data32[0] = 0;
1436 return 0;
1437 }
1438
1439
1440
1441 rme9652_write(s, RME9652_time_code, 0);
1442
1443
1444
1445 for (i = 0; i < 50; i++) {
1446 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy))
1447 break;
1448 }
1449
1450 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy)) {
1451 return -EIO;
1452 }
1453
1454 value = 0;
1455
1456 for (i = 0; i < 32; i++) {
1457 value >>= 1;
1458
1459 if (rme9652_read(s, i * 4) & RME9652_tc_out)
1460 value |= 0x80000000;
1461 }
1462
1463 if (value > 2 * 60 * 48000) {
1464 value -= 2 * 60 * 48000;
1465 } else {
1466 value = 0;
1467 }
1468
1469 uswitch->value.data32[0] = value;
1470
1471 return 0;
1472}
1473
1474#endif
1475
1476static struct snd_kcontrol_new snd_rme9652_controls[] = {
1477{
1478 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1479 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1480 .info = snd_rme9652_control_spdif_info,
1481 .get = snd_rme9652_control_spdif_get,
1482 .put = snd_rme9652_control_spdif_put,
1483},
1484{
1485 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1486 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1487 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1488 .info = snd_rme9652_control_spdif_stream_info,
1489 .get = snd_rme9652_control_spdif_stream_get,
1490 .put = snd_rme9652_control_spdif_stream_put,
1491},
1492{
1493 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1494 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1495 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1496 .info = snd_rme9652_control_spdif_mask_info,
1497 .get = snd_rme9652_control_spdif_mask_get,
1498 .private_value = IEC958_AES0_NONAUDIO |
1499 IEC958_AES0_PROFESSIONAL |
1500 IEC958_AES0_CON_EMPHASIS,
1501},
1502{
1503 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1504 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1505 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
1506 .info = snd_rme9652_control_spdif_mask_info,
1507 .get = snd_rme9652_control_spdif_mask_get,
1508 .private_value = IEC958_AES0_NONAUDIO |
1509 IEC958_AES0_PROFESSIONAL |
1510 IEC958_AES0_PRO_EMPHASIS,
1511},
1512RME9652_SPDIF_IN("IEC958 Input Connector", 0),
1513RME9652_SPDIF_OUT("IEC958 Output also on ADAT1", 0),
1514RME9652_SYNC_MODE("Sync Mode", 0),
1515RME9652_SYNC_PREF("Preferred Sync Source", 0),
1516{
1517 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1518 .name = "Channels Thru",
1519 .index = 0,
1520 .info = snd_rme9652_info_thru,
1521 .get = snd_rme9652_get_thru,
1522 .put = snd_rme9652_put_thru,
1523},
1524RME9652_SPDIF_RATE("IEC958 Sample Rate", 0),
1525RME9652_ADAT_SYNC("ADAT1 Sync Check", 0, 0),
1526RME9652_ADAT_SYNC("ADAT2 Sync Check", 0, 1),
1527RME9652_TC_VALID("Timecode Valid", 0),
1528RME9652_PASSTHRU("Passthru", 0)
1529};
1530
1531static struct snd_kcontrol_new snd_rme9652_adat3_check =
1532RME9652_ADAT_SYNC("ADAT3 Sync Check", 0, 2);
1533
1534static struct snd_kcontrol_new snd_rme9652_adat1_input =
1535RME9652_ADAT1_IN("ADAT1 Input Source", 0);
1536
1537static int snd_rme9652_create_controls(struct snd_card *card, struct snd_rme9652 *rme9652)
1538{
1539 unsigned int idx;
1540 int err;
1541 struct snd_kcontrol *kctl;
1542
1543 for (idx = 0; idx < ARRAY_SIZE(snd_rme9652_controls); idx++) {
1544 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_controls[idx], rme9652))) < 0)
1545 return err;
1546 if (idx == 1)
1547 rme9652->spdif_ctl = kctl;
1548 }
1549
1550 if (rme9652->ss_channels == RME9652_NCHANNELS)
1551 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat3_check, rme9652))) < 0)
1552 return err;
1553
1554 if (rme9652->hw_rev >= 15)
1555 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat1_input, rme9652))) < 0)
1556 return err;
1557
1558 return 0;
1559}
1560
1561
1562
1563
1564
1565static void
1566snd_rme9652_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
1567{
1568 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) entry->private_data;
1569 u32 thru_bits = rme9652->thru_bits;
1570 int show_auto_sync_source = 0;
1571 int i;
1572 unsigned int status;
1573 int x;
1574
1575 status = rme9652_read(rme9652, RME9652_status_register);
1576
1577 snd_iprintf(buffer, "%s (Card #%d)\n", rme9652->card_name, rme9652->card->number + 1);
1578 snd_iprintf(buffer, "Buffers: capture %p playback %p\n",
1579 rme9652->capture_buffer, rme9652->playback_buffer);
1580 snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n",
1581 rme9652->irq, rme9652->port, (unsigned long)rme9652->iobase);
1582 snd_iprintf(buffer, "Control register: %x\n", rme9652->control_register);
1583
1584 snd_iprintf(buffer, "\n");
1585
1586 x = 1 << (6 + rme9652_decode_latency(rme9652->control_register &
1587 RME9652_latency));
1588
1589 snd_iprintf(buffer, "Latency: %d samples (2 periods of %lu bytes)\n",
1590 x, (unsigned long) rme9652->period_bytes);
1591 snd_iprintf(buffer, "Hardware pointer (frames): %ld\n",
1592 rme9652_hw_pointer(rme9652));
1593 snd_iprintf(buffer, "Passthru: %s\n",
1594 rme9652->passthru ? "yes" : "no");
1595
1596 if ((rme9652->control_register & (RME9652_Master | RME9652_wsel)) == 0) {
1597 snd_iprintf(buffer, "Clock mode: autosync\n");
1598 show_auto_sync_source = 1;
1599 } else if (rme9652->control_register & RME9652_wsel) {
1600 if (status & RME9652_wsel_rd) {
1601 snd_iprintf(buffer, "Clock mode: word clock\n");
1602 } else {
1603 snd_iprintf(buffer, "Clock mode: word clock (no signal)\n");
1604 }
1605 } else {
1606 snd_iprintf(buffer, "Clock mode: master\n");
1607 }
1608
1609 if (show_auto_sync_source) {
1610 switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1611 case RME9652_SyncPref_ADAT1:
1612 snd_iprintf(buffer, "Pref. sync source: ADAT1\n");
1613 break;
1614 case RME9652_SyncPref_ADAT2:
1615 snd_iprintf(buffer, "Pref. sync source: ADAT2\n");
1616 break;
1617 case RME9652_SyncPref_ADAT3:
1618 snd_iprintf(buffer, "Pref. sync source: ADAT3\n");
1619 break;
1620 case RME9652_SyncPref_SPDIF:
1621 snd_iprintf(buffer, "Pref. sync source: IEC958\n");
1622 break;
1623 default:
1624 snd_iprintf(buffer, "Pref. sync source: ???\n");
1625 }
1626 }
1627
1628 if (rme9652->hw_rev >= 15)
1629 snd_iprintf(buffer, "\nADAT1 Input source: %s\n",
1630 (rme9652->control_register & RME9652_ADAT1_INTERNAL) ?
1631 "Internal" : "ADAT1 optical");
1632
1633 snd_iprintf(buffer, "\n");
1634
1635 switch (rme9652_decode_spdif_in(rme9652->control_register &
1636 RME9652_inp)) {
1637 case RME9652_SPDIFIN_OPTICAL:
1638 snd_iprintf(buffer, "IEC958 input: ADAT1\n");
1639 break;
1640 case RME9652_SPDIFIN_COAXIAL:
1641 snd_iprintf(buffer, "IEC958 input: Coaxial\n");
1642 break;
1643 case RME9652_SPDIFIN_INTERN:
1644 snd_iprintf(buffer, "IEC958 input: Internal\n");
1645 break;
1646 default:
1647 snd_iprintf(buffer, "IEC958 input: ???\n");
1648 break;
1649 }
1650
1651 if (rme9652->control_register & RME9652_opt_out) {
1652 snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n");
1653 } else {
1654 snd_iprintf(buffer, "IEC958 output: Coaxial only\n");
1655 }
1656
1657 if (rme9652->control_register & RME9652_PRO) {
1658 snd_iprintf(buffer, "IEC958 quality: Professional\n");
1659 } else {
1660 snd_iprintf(buffer, "IEC958 quality: Consumer\n");
1661 }
1662
1663 if (rme9652->control_register & RME9652_EMP) {
1664 snd_iprintf(buffer, "IEC958 emphasis: on\n");
1665 } else {
1666 snd_iprintf(buffer, "IEC958 emphasis: off\n");
1667 }
1668
1669 if (rme9652->control_register & RME9652_Dolby) {
1670 snd_iprintf(buffer, "IEC958 Dolby: on\n");
1671 } else {
1672 snd_iprintf(buffer, "IEC958 Dolby: off\n");
1673 }
1674
1675 i = rme9652_spdif_sample_rate(rme9652);
1676
1677 if (i < 0) {
1678 snd_iprintf(buffer,
1679 "IEC958 sample rate: error flag set\n");
1680 } else if (i == 0) {
1681 snd_iprintf(buffer, "IEC958 sample rate: undetermined\n");
1682 } else {
1683 snd_iprintf(buffer, "IEC958 sample rate: %d\n", i);
1684 }
1685
1686 snd_iprintf(buffer, "\n");
1687
1688 snd_iprintf(buffer, "ADAT Sample rate: %dHz\n",
1689 rme9652_adat_sample_rate(rme9652));
1690
1691
1692
1693 x = status & RME9652_sync_0;
1694 if (status & RME9652_lock_0) {
1695 snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock");
1696 } else {
1697 snd_iprintf(buffer, "ADAT1: No Lock\n");
1698 }
1699
1700 x = status & RME9652_sync_1;
1701 if (status & RME9652_lock_1) {
1702 snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock");
1703 } else {
1704 snd_iprintf(buffer, "ADAT2: No Lock\n");
1705 }
1706
1707 x = status & RME9652_sync_2;
1708 if (status & RME9652_lock_2) {
1709 snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock");
1710 } else {
1711 snd_iprintf(buffer, "ADAT3: No Lock\n");
1712 }
1713
1714 snd_iprintf(buffer, "\n");
1715
1716 snd_iprintf(buffer, "Timecode signal: %s\n",
1717 (status & RME9652_tc_valid) ? "yes" : "no");
1718
1719
1720
1721 snd_iprintf(buffer, "Punch Status:\n\n");
1722
1723 for (i = 0; i < rme9652->ss_channels; i++) {
1724 if (thru_bits & (1 << i)) {
1725 snd_iprintf(buffer, "%2d: on ", i + 1);
1726 } else {
1727 snd_iprintf(buffer, "%2d: off ", i + 1);
1728 }
1729
1730 if (((i + 1) % 8) == 0) {
1731 snd_iprintf(buffer, "\n");
1732 }
1733 }
1734
1735 snd_iprintf(buffer, "\n");
1736}
1737
1738static void snd_rme9652_proc_init(struct snd_rme9652 *rme9652)
1739{
1740 struct snd_info_entry *entry;
1741
1742 if (! snd_card_proc_new(rme9652->card, "rme9652", &entry))
1743 snd_info_set_text_ops(entry, rme9652, snd_rme9652_proc_read);
1744}
1745
1746static void snd_rme9652_free_buffers(struct snd_rme9652 *rme9652)
1747{
1748 snd_hammerfall_free_buffer(&rme9652->capture_dma_buf, rme9652->pci);
1749 snd_hammerfall_free_buffer(&rme9652->playback_dma_buf, rme9652->pci);
1750}
1751
1752static int snd_rme9652_free(struct snd_rme9652 *rme9652)
1753{
1754 if (rme9652->irq >= 0)
1755 rme9652_stop(rme9652);
1756 snd_rme9652_free_buffers(rme9652);
1757
1758 if (rme9652->irq >= 0)
1759 free_irq(rme9652->irq, (void *)rme9652);
1760 iounmap(rme9652->iobase);
1761 if (rme9652->port)
1762 pci_release_regions(rme9652->pci);
1763
1764 pci_disable_device(rme9652->pci);
1765 return 0;
1766}
1767
1768static int snd_rme9652_initialize_memory(struct snd_rme9652 *rme9652)
1769{
1770 unsigned long pb_bus, cb_bus;
1771
1772 if (snd_hammerfall_get_buffer(rme9652->pci, &rme9652->capture_dma_buf, RME9652_DMA_AREA_BYTES) < 0 ||
1773 snd_hammerfall_get_buffer(rme9652->pci, &rme9652->playback_dma_buf, RME9652_DMA_AREA_BYTES) < 0) {
1774 if (rme9652->capture_dma_buf.area)
1775 snd_dma_free_pages(&rme9652->capture_dma_buf);
1776 dev_err(rme9652->card->dev,
1777 "%s: no buffers available\n", rme9652->card_name);
1778 return -ENOMEM;
1779 }
1780
1781
1782
1783 cb_bus = ALIGN(rme9652->capture_dma_buf.addr, 0x10000ul);
1784 pb_bus = ALIGN(rme9652->playback_dma_buf.addr, 0x10000ul);
1785
1786
1787
1788 rme9652_write(rme9652, RME9652_rec_buffer, cb_bus);
1789 rme9652_write(rme9652, RME9652_play_buffer, pb_bus);
1790
1791 rme9652->capture_buffer = rme9652->capture_dma_buf.area + (cb_bus - rme9652->capture_dma_buf.addr);
1792 rme9652->playback_buffer = rme9652->playback_dma_buf.area + (pb_bus - rme9652->playback_dma_buf.addr);
1793
1794 return 0;
1795}
1796
1797static void snd_rme9652_set_defaults(struct snd_rme9652 *rme9652)
1798{
1799 unsigned int k;
1800
1801
1802
1803
1804
1805
1806
1807
1808
1809
1810
1811
1812
1813
1814
1815
1816
1817 rme9652->control_register =
1818 RME9652_inp_0 | rme9652_encode_latency(7);
1819
1820 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1821
1822 rme9652_reset_hw_pointer(rme9652);
1823 rme9652_compute_period_size(rme9652);
1824
1825
1826
1827 for (k = 0; k < RME9652_NCHANNELS; ++k)
1828 rme9652_write(rme9652, RME9652_thru_base + k * 4, 0);
1829
1830 rme9652->thru_bits = 0;
1831 rme9652->passthru = 0;
1832
1833
1834
1835 rme9652_set_rate(rme9652, 48000);
1836}
1837
1838static irqreturn_t snd_rme9652_interrupt(int irq, void *dev_id)
1839{
1840 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) dev_id;
1841
1842 if (!(rme9652_read(rme9652, RME9652_status_register) & RME9652_IRQ)) {
1843 return IRQ_NONE;
1844 }
1845
1846 rme9652_write(rme9652, RME9652_irq_clear, 0);
1847
1848 if (rme9652->capture_substream) {
1849 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
1850 }
1851
1852 if (rme9652->playback_substream) {
1853 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream);
1854 }
1855 return IRQ_HANDLED;
1856}
1857
1858static snd_pcm_uframes_t snd_rme9652_hw_pointer(struct snd_pcm_substream *substream)
1859{
1860 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1861 return rme9652_hw_pointer(rme9652);
1862}
1863
1864static char *rme9652_channel_buffer_location(struct snd_rme9652 *rme9652,
1865 int stream,
1866 int channel)
1867
1868{
1869 int mapped_channel;
1870
1871 if (snd_BUG_ON(channel < 0 || channel >= RME9652_NCHANNELS))
1872 return NULL;
1873
1874 if ((mapped_channel = rme9652->channel_map[channel]) < 0) {
1875 return NULL;
1876 }
1877
1878 if (stream == SNDRV_PCM_STREAM_CAPTURE) {
1879 return rme9652->capture_buffer +
1880 (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
1881 } else {
1882 return rme9652->playback_buffer +
1883 (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
1884 }
1885}
1886
1887static int snd_rme9652_playback_copy(struct snd_pcm_substream *substream,
1888 int channel, unsigned long pos,
1889 void __user *src, unsigned long count)
1890{
1891 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1892 char *channel_buf;
1893
1894 if (snd_BUG_ON(pos + count > RME9652_CHANNEL_BUFFER_BYTES))
1895 return -EINVAL;
1896
1897 channel_buf = rme9652_channel_buffer_location (rme9652,
1898 substream->pstr->stream,
1899 channel);
1900 if (snd_BUG_ON(!channel_buf))
1901 return -EIO;
1902 if (copy_from_user(channel_buf + pos, src, count))
1903 return -EFAULT;
1904 return 0;
1905}
1906
1907static int snd_rme9652_playback_copy_kernel(struct snd_pcm_substream *substream,
1908 int channel, unsigned long pos,
1909 void *src, unsigned long count)
1910{
1911 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1912 char *channel_buf;
1913
1914 channel_buf = rme9652_channel_buffer_location(rme9652,
1915 substream->pstr->stream,
1916 channel);
1917 if (snd_BUG_ON(!channel_buf))
1918 return -EIO;
1919 memcpy(channel_buf + pos, src, count);
1920 return 0;
1921}
1922
1923static int snd_rme9652_capture_copy(struct snd_pcm_substream *substream,
1924 int channel, unsigned long pos,
1925 void __user *dst, unsigned long count)
1926{
1927 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1928 char *channel_buf;
1929
1930 if (snd_BUG_ON(pos + count > RME9652_CHANNEL_BUFFER_BYTES))
1931 return -EINVAL;
1932
1933 channel_buf = rme9652_channel_buffer_location (rme9652,
1934 substream->pstr->stream,
1935 channel);
1936 if (snd_BUG_ON(!channel_buf))
1937 return -EIO;
1938 if (copy_to_user(dst, channel_buf + pos, count))
1939 return -EFAULT;
1940 return 0;
1941}
1942
1943static int snd_rme9652_capture_copy_kernel(struct snd_pcm_substream *substream,
1944 int channel, unsigned long pos,
1945 void *dst, unsigned long count)
1946{
1947 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1948 char *channel_buf;
1949
1950 channel_buf = rme9652_channel_buffer_location(rme9652,
1951 substream->pstr->stream,
1952 channel);
1953 if (snd_BUG_ON(!channel_buf))
1954 return -EIO;
1955 memcpy(dst, channel_buf + pos, count);
1956 return 0;
1957}
1958
1959static int snd_rme9652_hw_silence(struct snd_pcm_substream *substream,
1960 int channel, unsigned long pos,
1961 unsigned long count)
1962{
1963 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1964 char *channel_buf;
1965
1966 channel_buf = rme9652_channel_buffer_location (rme9652,
1967 substream->pstr->stream,
1968 channel);
1969 if (snd_BUG_ON(!channel_buf))
1970 return -EIO;
1971 memset(channel_buf + pos, 0, count);
1972 return 0;
1973}
1974
1975static int snd_rme9652_reset(struct snd_pcm_substream *substream)
1976{
1977 struct snd_pcm_runtime *runtime = substream->runtime;
1978 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1979 struct snd_pcm_substream *other;
1980 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
1981 other = rme9652->capture_substream;
1982 else
1983 other = rme9652->playback_substream;
1984 if (rme9652->running)
1985 runtime->status->hw_ptr = rme9652_hw_pointer(rme9652);
1986 else
1987 runtime->status->hw_ptr = 0;
1988 if (other) {
1989 struct snd_pcm_substream *s;
1990 struct snd_pcm_runtime *oruntime = other->runtime;
1991 snd_pcm_group_for_each_entry(s, substream) {
1992 if (s == other) {
1993 oruntime->status->hw_ptr = runtime->status->hw_ptr;
1994 break;
1995 }
1996 }
1997 }
1998 return 0;
1999}
2000
2001static int snd_rme9652_hw_params(struct snd_pcm_substream *substream,
2002 struct snd_pcm_hw_params *params)
2003{
2004 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2005 int err;
2006 pid_t this_pid;
2007 pid_t other_pid;
2008
2009 spin_lock_irq(&rme9652->lock);
2010
2011 if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) {
2012 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
2013 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= rme9652->creg_spdif_stream);
2014 this_pid = rme9652->playback_pid;
2015 other_pid = rme9652->capture_pid;
2016 } else {
2017 this_pid = rme9652->capture_pid;
2018 other_pid = rme9652->playback_pid;
2019 }
2020
2021 if ((other_pid > 0) && (this_pid != other_pid)) {
2022
2023
2024
2025
2026
2027
2028 if ((int)params_rate(params) !=
2029 rme9652_adat_sample_rate(rme9652)) {
2030 spin_unlock_irq(&rme9652->lock);
2031 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2032 return -EBUSY;
2033 }
2034
2035 if (params_period_size(params) != rme9652->period_bytes / 4) {
2036 spin_unlock_irq(&rme9652->lock);
2037 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2038 return -EBUSY;
2039 }
2040
2041
2042
2043 spin_unlock_irq(&rme9652->lock);
2044 return 0;
2045
2046 } else {
2047 spin_unlock_irq(&rme9652->lock);
2048 }
2049
2050
2051
2052
2053 if ((err = rme9652_set_rate(rme9652, params_rate(params))) < 0) {
2054 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2055 return err;
2056 }
2057
2058 if ((err = rme9652_set_interrupt_interval(rme9652, params_period_size(params))) < 0) {
2059 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2060 return err;
2061 }
2062
2063 return 0;
2064}
2065
2066static int snd_rme9652_channel_info(struct snd_pcm_substream *substream,
2067 struct snd_pcm_channel_info *info)
2068{
2069 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2070 int chn;
2071
2072 if (snd_BUG_ON(info->channel >= RME9652_NCHANNELS))
2073 return -EINVAL;
2074
2075 chn = rme9652->channel_map[array_index_nospec(info->channel,
2076 RME9652_NCHANNELS)];
2077 if (chn < 0)
2078 return -EINVAL;
2079
2080 info->offset = chn * RME9652_CHANNEL_BUFFER_BYTES;
2081 info->first = 0;
2082 info->step = 32;
2083 return 0;
2084}
2085
2086static int snd_rme9652_ioctl(struct snd_pcm_substream *substream,
2087 unsigned int cmd, void *arg)
2088{
2089 switch (cmd) {
2090 case SNDRV_PCM_IOCTL1_RESET:
2091 {
2092 return snd_rme9652_reset(substream);
2093 }
2094 case SNDRV_PCM_IOCTL1_CHANNEL_INFO:
2095 {
2096 struct snd_pcm_channel_info *info = arg;
2097 return snd_rme9652_channel_info(substream, info);
2098 }
2099 default:
2100 break;
2101 }
2102
2103 return snd_pcm_lib_ioctl(substream, cmd, arg);
2104}
2105
2106static void rme9652_silence_playback(struct snd_rme9652 *rme9652)
2107{
2108 memset(rme9652->playback_buffer, 0, RME9652_DMA_AREA_BYTES);
2109}
2110
2111static int snd_rme9652_trigger(struct snd_pcm_substream *substream,
2112 int cmd)
2113{
2114 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2115 struct snd_pcm_substream *other;
2116 int running;
2117 spin_lock(&rme9652->lock);
2118 running = rme9652->running;
2119 switch (cmd) {
2120 case SNDRV_PCM_TRIGGER_START:
2121 running |= 1 << substream->stream;
2122 break;
2123 case SNDRV_PCM_TRIGGER_STOP:
2124 running &= ~(1 << substream->stream);
2125 break;
2126 default:
2127 snd_BUG();
2128 spin_unlock(&rme9652->lock);
2129 return -EINVAL;
2130 }
2131 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2132 other = rme9652->capture_substream;
2133 else
2134 other = rme9652->playback_substream;
2135
2136 if (other) {
2137 struct snd_pcm_substream *s;
2138 snd_pcm_group_for_each_entry(s, substream) {
2139 if (s == other) {
2140 snd_pcm_trigger_done(s, substream);
2141 if (cmd == SNDRV_PCM_TRIGGER_START)
2142 running |= 1 << s->stream;
2143 else
2144 running &= ~(1 << s->stream);
2145 goto _ok;
2146 }
2147 }
2148 if (cmd == SNDRV_PCM_TRIGGER_START) {
2149 if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) &&
2150 substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2151 rme9652_silence_playback(rme9652);
2152 } else {
2153 if (running &&
2154 substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2155 rme9652_silence_playback(rme9652);
2156 }
2157 } else {
2158 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2159 rme9652_silence_playback(rme9652);
2160 }
2161 _ok:
2162 snd_pcm_trigger_done(substream, substream);
2163 if (!rme9652->running && running)
2164 rme9652_start(rme9652);
2165 else if (rme9652->running && !running)
2166 rme9652_stop(rme9652);
2167 rme9652->running = running;
2168 spin_unlock(&rme9652->lock);
2169
2170 return 0;
2171}
2172
2173static int snd_rme9652_prepare(struct snd_pcm_substream *substream)
2174{
2175 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2176 unsigned long flags;
2177 int result = 0;
2178
2179 spin_lock_irqsave(&rme9652->lock, flags);
2180 if (!rme9652->running)
2181 rme9652_reset_hw_pointer(rme9652);
2182 spin_unlock_irqrestore(&rme9652->lock, flags);
2183 return result;
2184}
2185
2186static const struct snd_pcm_hardware snd_rme9652_playback_subinfo =
2187{
2188 .info = (SNDRV_PCM_INFO_MMAP |
2189 SNDRV_PCM_INFO_MMAP_VALID |
2190 SNDRV_PCM_INFO_NONINTERLEAVED |
2191 SNDRV_PCM_INFO_SYNC_START |
2192 SNDRV_PCM_INFO_DOUBLE),
2193 .formats = SNDRV_PCM_FMTBIT_S32_LE,
2194 .rates = (SNDRV_PCM_RATE_44100 |
2195 SNDRV_PCM_RATE_48000 |
2196 SNDRV_PCM_RATE_88200 |
2197 SNDRV_PCM_RATE_96000),
2198 .rate_min = 44100,
2199 .rate_max = 96000,
2200 .channels_min = 10,
2201 .channels_max = 26,
2202 .buffer_bytes_max = RME9652_CHANNEL_BUFFER_BYTES * 26,
2203 .period_bytes_min = (64 * 4) * 10,
2204 .period_bytes_max = (8192 * 4) * 26,
2205 .periods_min = 2,
2206 .periods_max = 2,
2207 .fifo_size = 0,
2208};
2209
2210static const struct snd_pcm_hardware snd_rme9652_capture_subinfo =
2211{
2212 .info = (SNDRV_PCM_INFO_MMAP |
2213 SNDRV_PCM_INFO_MMAP_VALID |
2214 SNDRV_PCM_INFO_NONINTERLEAVED |
2215 SNDRV_PCM_INFO_SYNC_START),
2216 .formats = SNDRV_PCM_FMTBIT_S32_LE,
2217 .rates = (SNDRV_PCM_RATE_44100 |
2218 SNDRV_PCM_RATE_48000 |
2219 SNDRV_PCM_RATE_88200 |
2220 SNDRV_PCM_RATE_96000),
2221 .rate_min = 44100,
2222 .rate_max = 96000,
2223 .channels_min = 10,
2224 .channels_max = 26,
2225 .buffer_bytes_max = RME9652_CHANNEL_BUFFER_BYTES *26,
2226 .period_bytes_min = (64 * 4) * 10,
2227 .period_bytes_max = (8192 * 4) * 26,
2228 .periods_min = 2,
2229 .periods_max = 2,
2230 .fifo_size = 0,
2231};
2232
2233static const unsigned int period_sizes[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 };
2234
2235static const struct snd_pcm_hw_constraint_list hw_constraints_period_sizes = {
2236 .count = ARRAY_SIZE(period_sizes),
2237 .list = period_sizes,
2238 .mask = 0
2239};
2240
2241static int snd_rme9652_hw_rule_channels(struct snd_pcm_hw_params *params,
2242 struct snd_pcm_hw_rule *rule)
2243{
2244 struct snd_rme9652 *rme9652 = rule->private;
2245 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2246 unsigned int list[2] = { rme9652->ds_channels, rme9652->ss_channels };
2247 return snd_interval_list(c, 2, list, 0);
2248}
2249
2250static int snd_rme9652_hw_rule_channels_rate(struct snd_pcm_hw_params *params,
2251 struct snd_pcm_hw_rule *rule)
2252{
2253 struct snd_rme9652 *rme9652 = rule->private;
2254 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2255 struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2256 if (r->min > 48000) {
2257 struct snd_interval t = {
2258 .min = rme9652->ds_channels,
2259 .max = rme9652->ds_channels,
2260 .integer = 1,
2261 };
2262 return snd_interval_refine(c, &t);
2263 } else if (r->max < 88200) {
2264 struct snd_interval t = {
2265 .min = rme9652->ss_channels,
2266 .max = rme9652->ss_channels,
2267 .integer = 1,
2268 };
2269 return snd_interval_refine(c, &t);
2270 }
2271 return 0;
2272}
2273
2274static int snd_rme9652_hw_rule_rate_channels(struct snd_pcm_hw_params *params,
2275 struct snd_pcm_hw_rule *rule)
2276{
2277 struct snd_rme9652 *rme9652 = rule->private;
2278 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2279 struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2280 if (c->min >= rme9652->ss_channels) {
2281 struct snd_interval t = {
2282 .min = 44100,
2283 .max = 48000,
2284 .integer = 1,
2285 };
2286 return snd_interval_refine(r, &t);
2287 } else if (c->max <= rme9652->ds_channels) {
2288 struct snd_interval t = {
2289 .min = 88200,
2290 .max = 96000,
2291 .integer = 1,
2292 };
2293 return snd_interval_refine(r, &t);
2294 }
2295 return 0;
2296}
2297
2298static int snd_rme9652_playback_open(struct snd_pcm_substream *substream)
2299{
2300 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2301 struct snd_pcm_runtime *runtime = substream->runtime;
2302
2303 spin_lock_irq(&rme9652->lock);
2304
2305 snd_pcm_set_sync(substream);
2306
2307 runtime->hw = snd_rme9652_playback_subinfo;
2308 runtime->dma_area = rme9652->playback_buffer;
2309 runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2310
2311 if (rme9652->capture_substream == NULL) {
2312 rme9652_stop(rme9652);
2313 rme9652_set_thru(rme9652, -1, 0);
2314 }
2315
2316 rme9652->playback_pid = current->pid;
2317 rme9652->playback_substream = substream;
2318
2319 spin_unlock_irq(&rme9652->lock);
2320
2321 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2322 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2323 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2324 snd_rme9652_hw_rule_channels, rme9652,
2325 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2326 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2327 snd_rme9652_hw_rule_channels_rate, rme9652,
2328 SNDRV_PCM_HW_PARAM_RATE, -1);
2329 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2330 snd_rme9652_hw_rule_rate_channels, rme9652,
2331 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2332
2333 rme9652->creg_spdif_stream = rme9652->creg_spdif;
2334 rme9652->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2335 snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2336 SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2337 return 0;
2338}
2339
2340static int snd_rme9652_playback_release(struct snd_pcm_substream *substream)
2341{
2342 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2343
2344 spin_lock_irq(&rme9652->lock);
2345
2346 rme9652->playback_pid = -1;
2347 rme9652->playback_substream = NULL;
2348
2349 spin_unlock_irq(&rme9652->lock);
2350
2351 rme9652->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2352 snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2353 SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2354 return 0;
2355}
2356
2357
2358static int snd_rme9652_capture_open(struct snd_pcm_substream *substream)
2359{
2360 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2361 struct snd_pcm_runtime *runtime = substream->runtime;
2362
2363 spin_lock_irq(&rme9652->lock);
2364
2365 snd_pcm_set_sync(substream);
2366
2367 runtime->hw = snd_rme9652_capture_subinfo;
2368 runtime->dma_area = rme9652->capture_buffer;
2369 runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2370
2371 if (rme9652->playback_substream == NULL) {
2372 rme9652_stop(rme9652);
2373 rme9652_set_thru(rme9652, -1, 0);
2374 }
2375
2376 rme9652->capture_pid = current->pid;
2377 rme9652->capture_substream = substream;
2378
2379 spin_unlock_irq(&rme9652->lock);
2380
2381 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2382 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2383 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2384 snd_rme9652_hw_rule_channels, rme9652,
2385 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2386 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2387 snd_rme9652_hw_rule_channels_rate, rme9652,
2388 SNDRV_PCM_HW_PARAM_RATE, -1);
2389 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2390 snd_rme9652_hw_rule_rate_channels, rme9652,
2391 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2392 return 0;
2393}
2394
2395static int snd_rme9652_capture_release(struct snd_pcm_substream *substream)
2396{
2397 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2398
2399 spin_lock_irq(&rme9652->lock);
2400
2401 rme9652->capture_pid = -1;
2402 rme9652->capture_substream = NULL;
2403
2404 spin_unlock_irq(&rme9652->lock);
2405 return 0;
2406}
2407
2408static const struct snd_pcm_ops snd_rme9652_playback_ops = {
2409 .open = snd_rme9652_playback_open,
2410 .close = snd_rme9652_playback_release,
2411 .ioctl = snd_rme9652_ioctl,
2412 .hw_params = snd_rme9652_hw_params,
2413 .prepare = snd_rme9652_prepare,
2414 .trigger = snd_rme9652_trigger,
2415 .pointer = snd_rme9652_hw_pointer,
2416 .copy_user = snd_rme9652_playback_copy,
2417 .copy_kernel = snd_rme9652_playback_copy_kernel,
2418 .fill_silence = snd_rme9652_hw_silence,
2419};
2420
2421static const struct snd_pcm_ops snd_rme9652_capture_ops = {
2422 .open = snd_rme9652_capture_open,
2423 .close = snd_rme9652_capture_release,
2424 .ioctl = snd_rme9652_ioctl,
2425 .hw_params = snd_rme9652_hw_params,
2426 .prepare = snd_rme9652_prepare,
2427 .trigger = snd_rme9652_trigger,
2428 .pointer = snd_rme9652_hw_pointer,
2429 .copy_user = snd_rme9652_capture_copy,
2430 .copy_kernel = snd_rme9652_capture_copy_kernel,
2431};
2432
2433static int snd_rme9652_create_pcm(struct snd_card *card,
2434 struct snd_rme9652 *rme9652)
2435{
2436 struct snd_pcm *pcm;
2437 int err;
2438
2439 if ((err = snd_pcm_new(card,
2440 rme9652->card_name,
2441 0, 1, 1, &pcm)) < 0) {
2442 return err;
2443 }
2444
2445 rme9652->pcm = pcm;
2446 pcm->private_data = rme9652;
2447 strcpy(pcm->name, rme9652->card_name);
2448
2449 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_rme9652_playback_ops);
2450 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_rme9652_capture_ops);
2451
2452 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
2453
2454 return 0;
2455}
2456
2457static int snd_rme9652_create(struct snd_card *card,
2458 struct snd_rme9652 *rme9652,
2459 int precise_ptr)
2460{
2461 struct pci_dev *pci = rme9652->pci;
2462 int err;
2463 int status;
2464 unsigned short rev;
2465
2466 rme9652->irq = -1;
2467 rme9652->card = card;
2468
2469 pci_read_config_word(rme9652->pci, PCI_CLASS_REVISION, &rev);
2470
2471 switch (rev & 0xff) {
2472 case 3:
2473 case 4:
2474 case 8:
2475 case 9:
2476 break;
2477
2478 default:
2479
2480 return -ENODEV;
2481 }
2482
2483 if ((err = pci_enable_device(pci)) < 0)
2484 return err;
2485
2486 spin_lock_init(&rme9652->lock);
2487
2488 if ((err = pci_request_regions(pci, "rme9652")) < 0)
2489 return err;
2490 rme9652->port = pci_resource_start(pci, 0);
2491 rme9652->iobase = ioremap_nocache(rme9652->port, RME9652_IO_EXTENT);
2492 if (rme9652->iobase == NULL) {
2493 dev_err(card->dev, "unable to remap region 0x%lx-0x%lx\n",
2494 rme9652->port, rme9652->port + RME9652_IO_EXTENT - 1);
2495 return -EBUSY;
2496 }
2497
2498 if (request_irq(pci->irq, snd_rme9652_interrupt, IRQF_SHARED,
2499 KBUILD_MODNAME, rme9652)) {
2500 dev_err(card->dev, "unable to request IRQ %d\n", pci->irq);
2501 return -EBUSY;
2502 }
2503 rme9652->irq = pci->irq;
2504 rme9652->precise_ptr = precise_ptr;
2505
2506
2507
2508
2509
2510
2511 status = rme9652_read(rme9652, RME9652_status_register);
2512 if (rme9652_decode_spdif_rate(status&RME9652_F) == 1) {
2513 rme9652->hw_rev = 15;
2514 } else {
2515 rme9652->hw_rev = 11;
2516 }
2517
2518
2519
2520
2521
2522
2523
2524
2525 switch (rev) {
2526 case 8:
2527 strcpy(card->driver, "RME9636");
2528 if (rme9652->hw_rev == 15) {
2529 rme9652->card_name = "RME Digi9636 (Rev 1.5)";
2530 } else {
2531 rme9652->card_name = "RME Digi9636";
2532 }
2533 rme9652->ss_channels = RME9636_NCHANNELS;
2534 break;
2535 case 9:
2536 strcpy(card->driver, "RME9636");
2537 rme9652->card_name = "RME Digi9636 (Rev G)";
2538 rme9652->ss_channels = RME9636_NCHANNELS;
2539 break;
2540 case 4:
2541 strcpy(card->driver, "RME9652");
2542 rme9652->card_name = "RME Digi9652 (Rev G)";
2543 rme9652->ss_channels = RME9652_NCHANNELS;
2544 break;
2545 case 3:
2546 strcpy(card->driver, "RME9652");
2547 if (rme9652->hw_rev == 15) {
2548 rme9652->card_name = "RME Digi9652 (Rev 1.5)";
2549 } else {
2550 rme9652->card_name = "RME Digi9652";
2551 }
2552 rme9652->ss_channels = RME9652_NCHANNELS;
2553 break;
2554 }
2555
2556 rme9652->ds_channels = (rme9652->ss_channels - 2) / 2 + 2;
2557
2558 pci_set_master(rme9652->pci);
2559
2560 if ((err = snd_rme9652_initialize_memory(rme9652)) < 0) {
2561 return err;
2562 }
2563
2564 if ((err = snd_rme9652_create_pcm(card, rme9652)) < 0) {
2565 return err;
2566 }
2567
2568 if ((err = snd_rme9652_create_controls(card, rme9652)) < 0) {
2569 return err;
2570 }
2571
2572 snd_rme9652_proc_init(rme9652);
2573
2574 rme9652->last_spdif_sample_rate = -1;
2575 rme9652->last_adat_sample_rate = -1;
2576 rme9652->playback_pid = -1;
2577 rme9652->capture_pid = -1;
2578 rme9652->capture_substream = NULL;
2579 rme9652->playback_substream = NULL;
2580
2581 snd_rme9652_set_defaults(rme9652);
2582
2583 if (rme9652->hw_rev == 15) {
2584 rme9652_initialize_spdif_receiver (rme9652);
2585 }
2586
2587 return 0;
2588}
2589
2590static void snd_rme9652_card_free(struct snd_card *card)
2591{
2592 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) card->private_data;
2593
2594 if (rme9652)
2595 snd_rme9652_free(rme9652);
2596}
2597
2598static int snd_rme9652_probe(struct pci_dev *pci,
2599 const struct pci_device_id *pci_id)
2600{
2601 static int dev;
2602 struct snd_rme9652 *rme9652;
2603 struct snd_card *card;
2604 int err;
2605
2606 if (dev >= SNDRV_CARDS)
2607 return -ENODEV;
2608 if (!enable[dev]) {
2609 dev++;
2610 return -ENOENT;
2611 }
2612
2613 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
2614 sizeof(struct snd_rme9652), &card);
2615
2616 if (err < 0)
2617 return err;
2618
2619 rme9652 = (struct snd_rme9652 *) card->private_data;
2620 card->private_free = snd_rme9652_card_free;
2621 rme9652->dev = dev;
2622 rme9652->pci = pci;
2623 err = snd_rme9652_create(card, rme9652, precise_ptr[dev]);
2624 if (err)
2625 goto free_card;
2626
2627 strcpy(card->shortname, rme9652->card_name);
2628
2629 sprintf(card->longname, "%s at 0x%lx, irq %d",
2630 card->shortname, rme9652->port, rme9652->irq);
2631 err = snd_card_register(card);
2632 if (err) {
2633free_card:
2634 snd_card_free(card);
2635 return err;
2636 }
2637 pci_set_drvdata(pci, card);
2638 dev++;
2639 return 0;
2640}
2641
2642static void snd_rme9652_remove(struct pci_dev *pci)
2643{
2644 snd_card_free(pci_get_drvdata(pci));
2645}
2646
2647static struct pci_driver rme9652_driver = {
2648 .name = KBUILD_MODNAME,
2649 .id_table = snd_rme9652_ids,
2650 .probe = snd_rme9652_probe,
2651 .remove = snd_rme9652_remove,
2652};
2653
2654module_pci_driver(rme9652_driver);
2655