LXR linux/sound/soc/codecs/rt5645.c

   1/*
   2 * rt5645.c  --  RT5645 ALSA SoC audio codec driver
   3 *
   4 * Copyright 2013 Realtek Semiconductor Corp.
   5 * Author: Bard Liao <bardliao@realtek.com>
   6 *
   7 * This program is free software; you can redistribute it and/or modify
   8 * it under the terms of the GNU General Public License version 2 as
   9 * published by the Free Software Foundation.
  10 */
  11
  12#include <linux/module.h>
  13#include <linux/moduleparam.h>
  14#include <linux/init.h>
  15#include <linux/delay.h>
  16#include <linux/pm.h>
  17#include <linux/i2c.h>
  18#include <linux/platform_device.h>
  19#include <linux/spi/spi.h>
  20#include <linux/gpio.h>
  21#include <linux/gpio/consumer.h>
  22#include <linux/acpi.h>
  23#include <linux/dmi.h>
  24#include <linux/regulator/consumer.h>
  25#include <sound/core.h>
  26#include <sound/pcm.h>
  27#include <sound/pcm_params.h>
  28#include <sound/jack.h>
  29#include <sound/soc.h>
  30#include <sound/soc-dapm.h>
  31#include <sound/initval.h>
  32#include <sound/tlv.h>
  33
  34#include "rl6231.h"
  35#include "rt5645.h"
  36
  37#define QUIRK_INV_JD1_1(q)      ((q) & 1)
  38#define QUIRK_LEVEL_IRQ(q)      (((q) >> 1) & 1)
  39#define QUIRK_IN2_DIFF(q)       (((q) >> 2) & 1)
  40#define QUIRK_JD_MODE(q)        (((q) >> 4) & 7)
  41#define QUIRK_DMIC1_DATA_PIN(q) (((q) >> 8) & 3)
  42#define QUIRK_DMIC2_DATA_PIN(q) (((q) >> 12) & 3)
  43
  44static unsigned int quirk = -1;
  45module_param(quirk, uint, 0444);
  46MODULE_PARM_DESC(quirk, "RT5645 pdata quirk override");
  47
  48#define RT5645_DEVICE_ID 0x6308
  49#define RT5650_DEVICE_ID 0x6419
  50
  51#define RT5645_PR_RANGE_BASE (0xff + 1)
  52#define RT5645_PR_SPACING 0x100
  53
  54#define RT5645_PR_BASE (RT5645_PR_RANGE_BASE + (0 * RT5645_PR_SPACING))
  55
  56#define RT5645_HWEQ_NUM 57
  57
  58#define TIME_TO_POWER_MS 400
  59
  60static const struct regmap_range_cfg rt5645_ranges[] = {
  61        {
  62                .name = "PR",
  63                .range_min = RT5645_PR_BASE,
  64                .range_max = RT5645_PR_BASE + 0xf8,
  65                .selector_reg = RT5645_PRIV_INDEX,
  66                .selector_mask = 0xff,
  67                .selector_shift = 0x0,
  68                .window_start = RT5645_PRIV_DATA,
  69                .window_len = 0x1,
  70        },
  71};
  72
  73static const struct reg_sequence init_list[] = {
  74        {RT5645_PR_BASE + 0x3d, 0x3600},
  75        {RT5645_PR_BASE + 0x1c, 0xfd70},
  76        {RT5645_PR_BASE + 0x20, 0x611f},
  77        {RT5645_PR_BASE + 0x21, 0x4040},
  78        {RT5645_PR_BASE + 0x23, 0x0004},
  79        {RT5645_ASRC_4, 0x0120},
  80};
  81
  82static const struct reg_sequence rt5650_init_list[] = {
  83        {0xf6,  0x0100},
  84};
  85
  86static const struct reg_default rt5645_reg[] = {
  87        { 0x00, 0x0000 },
  88        { 0x01, 0xc8c8 },
  89        { 0x02, 0xc8c8 },
  90        { 0x03, 0xc8c8 },
  91        { 0x0a, 0x0002 },
  92        { 0x0b, 0x2827 },
  93        { 0x0c, 0xe000 },
  94        { 0x0d, 0x0000 },
  95        { 0x0e, 0x0000 },
  96        { 0x0f, 0x0808 },
  97        { 0x14, 0x3333 },
  98        { 0x16, 0x4b00 },
  99        { 0x18, 0x018b },
 100        { 0x19, 0xafaf },
 101        { 0x1a, 0xafaf },
 102        { 0x1b, 0x0001 },
 103        { 0x1c, 0x2f2f },
 104        { 0x1d, 0x2f2f },
 105        { 0x1e, 0x0000 },
 106        { 0x20, 0x0000 },
 107        { 0x27, 0x7060 },
 108        { 0x28, 0x7070 },
 109        { 0x29, 0x8080 },
 110        { 0x2a, 0x5656 },
 111        { 0x2b, 0x5454 },
 112        { 0x2c, 0xaaa0 },
 113        { 0x2d, 0x0000 },
 114        { 0x2f, 0x1002 },
 115        { 0x31, 0x5000 },
 116        { 0x32, 0x0000 },
 117        { 0x33, 0x0000 },
 118        { 0x34, 0x0000 },
 119        { 0x35, 0x0000 },
 120        { 0x3b, 0x0000 },
 121        { 0x3c, 0x007f },
 122        { 0x3d, 0x0000 },
 123        { 0x3e, 0x007f },
 124        { 0x3f, 0x0000 },
 125        { 0x40, 0x001f },
 126        { 0x41, 0x0000 },
 127        { 0x42, 0x001f },
 128        { 0x45, 0x6000 },
 129        { 0x46, 0x003e },
 130        { 0x47, 0x003e },
 131        { 0x48, 0xf807 },
 132        { 0x4a, 0x0004 },
 133        { 0x4d, 0x0000 },
 134        { 0x4e, 0x0000 },
 135        { 0x4f, 0x01ff },
 136        { 0x50, 0x0000 },
 137        { 0x51, 0x0000 },
 138        { 0x52, 0x01ff },
 139        { 0x53, 0xf000 },
 140        { 0x56, 0x0111 },
 141        { 0x57, 0x0064 },
 142        { 0x58, 0xef0e },
 143        { 0x59, 0xf0f0 },
 144        { 0x5a, 0xef0e },
 145        { 0x5b, 0xf0f0 },
 146        { 0x5c, 0xef0e },
 147        { 0x5d, 0xf0f0 },
 148        { 0x5e, 0xf000 },
 149        { 0x5f, 0x0000 },
 150        { 0x61, 0x0300 },
 151        { 0x62, 0x0000 },
 152        { 0x63, 0x00c2 },
 153        { 0x64, 0x0000 },
 154        { 0x65, 0x0000 },
 155        { 0x66, 0x0000 },
 156        { 0x6a, 0x0000 },
 157        { 0x6c, 0x0aaa },
 158        { 0x70, 0x8000 },
 159        { 0x71, 0x8000 },
 160        { 0x72, 0x8000 },
 161        { 0x73, 0x7770 },
 162        { 0x74, 0x3e00 },
 163        { 0x75, 0x2409 },
 164        { 0x76, 0x000a },
 165        { 0x77, 0x0c00 },
 166        { 0x78, 0x0000 },
 167        { 0x79, 0x0123 },
 168        { 0x80, 0x0000 },
 169        { 0x81, 0x0000 },
 170        { 0x82, 0x0000 },
 171        { 0x83, 0x0000 },
 172        { 0x84, 0x0000 },
 173        { 0x85, 0x0000 },
 174        { 0x8a, 0x0120 },
 175        { 0x8e, 0x0004 },
 176        { 0x8f, 0x1100 },
 177        { 0x90, 0x0646 },
 178        { 0x91, 0x0c06 },
 179        { 0x93, 0x0000 },
 180        { 0x94, 0x0200 },
 181        { 0x95, 0x0000 },
 182        { 0x9a, 0x2184 },
 183        { 0x9b, 0x010a },
 184        { 0x9c, 0x0aea },
 185        { 0x9d, 0x000c },
 186        { 0x9e, 0x0400 },
 187        { 0xa0, 0xa0a8 },
 188        { 0xa1, 0x0059 },
 189        { 0xa2, 0x0001 },
 190        { 0xae, 0x6000 },
 191        { 0xaf, 0x0000 },
 192        { 0xb0, 0x6000 },
 193        { 0xb1, 0x0000 },
 194        { 0xb2, 0x0000 },
 195        { 0xb3, 0x001f },
 196        { 0xb4, 0x020c },
 197        { 0xb5, 0x1f00 },
 198        { 0xb6, 0x0000 },
 199        { 0xbb, 0x0000 },
 200        { 0xbc, 0x0000 },
 201        { 0xbd, 0x0000 },
 202        { 0xbe, 0x0000 },
 203        { 0xbf, 0x3100 },
 204        { 0xc0, 0x0000 },
 205        { 0xc1, 0x0000 },
 206        { 0xc2, 0x0000 },
 207        { 0xc3, 0x2000 },
 208        { 0xcd, 0x0000 },
 209        { 0xce, 0x0000 },
 210        { 0xcf, 0x1813 },
 211        { 0xd0, 0x0690 },
 212        { 0xd1, 0x1c17 },
 213        { 0xd3, 0xb320 },
 214        { 0xd4, 0x0000 },
 215        { 0xd6, 0x0400 },
 216        { 0xd9, 0x0809 },
 217        { 0xda, 0x0000 },
 218        { 0xdb, 0x0003 },
 219        { 0xdc, 0x0049 },
 220        { 0xdd, 0x001b },
 221        { 0xdf, 0x0008 },
 222        { 0xe0, 0x4000 },
 223        { 0xe6, 0x8000 },
 224        { 0xe7, 0x0200 },
 225        { 0xec, 0xb300 },
 226        { 0xed, 0x0000 },
 227        { 0xf0, 0x001f },
 228        { 0xf1, 0x020c },
 229        { 0xf2, 0x1f00 },
 230        { 0xf3, 0x0000 },
 231        { 0xf4, 0x4000 },
 232        { 0xf8, 0x0000 },
 233        { 0xf9, 0x0000 },
 234        { 0xfa, 0x2060 },
 235        { 0xfb, 0x4040 },
 236        { 0xfc, 0x0000 },
 237        { 0xfd, 0x0002 },
 238        { 0xfe, 0x10ec },
 239        { 0xff, 0x6308 },
 240};
 241
 242static const struct reg_default rt5650_reg[] = {
 243        { 0x00, 0x0000 },
 244        { 0x01, 0xc8c8 },
 245        { 0x02, 0xc8c8 },
 246        { 0x03, 0xc8c8 },
 247        { 0x0a, 0x0002 },
 248        { 0x0b, 0x2827 },
 249        { 0x0c, 0xe000 },
 250        { 0x0d, 0x0000 },
 251        { 0x0e, 0x0000 },
 252        { 0x0f, 0x0808 },
 253        { 0x14, 0x3333 },
 254        { 0x16, 0x4b00 },
 255        { 0x18, 0x018b },
 256        { 0x19, 0xafaf },
 257        { 0x1a, 0xafaf },
 258        { 0x1b, 0x0001 },
 259        { 0x1c, 0x2f2f },
 260        { 0x1d, 0x2f2f },
 261        { 0x1e, 0x0000 },
 262        { 0x20, 0x0000 },
 263        { 0x27, 0x7060 },
 264        { 0x28, 0x7070 },
 265        { 0x29, 0x8080 },
 266        { 0x2a, 0x5656 },
 267        { 0x2b, 0x5454 },
 268        { 0x2c, 0xaaa0 },
 269        { 0x2d, 0x0000 },
 270        { 0x2f, 0x5002 },
 271        { 0x31, 0x5000 },
 272        { 0x32, 0x0000 },
 273        { 0x33, 0x0000 },
 274        { 0x34, 0x0000 },
 275        { 0x35, 0x0000 },
 276        { 0x3b, 0x0000 },
 277        { 0x3c, 0x007f },
 278        { 0x3d, 0x0000 },
 279        { 0x3e, 0x007f },
 280        { 0x3f, 0x0000 },
 281        { 0x40, 0x001f },
 282        { 0x41, 0x0000 },
 283        { 0x42, 0x001f },
 284        { 0x45, 0x6000 },
 285        { 0x46, 0x003e },
 286        { 0x47, 0x003e },
 287        { 0x48, 0xf807 },
 288        { 0x4a, 0x0004 },
 289        { 0x4d, 0x0000 },
 290        { 0x4e, 0x0000 },
 291        { 0x4f, 0x01ff },
 292        { 0x50, 0x0000 },
 293        { 0x51, 0x0000 },
 294        { 0x52, 0x01ff },
 295        { 0x53, 0xf000 },
 296        { 0x56, 0x0111 },
 297        { 0x57, 0x0064 },
 298        { 0x58, 0xef0e },
 299        { 0x59, 0xf0f0 },
 300        { 0x5a, 0xef0e },
 301        { 0x5b, 0xf0f0 },
 302        { 0x5c, 0xef0e },
 303        { 0x5d, 0xf0f0 },
 304        { 0x5e, 0xf000 },
 305        { 0x5f, 0x0000 },
 306        { 0x61, 0x0300 },
 307        { 0x62, 0x0000 },
 308        { 0x63, 0x00c2 },
 309        { 0x64, 0x0000 },
 310        { 0x65, 0x0000 },
 311        { 0x66, 0x0000 },
 312        { 0x6a, 0x0000 },
 313        { 0x6c, 0x0aaa },
 314        { 0x70, 0x8000 },
 315        { 0x71, 0x8000 },
 316        { 0x72, 0x8000 },
 317        { 0x73, 0x7770 },
 318        { 0x74, 0x3e00 },
 319        { 0x75, 0x2409 },
 320        { 0x76, 0x000a },
 321        { 0x77, 0x0c00 },
 322        { 0x78, 0x0000 },
 323        { 0x79, 0x0123 },
 324        { 0x7a, 0x0123 },
 325        { 0x80, 0x0000 },
 326        { 0x81, 0x0000 },
 327        { 0x82, 0x0000 },
 328        { 0x83, 0x0000 },
 329        { 0x84, 0x0000 },
 330        { 0x85, 0x0000 },
 331        { 0x8a, 0x0120 },
 332        { 0x8e, 0x0004 },
 333        { 0x8f, 0x1100 },
 334        { 0x90, 0x0646 },
 335        { 0x91, 0x0c06 },
 336        { 0x93, 0x0000 },
 337        { 0x94, 0x0200 },
 338        { 0x95, 0x0000 },
 339        { 0x9a, 0x2184 },
 340        { 0x9b, 0x010a },
 341        { 0x9c, 0x0aea },
 342        { 0x9d, 0x000c },
 343        { 0x9e, 0x0400 },
 344        { 0xa0, 0xa0a8 },
 345        { 0xa1, 0x0059 },
 346        { 0xa2, 0x0001 },
 347        { 0xae, 0x6000 },
 348        { 0xaf, 0x0000 },
 349        { 0xb0, 0x6000 },
 350        { 0xb1, 0x0000 },
 351        { 0xb2, 0x0000 },
 352        { 0xb3, 0x001f },
 353        { 0xb4, 0x020c },
 354        { 0xb5, 0x1f00 },
 355        { 0xb6, 0x0000 },
 356        { 0xbb, 0x0000 },
 357        { 0xbc, 0x0000 },
 358        { 0xbd, 0x0000 },
 359        { 0xbe, 0x0000 },
 360        { 0xbf, 0x3100 },
 361        { 0xc0, 0x0000 },
 362        { 0xc1, 0x0000 },
 363        { 0xc2, 0x0000 },
 364        { 0xc3, 0x2000 },
 365        { 0xcd, 0x0000 },
 366        { 0xce, 0x0000 },
 367        { 0xcf, 0x1813 },
 368        { 0xd0, 0x0690 },
 369        { 0xd1, 0x1c17 },
 370        { 0xd3, 0xb320 },
 371        { 0xd4, 0x0000 },
 372        { 0xd6, 0x0400 },
 373        { 0xd9, 0x0809 },
 374        { 0xda, 0x0000 },
 375        { 0xdb, 0x0003 },
 376        { 0xdc, 0x0049 },
 377        { 0xdd, 0x001b },
 378        { 0xdf, 0x0008 },
 379        { 0xe0, 0x4000 },
 380        { 0xe6, 0x8000 },
 381        { 0xe7, 0x0200 },
 382        { 0xec, 0xb300 },
 383        { 0xed, 0x0000 },
 384        { 0xf0, 0x001f },
 385        { 0xf1, 0x020c },
 386        { 0xf2, 0x1f00 },
 387        { 0xf3, 0x0000 },
 388        { 0xf4, 0x4000 },
 389        { 0xf8, 0x0000 },
 390        { 0xf9, 0x0000 },
 391        { 0xfa, 0x2060 },
 392        { 0xfb, 0x4040 },
 393        { 0xfc, 0x0000 },
 394        { 0xfd, 0x0002 },
 395        { 0xfe, 0x10ec },
 396        { 0xff, 0x6308 },
 397};
 398
 399struct rt5645_eq_param_s {
 400        unsigned short reg;
 401        unsigned short val;
 402};
 403
 404static const char *const rt5645_supply_names[] = {
 405        "avdd",
 406        "cpvdd",
 407};
 408
 409struct rt5645_priv {
 410        struct snd_soc_component *component;
 411        struct rt5645_platform_data pdata;
 412        struct regmap *regmap;
 413        struct i2c_client *i2c;
 414        struct gpio_desc *gpiod_hp_det;
 415        struct snd_soc_jack *hp_jack;
 416        struct snd_soc_jack *mic_jack;
 417        struct snd_soc_jack *btn_jack;
 418        struct delayed_work jack_detect_work, rcclock_work;
 419        struct regulator_bulk_data supplies[ARRAY_SIZE(rt5645_supply_names)];
 420        struct rt5645_eq_param_s *eq_param;
 421        struct timer_list btn_check_timer;
 422
 423        int codec_type;
 424        int sysclk;
 425        int sysclk_src;
 426        int lrck[RT5645_AIFS];
 427        int bclk[RT5645_AIFS];
 428        int master[RT5645_AIFS];
 429
 430        int pll_src;
 431        int pll_in;
 432        int pll_out;
 433
 434        int jack_type;
 435        bool en_button_func;
 436        bool hp_on;
 437        int v_id;
 438};
 439
 440static int rt5645_reset(struct snd_soc_component *component)
 441{
 442        return snd_soc_component_write(component, RT5645_RESET, 0);
 443}
 444
 445static bool rt5645_volatile_register(struct device *dev, unsigned int reg)
 446{
 447        int i;
 448
 449        for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
 450                if (reg >= rt5645_ranges[i].range_min &&
 451                        reg <= rt5645_ranges[i].range_max) {
 452                        return true;
 453                }
 454        }
 455
 456        switch (reg) {
 457        case RT5645_RESET:
 458        case RT5645_PRIV_INDEX:
 459        case RT5645_PRIV_DATA:
 460        case RT5645_IN1_CTRL1:
 461        case RT5645_IN1_CTRL2:
 462        case RT5645_IN1_CTRL3:
 463        case RT5645_A_JD_CTRL1:
 464        case RT5645_ADC_EQ_CTRL1:
 465        case RT5645_EQ_CTRL1:
 466        case RT5645_ALC_CTRL_1:
 467        case RT5645_IRQ_CTRL2:
 468        case RT5645_IRQ_CTRL3:
 469        case RT5645_INT_IRQ_ST:
 470        case RT5645_IL_CMD:
 471        case RT5650_4BTN_IL_CMD1:
 472        case RT5645_VENDOR_ID:
 473        case RT5645_VENDOR_ID1:
 474        case RT5645_VENDOR_ID2:
 475                return true;
 476        default:
 477                return false;
 478        }
 479}
 480
 481static bool rt5645_readable_register(struct device *dev, unsigned int reg)
 482{
 483        int i;
 484
 485        for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
 486                if (reg >= rt5645_ranges[i].range_min &&
 487                        reg <= rt5645_ranges[i].range_max) {
 488                        return true;
 489                }
 490        }
 491
 492        switch (reg) {
 493        case RT5645_RESET:
 494        case RT5645_SPK_VOL:
 495        case RT5645_HP_VOL:
 496        case RT5645_LOUT1:
 497        case RT5645_IN1_CTRL1:
 498        case RT5645_IN1_CTRL2:
 499        case RT5645_IN1_CTRL3:
 500        case RT5645_IN2_CTRL:
 501        case RT5645_INL1_INR1_VOL:
 502        case RT5645_SPK_FUNC_LIM:
 503        case RT5645_ADJ_HPF_CTRL:
 504        case RT5645_DAC1_DIG_VOL:
 505        case RT5645_DAC2_DIG_VOL:
 506        case RT5645_DAC_CTRL:
 507        case RT5645_STO1_ADC_DIG_VOL:
 508        case RT5645_MONO_ADC_DIG_VOL:
 509        case RT5645_ADC_BST_VOL1:
 510        case RT5645_ADC_BST_VOL2:
 511        case RT5645_STO1_ADC_MIXER:
 512        case RT5645_MONO_ADC_MIXER:
 513        case RT5645_AD_DA_MIXER:
 514        case RT5645_STO_DAC_MIXER:
 515        case RT5645_MONO_DAC_MIXER:
 516        case RT5645_DIG_MIXER:
 517        case RT5650_A_DAC_SOUR:
 518        case RT5645_DIG_INF1_DATA:
 519        case RT5645_PDM_OUT_CTRL:
 520        case RT5645_REC_L1_MIXER:
 521        case RT5645_REC_L2_MIXER:
 522        case RT5645_REC_R1_MIXER:
 523        case RT5645_REC_R2_MIXER:
 524        case RT5645_HPMIXL_CTRL:
 525        case RT5645_HPOMIXL_CTRL:
 526        case RT5645_HPMIXR_CTRL:
 527        case RT5645_HPOMIXR_CTRL:
 528        case RT5645_HPO_MIXER:
 529        case RT5645_SPK_L_MIXER:
 530        case RT5645_SPK_R_MIXER:
 531        case RT5645_SPO_MIXER:
 532        case RT5645_SPO_CLSD_RATIO:
 533        case RT5645_OUT_L1_MIXER:
 534        case RT5645_OUT_R1_MIXER:
 535        case RT5645_OUT_L_GAIN1:
 536        case RT5645_OUT_L_GAIN2:
 537        case RT5645_OUT_R_GAIN1:
 538        case RT5645_OUT_R_GAIN2:
 539        case RT5645_LOUT_MIXER:
 540        case RT5645_HAPTIC_CTRL1:
 541        case RT5645_HAPTIC_CTRL2:
 542        case RT5645_HAPTIC_CTRL3:
 543        case RT5645_HAPTIC_CTRL4:
 544        case RT5645_HAPTIC_CTRL5:
 545        case RT5645_HAPTIC_CTRL6:
 546        case RT5645_HAPTIC_CTRL7:
 547        case RT5645_HAPTIC_CTRL8:
 548        case RT5645_HAPTIC_CTRL9:
 549        case RT5645_HAPTIC_CTRL10:
 550        case RT5645_PWR_DIG1:
 551        case RT5645_PWR_DIG2:
 552        case RT5645_PWR_ANLG1:
 553        case RT5645_PWR_ANLG2:
 554        case RT5645_PWR_MIXER:
 555        case RT5645_PWR_VOL:
 556        case RT5645_PRIV_INDEX:
 557        case RT5645_PRIV_DATA:
 558        case RT5645_I2S1_SDP:
 559        case RT5645_I2S2_SDP:
 560        case RT5645_ADDA_CLK1:
 561        case RT5645_ADDA_CLK2:
 562        case RT5645_DMIC_CTRL1:
 563        case RT5645_DMIC_CTRL2:
 564        case RT5645_TDM_CTRL_1:
 565        case RT5645_TDM_CTRL_2:
 566        case RT5645_TDM_CTRL_3:
 567        case RT5650_TDM_CTRL_4:
 568        case RT5645_GLB_CLK:
 569        case RT5645_PLL_CTRL1:
 570        case RT5645_PLL_CTRL2:
 571        case RT5645_ASRC_1:
 572        case RT5645_ASRC_2:
 573        case RT5645_ASRC_3:
 574        case RT5645_ASRC_4:
 575        case RT5645_DEPOP_M1:
 576        case RT5645_DEPOP_M2:
 577        case RT5645_DEPOP_M3:
 578        case RT5645_CHARGE_PUMP:
 579        case RT5645_MICBIAS:
 580        case RT5645_A_JD_CTRL1:
 581        case RT5645_VAD_CTRL4:
 582        case RT5645_CLSD_OUT_CTRL:
 583        case RT5645_ADC_EQ_CTRL1:
 584        case RT5645_ADC_EQ_CTRL2:
 585        case RT5645_EQ_CTRL1:
 586        case RT5645_EQ_CTRL2:
 587        case RT5645_ALC_CTRL_1:
 588        case RT5645_ALC_CTRL_2:
 589        case RT5645_ALC_CTRL_3:
 590        case RT5645_ALC_CTRL_4:
 591        case RT5645_ALC_CTRL_5:
 592        case RT5645_JD_CTRL:
 593        case RT5645_IRQ_CTRL1:
 594        case RT5645_IRQ_CTRL2:
 595        case RT5645_IRQ_CTRL3:
 596        case RT5645_INT_IRQ_ST:
 597        case RT5645_GPIO_CTRL1:
 598        case RT5645_GPIO_CTRL2:
 599        case RT5645_GPIO_CTRL3:
 600        case RT5645_BASS_BACK:
 601        case RT5645_MP3_PLUS1:
 602        case RT5645_MP3_PLUS2:
 603        case RT5645_ADJ_HPF1:
 604        case RT5645_ADJ_HPF2:
 605        case RT5645_HP_CALIB_AMP_DET:
 606        case RT5645_SV_ZCD1:
 607        case RT5645_SV_ZCD2:
 608        case RT5645_IL_CMD:
 609        case RT5645_IL_CMD2:
 610        case RT5645_IL_CMD3:
 611        case RT5650_4BTN_IL_CMD1:
 612        case RT5650_4BTN_IL_CMD2:
 613        case RT5645_DRC1_HL_CTRL1:
 614        case RT5645_DRC2_HL_CTRL1:
 615        case RT5645_ADC_MONO_HP_CTRL1:
 616        case RT5645_ADC_MONO_HP_CTRL2:
 617        case RT5645_DRC2_CTRL1:
 618        case RT5645_DRC2_CTRL2:
 619        case RT5645_DRC2_CTRL3:
 620        case RT5645_DRC2_CTRL4:
 621        case RT5645_DRC2_CTRL5:
 622        case RT5645_JD_CTRL3:
 623        case RT5645_JD_CTRL4:
 624        case RT5645_GEN_CTRL1:
 625        case RT5645_GEN_CTRL2:
 626        case RT5645_GEN_CTRL3:
 627        case RT5645_VENDOR_ID:
 628        case RT5645_VENDOR_ID1:
 629        case RT5645_VENDOR_ID2:
 630                return true;
 631        default:
 632                return false;
 633        }
 634}
 635
 636static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
 637static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -6525, 75, 0);
 638static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
 639static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -1725, 75, 0);
 640static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
 641
 642/* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
 643static const DECLARE_TLV_DB_RANGE(bst_tlv,
 644        0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
 645        1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
 646        2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
 647        3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
 648        6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
 649        7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
 650        8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0)
 651);
 652
 653/* {-6, -4.5, -3, -1.5, 0, 0.82, 1.58, 2.28} dB */
 654static const DECLARE_TLV_DB_RANGE(spk_clsd_tlv,
 655        0, 4, TLV_DB_SCALE_ITEM(-600, 150, 0),
 656        5, 5, TLV_DB_SCALE_ITEM(82, 0, 0),
 657        6, 6, TLV_DB_SCALE_ITEM(158, 0, 0),
 658        7, 7, TLV_DB_SCALE_ITEM(228, 0, 0)
 659);
 660
 661static int rt5645_hweq_info(struct snd_kcontrol *kcontrol,
 662                         struct snd_ctl_elem_info *uinfo)
 663{
 664        uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 665        uinfo->count = RT5645_HWEQ_NUM * sizeof(struct rt5645_eq_param_s);
 666
 667        return 0;
 668}
 669
 670static int rt5645_hweq_get(struct snd_kcontrol *kcontrol,
 671                        struct snd_ctl_elem_value *ucontrol)
 672{
 673        struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 674        struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
 675        struct rt5645_eq_param_s *eq_param =
 676                (struct rt5645_eq_param_s *)ucontrol->value.bytes.data;
 677        int i;
 678
 679        for (i = 0; i < RT5645_HWEQ_NUM; i++) {
 680                eq_param[i].reg = cpu_to_be16(rt5645->eq_param[i].reg);
 681                eq_param[i].val = cpu_to_be16(rt5645->eq_param[i].val);
 682        }
 683
 684        return 0;
 685}
 686
 687static bool rt5645_validate_hweq(unsigned short reg)
 688{
 689        if ((reg >= 0x1a4 && reg <= 0x1cd) | (reg >= 0x1e5 && reg <= 0x1f8) |
 690                (reg == RT5645_EQ_CTRL2))
 691                return true;
 692
 693        return false;
 694}
 695
 696static int rt5645_hweq_put(struct snd_kcontrol *kcontrol,
 697                        struct snd_ctl_elem_value *ucontrol)
 698{
 699        struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 700        struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
 701        struct rt5645_eq_param_s *eq_param =
 702                (struct rt5645_eq_param_s *)ucontrol->value.bytes.data;
 703        int i;
 704
 705        for (i = 0; i < RT5645_HWEQ_NUM; i++) {
 706                eq_param[i].reg = be16_to_cpu(eq_param[i].reg);
 707                eq_param[i].val = be16_to_cpu(eq_param[i].val);
 708        }
 709
 710        /* The final setting of the table should be RT5645_EQ_CTRL2 */
 711        for (i = RT5645_HWEQ_NUM - 1; i >= 0; i--) {
 712                if (eq_param[i].reg == 0)
 713                        continue;
 714                else if (eq_param[i].reg != RT5645_EQ_CTRL2)
 715                        return 0;
 716                else
 717                        break;
 718        }
 719
 720        for (i = 0; i < RT5645_HWEQ_NUM; i++) {
 721                if (!rt5645_validate_hweq(eq_param[i].reg) &&
 722                        eq_param[i].reg != 0)
 723                        return 0;
 724                else if (eq_param[i].reg == 0)
 725                        break;
 726        }
 727
 728        memcpy(rt5645->eq_param, eq_param,
 729                RT5645_HWEQ_NUM * sizeof(struct rt5645_eq_param_s));
 730
 731        return 0;
 732}
 733
 734#define RT5645_HWEQ(xname) \
 735{       .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 736        .info = rt5645_hweq_info, \
 737        .get = rt5645_hweq_get, \
 738        .put = rt5645_hweq_put \
 739}
 740
 741static int rt5645_spk_put_volsw(struct snd_kcontrol *kcontrol,
 742                struct snd_ctl_elem_value *ucontrol)
 743{
 744        struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 745        struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
 746        int ret;
 747
 748        regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
 749                RT5645_PWR_CLK25M_MASK, RT5645_PWR_CLK25M_PU);
 750
 751        ret = snd_soc_put_volsw(kcontrol, ucontrol);
 752
 753        mod_delayed_work(system_power_efficient_wq, &rt5645->rcclock_work,
 754                msecs_to_jiffies(200));
 755
 756        return ret;
 757}
 758
 759static const char * const rt5645_dac1_vol_ctrl_mode_text[] = {
 760        "immediately", "zero crossing", "soft ramp"
 761};
 762
 763static SOC_ENUM_SINGLE_DECL(
 764        rt5645_dac1_vol_ctrl_mode, RT5645_PR_BASE,
 765        RT5645_DA1_ZDET_SFT, rt5645_dac1_vol_ctrl_mode_text);
 766
 767static const struct snd_kcontrol_new rt5645_snd_controls[] = {
 768        /* Speaker Output Volume */
 769        SOC_DOUBLE("Speaker Channel Switch", RT5645_SPK_VOL,
 770                RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
 771        SOC_DOUBLE_EXT_TLV("Speaker Playback Volume", RT5645_SPK_VOL,
 772                RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, snd_soc_get_volsw,
 773                rt5645_spk_put_volsw, out_vol_tlv),
 774
 775        /* ClassD modulator Speaker Gain Ratio */
 776        SOC_SINGLE_TLV("Speaker ClassD Playback Volume", RT5645_SPO_CLSD_RATIO,
 777                RT5645_SPK_G_CLSD_SFT, 7, 0, spk_clsd_tlv),
 778
 779        /* Headphone Output Volume */
 780        SOC_DOUBLE("Headphone Channel Switch", RT5645_HP_VOL,
 781                RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
 782        SOC_DOUBLE_TLV("Headphone Playback Volume", RT5645_HP_VOL,
 783                RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
 784
 785        /* OUTPUT Control */
 786        SOC_DOUBLE("OUT Playback Switch", RT5645_LOUT1,
 787                RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
 788        SOC_DOUBLE("OUT Channel Switch", RT5645_LOUT1,
 789                RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
 790        SOC_DOUBLE_TLV("OUT Playback Volume", RT5645_LOUT1,
 791                RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
 792
 793        /* DAC Digital Volume */
 794        SOC_DOUBLE("DAC2 Playback Switch", RT5645_DAC_CTRL,
 795                RT5645_M_DAC_L2_VOL_SFT, RT5645_M_DAC_R2_VOL_SFT, 1, 1),
 796        SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5645_DAC1_DIG_VOL,
 797                RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 87, 0, dac_vol_tlv),
 798        SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5645_DAC2_DIG_VOL,
 799                RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 87, 0, dac_vol_tlv),
 800
 801        /* IN1/IN2 Control */
 802        SOC_SINGLE_TLV("IN1 Boost", RT5645_IN1_CTRL1,
 803                RT5645_BST_SFT1, 12, 0, bst_tlv),
 804        SOC_SINGLE_TLV("IN2 Boost", RT5645_IN2_CTRL,
 805                RT5645_BST_SFT2, 8, 0, bst_tlv),
 806
 807        /* INL/INR Volume Control */
 808        SOC_DOUBLE_TLV("IN Capture Volume", RT5645_INL1_INR1_VOL,
 809                RT5645_INL_VOL_SFT, RT5645_INR_VOL_SFT, 31, 1, in_vol_tlv),
 810
 811        /* ADC Digital Volume Control */
 812        SOC_DOUBLE("ADC Capture Switch", RT5645_STO1_ADC_DIG_VOL,
 813                RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
 814        SOC_DOUBLE_TLV("ADC Capture Volume", RT5645_STO1_ADC_DIG_VOL,
 815                RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 63, 0, adc_vol_tlv),
 816        SOC_DOUBLE("Mono ADC Capture Switch", RT5645_MONO_ADC_DIG_VOL,
 817                RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
 818        SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5645_MONO_ADC_DIG_VOL,
 819                RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 63, 0, adc_vol_tlv),
 820
 821        /* ADC Boost Volume Control */
 822        SOC_DOUBLE_TLV("ADC Boost Capture Volume", RT5645_ADC_BST_VOL1,
 823                RT5645_STO1_ADC_L_BST_SFT, RT5645_STO1_ADC_R_BST_SFT, 3, 0,
 824                adc_bst_tlv),
 825        SOC_DOUBLE_TLV("Mono ADC Boost Capture Volume", RT5645_ADC_BST_VOL2,
 826                RT5645_MONO_ADC_L_BST_SFT, RT5645_MONO_ADC_R_BST_SFT, 3, 0,
 827                adc_bst_tlv),
 828
 829        /* I2S2 function select */
 830        SOC_SINGLE("I2S2 Func Switch", RT5645_GPIO_CTRL1, RT5645_I2S2_SEL_SFT,
 831                1, 1),
 832        RT5645_HWEQ("Speaker HWEQ"),
 833
 834        /* Digital Soft Volume Control */
 835        SOC_ENUM("DAC1 Digital Volume Control Func", rt5645_dac1_vol_ctrl_mode),
 836};
 837
 838/**
 839 * set_dmic_clk - Set parameter of dmic.
 840 *
 841 * @w: DAPM widget.
 842 * @kcontrol: The kcontrol of this widget.
 843 * @event: Event id.
 844 *
 845 */
 846static int set_dmic_clk(struct snd_soc_dapm_widget *w,
 847        struct snd_kcontrol *kcontrol, int event)
 848{
 849        struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
 850        struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
 851        int idx, rate;
 852
 853        rate = rt5645->sysclk / rl6231_get_pre_div(rt5645->regmap,
 854                RT5645_ADDA_CLK1, RT5645_I2S_PD1_SFT);
 855        idx = rl6231_calc_dmic_clk(rate);
 856        if (idx < 0)
 857                dev_err(component->dev, "Failed to set DMIC clock\n");
 858        else
 859                snd_soc_component_update_bits(component, RT5645_DMIC_CTRL1,
 860                        RT5645_DMIC_CLK_MASK, idx << RT5645_DMIC_CLK_SFT);
 861        return idx;
 862}
 863
 864static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
 865                         struct snd_soc_dapm_widget *sink)
 866{
 867        struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
 868        unsigned int val;
 869
 870        val = snd_soc_component_read32(component, RT5645_GLB_CLK);
 871        val &= RT5645_SCLK_SRC_MASK;
 872        if (val == RT5645_SCLK_SRC_PLL1)
 873                return 1;
 874        else
 875                return 0;
 876}
 877
 878static int is_using_asrc(struct snd_soc_dapm_widget *source,
 879                         struct snd_soc_dapm_widget *sink)
 880{
 881        struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
 882        unsigned int reg, shift, val;
 883
 884        switch (source->shift) {
 885        case 0:
 886                reg = RT5645_ASRC_3;
 887                shift = 0;
 888                break;
 889        case 1:
 890                reg = RT5645_ASRC_3;
 891                shift = 4;
 892                break;
 893        case 3:
 894                reg = RT5645_ASRC_2;
 895                shift = 0;
 896                break;
 897        case 8:
 898                reg = RT5645_ASRC_2;
 899                shift = 4;
 900                break;
 901        case 9:
 902                reg = RT5645_ASRC_2;
 903                shift = 8;
 904                break;
 905        case 10:
 906                reg = RT5645_ASRC_2;
 907                shift = 12;
 908                break;
 909        default:
 910                return 0;
 911        }
 912
 913        val = (snd_soc_component_read32(component, reg) >> shift) & 0xf;
 914        switch (val) {
 915        case 1:
 916        case 2:
 917        case 3:
 918        case 4:
 919                return 1;
 920        default:
 921                return 0;
 922        }
 923
 924}
 925
 926static int rt5645_enable_hweq(struct snd_soc_component *component)
 927{
 928        struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
 929        int i;
 930
 931        for (i = 0; i < RT5645_HWEQ_NUM; i++) {
 932                if (rt5645_validate_hweq(rt5645->eq_param[i].reg))
 933                        regmap_write(rt5645->regmap, rt5645->eq_param[i].reg,
 934                                        rt5645->eq_param[i].val);
 935                else
 936                        break;
 937        }
 938
 939        return 0;
 940}
 941
 942/**
 943 * rt5645_sel_asrc_clk_src - select ASRC clock source for a set of filters
 944 * @component: SoC audio component device.
 945 * @filter_mask: mask of filters.
 946 * @clk_src: clock source
 947 *
 948 * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5645 can
 949 * only support standard 32fs or 64fs i2s format, ASRC should be enabled to
 950 * support special i2s clock format such as Intel's 100fs(100 * sampling rate).
 951 * ASRC function will track i2s clock and generate a corresponding system clock
 952 * for codec. This function provides an API to select the clock source for a
 953 * set of filters specified by the mask. And the codec driver will turn on ASRC
 954 * for these filters if ASRC is selected as their clock source.
 955 */
 956int rt5645_sel_asrc_clk_src(struct snd_soc_component *component,
 957                unsigned int filter_mask, unsigned int clk_src)
 958{
 959        unsigned int asrc2_mask = 0;
 960        unsigned int asrc2_value = 0;
 961        unsigned int asrc3_mask = 0;
 962        unsigned int asrc3_value = 0;
 963
 964        switch (clk_src) {
 965        case RT5645_CLK_SEL_SYS:
 966        case RT5645_CLK_SEL_I2S1_ASRC:
 967        case RT5645_CLK_SEL_I2S2_ASRC:
 968        case RT5645_CLK_SEL_SYS2:
 969                break;
 970
 971        default:
 972                return -EINVAL;
 973        }
 974
 975        if (filter_mask & RT5645_DA_STEREO_FILTER) {
 976                asrc2_mask |= RT5645_DA_STO_CLK_SEL_MASK;
 977                asrc2_value = (asrc2_value & ~RT5645_DA_STO_CLK_SEL_MASK)
 978                        | (clk_src << RT5645_DA_STO_CLK_SEL_SFT);
 979        }
 980
 981        if (filter_mask & RT5645_DA_MONO_L_FILTER) {
 982                asrc2_mask |= RT5645_DA_MONOL_CLK_SEL_MASK;
 983                asrc2_value = (asrc2_value & ~RT5645_DA_MONOL_CLK_SEL_MASK)
 984                        | (clk_src << RT5645_DA_MONOL_CLK_SEL_SFT);
 985        }
 986
 987        if (filter_mask & RT5645_DA_MONO_R_FILTER) {
 988                asrc2_mask |= RT5645_DA_MONOR_CLK_SEL_MASK;
 989                asrc2_value = (asrc2_value & ~RT5645_DA_MONOR_CLK_SEL_MASK)
 990                        | (clk_src << RT5645_DA_MONOR_CLK_SEL_SFT);
 991        }
 992
 993        if (filter_mask & RT5645_AD_STEREO_FILTER) {
 994                asrc2_mask |= RT5645_AD_STO1_CLK_SEL_MASK;
 995                asrc2_value = (asrc2_value & ~RT5645_AD_STO1_CLK_SEL_MASK)
 996                        | (clk_src << RT5645_AD_STO1_CLK_SEL_SFT);
 997        }
 998
 999        if (filter_mask & RT5645_AD_MONO_L_FILTER) {
1000                asrc3_mask |= RT5645_AD_MONOL_CLK_SEL_MASK;

1001                asrc3_value = (asrc3_value & ~RT5645_AD_MONOL_CLK_SEL_MASK)
1002                        | (clk_src << RT5645_AD_MONOL_CLK_SEL_SFT);
1003        }
1004
1005        if (filter_mask & RT5645_AD_MONO_R_FILTER)  {
1006                asrc3_mask |= RT5645_AD_MONOR_CLK_SEL_MASK;
1007                asrc3_value = (asrc3_value & ~RT5645_AD_MONOR_CLK_SEL_MASK)
1008                        | (clk_src << RT5645_AD_MONOR_CLK_SEL_SFT);
1009        }
1010
1011        if (asrc2_mask)
1012                snd_soc_component_update_bits(component, RT5645_ASRC_2,
1013                        asrc2_mask, asrc2_value);
1014
1015        if (asrc3_mask)
1016                snd_soc_component_update_bits(component, RT5645_ASRC_3,
1017                        asrc3_mask, asrc3_value);
1018
1019        return 0;
1020}
1021EXPORT_SYMBOL_GPL(rt5645_sel_asrc_clk_src);
1022
1023/* Digital Mixer */
1024static const struct snd_kcontrol_new rt5645_sto1_adc_l_mix[] = {
1025        SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
1026                        RT5645_M_ADC_L1_SFT, 1, 1),
1027        SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
1028                        RT5645_M_ADC_L2_SFT, 1, 1),
1029};
1030
1031static const struct snd_kcontrol_new rt5645_sto1_adc_r_mix[] = {
1032        SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
1033                        RT5645_M_ADC_R1_SFT, 1, 1),
1034        SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
1035                        RT5645_M_ADC_R2_SFT, 1, 1),
1036};
1037
1038static const struct snd_kcontrol_new rt5645_mono_adc_l_mix[] = {
1039        SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
1040                        RT5645_M_MONO_ADC_L1_SFT, 1, 1),
1041        SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
1042                        RT5645_M_MONO_ADC_L2_SFT, 1, 1),
1043};
1044
1045static const struct snd_kcontrol_new rt5645_mono_adc_r_mix[] = {
1046        SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
1047                        RT5645_M_MONO_ADC_R1_SFT, 1, 1),
1048        SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
1049                        RT5645_M_MONO_ADC_R2_SFT, 1, 1),
1050};
1051
1052static const struct snd_kcontrol_new rt5645_dac_l_mix[] = {
1053        SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
1054                        RT5645_M_ADCMIX_L_SFT, 1, 1),
1055        SOC_DAPM_SINGLE_AUTODISABLE("DAC1 Switch", RT5645_AD_DA_MIXER,
1056                        RT5645_M_DAC1_L_SFT, 1, 1),
1057};
1058
1059static const struct snd_kcontrol_new rt5645_dac_r_mix[] = {
1060        SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
1061                        RT5645_M_ADCMIX_R_SFT, 1, 1),
1062        SOC_DAPM_SINGLE_AUTODISABLE("DAC1 Switch", RT5645_AD_DA_MIXER,
1063                        RT5645_M_DAC1_R_SFT, 1, 1),
1064};
1065
1066static const struct snd_kcontrol_new rt5645_sto_dac_l_mix[] = {
1067        SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
1068                        RT5645_M_DAC_L1_SFT, 1, 1),
1069        SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_STO_DAC_MIXER,
1070                        RT5645_M_DAC_L2_SFT, 1, 1),
1071        SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
1072                        RT5645_M_DAC_R1_STO_L_SFT, 1, 1),
1073};
1074
1075static const struct snd_kcontrol_new rt5645_sto_dac_r_mix[] = {
1076        SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
1077                        RT5645_M_DAC_R1_SFT, 1, 1),
1078        SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_STO_DAC_MIXER,
1079                        RT5645_M_DAC_R2_SFT, 1, 1),
1080        SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
1081                        RT5645_M_DAC_L1_STO_R_SFT, 1, 1),
1082};
1083
1084static const struct snd_kcontrol_new rt5645_mono_dac_l_mix[] = {
1085        SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_MONO_DAC_MIXER,
1086                        RT5645_M_DAC_L1_MONO_L_SFT, 1, 1),
1087        SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
1088                        RT5645_M_DAC_L2_MONO_L_SFT, 1, 1),
1089        SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
1090                        RT5645_M_DAC_R2_MONO_L_SFT, 1, 1),
1091};
1092
1093static const struct snd_kcontrol_new rt5645_mono_dac_r_mix[] = {
1094        SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_MONO_DAC_MIXER,
1095                        RT5645_M_DAC_R1_MONO_R_SFT, 1, 1),
1096        SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
1097                        RT5645_M_DAC_R2_MONO_R_SFT, 1, 1),
1098        SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
1099                        RT5645_M_DAC_L2_MONO_R_SFT, 1, 1),
1100};
1101
1102static const struct snd_kcontrol_new rt5645_dig_l_mix[] = {
1103        SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5645_DIG_MIXER,
1104                        RT5645_M_STO_L_DAC_L_SFT, 1, 1),
1105        SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
1106                        RT5645_M_DAC_L2_DAC_L_SFT, 1, 1),
1107        SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
1108                        RT5645_M_DAC_R2_DAC_L_SFT, 1, 1),
1109};
1110
1111static const struct snd_kcontrol_new rt5645_dig_r_mix[] = {
1112        SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5645_DIG_MIXER,
1113                        RT5645_M_STO_R_DAC_R_SFT, 1, 1),
1114        SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
1115                        RT5645_M_DAC_R2_DAC_R_SFT, 1, 1),
1116        SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
1117                        RT5645_M_DAC_L2_DAC_R_SFT, 1, 1),
1118};
1119
1120/* Analog Input Mixer */
1121static const struct snd_kcontrol_new rt5645_rec_l_mix[] = {
1122        SOC_DAPM_SINGLE("HPOL Switch", RT5645_REC_L2_MIXER,
1123                        RT5645_M_HP_L_RM_L_SFT, 1, 1),
1124        SOC_DAPM_SINGLE("INL Switch", RT5645_REC_L2_MIXER,
1125                        RT5645_M_IN_L_RM_L_SFT, 1, 1),
1126        SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_L2_MIXER,
1127                        RT5645_M_BST2_RM_L_SFT, 1, 1),
1128        SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_L2_MIXER,
1129                        RT5645_M_BST1_RM_L_SFT, 1, 1),
1130        SOC_DAPM_SINGLE("OUT MIXL Switch", RT5645_REC_L2_MIXER,
1131                        RT5645_M_OM_L_RM_L_SFT, 1, 1),
1132};
1133
1134static const struct snd_kcontrol_new rt5645_rec_r_mix[] = {
1135        SOC_DAPM_SINGLE("HPOR Switch", RT5645_REC_R2_MIXER,
1136                        RT5645_M_HP_R_RM_R_SFT, 1, 1),
1137        SOC_DAPM_SINGLE("INR Switch", RT5645_REC_R2_MIXER,
1138                        RT5645_M_IN_R_RM_R_SFT, 1, 1),
1139        SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_R2_MIXER,
1140                        RT5645_M_BST2_RM_R_SFT, 1, 1),
1141        SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_R2_MIXER,
1142                        RT5645_M_BST1_RM_R_SFT, 1, 1),
1143        SOC_DAPM_SINGLE("OUT MIXR Switch", RT5645_REC_R2_MIXER,
1144                        RT5645_M_OM_R_RM_R_SFT, 1, 1),
1145};
1146
1147static const struct snd_kcontrol_new rt5645_spk_l_mix[] = {
1148        SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPK_L_MIXER,
1149                        RT5645_M_DAC_L1_SM_L_SFT, 1, 1),
1150        SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_SPK_L_MIXER,
1151                        RT5645_M_DAC_L2_SM_L_SFT, 1, 1),
1152        SOC_DAPM_SINGLE("INL Switch", RT5645_SPK_L_MIXER,
1153                        RT5645_M_IN_L_SM_L_SFT, 1, 1),
1154        SOC_DAPM_SINGLE("BST1 Switch", RT5645_SPK_L_MIXER,
1155                        RT5645_M_BST1_L_SM_L_SFT, 1, 1),
1156};
1157
1158static const struct snd_kcontrol_new rt5645_spk_r_mix[] = {
1159        SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPK_R_MIXER,
1160                        RT5645_M_DAC_R1_SM_R_SFT, 1, 1),
1161        SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_SPK_R_MIXER,
1162                        RT5645_M_DAC_R2_SM_R_SFT, 1, 1),
1163        SOC_DAPM_SINGLE("INR Switch", RT5645_SPK_R_MIXER,
1164                        RT5645_M_IN_R_SM_R_SFT, 1, 1),
1165        SOC_DAPM_SINGLE("BST2 Switch", RT5645_SPK_R_MIXER,
1166                        RT5645_M_BST2_R_SM_R_SFT, 1, 1),
1167};
1168
1169static const struct snd_kcontrol_new rt5645_out_l_mix[] = {
1170        SOC_DAPM_SINGLE("BST1 Switch", RT5645_OUT_L1_MIXER,
1171                        RT5645_M_BST1_OM_L_SFT, 1, 1),
1172        SOC_DAPM_SINGLE("INL Switch", RT5645_OUT_L1_MIXER,
1173                        RT5645_M_IN_L_OM_L_SFT, 1, 1),
1174        SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_OUT_L1_MIXER,
1175                        RT5645_M_DAC_L2_OM_L_SFT, 1, 1),
1176        SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_OUT_L1_MIXER,
1177                        RT5645_M_DAC_L1_OM_L_SFT, 1, 1),
1178};
1179
1180static const struct snd_kcontrol_new rt5645_out_r_mix[] = {
1181        SOC_DAPM_SINGLE("BST2 Switch", RT5645_OUT_R1_MIXER,
1182                        RT5645_M_BST2_OM_R_SFT, 1, 1),
1183        SOC_DAPM_SINGLE("INR Switch", RT5645_OUT_R1_MIXER,
1184                        RT5645_M_IN_R_OM_R_SFT, 1, 1),
1185        SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_OUT_R1_MIXER,
1186                        RT5645_M_DAC_R2_OM_R_SFT, 1, 1),
1187        SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_OUT_R1_MIXER,
1188                        RT5645_M_DAC_R1_OM_R_SFT, 1, 1),
1189};
1190
1191static const struct snd_kcontrol_new rt5645_spo_l_mix[] = {
1192        SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
1193                        RT5645_M_DAC_R1_SPM_L_SFT, 1, 1),
1194        SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPO_MIXER,
1195                        RT5645_M_DAC_L1_SPM_L_SFT, 1, 1),
1196        SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
1197                        RT5645_M_SV_R_SPM_L_SFT, 1, 1),
1198        SOC_DAPM_SINGLE("SPKVOL L Switch", RT5645_SPO_MIXER,
1199                        RT5645_M_SV_L_SPM_L_SFT, 1, 1),
1200};
1201
1202static const struct snd_kcontrol_new rt5645_spo_r_mix[] = {
1203        SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
1204                        RT5645_M_DAC_R1_SPM_R_SFT, 1, 1),
1205        SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
1206                        RT5645_M_SV_R_SPM_R_SFT, 1, 1),
1207};
1208
1209static const struct snd_kcontrol_new rt5645_hpo_mix[] = {
1210        SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPO_MIXER,
1211                        RT5645_M_DAC1_HM_SFT, 1, 1),
1212        SOC_DAPM_SINGLE("HPVOL Switch", RT5645_HPO_MIXER,
1213                        RT5645_M_HPVOL_HM_SFT, 1, 1),
1214};
1215
1216static const struct snd_kcontrol_new rt5645_hpvoll_mix[] = {
1217        SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXL_CTRL,
1218                        RT5645_M_DAC1_HV_SFT, 1, 1),
1219        SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXL_CTRL,
1220                        RT5645_M_DAC2_HV_SFT, 1, 1),
1221        SOC_DAPM_SINGLE("INL Switch", RT5645_HPOMIXL_CTRL,
1222                        RT5645_M_IN_HV_SFT, 1, 1),
1223        SOC_DAPM_SINGLE("BST1 Switch", RT5645_HPOMIXL_CTRL,
1224                        RT5645_M_BST1_HV_SFT, 1, 1),
1225};
1226
1227static const struct snd_kcontrol_new rt5645_hpvolr_mix[] = {
1228        SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXR_CTRL,
1229                        RT5645_M_DAC1_HV_SFT, 1, 1),
1230        SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXR_CTRL,
1231                        RT5645_M_DAC2_HV_SFT, 1, 1),
1232        SOC_DAPM_SINGLE("INR Switch", RT5645_HPOMIXR_CTRL,
1233                        RT5645_M_IN_HV_SFT, 1, 1),
1234        SOC_DAPM_SINGLE("BST2 Switch", RT5645_HPOMIXR_CTRL,
1235                        RT5645_M_BST2_HV_SFT, 1, 1),
1236};
1237
1238static const struct snd_kcontrol_new rt5645_lout_mix[] = {
1239        SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_LOUT_MIXER,
1240                        RT5645_M_DAC_L1_LM_SFT, 1, 1),
1241        SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_LOUT_MIXER,
1242                        RT5645_M_DAC_R1_LM_SFT, 1, 1),
1243        SOC_DAPM_SINGLE("OUTMIX L Switch", RT5645_LOUT_MIXER,
1244                        RT5645_M_OV_L_LM_SFT, 1, 1),
1245        SOC_DAPM_SINGLE("OUTMIX R Switch", RT5645_LOUT_MIXER,
1246                        RT5645_M_OV_R_LM_SFT, 1, 1),
1247};
1248
1249/*DAC1 L/R source*/ /* MX-29 [9:8] [11:10] */
1250static const char * const rt5645_dac1_src[] = {
1251        "IF1 DAC", "IF2 DAC", "IF3 DAC"
1252};
1253
1254static SOC_ENUM_SINGLE_DECL(
1255        rt5645_dac1l_enum, RT5645_AD_DA_MIXER,
1256        RT5645_DAC1_L_SEL_SFT, rt5645_dac1_src);
1257
1258static const struct snd_kcontrol_new rt5645_dac1l_mux =
1259        SOC_DAPM_ENUM("DAC1 L source", rt5645_dac1l_enum);
1260
1261static SOC_ENUM_SINGLE_DECL(
1262        rt5645_dac1r_enum, RT5645_AD_DA_MIXER,
1263        RT5645_DAC1_R_SEL_SFT, rt5645_dac1_src);
1264
1265static const struct snd_kcontrol_new rt5645_dac1r_mux =
1266        SOC_DAPM_ENUM("DAC1 R source", rt5645_dac1r_enum);
1267
1268/*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */
1269static const char * const rt5645_dac12_src[] = {
1270        "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "VAD_ADC"
1271};
1272
1273static SOC_ENUM_SINGLE_DECL(
1274        rt5645_dac2l_enum, RT5645_DAC_CTRL,
1275        RT5645_DAC2_L_SEL_SFT, rt5645_dac12_src);
1276
1277static const struct snd_kcontrol_new rt5645_dac_l2_mux =
1278        SOC_DAPM_ENUM("DAC2 L source", rt5645_dac2l_enum);
1279
1280static const char * const rt5645_dacr2_src[] = {
1281        "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "Haptic"
1282};
1283
1284static SOC_ENUM_SINGLE_DECL(
1285        rt5645_dac2r_enum, RT5645_DAC_CTRL,
1286        RT5645_DAC2_R_SEL_SFT, rt5645_dacr2_src);
1287
1288static const struct snd_kcontrol_new rt5645_dac_r2_mux =
1289        SOC_DAPM_ENUM("DAC2 R source", rt5645_dac2r_enum);
1290
1291
1292/* INL/R source */
1293static const char * const rt5645_inl_src[] = {
1294        "IN2P", "MonoP"
1295};
1296
1297static SOC_ENUM_SINGLE_DECL(
1298        rt5645_inl_enum, RT5645_INL1_INR1_VOL,
1299        RT5645_INL_SEL_SFT, rt5645_inl_src);
1300
1301static const struct snd_kcontrol_new rt5645_inl_mux =
1302        SOC_DAPM_ENUM("INL source", rt5645_inl_enum);
1303
1304static const char * const rt5645_inr_src[] = {
1305        "IN2N", "MonoN"
1306};
1307
1308static SOC_ENUM_SINGLE_DECL(
1309        rt5645_inr_enum, RT5645_INL1_INR1_VOL,
1310        RT5645_INR_SEL_SFT, rt5645_inr_src);
1311
1312static const struct snd_kcontrol_new rt5645_inr_mux =
1313        SOC_DAPM_ENUM("INR source", rt5645_inr_enum);
1314
1315/* Stereo1 ADC source */
1316/* MX-27 [12] */
1317static const char * const rt5645_stereo_adc1_src[] = {
1318        "DAC MIX", "ADC"
1319};
1320
1321static SOC_ENUM_SINGLE_DECL(
1322        rt5645_stereo1_adc1_enum, RT5645_STO1_ADC_MIXER,
1323        RT5645_ADC_1_SRC_SFT, rt5645_stereo_adc1_src);
1324
1325static const struct snd_kcontrol_new rt5645_sto_adc1_mux =
1326        SOC_DAPM_ENUM("Stereo1 ADC1 Mux", rt5645_stereo1_adc1_enum);
1327
1328/* MX-27 [11] */
1329static const char * const rt5645_stereo_adc2_src[] = {
1330        "DAC MIX", "DMIC"
1331};
1332
1333static SOC_ENUM_SINGLE_DECL(
1334        rt5645_stereo1_adc2_enum, RT5645_STO1_ADC_MIXER,
1335        RT5645_ADC_2_SRC_SFT, rt5645_stereo_adc2_src);
1336
1337static const struct snd_kcontrol_new rt5645_sto_adc2_mux =
1338        SOC_DAPM_ENUM("Stereo1 ADC2 Mux", rt5645_stereo1_adc2_enum);
1339
1340/* MX-27 [8] */
1341static const char * const rt5645_stereo_dmic_src[] = {
1342        "DMIC1", "DMIC2"
1343};
1344
1345static SOC_ENUM_SINGLE_DECL(
1346        rt5645_stereo1_dmic_enum, RT5645_STO1_ADC_MIXER,
1347        RT5645_DMIC_SRC_SFT, rt5645_stereo_dmic_src);
1348
1349static const struct snd_kcontrol_new rt5645_sto1_dmic_mux =
1350        SOC_DAPM_ENUM("Stereo1 DMIC source", rt5645_stereo1_dmic_enum);
1351
1352/* Mono ADC source */
1353/* MX-28 [12] */
1354static const char * const rt5645_mono_adc_l1_src[] = {
1355        "Mono DAC MIXL", "ADC"
1356};
1357
1358static SOC_ENUM_SINGLE_DECL(
1359        rt5645_mono_adc_l1_enum, RT5645_MONO_ADC_MIXER,
1360        RT5645_MONO_ADC_L1_SRC_SFT, rt5645_mono_adc_l1_src);
1361
1362static const struct snd_kcontrol_new rt5645_mono_adc_l1_mux =
1363        SOC_DAPM_ENUM("Mono ADC1 left source", rt5645_mono_adc_l1_enum);
1364/* MX-28 [11] */
1365static const char * const rt5645_mono_adc_l2_src[] = {
1366        "Mono DAC MIXL", "DMIC"
1367};
1368
1369static SOC_ENUM_SINGLE_DECL(
1370        rt5645_mono_adc_l2_enum, RT5645_MONO_ADC_MIXER,
1371        RT5645_MONO_ADC_L2_SRC_SFT, rt5645_mono_adc_l2_src);
1372
1373static const struct snd_kcontrol_new rt5645_mono_adc_l2_mux =
1374        SOC_DAPM_ENUM("Mono ADC2 left source", rt5645_mono_adc_l2_enum);
1375
1376/* MX-28 [8] */
1377static const char * const rt5645_mono_dmic_src[] = {
1378        "DMIC1", "DMIC2"
1379};
1380
1381static SOC_ENUM_SINGLE_DECL(
1382        rt5645_mono_dmic_l_enum, RT5645_MONO_ADC_MIXER,
1383        RT5645_MONO_DMIC_L_SRC_SFT, rt5645_mono_dmic_src);
1384
1385static const struct snd_kcontrol_new rt5645_mono_dmic_l_mux =
1386        SOC_DAPM_ENUM("Mono DMIC left source", rt5645_mono_dmic_l_enum);
1387/* MX-28 [1:0] */
1388static SOC_ENUM_SINGLE_DECL(
1389        rt5645_mono_dmic_r_enum, RT5645_MONO_ADC_MIXER,
1390        RT5645_MONO_DMIC_R_SRC_SFT, rt5645_mono_dmic_src);
1391
1392static const struct snd_kcontrol_new rt5645_mono_dmic_r_mux =
1393        SOC_DAPM_ENUM("Mono DMIC Right source", rt5645_mono_dmic_r_enum);
1394/* MX-28 [4] */
1395static const char * const rt5645_mono_adc_r1_src[] = {
1396        "Mono DAC MIXR", "ADC"
1397};
1398
1399static SOC_ENUM_SINGLE_DECL(
1400        rt5645_mono_adc_r1_enum, RT5645_MONO_ADC_MIXER,
1401        RT5645_MONO_ADC_R1_SRC_SFT, rt5645_mono_adc_r1_src);
1402
1403static const struct snd_kcontrol_new rt5645_mono_adc_r1_mux =
1404        SOC_DAPM_ENUM("Mono ADC1 right source", rt5645_mono_adc_r1_enum);
1405/* MX-28 [3] */
1406static const char * const rt5645_mono_adc_r2_src[] = {
1407        "Mono DAC MIXR", "DMIC"
1408};
1409
1410static SOC_ENUM_SINGLE_DECL(
1411        rt5645_mono_adc_r2_enum, RT5645_MONO_ADC_MIXER,
1412        RT5645_MONO_ADC_R2_SRC_SFT, rt5645_mono_adc_r2_src);
1413
1414static const struct snd_kcontrol_new rt5645_mono_adc_r2_mux =
1415        SOC_DAPM_ENUM("Mono ADC2 right source", rt5645_mono_adc_r2_enum);
1416
1417/* MX-77 [9:8] */
1418static const char * const rt5645_if1_adc_in_src[] = {
1419        "IF_ADC1/IF_ADC2/VAD_ADC", "IF_ADC2/IF_ADC1/VAD_ADC",
1420        "VAD_ADC/IF_ADC1/IF_ADC2", "VAD_ADC/IF_ADC2/IF_ADC1"
1421};
1422
1423static SOC_ENUM_SINGLE_DECL(
1424        rt5645_if1_adc_in_enum, RT5645_TDM_CTRL_1,
1425        RT5645_IF1_ADC_IN_SFT, rt5645_if1_adc_in_src);
1426
1427static const struct snd_kcontrol_new rt5645_if1_adc_in_mux =
1428        SOC_DAPM_ENUM("IF1 ADC IN source", rt5645_if1_adc_in_enum);
1429
1430/* MX-78 [4:0] */
1431static const char * const rt5650_if1_adc_in_src[] = {
1432        "IF_ADC1/IF_ADC2/DAC_REF/Null",
1433        "IF_ADC1/IF_ADC2/Null/DAC_REF",
1434        "IF_ADC1/DAC_REF/IF_ADC2/Null",
1435        "IF_ADC1/DAC_REF/Null/IF_ADC2",
1436        "IF_ADC1/Null/DAC_REF/IF_ADC2",
1437        "IF_ADC1/Null/IF_ADC2/DAC_REF",
1438
1439        "IF_ADC2/IF_ADC1/DAC_REF/Null",
1440        "IF_ADC2/IF_ADC1/Null/DAC_REF",
1441        "IF_ADC2/DAC_REF/IF_ADC1/Null",
1442        "IF_ADC2/DAC_REF/Null/IF_ADC1",
1443        "IF_ADC2/Null/DAC_REF/IF_ADC1",
1444        "IF_ADC2/Null/IF_ADC1/DAC_REF",
1445
1446        "DAC_REF/IF_ADC1/IF_ADC2/Null",
1447        "DAC_REF/IF_ADC1/Null/IF_ADC2",
1448        "DAC_REF/IF_ADC2/IF_ADC1/Null",
1449        "DAC_REF/IF_ADC2/Null/IF_ADC1",
1450        "DAC_REF/Null/IF_ADC1/IF_ADC2",
1451        "DAC_REF/Null/IF_ADC2/IF_ADC1",
1452
1453        "Null/IF_ADC1/IF_ADC2/DAC_REF",
1454        "Null/IF_ADC1/DAC_REF/IF_ADC2",
1455        "Null/IF_ADC2/IF_ADC1/DAC_REF",
1456        "Null/IF_ADC2/DAC_REF/IF_ADC1",
1457        "Null/DAC_REF/IF_ADC1/IF_ADC2",
1458        "Null/DAC_REF/IF_ADC2/IF_ADC1",
1459};
1460
1461static SOC_ENUM_SINGLE_DECL(
1462        rt5650_if1_adc_in_enum, RT5645_TDM_CTRL_2,
1463        0, rt5650_if1_adc_in_src);
1464
1465static const struct snd_kcontrol_new rt5650_if1_adc_in_mux =
1466        SOC_DAPM_ENUM("IF1 ADC IN source", rt5650_if1_adc_in_enum);
1467
1468/* MX-78 [15:14][13:12][11:10] */
1469static const char * const rt5645_tdm_adc_swap_select[] = {
1470        "L/R", "R/L", "L/L", "R/R"
1471};
1472
1473static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot0_1_enum,
1474        RT5645_TDM_CTRL_2, 14, rt5645_tdm_adc_swap_select);
1475
1476static const struct snd_kcontrol_new rt5650_if1_adc1_in_mux =
1477        SOC_DAPM_ENUM("IF1 ADC1 IN source", rt5650_tdm_adc_slot0_1_enum);
1478
1479static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot2_3_enum,
1480        RT5645_TDM_CTRL_2, 12, rt5645_tdm_adc_swap_select);
1481
1482static const struct snd_kcontrol_new rt5650_if1_adc2_in_mux =
1483        SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5650_tdm_adc_slot2_3_enum);
1484
1485static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot4_5_enum,
1486        RT5645_TDM_CTRL_2, 10, rt5645_tdm_adc_swap_select);
1487
1488static const struct snd_kcontrol_new rt5650_if1_adc3_in_mux =
1489        SOC_DAPM_ENUM("IF1 ADC3 IN source", rt5650_tdm_adc_slot4_5_enum);
1490
1491/* MX-77 [7:6][5:4][3:2] */
1492static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot0_1_enum,
1493        RT5645_TDM_CTRL_1, 6, rt5645_tdm_adc_swap_select);
1494
1495static const struct snd_kcontrol_new rt5645_if1_adc1_in_mux =
1496        SOC_DAPM_ENUM("IF1 ADC1 IN source", rt5645_tdm_adc_slot0_1_enum);
1497
1498static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot2_3_enum,
1499        RT5645_TDM_CTRL_1, 4, rt5645_tdm_adc_swap_select);
1500
1501static const struct snd_kcontrol_new rt5645_if1_adc2_in_mux =
1502        SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5645_tdm_adc_slot2_3_enum);
1503
1504static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot4_5_enum,
1505        RT5645_TDM_CTRL_1, 2, rt5645_tdm_adc_swap_select);
1506
1507static const struct snd_kcontrol_new rt5645_if1_adc3_in_mux =
1508        SOC_DAPM_ENUM("IF1 ADC3 IN source", rt5645_tdm_adc_slot4_5_enum);
1509
1510/* MX-79 [14:12][10:8][6:4][2:0] */
1511static const char * const rt5645_tdm_dac_swap_select[] = {
1512        "Slot0", "Slot1", "Slot2", "Slot3"
1513};
1514
1515static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac0_enum,
1516        RT5645_TDM_CTRL_3, 12, rt5645_tdm_dac_swap_select);
1517
1518static const struct snd_kcontrol_new rt5645_if1_dac0_tdm_sel_mux =
1519        SOC_DAPM_ENUM("IF1 DAC0 source", rt5645_tdm_dac0_enum);
1520
1521static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac1_enum,
1522        RT5645_TDM_CTRL_3, 8, rt5645_tdm_dac_swap_select);
1523
1524static const struct snd_kcontrol_new rt5645_if1_dac1_tdm_sel_mux =
1525        SOC_DAPM_ENUM("IF1 DAC1 source", rt5645_tdm_dac1_enum);
1526
1527static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac2_enum,
1528        RT5645_TDM_CTRL_3, 4, rt5645_tdm_dac_swap_select);
1529
1530static const struct snd_kcontrol_new rt5645_if1_dac2_tdm_sel_mux =
1531        SOC_DAPM_ENUM("IF1 DAC2 source", rt5645_tdm_dac2_enum);
1532
1533static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac3_enum,
1534        RT5645_TDM_CTRL_3, 0, rt5645_tdm_dac_swap_select);
1535
1536static const struct snd_kcontrol_new rt5645_if1_dac3_tdm_sel_mux =
1537        SOC_DAPM_ENUM("IF1 DAC3 source", rt5645_tdm_dac3_enum);
1538
1539/* MX-7a [14:12][10:8][6:4][2:0] */
1540static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac0_enum,
1541        RT5650_TDM_CTRL_4, 12, rt5645_tdm_dac_swap_select);
1542
1543static const struct snd_kcontrol_new rt5650_if1_dac0_tdm_sel_mux =
1544        SOC_DAPM_ENUM("IF1 DAC0 source", rt5650_tdm_dac0_enum);
1545
1546static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac1_enum,
1547        RT5650_TDM_CTRL_4, 8, rt5645_tdm_dac_swap_select);
1548
1549static const struct snd_kcontrol_new rt5650_if1_dac1_tdm_sel_mux =
1550        SOC_DAPM_ENUM("IF1 DAC1 source", rt5650_tdm_dac1_enum);
1551
1552static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac2_enum,
1553        RT5650_TDM_CTRL_4, 4, rt5645_tdm_dac_swap_select);
1554
1555static const struct snd_kcontrol_new rt5650_if1_dac2_tdm_sel_mux =
1556        SOC_DAPM_ENUM("IF1 DAC2 source", rt5650_tdm_dac2_enum);
1557
1558static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac3_enum,
1559        RT5650_TDM_CTRL_4, 0, rt5645_tdm_dac_swap_select);
1560
1561static const struct snd_kcontrol_new rt5650_if1_dac3_tdm_sel_mux =
1562        SOC_DAPM_ENUM("IF1 DAC3 source", rt5650_tdm_dac3_enum);
1563
1564/* MX-2d [3] [2] */
1565static const char * const rt5650_a_dac1_src[] = {
1566        "DAC1", "Stereo DAC Mixer"
1567};
1568
1569static SOC_ENUM_SINGLE_DECL(
1570        rt5650_a_dac1_l_enum, RT5650_A_DAC_SOUR,
1571        RT5650_A_DAC1_L_IN_SFT, rt5650_a_dac1_src);
1572
1573static const struct snd_kcontrol_new rt5650_a_dac1_l_mux =
1574        SOC_DAPM_ENUM("A DAC1 L source", rt5650_a_dac1_l_enum);
1575
1576static SOC_ENUM_SINGLE_DECL(
1577        rt5650_a_dac1_r_enum, RT5650_A_DAC_SOUR,
1578        RT5650_A_DAC1_R_IN_SFT, rt5650_a_dac1_src);
1579
1580static const struct snd_kcontrol_new rt5650_a_dac1_r_mux =
1581        SOC_DAPM_ENUM("A DAC1 R source", rt5650_a_dac1_r_enum);
1582
1583/* MX-2d [1] [0] */
1584static const char * const rt5650_a_dac2_src[] = {
1585        "Stereo DAC Mixer", "Mono DAC Mixer"
1586};
1587
1588static SOC_ENUM_SINGLE_DECL(
1589        rt5650_a_dac2_l_enum, RT5650_A_DAC_SOUR,
1590        RT5650_A_DAC2_L_IN_SFT, rt5650_a_dac2_src);
1591
1592static const struct snd_kcontrol_new rt5650_a_dac2_l_mux =
1593        SOC_DAPM_ENUM("A DAC2 L source", rt5650_a_dac2_l_enum);
1594
1595static SOC_ENUM_SINGLE_DECL(
1596        rt5650_a_dac2_r_enum, RT5650_A_DAC_SOUR,
1597        RT5650_A_DAC2_R_IN_SFT, rt5650_a_dac2_src);
1598
1599static const struct snd_kcontrol_new rt5650_a_dac2_r_mux =
1600        SOC_DAPM_ENUM("A DAC2 R source", rt5650_a_dac2_r_enum);
1601
1602/* MX-2F [13:12] */
1603static const char * const rt5645_if2_adc_in_src[] = {
1604        "IF_ADC1", "IF_ADC2", "VAD_ADC"
1605};
1606
1607static SOC_ENUM_SINGLE_DECL(
1608        rt5645_if2_adc_in_enum, RT5645_DIG_INF1_DATA,
1609        RT5645_IF2_ADC_IN_SFT, rt5645_if2_adc_in_src);
1610
1611static const struct snd_kcontrol_new rt5645_if2_adc_in_mux =
1612        SOC_DAPM_ENUM("IF2 ADC IN source", rt5645_if2_adc_in_enum);
1613
1614/* MX-2F [1:0] */
1615static const char * const rt5645_if3_adc_in_src[] = {
1616        "IF_ADC1", "IF_ADC2", "VAD_ADC"
1617};
1618
1619static SOC_ENUM_SINGLE_DECL(
1620        rt5645_if3_adc_in_enum, RT5645_DIG_INF1_DATA,
1621        RT5645_IF3_ADC_IN_SFT, rt5645_if3_adc_in_src);
1622
1623static const struct snd_kcontrol_new rt5645_if3_adc_in_mux =
1624        SOC_DAPM_ENUM("IF3 ADC IN source", rt5645_if3_adc_in_enum);
1625
1626/* MX-31 [15] [13] [11] [9] */
1627static const char * const rt5645_pdm_src[] = {
1628        "Mono DAC", "Stereo DAC"
1629};
1630
1631static SOC_ENUM_SINGLE_DECL(
1632        rt5645_pdm1_l_enum, RT5645_PDM_OUT_CTRL,
1633        RT5645_PDM1_L_SFT, rt5645_pdm_src);
1634
1635static const struct snd_kcontrol_new rt5645_pdm1_l_mux =
1636        SOC_DAPM_ENUM("PDM1 L source", rt5645_pdm1_l_enum);
1637
1638static SOC_ENUM_SINGLE_DECL(
1639        rt5645_pdm1_r_enum, RT5645_PDM_OUT_CTRL,
1640        RT5645_PDM1_R_SFT, rt5645_pdm_src);
1641
1642static const struct snd_kcontrol_new rt5645_pdm1_r_mux =
1643        SOC_DAPM_ENUM("PDM1 R source", rt5645_pdm1_r_enum);
1644
1645/* MX-9D [9:8] */
1646static const char * const rt5645_vad_adc_src[] = {
1647        "Sto1 ADC L", "Mono ADC L", "Mono ADC R"
1648};
1649
1650static SOC_ENUM_SINGLE_DECL(
1651        rt5645_vad_adc_enum, RT5645_VAD_CTRL4,
1652        RT5645_VAD_SEL_SFT, rt5645_vad_adc_src);
1653
1654static const struct snd_kcontrol_new rt5645_vad_adc_mux =
1655        SOC_DAPM_ENUM("VAD ADC source", rt5645_vad_adc_enum);
1656
1657static const struct snd_kcontrol_new spk_l_vol_control =
1658        SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1659                RT5645_L_MUTE_SFT, 1, 1);
1660
1661static const struct snd_kcontrol_new spk_r_vol_control =
1662        SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1663                RT5645_R_MUTE_SFT, 1, 1);
1664
1665static const struct snd_kcontrol_new hp_l_vol_control =
1666        SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1667                RT5645_L_MUTE_SFT, 1, 1);
1668
1669static const struct snd_kcontrol_new hp_r_vol_control =
1670        SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1671                RT5645_R_MUTE_SFT, 1, 1);
1672
1673static const struct snd_kcontrol_new pdm1_l_vol_control =
1674        SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1675                RT5645_M_PDM1_L, 1, 1);
1676
1677static const struct snd_kcontrol_new pdm1_r_vol_control =
1678        SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1679                RT5645_M_PDM1_R, 1, 1);
1680
1681static void hp_amp_power(struct snd_soc_component *component, int on)
1682{
1683        static int hp_amp_power_count;
1684        struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
1685
1686        if (on) {
1687                if (hp_amp_power_count <= 0) {
1688                        if (rt5645->codec_type == CODEC_TYPE_RT5650) {
1689                                snd_soc_component_write(component, RT5645_DEPOP_M2, 0x3100);
1690                                snd_soc_component_write(component, RT5645_CHARGE_PUMP,
1691                                        0x0e06);
1692                                snd_soc_component_write(component, RT5645_DEPOP_M1, 0x000d);
1693                                regmap_write(rt5645->regmap, RT5645_PR_BASE +
1694                                        RT5645_HP_DCC_INT1, 0x9f01);
1695                                msleep(20);
1696                                snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1697                                        RT5645_HP_CO_MASK, RT5645_HP_CO_EN);
1698                                regmap_write(rt5645->regmap, RT5645_PR_BASE +
1699                                        0x3e, 0x7400);
1700                                snd_soc_component_write(component, RT5645_DEPOP_M3, 0x0737);
1701                                regmap_write(rt5645->regmap, RT5645_PR_BASE +
1702                                        RT5645_MAMP_INT_REG2, 0xfc00);
1703                                snd_soc_component_write(component, RT5645_DEPOP_M2, 0x1140);
1704                                msleep(90);
1705                                rt5645->hp_on = true;
1706                        } else {
1707                                /* depop parameters */
1708                                snd_soc_component_update_bits(component, RT5645_DEPOP_M2,
1709                                        RT5645_DEPOP_MASK, RT5645_DEPOP_MAN);
1710                                snd_soc_component_write(component, RT5645_DEPOP_M1, 0x000d);
1711                                regmap_write(rt5645->regmap, RT5645_PR_BASE +
1712                                        RT5645_HP_DCC_INT1, 0x9f01);
1713                                mdelay(150);
1714                                /* headphone amp power on */
1715                                snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1716                                        RT5645_PWR_FV1 | RT5645_PWR_FV2, 0);
1717                                snd_soc_component_update_bits(component, RT5645_PWR_VOL,
1718                                        RT5645_PWR_HV_L | RT5645_PWR_HV_R,
1719                                        RT5645_PWR_HV_L | RT5645_PWR_HV_R);
1720                                snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1721                                        RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1722                                        RT5645_PWR_HA,
1723                                        RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1724                                        RT5645_PWR_HA);
1725                                mdelay(5);
1726                                snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1727                                        RT5645_PWR_FV1 | RT5645_PWR_FV2,
1728                                        RT5645_PWR_FV1 | RT5645_PWR_FV2);
1729
1730                                snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1731                                        RT5645_HP_CO_MASK | RT5645_HP_SG_MASK,
1732                                        RT5645_HP_CO_EN | RT5645_HP_SG_EN);
1733                                regmap_write(rt5645->regmap, RT5645_PR_BASE +
1734                                        0x14, 0x1aaa);
1735                                regmap_write(rt5645->regmap, RT5645_PR_BASE +
1736                                        0x24, 0x0430);
1737                        }
1738                }
1739                hp_amp_power_count++;
1740        } else {
1741                hp_amp_power_count--;
1742                if (hp_amp_power_count <= 0) {
1743                        if (rt5645->codec_type == CODEC_TYPE_RT5650) {
1744                                regmap_write(rt5645->regmap, RT5645_PR_BASE +
1745                                        0x3e, 0x7400);
1746                                snd_soc_component_write(component, RT5645_DEPOP_M3, 0x0737);
1747                                regmap_write(rt5645->regmap, RT5645_PR_BASE +
1748                                        RT5645_MAMP_INT_REG2, 0xfc00);
1749                                snd_soc_component_write(component, RT5645_DEPOP_M2, 0x1140);
1750                                msleep(100);
1751                                snd_soc_component_write(component, RT5645_DEPOP_M1, 0x0001);
1752
1753                        } else {
1754                                snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1755                                        RT5645_HP_SG_MASK |
1756                                        RT5645_HP_L_SMT_MASK |
1757                                        RT5645_HP_R_SMT_MASK,
1758                                        RT5645_HP_SG_DIS |
1759                                        RT5645_HP_L_SMT_DIS |
1760                                        RT5645_HP_R_SMT_DIS);
1761                                /* headphone amp power down */
1762                                snd_soc_component_write(component, RT5645_DEPOP_M1, 0x0000);
1763                                snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1764                                        RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1765                                        RT5645_PWR_HA, 0);
1766                                snd_soc_component_update_bits(component, RT5645_DEPOP_M2,
1767                                        RT5645_DEPOP_MASK, 0);
1768                        }
1769                }
1770        }
1771}
1772
1773static int rt5645_hp_event(struct snd_soc_dapm_widget *w,
1774        struct snd_kcontrol *kcontrol, int event)
1775{
1776        struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1777        struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
1778
1779        switch (event) {
1780        case SND_SOC_DAPM_POST_PMU:
1781                hp_amp_power(component, 1);
1782                /* headphone unmute sequence */
1783                if (rt5645->codec_type == CODEC_TYPE_RT5645) {
1784                        snd_soc_component_update_bits(component, RT5645_DEPOP_M3,
1785                                RT5645_CP_FQ1_MASK | RT5645_CP_FQ2_MASK |
1786                                RT5645_CP_FQ3_MASK,
1787                                (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ1_SFT) |
1788                                (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1789                                (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ3_SFT));
1790                        regmap_write(rt5645->regmap, RT5645_PR_BASE +
1791                                RT5645_MAMP_INT_REG2, 0xfc00);
1792                        snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1793                                RT5645_SMT_TRIG_MASK, RT5645_SMT_TRIG_EN);
1794                        snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1795                                RT5645_RSTN_MASK, RT5645_RSTN_EN);
1796                        snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1797                                RT5645_RSTN_MASK | RT5645_HP_L_SMT_MASK |
1798                                RT5645_HP_R_SMT_MASK, RT5645_RSTN_DIS |
1799                                RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1800                        msleep(40);
1801                        snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1802                                RT5645_HP_SG_MASK | RT5645_HP_L_SMT_MASK |
1803                                RT5645_HP_R_SMT_MASK, RT5645_HP_SG_DIS |
1804                                RT5645_HP_L_SMT_DIS | RT5645_HP_R_SMT_DIS);
1805                }
1806                break;
1807
1808        case SND_SOC_DAPM_PRE_PMD:
1809                /* headphone mute sequence */
1810                if (rt5645->codec_type == CODEC_TYPE_RT5645) {
1811                        snd_soc_component_update_bits(component, RT5645_DEPOP_M3,
1812                                RT5645_CP_FQ1_MASK | RT5645_CP_FQ2_MASK |
1813                                RT5645_CP_FQ3_MASK,
1814                                (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ1_SFT) |
1815                                (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1816                                (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ3_SFT));
1817                        regmap_write(rt5645->regmap, RT5645_PR_BASE +
1818                                RT5645_MAMP_INT_REG2, 0xfc00);
1819                        snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1820                                RT5645_HP_SG_MASK, RT5645_HP_SG_EN);
1821                        snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1822                                RT5645_RSTP_MASK, RT5645_RSTP_EN);
1823                        snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1824                                RT5645_RSTP_MASK | RT5645_HP_L_SMT_MASK |
1825                                RT5645_HP_R_SMT_MASK, RT5645_RSTP_DIS |
1826                                RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1827                        msleep(30);
1828                }
1829                hp_amp_power(component, 0);
1830                break;
1831
1832        default:
1833                return 0;
1834        }
1835
1836        return 0;
1837}
1838
1839static int rt5645_spk_event(struct snd_soc_dapm_widget *w,
1840        struct snd_kcontrol *kcontrol, int event)
1841{
1842        struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1843
1844        switch (event) {
1845        case SND_SOC_DAPM_POST_PMU:
1846                rt5645_enable_hweq(component);
1847                snd_soc_component_update_bits(component, RT5645_PWR_DIG1,
1848                        RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1849                        RT5645_PWR_CLS_D_L,
1850                        RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1851                        RT5645_PWR_CLS_D_L);
1852                snd_soc_component_update_bits(component, RT5645_GEN_CTRL3,
1853                        RT5645_DET_CLK_MASK, RT5645_DET_CLK_MODE1);
1854                break;
1855
1856        case SND_SOC_DAPM_PRE_PMD:
1857                snd_soc_component_update_bits(component, RT5645_GEN_CTRL3,
1858                        RT5645_DET_CLK_MASK, RT5645_DET_CLK_DIS);
1859                snd_soc_component_write(component, RT5645_EQ_CTRL2, 0);
1860                snd_soc_component_update_bits(component, RT5645_PWR_DIG1,
1861                        RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1862                        RT5645_PWR_CLS_D_L, 0);
1863                break;
1864
1865        default:
1866                return 0;
1867        }
1868
1869        return 0;
1870}
1871
1872static int rt5645_lout_event(struct snd_soc_dapm_widget *w,
1873        struct snd_kcontrol *kcontrol, int event)
1874{
1875        struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1876
1877        switch (event) {
1878        case SND_SOC_DAPM_POST_PMU:
1879                hp_amp_power(component, 1);
1880                snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1881                        RT5645_PWR_LM, RT5645_PWR_LM);
1882                snd_soc_component_update_bits(component, RT5645_LOUT1,
1883                        RT5645_L_MUTE | RT5645_R_MUTE, 0);
1884                break;
1885
1886        case SND_SOC_DAPM_PRE_PMD:
1887                snd_soc_component_update_bits(component, RT5645_LOUT1,
1888                        RT5645_L_MUTE | RT5645_R_MUTE,
1889                        RT5645_L_MUTE | RT5645_R_MUTE);
1890                snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1891                        RT5645_PWR_LM, 0);
1892                hp_amp_power(component, 0);
1893                break;
1894
1895        default:
1896                return 0;
1897        }
1898
1899        return 0;
1900}
1901
1902static int rt5645_bst2_event(struct snd_soc_dapm_widget *w,
1903        struct snd_kcontrol *kcontrol, int event)
1904{
1905        struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1906
1907        switch (event) {
1908        case SND_SOC_DAPM_POST_PMU:
1909                snd_soc_component_update_bits(component, RT5645_PWR_ANLG2,
1910                        RT5645_PWR_BST2_P, RT5645_PWR_BST2_P);
1911                break;
1912
1913        case SND_SOC_DAPM_PRE_PMD:
1914                snd_soc_component_update_bits(component, RT5645_PWR_ANLG2,
1915                        RT5645_PWR_BST2_P, 0);
1916                break;
1917
1918        default:
1919                return 0;
1920        }
1921
1922        return 0;
1923}
1924
1925static int rt5650_hp_event(struct snd_soc_dapm_widget *w,
1926                struct snd_kcontrol *k, int  event)
1927{
1928        struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1929        struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
1930
1931        switch (event) {
1932        case SND_SOC_DAPM_POST_PMU:
1933                if (rt5645->hp_on) {
1934                        msleep(100);
1935                        rt5645->hp_on = false;
1936                }
1937                break;
1938
1939        default:
1940                return 0;
1941        }
1942
1943        return 0;
1944}
1945
1946static int rt5645_set_micbias1_event(struct snd_soc_dapm_widget *w,
1947                struct snd_kcontrol *k, int  event)
1948{
1949        struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1950
1951        switch (event) {
1952        case SND_SOC_DAPM_PRE_PMU:
1953                snd_soc_component_update_bits(component, RT5645_GEN_CTRL2,
1954                        RT5645_MICBIAS1_POW_CTRL_SEL_MASK,
1955                        RT5645_MICBIAS1_POW_CTRL_SEL_M);
1956                break;
1957
1958        case SND_SOC_DAPM_POST_PMD:
1959                snd_soc_component_update_bits(component, RT5645_GEN_CTRL2,
1960                        RT5645_MICBIAS1_POW_CTRL_SEL_MASK,
1961                        RT5645_MICBIAS1_POW_CTRL_SEL_A);
1962                break;
1963
1964        default:
1965                return 0;
1966        }
1967
1968        return 0;
1969}
1970
1971static int rt5645_set_micbias2_event(struct snd_soc_dapm_widget *w,
1972                struct snd_kcontrol *k, int  event)
1973{
1974        struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1975
1976        switch (event) {
1977        case SND_SOC_DAPM_PRE_PMU:
1978                snd_soc_component_update_bits(component, RT5645_GEN_CTRL2,
1979                        RT5645_MICBIAS2_POW_CTRL_SEL_MASK,
1980                        RT5645_MICBIAS2_POW_CTRL_SEL_M);
1981                break;
1982
1983        case SND_SOC_DAPM_POST_PMD:
1984                snd_soc_component_update_bits(component, RT5645_GEN_CTRL2,
1985                        RT5645_MICBIAS2_POW_CTRL_SEL_MASK,
1986                        RT5645_MICBIAS2_POW_CTRL_SEL_A);
1987                break;
1988
1989        default:
1990                return 0;
1991        }
1992
1993        return 0;
1994}
1995
1996static const struct snd_soc_dapm_widget rt5645_dapm_widgets[] = {
1997        SND_SOC_DAPM_SUPPLY("LDO2", RT5645_PWR_MIXER,
1998                RT5645_PWR_LDO2_BIT, 0, NULL, 0),
1999        SND_SOC_DAPM_SUPPLY("PLL1", RT5645_PWR_ANLG2,
2000                RT5645_PWR_PLL_BIT, 0, NULL, 0),

2001
2002        SND_SOC_DAPM_SUPPLY("JD Power", RT5645_PWR_ANLG2,
2003                RT5645_PWR_JD1_BIT, 0, NULL, 0),
2004        SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5645_PWR_VOL,
2005                RT5645_PWR_MIC_DET_BIT, 0, NULL, 0),
2006
2007        /* ASRC */
2008        SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5645_ASRC_1,
2009                              11, 0, NULL, 0),
2010        SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5645_ASRC_1,
2011                              12, 0, NULL, 0),
2012        SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5645_ASRC_1,
2013                              10, 0, NULL, 0),
2014        SND_SOC_DAPM_SUPPLY_S("DAC MONO L ASRC", 1, RT5645_ASRC_1,
2015                              9, 0, NULL, 0),
2016        SND_SOC_DAPM_SUPPLY_S("DAC MONO R ASRC", 1, RT5645_ASRC_1,
2017                              8, 0, NULL, 0),
2018        SND_SOC_DAPM_SUPPLY_S("DMIC STO1 ASRC", 1, RT5645_ASRC_1,
2019                              7, 0, NULL, 0),
2020        SND_SOC_DAPM_SUPPLY_S("DMIC MONO L ASRC", 1, RT5645_ASRC_1,
2021                              5, 0, NULL, 0),
2022        SND_SOC_DAPM_SUPPLY_S("DMIC MONO R ASRC", 1, RT5645_ASRC_1,
2023                              4, 0, NULL, 0),
2024        SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5645_ASRC_1,
2025                              3, 0, NULL, 0),
2026        SND_SOC_DAPM_SUPPLY_S("ADC MONO L ASRC", 1, RT5645_ASRC_1,
2027                              1, 0, NULL, 0),
2028        SND_SOC_DAPM_SUPPLY_S("ADC MONO R ASRC", 1, RT5645_ASRC_1,
2029                              0, 0, NULL, 0),
2030
2031        /* Input Side */
2032        /* micbias */
2033        SND_SOC_DAPM_SUPPLY("micbias1", RT5645_PWR_ANLG2,
2034                        RT5645_PWR_MB1_BIT, 0, rt5645_set_micbias1_event,
2035                        SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
2036        SND_SOC_DAPM_SUPPLY("micbias2", RT5645_PWR_ANLG2,
2037                        RT5645_PWR_MB2_BIT, 0, rt5645_set_micbias2_event,
2038                        SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
2039        /* Input Lines */
2040        SND_SOC_DAPM_INPUT("DMIC L1"),
2041        SND_SOC_DAPM_INPUT("DMIC R1"),
2042        SND_SOC_DAPM_INPUT("DMIC L2"),
2043        SND_SOC_DAPM_INPUT("DMIC R2"),
2044
2045        SND_SOC_DAPM_INPUT("IN1P"),
2046        SND_SOC_DAPM_INPUT("IN1N"),
2047        SND_SOC_DAPM_INPUT("IN2P"),
2048        SND_SOC_DAPM_INPUT("IN2N"),
2049
2050        SND_SOC_DAPM_INPUT("Haptic Generator"),
2051
2052        SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2053        SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2054        SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
2055                set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
2056        SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5645_DMIC_CTRL1,
2057                RT5645_DMIC_1_EN_SFT, 0, NULL, 0),
2058        SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5645_DMIC_CTRL1,
2059                RT5645_DMIC_2_EN_SFT, 0, NULL, 0),
2060        /* Boost */
2061        SND_SOC_DAPM_PGA("BST1", RT5645_PWR_ANLG2,
2062                RT5645_PWR_BST1_BIT, 0, NULL, 0),
2063        SND_SOC_DAPM_PGA_E("BST2", RT5645_PWR_ANLG2,
2064                RT5645_PWR_BST2_BIT, 0, NULL, 0, rt5645_bst2_event,
2065                SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2066        /* Input Volume */
2067        SND_SOC_DAPM_PGA("INL VOL", RT5645_PWR_VOL,
2068                RT5645_PWR_IN_L_BIT, 0, NULL, 0),
2069        SND_SOC_DAPM_PGA("INR VOL", RT5645_PWR_VOL,
2070                RT5645_PWR_IN_R_BIT, 0, NULL, 0),
2071        /* REC Mixer */
2072        SND_SOC_DAPM_MIXER("RECMIXL", RT5645_PWR_MIXER, RT5645_PWR_RM_L_BIT,
2073                        0, rt5645_rec_l_mix, ARRAY_SIZE(rt5645_rec_l_mix)),
2074        SND_SOC_DAPM_MIXER("RECMIXR", RT5645_PWR_MIXER, RT5645_PWR_RM_R_BIT,
2075                        0, rt5645_rec_r_mix, ARRAY_SIZE(rt5645_rec_r_mix)),
2076        /* ADCs */
2077        SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0),
2078        SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0),
2079
2080        SND_SOC_DAPM_SUPPLY("ADC L power", RT5645_PWR_DIG1,
2081                RT5645_PWR_ADC_L_BIT, 0, NULL, 0),
2082        SND_SOC_DAPM_SUPPLY("ADC R power", RT5645_PWR_DIG1,
2083                RT5645_PWR_ADC_R_BIT, 0, NULL, 0),
2084
2085        /* ADC Mux */
2086        SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0,
2087                &rt5645_sto1_dmic_mux),
2088        SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
2089                &rt5645_sto_adc2_mux),
2090        SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
2091                &rt5645_sto_adc2_mux),
2092        SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
2093                &rt5645_sto_adc1_mux),
2094        SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
2095                &rt5645_sto_adc1_mux),
2096        SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
2097                &rt5645_mono_dmic_l_mux),
2098        SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
2099                &rt5645_mono_dmic_r_mux),
2100        SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
2101                &rt5645_mono_adc_l2_mux),
2102        SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
2103                &rt5645_mono_adc_l1_mux),
2104        SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
2105                &rt5645_mono_adc_r1_mux),
2106        SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
2107                &rt5645_mono_adc_r2_mux),
2108        /* ADC Mixer */
2109
2110        SND_SOC_DAPM_SUPPLY_S("adc stereo1 filter", 1, RT5645_PWR_DIG2,
2111                RT5645_PWR_ADC_S1F_BIT, 0, NULL, 0),
2112        SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXL", SND_SOC_NOPM, 0, 0,
2113                rt5645_sto1_adc_l_mix, ARRAY_SIZE(rt5645_sto1_adc_l_mix),
2114                NULL, 0),
2115        SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXR", SND_SOC_NOPM, 0, 0,
2116                rt5645_sto1_adc_r_mix, ARRAY_SIZE(rt5645_sto1_adc_r_mix),
2117                NULL, 0),
2118        SND_SOC_DAPM_SUPPLY_S("adc mono left filter", 1, RT5645_PWR_DIG2,
2119                RT5645_PWR_ADC_MF_L_BIT, 0, NULL, 0),
2120        SND_SOC_DAPM_MIXER_E("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
2121                rt5645_mono_adc_l_mix, ARRAY_SIZE(rt5645_mono_adc_l_mix),
2122                NULL, 0),
2123        SND_SOC_DAPM_SUPPLY_S("adc mono right filter", 1, RT5645_PWR_DIG2,
2124                RT5645_PWR_ADC_MF_R_BIT, 0, NULL, 0),
2125        SND_SOC_DAPM_MIXER_E("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
2126                rt5645_mono_adc_r_mix, ARRAY_SIZE(rt5645_mono_adc_r_mix),
2127                NULL, 0),
2128
2129        /* ADC PGA */
2130        SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
2131        SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
2132        SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
2133        SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2134        SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2135        SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2136        SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2137        SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2138        SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
2139        SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
2140
2141        /* IF1 2 Mux */
2142        SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM,
2143                0, 0, &rt5645_if2_adc_in_mux),
2144
2145        /* Digital Interface */
2146        SND_SOC_DAPM_SUPPLY("I2S1", RT5645_PWR_DIG1,
2147                RT5645_PWR_I2S1_BIT, 0, NULL, 0),
2148        SND_SOC_DAPM_PGA("IF1 DAC0", SND_SOC_NOPM, 0, 0, NULL, 0),
2149        SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2150        SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2151        SND_SOC_DAPM_PGA("IF1 DAC3", SND_SOC_NOPM, 0, 0, NULL, 0),
2152        SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2153        SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2154        SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2155        SND_SOC_DAPM_SUPPLY("I2S2", RT5645_PWR_DIG1,
2156                RT5645_PWR_I2S2_BIT, 0, NULL, 0),
2157        SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
2158        SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2159        SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2160        SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2161
2162        /* Digital Interface Select */
2163        SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM,
2164                0, 0, &rt5645_vad_adc_mux),
2165
2166        /* Audio Interface */
2167        SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
2168        SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
2169        SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
2170        SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
2171
2172        /* Output Side */
2173        /* DAC mixer before sound effect  */
2174        SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
2175                rt5645_dac_l_mix, ARRAY_SIZE(rt5645_dac_l_mix)),
2176        SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
2177                rt5645_dac_r_mix, ARRAY_SIZE(rt5645_dac_r_mix)),
2178
2179        /* DAC2 channel Mux */
2180        SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_l2_mux),
2181        SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_r2_mux),
2182        SND_SOC_DAPM_PGA("DAC L2 Volume", RT5645_PWR_DIG1,
2183                RT5645_PWR_DAC_L2_BIT, 0, NULL, 0),
2184        SND_SOC_DAPM_PGA("DAC R2 Volume", RT5645_PWR_DIG1,
2185                RT5645_PWR_DAC_R2_BIT, 0, NULL, 0),
2186
2187        SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1l_mux),
2188        SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1r_mux),
2189
2190        /* DAC Mixer */
2191        SND_SOC_DAPM_SUPPLY_S("dac stereo1 filter", 1, RT5645_PWR_DIG2,
2192                RT5645_PWR_DAC_S1F_BIT, 0, NULL, 0),
2193        SND_SOC_DAPM_SUPPLY_S("dac mono left filter", 1, RT5645_PWR_DIG2,
2194                RT5645_PWR_DAC_MF_L_BIT, 0, NULL, 0),
2195        SND_SOC_DAPM_SUPPLY_S("dac mono right filter", 1, RT5645_PWR_DIG2,
2196                RT5645_PWR_DAC_MF_R_BIT, 0, NULL, 0),
2197        SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
2198                rt5645_sto_dac_l_mix, ARRAY_SIZE(rt5645_sto_dac_l_mix)),
2199        SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
2200                rt5645_sto_dac_r_mix, ARRAY_SIZE(rt5645_sto_dac_r_mix)),
2201        SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
2202                rt5645_mono_dac_l_mix, ARRAY_SIZE(rt5645_mono_dac_l_mix)),
2203        SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
2204                rt5645_mono_dac_r_mix, ARRAY_SIZE(rt5645_mono_dac_r_mix)),
2205        SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
2206                rt5645_dig_l_mix, ARRAY_SIZE(rt5645_dig_l_mix)),
2207        SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
2208                rt5645_dig_r_mix, ARRAY_SIZE(rt5645_dig_r_mix)),
2209
2210        /* DACs */
2211        SND_SOC_DAPM_DAC("DAC L1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L1_BIT,
2212                0),
2213        SND_SOC_DAPM_DAC("DAC L2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L2_BIT,
2214                0),
2215        SND_SOC_DAPM_DAC("DAC R1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R1_BIT,
2216                0),
2217        SND_SOC_DAPM_DAC("DAC R2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R2_BIT,
2218                0),
2219        /* OUT Mixer */
2220        SND_SOC_DAPM_MIXER("SPK MIXL", RT5645_PWR_MIXER, RT5645_PWR_SM_L_BIT,
2221                0, rt5645_spk_l_mix, ARRAY_SIZE(rt5645_spk_l_mix)),
2222        SND_SOC_DAPM_MIXER("SPK MIXR", RT5645_PWR_MIXER, RT5645_PWR_SM_R_BIT,
2223                0, rt5645_spk_r_mix, ARRAY_SIZE(rt5645_spk_r_mix)),
2224        SND_SOC_DAPM_MIXER("OUT MIXL", RT5645_PWR_MIXER, RT5645_PWR_OM_L_BIT,
2225                0, rt5645_out_l_mix, ARRAY_SIZE(rt5645_out_l_mix)),
2226        SND_SOC_DAPM_MIXER("OUT MIXR", RT5645_PWR_MIXER, RT5645_PWR_OM_R_BIT,
2227                0, rt5645_out_r_mix, ARRAY_SIZE(rt5645_out_r_mix)),
2228        /* Ouput Volume */
2229        SND_SOC_DAPM_SWITCH("SPKVOL L", RT5645_PWR_VOL, RT5645_PWR_SV_L_BIT, 0,
2230                &spk_l_vol_control),
2231        SND_SOC_DAPM_SWITCH("SPKVOL R", RT5645_PWR_VOL, RT5645_PWR_SV_R_BIT, 0,
2232                &spk_r_vol_control),
2233        SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5645_PWR_VOL, RT5645_PWR_HV_L_BIT,
2234                0, rt5645_hpvoll_mix, ARRAY_SIZE(rt5645_hpvoll_mix)),
2235        SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5645_PWR_VOL, RT5645_PWR_HV_R_BIT,
2236                0, rt5645_hpvolr_mix, ARRAY_SIZE(rt5645_hpvolr_mix)),
2237        SND_SOC_DAPM_SUPPLY("HPOVOL MIXL Power", RT5645_PWR_MIXER,
2238                RT5645_PWR_HM_L_BIT, 0, NULL, 0),
2239        SND_SOC_DAPM_SUPPLY("HPOVOL MIXR Power", RT5645_PWR_MIXER,
2240                RT5645_PWR_HM_R_BIT, 0, NULL, 0),
2241        SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0),
2242        SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0),
2243        SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0),
2244        SND_SOC_DAPM_SWITCH("HPOVOL L", SND_SOC_NOPM, 0, 0, &hp_l_vol_control),
2245        SND_SOC_DAPM_SWITCH("HPOVOL R", SND_SOC_NOPM, 0, 0, &hp_r_vol_control),
2246
2247        /* HPO/LOUT/Mono Mixer */
2248        SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_l_mix,
2249                ARRAY_SIZE(rt5645_spo_l_mix)),
2250        SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_r_mix,
2251                ARRAY_SIZE(rt5645_spo_r_mix)),
2252        SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0, rt5645_hpo_mix,
2253                ARRAY_SIZE(rt5645_hpo_mix)),
2254        SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0, rt5645_lout_mix,
2255                ARRAY_SIZE(rt5645_lout_mix)),
2256
2257        SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM, 0, 0, rt5645_hp_event,
2258                SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2259        SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0, rt5645_lout_event,
2260                SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2261        SND_SOC_DAPM_PGA_S("SPK amp", 2, SND_SOC_NOPM, 0, 0, rt5645_spk_event,
2262                SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2263
2264        /* PDM */
2265        SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5645_PWR_DIG2, RT5645_PWR_PDM1_BIT,
2266                0, NULL, 0),
2267        SND_SOC_DAPM_MUX("PDM1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_l_mux),
2268        SND_SOC_DAPM_MUX("PDM1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_r_mux),
2269
2270        SND_SOC_DAPM_SWITCH("PDM1 L", SND_SOC_NOPM, 0, 0, &pdm1_l_vol_control),
2271        SND_SOC_DAPM_SWITCH("PDM1 R", SND_SOC_NOPM, 0, 0, &pdm1_r_vol_control),
2272
2273        /* Output Lines */
2274        SND_SOC_DAPM_OUTPUT("HPOL"),
2275        SND_SOC_DAPM_OUTPUT("HPOR"),
2276        SND_SOC_DAPM_OUTPUT("LOUTL"),
2277        SND_SOC_DAPM_OUTPUT("LOUTR"),
2278        SND_SOC_DAPM_OUTPUT("PDM1L"),
2279        SND_SOC_DAPM_OUTPUT("PDM1R"),
2280        SND_SOC_DAPM_OUTPUT("SPOL"),
2281        SND_SOC_DAPM_OUTPUT("SPOR"),
2282        SND_SOC_DAPM_POST("DAPM_POST", rt5650_hp_event),
2283};
2284
2285static const struct snd_soc_dapm_widget rt5645_specific_dapm_widgets[] = {
2286        SND_SOC_DAPM_MUX("RT5645 IF1 DAC1 L Mux", SND_SOC_NOPM, 0, 0,
2287                &rt5645_if1_dac0_tdm_sel_mux),
2288        SND_SOC_DAPM_MUX("RT5645 IF1 DAC1 R Mux", SND_SOC_NOPM, 0, 0,
2289                &rt5645_if1_dac1_tdm_sel_mux),
2290        SND_SOC_DAPM_MUX("RT5645 IF1 DAC2 L Mux", SND_SOC_NOPM, 0, 0,
2291                &rt5645_if1_dac2_tdm_sel_mux),
2292        SND_SOC_DAPM_MUX("RT5645 IF1 DAC2 R Mux", SND_SOC_NOPM, 0, 0,
2293                &rt5645_if1_dac3_tdm_sel_mux),
2294        SND_SOC_DAPM_MUX("RT5645 IF1 ADC Mux", SND_SOC_NOPM,
2295                0, 0, &rt5645_if1_adc_in_mux),
2296        SND_SOC_DAPM_MUX("RT5645 IF1 ADC1 Swap Mux", SND_SOC_NOPM,
2297                0, 0, &rt5645_if1_adc1_in_mux),
2298        SND_SOC_DAPM_MUX("RT5645 IF1 ADC2 Swap Mux", SND_SOC_NOPM,
2299                0, 0, &rt5645_if1_adc2_in_mux),
2300        SND_SOC_DAPM_MUX("RT5645 IF1 ADC3 Swap Mux", SND_SOC_NOPM,
2301                0, 0, &rt5645_if1_adc3_in_mux),
2302};
2303
2304static const struct snd_soc_dapm_widget rt5650_specific_dapm_widgets[] = {
2305        SND_SOC_DAPM_MUX("A DAC1 L Mux", SND_SOC_NOPM,
2306                0, 0, &rt5650_a_dac1_l_mux),
2307        SND_SOC_DAPM_MUX("A DAC1 R Mux", SND_SOC_NOPM,
2308                0, 0, &rt5650_a_dac1_r_mux),
2309        SND_SOC_DAPM_MUX("A DAC2 L Mux", SND_SOC_NOPM,
2310                0, 0, &rt5650_a_dac2_l_mux),
2311        SND_SOC_DAPM_MUX("A DAC2 R Mux", SND_SOC_NOPM,
2312                0, 0, &rt5650_a_dac2_r_mux),
2313
2314        SND_SOC_DAPM_MUX("RT5650 IF1 ADC1 Swap Mux", SND_SOC_NOPM,
2315                0, 0, &rt5650_if1_adc1_in_mux),
2316        SND_SOC_DAPM_MUX("RT5650 IF1 ADC2 Swap Mux", SND_SOC_NOPM,
2317                0, 0, &rt5650_if1_adc2_in_mux),
2318        SND_SOC_DAPM_MUX("RT5650 IF1 ADC3 Swap Mux", SND_SOC_NOPM,
2319                0, 0, &rt5650_if1_adc3_in_mux),
2320        SND_SOC_DAPM_MUX("RT5650 IF1 ADC Mux", SND_SOC_NOPM,
2321                0, 0, &rt5650_if1_adc_in_mux),
2322
2323        SND_SOC_DAPM_MUX("RT5650 IF1 DAC1 L Mux", SND_SOC_NOPM, 0, 0,
2324                &rt5650_if1_dac0_tdm_sel_mux),
2325        SND_SOC_DAPM_MUX("RT5650 IF1 DAC1 R Mux", SND_SOC_NOPM, 0, 0,
2326                &rt5650_if1_dac1_tdm_sel_mux),
2327        SND_SOC_DAPM_MUX("RT5650 IF1 DAC2 L Mux", SND_SOC_NOPM, 0, 0,
2328                &rt5650_if1_dac2_tdm_sel_mux),
2329        SND_SOC_DAPM_MUX("RT5650 IF1 DAC2 R Mux", SND_SOC_NOPM, 0, 0,
2330                &rt5650_if1_dac3_tdm_sel_mux),
2331};
2332
2333static const struct snd_soc_dapm_route rt5645_dapm_routes[] = {
2334        { "adc stereo1 filter", NULL, "ADC STO1 ASRC", is_using_asrc },
2335        { "adc mono left filter", NULL, "ADC MONO L ASRC", is_using_asrc },
2336        { "adc mono right filter", NULL, "ADC MONO R ASRC", is_using_asrc },
2337        { "dac mono left filter", NULL, "DAC MONO L ASRC", is_using_asrc },
2338        { "dac mono right filter", NULL, "DAC MONO R ASRC", is_using_asrc },
2339        { "dac stereo1 filter", NULL, "DAC STO ASRC", is_using_asrc },
2340
2341        { "I2S1", NULL, "I2S1 ASRC" },
2342        { "I2S2", NULL, "I2S2 ASRC" },
2343
2344        { "IN1P", NULL, "LDO2" },
2345        { "IN2P", NULL, "LDO2" },
2346
2347        { "DMIC1", NULL, "DMIC L1" },
2348        { "DMIC1", NULL, "DMIC R1" },
2349        { "DMIC2", NULL, "DMIC L2" },
2350        { "DMIC2", NULL, "DMIC R2" },
2351
2352        { "BST1", NULL, "IN1P" },
2353        { "BST1", NULL, "IN1N" },
2354        { "BST1", NULL, "JD Power" },
2355        { "BST1", NULL, "Mic Det Power" },
2356        { "BST2", NULL, "IN2P" },
2357        { "BST2", NULL, "IN2N" },
2358
2359        { "INL VOL", NULL, "IN2P" },
2360        { "INR VOL", NULL, "IN2N" },
2361
2362        { "RECMIXL", "HPOL Switch", "HPOL" },
2363        { "RECMIXL", "INL Switch", "INL VOL" },
2364        { "RECMIXL", "BST2 Switch", "BST2" },
2365        { "RECMIXL", "BST1 Switch", "BST1" },
2366        { "RECMIXL", "OUT MIXL Switch", "OUT MIXL" },
2367
2368        { "RECMIXR", "HPOR Switch", "HPOR" },
2369        { "RECMIXR", "INR Switch", "INR VOL" },
2370        { "RECMIXR", "BST2 Switch", "BST2" },
2371        { "RECMIXR", "BST1 Switch", "BST1" },
2372        { "RECMIXR", "OUT MIXR Switch", "OUT MIXR" },
2373
2374        { "ADC L", NULL, "RECMIXL" },
2375        { "ADC L", NULL, "ADC L power" },
2376        { "ADC R", NULL, "RECMIXR" },
2377        { "ADC R", NULL, "ADC R power" },
2378
2379        {"DMIC L1", NULL, "DMIC CLK"},
2380        {"DMIC L1", NULL, "DMIC1 Power"},
2381        {"DMIC R1", NULL, "DMIC CLK"},
2382        {"DMIC R1", NULL, "DMIC1 Power"},
2383        {"DMIC L2", NULL, "DMIC CLK"},
2384        {"DMIC L2", NULL, "DMIC2 Power"},
2385        {"DMIC R2", NULL, "DMIC CLK"},
2386        {"DMIC R2", NULL, "DMIC2 Power"},
2387
2388        { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" },
2389        { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" },
2390        { "Stereo1 DMIC Mux", NULL, "DMIC STO1 ASRC" },
2391
2392        { "Mono DMIC L Mux", "DMIC1", "DMIC L1" },
2393        { "Mono DMIC L Mux", "DMIC2", "DMIC L2" },
2394        { "Mono DMIC L Mux", NULL, "DMIC MONO L ASRC" },
2395
2396        { "Mono DMIC R Mux", "DMIC1", "DMIC R1" },
2397        { "Mono DMIC R Mux", "DMIC2", "DMIC R2" },
2398        { "Mono DMIC R Mux", NULL, "DMIC MONO R ASRC" },
2399
2400        { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" },
2401        { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
2402        { "Stereo1 ADC L1 Mux", "ADC", "ADC L" },
2403        { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
2404
2405        { "Stereo1 ADC R1 Mux", "ADC", "ADC R" },
2406        { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
2407        { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" },
2408        { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
2409
2410        { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
2411        { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2412        { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2413        { "Mono ADC L1 Mux", "ADC", "ADC L" },
2414
2415        { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2416        { "Mono ADC R1 Mux", "ADC", "ADC R" },
2417        { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
2418        { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2419
2420        { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
2421        { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
2422        { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
2423        { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
2424
2425        { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" },
2426        { "Stereo1 ADC MIXL", NULL, "adc stereo1 filter" },
2427        { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
2428
2429        { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" },
2430        { "Stereo1 ADC MIXR", NULL, "adc stereo1 filter" },
2431        { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
2432
2433        { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
2434        { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
2435        { "Mono ADC MIXL", NULL, "adc mono left filter" },
2436        { "adc mono left filter", NULL, "PLL1", is_sys_clk_from_pll },
2437
2438        { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
2439        { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
2440        { "Mono ADC MIXR", NULL, "adc mono right filter" },
2441        { "adc mono right filter", NULL, "PLL1", is_sys_clk_from_pll },
2442
2443        { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" },
2444        { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" },
2445        { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" },
2446
2447        { "IF_ADC1", NULL, "Stereo1 ADC MIXL" },
2448        { "IF_ADC1", NULL, "Stereo1 ADC MIXR" },
2449        { "IF_ADC2", NULL, "Mono ADC MIXL" },
2450        { "IF_ADC2", NULL, "Mono ADC MIXR" },
2451        { "VAD_ADC", NULL, "VAD ADC Mux" },
2452
2453        { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
2454        { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
2455        { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" },
2456
2457        { "IF1 ADC", NULL, "I2S1" },
2458        { "IF2 ADC", NULL, "I2S2" },
2459        { "IF2 ADC", NULL, "IF2 ADC Mux" },
2460
2461        { "AIF2TX", NULL, "IF2 ADC" },
2462
2463        { "IF1 DAC0", NULL, "AIF1RX" },
2464        { "IF1 DAC1", NULL, "AIF1RX" },
2465        { "IF1 DAC2", NULL, "AIF1RX" },
2466        { "IF1 DAC3", NULL, "AIF1RX" },
2467        { "IF2 DAC", NULL, "AIF2RX" },
2468
2469        { "IF1 DAC0", NULL, "I2S1" },
2470        { "IF1 DAC1", NULL, "I2S1" },
2471        { "IF1 DAC2", NULL, "I2S1" },
2472        { "IF1 DAC3", NULL, "I2S1" },
2473        { "IF2 DAC", NULL, "I2S2" },
2474
2475        { "IF2 DAC L", NULL, "IF2 DAC" },
2476        { "IF2 DAC R", NULL, "IF2 DAC" },
2477
2478        { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" },
2479        { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" },
2480
2481        { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" },
2482        { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" },
2483        { "DAC1 MIXL", NULL, "dac stereo1 filter" },
2484        { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" },
2485        { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" },
2486        { "DAC1 MIXR", NULL, "dac stereo1 filter" },
2487
2488        { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
2489        { "DAC L2 Mux", "Mono ADC", "Mono ADC MIXL" },
2490        { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" },
2491        { "DAC L2 Volume", NULL, "DAC L2 Mux" },
2492        { "DAC L2 Volume", NULL, "dac mono left filter" },
2493
2494        { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
2495        { "DAC R2 Mux", "Mono ADC", "Mono ADC MIXR" },
2496        { "DAC R2 Mux", "Haptic", "Haptic Generator" },
2497        { "DAC R2 Volume", NULL, "DAC R2 Mux" },
2498        { "DAC R2 Volume", NULL, "dac mono right filter" },
2499
2500        { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2501        { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
2502        { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2503        { "Stereo DAC MIXL", NULL, "dac stereo1 filter" },
2504        { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2505        { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
2506        { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2507        { "Stereo DAC MIXR", NULL, "dac stereo1 filter" },
2508
2509        { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2510        { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2511        { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2512        { "Mono DAC MIXL", NULL, "dac mono left filter" },
2513        { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2514        { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2515        { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2516        { "Mono DAC MIXR", NULL, "dac mono right filter" },
2517
2518        { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" },
2519        { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2520        { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2521        { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" },
2522        { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2523        { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2524
2525        { "DAC L1", NULL, "PLL1", is_sys_clk_from_pll },
2526        { "DAC R1", NULL, "PLL1", is_sys_clk_from_pll },
2527        { "DAC L2", NULL, "PLL1", is_sys_clk_from_pll },
2528        { "DAC R2", NULL, "PLL1", is_sys_clk_from_pll },
2529
2530        { "SPK MIXL", "BST1 Switch", "BST1" },
2531        { "SPK MIXL", "INL Switch", "INL VOL" },
2532        { "SPK MIXL", "DAC L1 Switch", "DAC L1" },
2533        { "SPK MIXL", "DAC L2 Switch", "DAC L2" },
2534        { "SPK MIXR", "BST2 Switch", "BST2" },
2535        { "SPK MIXR", "INR Switch", "INR VOL" },
2536        { "SPK MIXR", "DAC R1 Switch", "DAC R1" },
2537        { "SPK MIXR", "DAC R2 Switch", "DAC R2" },
2538
2539        { "OUT MIXL", "BST1 Switch", "BST1" },
2540        { "OUT MIXL", "INL Switch", "INL VOL" },
2541        { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
2542        { "OUT MIXL", "DAC L1 Switch", "DAC L1" },
2543
2544        { "OUT MIXR", "BST2 Switch", "BST2" },
2545        { "OUT MIXR", "INR Switch", "INR VOL" },
2546        { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
2547        { "OUT MIXR", "DAC R1 Switch", "DAC R1" },
2548
2549        { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" },
2550        { "HPOVOL MIXL", "DAC2 Switch", "DAC L2" },
2551        { "HPOVOL MIXL", "INL Switch", "INL VOL" },
2552        { "HPOVOL MIXL", "BST1 Switch", "BST1" },
2553        { "HPOVOL MIXL", NULL, "HPOVOL MIXL Power" },
2554        { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" },
2555        { "HPOVOL MIXR", "DAC2 Switch", "DAC R2" },
2556        { "HPOVOL MIXR", "INR Switch", "INR VOL" },
2557        { "HPOVOL MIXR", "BST2 Switch", "BST2" },
2558        { "HPOVOL MIXR", NULL, "HPOVOL MIXR Power" },
2559
2560        { "DAC 2", NULL, "DAC L2" },
2561        { "DAC 2", NULL, "DAC R2" },
2562        { "DAC 1", NULL, "DAC L1" },
2563        { "DAC 1", NULL, "DAC R1" },
2564        { "HPOVOL L", "Switch", "HPOVOL MIXL" },
2565        { "HPOVOL R", "Switch", "HPOVOL MIXR" },
2566        { "HPOVOL", NULL, "HPOVOL L" },
2567        { "HPOVOL", NULL, "HPOVOL R" },
2568        { "HPO MIX", "DAC1 Switch", "DAC 1" },
2569        { "HPO MIX", "HPVOL Switch", "HPOVOL" },
2570
2571        { "SPKVOL L", "Switch", "SPK MIXL" },
2572        { "SPKVOL R", "Switch", "SPK MIXR" },
2573
2574        { "SPOL MIX", "DAC L1 Switch", "DAC L1" },
2575        { "SPOL MIX", "SPKVOL L Switch", "SPKVOL L" },
2576        { "SPOR MIX", "DAC R1 Switch", "DAC R1" },
2577        { "SPOR MIX", "SPKVOL R Switch", "SPKVOL R" },
2578
2579        { "LOUT MIX", "DAC L1 Switch", "DAC L1" },
2580        { "LOUT MIX", "DAC R1 Switch", "DAC R1" },
2581        { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" },
2582        { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" },
2583
2584        { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
2585        { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" },
2586        { "PDM1 L Mux", NULL, "PDM1 Power" },
2587        { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
2588        { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" },
2589        { "PDM1 R Mux", NULL, "PDM1 Power" },
2590
2591        { "HP amp", NULL, "HPO MIX" },
2592        { "HP amp", NULL, "JD Power" },
2593        { "HP amp", NULL, "Mic Det Power" },
2594        { "HP amp", NULL, "LDO2" },
2595        { "HPOL", NULL, "HP amp" },
2596        { "HPOR", NULL, "HP amp" },
2597
2598        { "LOUT amp", NULL, "LOUT MIX" },
2599        { "LOUTL", NULL, "LOUT amp" },
2600        { "LOUTR", NULL, "LOUT amp" },
2601
2602        { "PDM1 L", "Switch", "PDM1 L Mux" },
2603        { "PDM1 R", "Switch", "PDM1 R Mux" },
2604
2605        { "PDM1L", NULL, "PDM1 L" },
2606        { "PDM1R", NULL, "PDM1 R" },
2607
2608        { "SPK amp", NULL, "SPOL MIX" },
2609        { "SPK amp", NULL, "SPOR MIX" },
2610        { "SPOL", NULL, "SPK amp" },
2611        { "SPOR", NULL, "SPK amp" },
2612};
2613
2614static const struct snd_soc_dapm_route rt5650_specific_dapm_routes[] = {
2615        { "A DAC1 L Mux", "DAC1",  "DAC1 MIXL"},
2616        { "A DAC1 L Mux", "Stereo DAC Mixer", "Stereo DAC MIXL"},
2617        { "A DAC1 R Mux", "DAC1",  "DAC1 MIXR"},
2618        { "A DAC1 R Mux", "Stereo DAC Mixer", "Stereo DAC MIXR"},
2619
2620        { "A DAC2 L Mux", "Stereo DAC Mixer", "Stereo DAC MIXL"},
2621        { "A DAC2 L Mux", "Mono DAC Mixer", "Mono DAC MIXL"},
2622        { "A DAC2 R Mux", "Stereo DAC Mixer", "Stereo DAC MIXR"},
2623        { "A DAC2 R Mux", "Mono DAC Mixer", "Mono DAC MIXR"},
2624
2625        { "DAC L1", NULL, "A DAC1 L Mux" },
2626        { "DAC R1", NULL, "A DAC1 R Mux" },
2627        { "DAC L2", NULL, "A DAC2 L Mux" },
2628        { "DAC R2", NULL, "A DAC2 R Mux" },
2629
2630        { "RT5650 IF1 ADC1 Swap Mux", "L/R", "IF_ADC1" },
2631        { "RT5650 IF1 ADC1 Swap Mux", "R/L", "IF_ADC1" },
2632        { "RT5650 IF1 ADC1 Swap Mux", "L/L", "IF_ADC1" },
2633        { "RT5650 IF1 ADC1 Swap Mux", "R/R", "IF_ADC1" },
2634
2635        { "RT5650 IF1 ADC2 Swap Mux", "L/R", "IF_ADC2" },
2636        { "RT5650 IF1 ADC2 Swap Mux", "R/L", "IF_ADC2" },
2637        { "RT5650 IF1 ADC2 Swap Mux", "L/L", "IF_ADC2" },
2638        { "RT5650 IF1 ADC2 Swap Mux", "R/R", "IF_ADC2" },
2639
2640        { "RT5650 IF1 ADC3 Swap Mux", "L/R", "VAD_ADC" },
2641        { "RT5650 IF1 ADC3 Swap Mux", "R/L", "VAD_ADC" },
2642        { "RT5650 IF1 ADC3 Swap Mux", "L/L", "VAD_ADC" },
2643        { "RT5650 IF1 ADC3 Swap Mux", "R/R", "VAD_ADC" },
2644
2645        { "IF1 ADC", NULL, "RT5650 IF1 ADC1 Swap Mux" },
2646        { "IF1 ADC", NULL, "RT5650 IF1 ADC2 Swap Mux" },
2647        { "IF1 ADC", NULL, "RT5650 IF1 ADC3 Swap Mux" },
2648
2649        { "RT5650 IF1 ADC Mux", "IF_ADC1/IF_ADC2/DAC_REF/Null", "IF1 ADC" },
2650        { "RT5650 IF1 ADC Mux", "IF_ADC1/IF_ADC2/Null/DAC_REF", "IF1 ADC" },
2651        { "RT5650 IF1 ADC Mux", "IF_ADC1/DAC_REF/IF_ADC2/Null", "IF1 ADC" },
2652        { "RT5650 IF1 ADC Mux", "IF_ADC1/DAC_REF/Null/IF_ADC2", "IF1 ADC" },
2653        { "RT5650 IF1 ADC Mux", "IF_ADC1/Null/DAC_REF/IF_ADC2", "IF1 ADC" },
2654        { "RT5650 IF1 ADC Mux", "IF_ADC1/Null/IF_ADC2/DAC_REF", "IF1 ADC" },
2655
2656        { "RT5650 IF1 ADC Mux", "IF_ADC2/IF_ADC1/DAC_REF/Null", "IF1 ADC" },
2657        { "RT5650 IF1 ADC Mux", "IF_ADC2/IF_ADC1/Null/DAC_REF", "IF1 ADC" },
2658        { "RT5650 IF1 ADC Mux", "IF_ADC2/DAC_REF/IF_ADC1/Null", "IF1 ADC" },
2659        { "RT5650 IF1 ADC Mux", "IF_ADC2/DAC_REF/Null/IF_ADC1", "IF1 ADC" },
2660        { "RT5650 IF1 ADC Mux", "IF_ADC2/Null/DAC_REF/IF_ADC1", "IF1 ADC" },
2661        { "RT5650 IF1 ADC Mux", "IF_ADC2/Null/IF_ADC1/DAC_REF", "IF1 ADC" },
2662
2663        { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC1/IF_ADC2/Null", "IF1 ADC" },
2664        { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC1/Null/IF_ADC2", "IF1 ADC" },
2665        { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC2/IF_ADC1/Null", "IF1 ADC" },
2666        { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC2/Null/IF_ADC1", "IF1 ADC" },
2667        { "RT5650 IF1 ADC Mux", "DAC_REF/Null/IF_ADC1/IF_ADC2", "IF1 ADC" },
2668        { "RT5650 IF1 ADC Mux", "DAC_REF/Null/IF_ADC2/IF_ADC1", "IF1 ADC" },
2669
2670        { "RT5650 IF1 ADC Mux", "Null/IF_ADC1/IF_ADC2/DAC_REF", "IF1 ADC" },
2671        { "RT5650 IF1 ADC Mux", "Null/IF_ADC1/DAC_REF/IF_ADC2", "IF1 ADC" },
2672        { "RT5650 IF1 ADC Mux", "Null/IF_ADC2/IF_ADC1/DAC_REF", "IF1 ADC" },
2673        { "RT5650 IF1 ADC Mux", "Null/IF_ADC2/DAC_REF/IF_ADC1", "IF1 ADC" },
2674        { "RT5650 IF1 ADC Mux", "Null/DAC_REF/IF_ADC1/IF_ADC2", "IF1 ADC" },
2675        { "RT5650 IF1 ADC Mux", "Null/DAC_REF/IF_ADC2/IF_ADC1", "IF1 ADC" },
2676        { "AIF1TX", NULL, "RT5650 IF1 ADC Mux" },
2677
2678        { "RT5650 IF1 DAC1 L Mux", "Slot0", "IF1 DAC0" },
2679        { "RT5650 IF1 DAC1 L Mux", "Slot1", "IF1 DAC1" },
2680        { "RT5650 IF1 DAC1 L Mux", "Slot2", "IF1 DAC2" },
2681        { "RT5650 IF1 DAC1 L Mux", "Slot3", "IF1 DAC3" },
2682
2683        { "RT5650 IF1 DAC1 R Mux", "Slot0", "IF1 DAC0" },
2684        { "RT5650 IF1 DAC1 R Mux", "Slot1", "IF1 DAC1" },
2685        { "RT5650 IF1 DAC1 R Mux", "Slot2", "IF1 DAC2" },
2686        { "RT5650 IF1 DAC1 R Mux", "Slot3", "IF1 DAC3" },
2687
2688        { "RT5650 IF1 DAC2 L Mux", "Slot0", "IF1 DAC0" },
2689        { "RT5650 IF1 DAC2 L Mux", "Slot1", "IF1 DAC1" },
2690        { "RT5650 IF1 DAC2 L Mux", "Slot2", "IF1 DAC2" },
2691        { "RT5650 IF1 DAC2 L Mux", "Slot3", "IF1 DAC3" },
2692
2693        { "RT5650 IF1 DAC2 R Mux", "Slot0", "IF1 DAC0" },
2694        { "RT5650 IF1 DAC2 R Mux", "Slot1", "IF1 DAC1" },
2695        { "RT5650 IF1 DAC2 R Mux", "Slot2", "IF1 DAC2" },
2696        { "RT5650 IF1 DAC2 R Mux", "Slot3", "IF1 DAC3" },
2697
2698        { "DAC1 L Mux", "IF1 DAC", "RT5650 IF1 DAC1 L Mux" },
2699        { "DAC1 R Mux", "IF1 DAC", "RT5650 IF1 DAC1 R Mux" },
2700
2701        { "DAC L2 Mux", "IF1 DAC", "RT5650 IF1 DAC2 L Mux" },
2702        { "DAC R2 Mux", "IF1 DAC", "RT5650 IF1 DAC2 R Mux" },
2703};
2704
2705static const struct snd_soc_dapm_route rt5645_specific_dapm_routes[] = {
2706        { "DAC L1", NULL, "Stereo DAC MIXL" },
2707        { "DAC R1", NULL, "Stereo DAC MIXR" },
2708        { "DAC L2", NULL, "Mono DAC MIXL" },
2709        { "DAC R2", NULL, "Mono DAC MIXR" },
2710
2711        { "RT5645 IF1 ADC1 Swap Mux", "L/R", "IF_ADC1" },
2712        { "RT5645 IF1 ADC1 Swap Mux", "R/L", "IF_ADC1" },
2713        { "RT5645 IF1 ADC1 Swap Mux", "L/L", "IF_ADC1" },
2714        { "RT5645 IF1 ADC1 Swap Mux", "R/R", "IF_ADC1" },
2715
2716        { "RT5645 IF1 ADC2 Swap Mux", "L/R", "IF_ADC2" },
2717        { "RT5645 IF1 ADC2 Swap Mux", "R/L", "IF_ADC2" },
2718        { "RT5645 IF1 ADC2 Swap Mux", "L/L", "IF_ADC2" },
2719        { "RT5645 IF1 ADC2 Swap Mux", "R/R", "IF_ADC2" },
2720
2721        { "RT5645 IF1 ADC3 Swap Mux", "L/R", "VAD_ADC" },
2722        { "RT5645 IF1 ADC3 Swap Mux", "R/L", "VAD_ADC" },
2723        { "RT5645 IF1 ADC3 Swap Mux", "L/L", "VAD_ADC" },
2724        { "RT5645 IF1 ADC3 Swap Mux", "R/R", "VAD_ADC" },
2725
2726        { "IF1 ADC", NULL, "RT5645 IF1 ADC1 Swap Mux" },
2727        { "IF1 ADC", NULL, "RT5645 IF1 ADC2 Swap Mux" },
2728        { "IF1 ADC", NULL, "RT5645 IF1 ADC3 Swap Mux" },
2729
2730        { "RT5645 IF1 ADC Mux", "IF_ADC1/IF_ADC2/VAD_ADC", "IF1 ADC" },
2731        { "RT5645 IF1 ADC Mux", "IF_ADC2/IF_ADC1/VAD_ADC", "IF1 ADC" },
2732        { "RT5645 IF1 ADC Mux", "VAD_ADC/IF_ADC1/IF_ADC2", "IF1 ADC" },
2733        { "RT5645 IF1 ADC Mux", "VAD_ADC/IF_ADC2/IF_ADC1", "IF1 ADC" },
2734        { "AIF1TX", NULL, "RT5645 IF1 ADC Mux" },
2735
2736        { "RT5645 IF1 DAC1 L Mux", "Slot0", "IF1 DAC0" },
2737        { "RT5645 IF1 DAC1 L Mux", "Slot1", "IF1 DAC1" },
2738        { "RT5645 IF1 DAC1 L Mux", "Slot2", "IF1 DAC2" },
2739        { "RT5645 IF1 DAC1 L Mux", "Slot3", "IF1 DAC3" },
2740
2741        { "RT5645 IF1 DAC1 R Mux", "Slot0", "IF1 DAC0" },
2742        { "RT5645 IF1 DAC1 R Mux", "Slot1", "IF1 DAC1" },
2743        { "RT5645 IF1 DAC1 R Mux", "Slot2", "IF1 DAC2" },
2744        { "RT5645 IF1 DAC1 R Mux", "Slot3", "IF1 DAC3" },
2745
2746        { "RT5645 IF1 DAC2 L Mux", "Slot0", "IF1 DAC0" },
2747        { "RT5645 IF1 DAC2 L Mux", "Slot1", "IF1 DAC1" },
2748        { "RT5645 IF1 DAC2 L Mux", "Slot2", "IF1 DAC2" },
2749        { "RT5645 IF1 DAC2 L Mux", "Slot3", "IF1 DAC3" },
2750
2751        { "RT5645 IF1 DAC2 R Mux", "Slot0", "IF1 DAC0" },
2752        { "RT5645 IF1 DAC2 R Mux", "Slot1", "IF1 DAC1" },
2753        { "RT5645 IF1 DAC2 R Mux", "Slot2", "IF1 DAC2" },
2754        { "RT5645 IF1 DAC2 R Mux", "Slot3", "IF1 DAC3" },
2755
2756        { "DAC1 L Mux", "IF1 DAC", "RT5645 IF1 DAC1 L Mux" },
2757        { "DAC1 R Mux", "IF1 DAC", "RT5645 IF1 DAC1 R Mux" },
2758
2759        { "DAC L2 Mux", "IF1 DAC", "RT5645 IF1 DAC2 L Mux" },
2760        { "DAC R2 Mux", "IF1 DAC", "RT5645 IF1 DAC2 R Mux" },
2761};
2762
2763static const struct snd_soc_dapm_route rt5645_old_dapm_routes[] = {
2764        { "SPOL MIX", "DAC R1 Switch", "DAC R1" },
2765        { "SPOL MIX", "SPKVOL R Switch", "SPKVOL R" },
2766};
2767
2768static int rt5645_hw_params(struct snd_pcm_substream *substream,
2769        struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2770{
2771        struct snd_soc_component *component = dai->component;
2772        struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
2773        unsigned int val_len = 0, val_clk, mask_clk, dl_sft;
2774        int pre_div, bclk_ms, frame_size;
2775
2776        rt5645->lrck[dai->id] = params_rate(params);
2777        pre_div = rl6231_get_clk_info(rt5645->sysclk, rt5645->lrck[dai->id]);
2778        if (pre_div < 0) {
2779                dev_err(component->dev, "Unsupported clock setting\n");
2780                return -EINVAL;
2781        }
2782        frame_size = snd_soc_params_to_frame_size(params);
2783        if (frame_size < 0) {
2784                dev_err(component->dev, "Unsupported frame size: %d\n", frame_size);
2785                return -EINVAL;
2786        }
2787
2788        switch (rt5645->codec_type) {
2789        case CODEC_TYPE_RT5650:
2790                dl_sft = 4;
2791                break;
2792        default:
2793                dl_sft = 2;
2794                break;
2795        }
2796
2797        bclk_ms = frame_size > 32;
2798        rt5645->bclk[dai->id] = rt5645->lrck[dai->id] * (32 << bclk_ms);
2799
2800        dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
2801                rt5645->bclk[dai->id], rt5645->lrck[dai->id]);
2802        dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
2803                                bclk_ms, pre_div, dai->id);
2804
2805        switch (params_width(params)) {
2806        case 16:
2807                break;
2808        case 20:
2809                val_len = 0x1;
2810                break;
2811        case 24:
2812                val_len = 0x2;
2813                break;
2814        case 8:
2815                val_len = 0x3;
2816                break;
2817        default:
2818                return -EINVAL;
2819        }
2820
2821        switch (dai->id) {
2822        case RT5645_AIF1:
2823                mask_clk = RT5645_I2S_PD1_MASK;
2824                val_clk = pre_div << RT5645_I2S_PD1_SFT;
2825                snd_soc_component_update_bits(component, RT5645_I2S1_SDP,
2826                        (0x3 << dl_sft), (val_len << dl_sft));
2827                snd_soc_component_update_bits(component, RT5645_ADDA_CLK1, mask_clk, val_clk);
2828                break;
2829        case  RT5645_AIF2:
2830                mask_clk = RT5645_I2S_BCLK_MS2_MASK | RT5645_I2S_PD2_MASK;
2831                val_clk = bclk_ms << RT5645_I2S_BCLK_MS2_SFT |
2832                        pre_div << RT5645_I2S_PD2_SFT;
2833                snd_soc_component_update_bits(component, RT5645_I2S2_SDP,
2834                        (0x3 << dl_sft), (val_len << dl_sft));
2835                snd_soc_component_update_bits(component, RT5645_ADDA_CLK1, mask_clk, val_clk);
2836                break;
2837        default:
2838                dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
2839                return -EINVAL;
2840        }
2841
2842        return 0;
2843}
2844
2845static int rt5645_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2846{
2847        struct snd_soc_component *component = dai->component;
2848        struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
2849        unsigned int reg_val = 0, pol_sft;
2850
2851        switch (rt5645->codec_type) {
2852        case CODEC_TYPE_RT5650:
2853                pol_sft = 8;
2854                break;
2855        default:
2856                pol_sft = 7;
2857                break;
2858        }
2859
2860        switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2861        case SND_SOC_DAIFMT_CBM_CFM:
2862                rt5645->master[dai->id] = 1;
2863                break;
2864        case SND_SOC_DAIFMT_CBS_CFS:
2865                reg_val |= RT5645_I2S_MS_S;
2866                rt5645->master[dai->id] = 0;
2867                break;
2868        default:
2869                return -EINVAL;
2870        }
2871
2872        switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2873        case SND_SOC_DAIFMT_NB_NF:
2874                break;
2875        case SND_SOC_DAIFMT_IB_NF:
2876                reg_val |= (1 << pol_sft);
2877                break;
2878        default:
2879                return -EINVAL;
2880        }
2881
2882        switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
2883        case SND_SOC_DAIFMT_I2S:
2884                break;
2885        case SND_SOC_DAIFMT_LEFT_J:
2886                reg_val |= RT5645_I2S_DF_LEFT;
2887                break;
2888        case SND_SOC_DAIFMT_DSP_A:
2889                reg_val |= RT5645_I2S_DF_PCM_A;
2890                break;
2891        case SND_SOC_DAIFMT_DSP_B:
2892                reg_val |= RT5645_I2S_DF_PCM_B;
2893                break;
2894        default:
2895                return -EINVAL;
2896        }
2897        switch (dai->id) {
2898        case RT5645_AIF1:
2899                snd_soc_component_update_bits(component, RT5645_I2S1_SDP,
2900                        RT5645_I2S_MS_MASK | (1 << pol_sft) |
2901                        RT5645_I2S_DF_MASK, reg_val);
2902                break;
2903        case RT5645_AIF2:
2904                snd_soc_component_update_bits(component, RT5645_I2S2_SDP,
2905                        RT5645_I2S_MS_MASK | (1 << pol_sft) |
2906                        RT5645_I2S_DF_MASK, reg_val);
2907                break;
2908        default:
2909                dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
2910                return -EINVAL;
2911        }
2912        return 0;
2913}
2914
2915static int rt5645_set_dai_sysclk(struct snd_soc_dai *dai,
2916                int clk_id, unsigned int freq, int dir)
2917{
2918        struct snd_soc_component *component = dai->component;
2919        struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
2920        unsigned int reg_val = 0;
2921
2922        if (freq == rt5645->sysclk && clk_id == rt5645->sysclk_src)
2923                return 0;
2924
2925        switch (clk_id) {
2926        case RT5645_SCLK_S_MCLK:
2927                reg_val |= RT5645_SCLK_SRC_MCLK;
2928                break;
2929        case RT5645_SCLK_S_PLL1:
2930                reg_val |= RT5645_SCLK_SRC_PLL1;
2931                break;
2932        case RT5645_SCLK_S_RCCLK:
2933                reg_val |= RT5645_SCLK_SRC_RCCLK;
2934                break;
2935        default:
2936                dev_err(component->dev, "Invalid clock id (%d)\n", clk_id);
2937                return -EINVAL;
2938        }
2939        snd_soc_component_update_bits(component, RT5645_GLB_CLK,
2940                RT5645_SCLK_SRC_MASK, reg_val);
2941        rt5645->sysclk = freq;
2942        rt5645->sysclk_src = clk_id;
2943
2944        dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
2945
2946        return 0;
2947}
2948
2949static int rt5645_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
2950                        unsigned int freq_in, unsigned int freq_out)
2951{
2952        struct snd_soc_component *component = dai->component;
2953        struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
2954        struct rl6231_pll_code pll_code;
2955        int ret;
2956
2957        if (source == rt5645->pll_src && freq_in == rt5645->pll_in &&
2958            freq_out == rt5645->pll_out)
2959                return 0;
2960
2961        if (!freq_in || !freq_out) {
2962                dev_dbg(component->dev, "PLL disabled\n");
2963
2964                rt5645->pll_in = 0;
2965                rt5645->pll_out = 0;
2966                snd_soc_component_update_bits(component, RT5645_GLB_CLK,
2967                        RT5645_SCLK_SRC_MASK, RT5645_SCLK_SRC_MCLK);
2968                return 0;
2969        }
2970
2971        switch (source) {
2972        case RT5645_PLL1_S_MCLK:
2973                snd_soc_component_update_bits(component, RT5645_GLB_CLK,
2974                        RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_MCLK);
2975                break;
2976        case RT5645_PLL1_S_BCLK1:
2977        case RT5645_PLL1_S_BCLK2:
2978                switch (dai->id) {
2979                case RT5645_AIF1:
2980                        snd_soc_component_update_bits(component, RT5645_GLB_CLK,
2981                                RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK1);
2982                        break;
2983                case  RT5645_AIF2:
2984                        snd_soc_component_update_bits(component, RT5645_GLB_CLK,
2985                                RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK2);
2986                        break;
2987                default:
2988                        dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
2989                        return -EINVAL;
2990                }
2991                break;
2992        default:
2993                dev_err(component->dev, "Unknown PLL source %d\n", source);
2994                return -EINVAL;
2995        }
2996
2997        ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
2998        if (ret < 0) {
2999                dev_err(component->dev, "Unsupport input clock %d\n", freq_in);
3000                return ret;

3001        }
3002
3003        dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n",
3004                pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
3005                pll_code.n_code, pll_code.k_code);
3006
3007        snd_soc_component_write(component, RT5645_PLL_CTRL1,
3008                pll_code.n_code << RT5645_PLL_N_SFT | pll_code.k_code);
3009        snd_soc_component_write(component, RT5645_PLL_CTRL2,
3010                (pll_code.m_bp ? 0 : pll_code.m_code) << RT5645_PLL_M_SFT |
3011                pll_code.m_bp << RT5645_PLL_M_BP_SFT);
3012
3013        rt5645->pll_in = freq_in;
3014        rt5645->pll_out = freq_out;
3015        rt5645->pll_src = source;
3016
3017        return 0;
3018}
3019
3020static int rt5645_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
3021                        unsigned int rx_mask, int slots, int slot_width)
3022{
3023        struct snd_soc_component *component = dai->component;
3024        struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3025        unsigned int i_slot_sft, o_slot_sft, i_width_sht, o_width_sht, en_sft;
3026        unsigned int mask, val = 0;
3027
3028        switch (rt5645->codec_type) {
3029        case CODEC_TYPE_RT5650:
3030                en_sft = 15;
3031                i_slot_sft = 10;
3032                o_slot_sft = 8;
3033                i_width_sht = 6;
3034                o_width_sht = 4;
3035                mask = 0x8ff0;
3036                break;
3037        default:
3038                en_sft = 14;
3039                i_slot_sft = o_slot_sft = 12;
3040                i_width_sht = o_width_sht = 10;
3041                mask = 0x7c00;
3042                break;
3043        }
3044        if (rx_mask || tx_mask) {
3045                val |= (1 << en_sft);
3046                if (rt5645->codec_type == CODEC_TYPE_RT5645)
3047                        snd_soc_component_update_bits(component, RT5645_BASS_BACK,
3048                                RT5645_G_BB_BST_MASK, RT5645_G_BB_BST_25DB);
3049        }
3050
3051        switch (slots) {
3052        case 4:
3053                val |= (1 << i_slot_sft) | (1 << o_slot_sft);
3054                break;
3055        case 6:
3056                val |= (2 << i_slot_sft) | (2 << o_slot_sft);
3057                break;
3058        case 8:
3059                val |= (3 << i_slot_sft) | (3 << o_slot_sft);
3060                break;
3061        case 2:
3062        default:
3063                break;
3064        }
3065
3066        switch (slot_width) {
3067        case 20:
3068                val |= (1 << i_width_sht) | (1 << o_width_sht);
3069                break;
3070        case 24:
3071                val |= (2 << i_width_sht) | (2 << o_width_sht);
3072                break;
3073        case 32:
3074                val |= (3 << i_width_sht) | (3 << o_width_sht);
3075                break;
3076        case 16:
3077        default:
3078                break;
3079        }
3080
3081        snd_soc_component_update_bits(component, RT5645_TDM_CTRL_1, mask, val);
3082
3083        return 0;
3084}
3085
3086static int rt5645_set_bias_level(struct snd_soc_component *component,
3087                        enum snd_soc_bias_level level)
3088{
3089        struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3090
3091        switch (level) {
3092        case SND_SOC_BIAS_PREPARE:
3093                if (SND_SOC_BIAS_STANDBY == snd_soc_component_get_bias_level(component)) {
3094                        snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
3095                                RT5645_PWR_VREF1 | RT5645_PWR_MB |
3096                                RT5645_PWR_BG | RT5645_PWR_VREF2,
3097                                RT5645_PWR_VREF1 | RT5645_PWR_MB |
3098                                RT5645_PWR_BG | RT5645_PWR_VREF2);
3099                        mdelay(10);
3100                        snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
3101                                RT5645_PWR_FV1 | RT5645_PWR_FV2,
3102                                RT5645_PWR_FV1 | RT5645_PWR_FV2);
3103                        snd_soc_component_update_bits(component, RT5645_GEN_CTRL1,
3104                                RT5645_DIG_GATE_CTRL, RT5645_DIG_GATE_CTRL);
3105                }
3106                break;
3107
3108        case SND_SOC_BIAS_STANDBY:
3109                snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
3110                        RT5645_PWR_VREF1 | RT5645_PWR_MB |
3111                        RT5645_PWR_BG | RT5645_PWR_VREF2,
3112                        RT5645_PWR_VREF1 | RT5645_PWR_MB |
3113                        RT5645_PWR_BG | RT5645_PWR_VREF2);
3114                mdelay(10);
3115                snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
3116                        RT5645_PWR_FV1 | RT5645_PWR_FV2,
3117                        RT5645_PWR_FV1 | RT5645_PWR_FV2);
3118                if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
3119                        snd_soc_component_write(component, RT5645_DEPOP_M2, 0x1140);
3120                        msleep(40);
3121                        if (rt5645->en_button_func)
3122                                queue_delayed_work(system_power_efficient_wq,
3123                                        &rt5645->jack_detect_work,
3124                                        msecs_to_jiffies(0));
3125                }
3126                break;
3127
3128        case SND_SOC_BIAS_OFF:
3129                snd_soc_component_write(component, RT5645_DEPOP_M2, 0x1100);
3130                if (!rt5645->en_button_func)
3131                        snd_soc_component_update_bits(component, RT5645_GEN_CTRL1,
3132                                        RT5645_DIG_GATE_CTRL, 0);
3133                snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
3134                                RT5645_PWR_VREF1 | RT5645_PWR_MB |
3135                                RT5645_PWR_BG | RT5645_PWR_VREF2 |
3136                                RT5645_PWR_FV1 | RT5645_PWR_FV2, 0x0);
3137                break;
3138
3139        default:
3140                break;
3141        }
3142
3143        return 0;
3144}
3145
3146static void rt5645_enable_push_button_irq(struct snd_soc_component *component,
3147        bool enable)
3148{
3149        struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
3150
3151        if (enable) {
3152                snd_soc_dapm_force_enable_pin(dapm, "ADC L power");
3153                snd_soc_dapm_force_enable_pin(dapm, "ADC R power");
3154                snd_soc_dapm_sync(dapm);
3155
3156                snd_soc_component_update_bits(component, RT5650_4BTN_IL_CMD1, 0x3, 0x3);
3157                snd_soc_component_update_bits(component,
3158                                        RT5645_INT_IRQ_ST, 0x8, 0x8);
3159                snd_soc_component_update_bits(component,
3160                                        RT5650_4BTN_IL_CMD2, 0x8000, 0x8000);
3161                snd_soc_component_read32(component, RT5650_4BTN_IL_CMD1);
3162                pr_debug("%s read %x = %x\n", __func__, RT5650_4BTN_IL_CMD1,
3163                        snd_soc_component_read32(component, RT5650_4BTN_IL_CMD1));
3164        } else {
3165                snd_soc_component_update_bits(component, RT5650_4BTN_IL_CMD2, 0x8000, 0x0);
3166                snd_soc_component_update_bits(component, RT5645_INT_IRQ_ST, 0x8, 0x0);
3167
3168                snd_soc_dapm_disable_pin(dapm, "ADC L power");
3169                snd_soc_dapm_disable_pin(dapm, "ADC R power");
3170                snd_soc_dapm_sync(dapm);
3171        }
3172}
3173
3174static int rt5645_jack_detect(struct snd_soc_component *component, int jack_insert)
3175{
3176        struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
3177        struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3178        unsigned int val;
3179
3180        if (jack_insert) {
3181                regmap_write(rt5645->regmap, RT5645_CHARGE_PUMP, 0x0e06);
3182
3183                /* for jack type detect */
3184                snd_soc_dapm_force_enable_pin(dapm, "LDO2");
3185                snd_soc_dapm_force_enable_pin(dapm, "Mic Det Power");
3186                snd_soc_dapm_sync(dapm);
3187                if (!dapm->card->instantiated) {
3188                        /* Power up necessary bits for JD if dapm is
3189                           not ready yet */
3190                        regmap_update_bits(rt5645->regmap, RT5645_PWR_ANLG1,
3191                                RT5645_PWR_MB | RT5645_PWR_VREF2,
3192                                RT5645_PWR_MB | RT5645_PWR_VREF2);
3193                        regmap_update_bits(rt5645->regmap, RT5645_PWR_MIXER,
3194                                RT5645_PWR_LDO2, RT5645_PWR_LDO2);
3195                        regmap_update_bits(rt5645->regmap, RT5645_PWR_VOL,
3196                                RT5645_PWR_MIC_DET, RT5645_PWR_MIC_DET);
3197                }
3198
3199                regmap_write(rt5645->regmap, RT5645_JD_CTRL3, 0x00f0);
3200                regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2,
3201                        RT5645_CBJ_MN_JD, RT5645_CBJ_MN_JD);
3202                regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1,
3203                        RT5645_CBJ_BST1_EN, RT5645_CBJ_BST1_EN);
3204                msleep(100);
3205                regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2,
3206                        RT5645_CBJ_MN_JD, 0);
3207
3208                msleep(600);
3209                regmap_read(rt5645->regmap, RT5645_IN1_CTRL3, &val);
3210                val &= 0x7;
3211                dev_dbg(component->dev, "val = %d\n", val);
3212
3213                if (val == 1 || val == 2) {
3214                        rt5645->jack_type = SND_JACK_HEADSET;
3215                        if (rt5645->en_button_func) {
3216                                rt5645_enable_push_button_irq(component, true);
3217                        }
3218                } else {
3219                        snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
3220                        snd_soc_dapm_sync(dapm);
3221                        rt5645->jack_type = SND_JACK_HEADPHONE;
3222                }
3223                if (rt5645->pdata.level_trigger_irq)
3224                        regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
3225                                RT5645_JD_1_1_MASK, RT5645_JD_1_1_NOR);
3226        } else { /* jack out */
3227                rt5645->jack_type = 0;
3228
3229                regmap_update_bits(rt5645->regmap, RT5645_HP_VOL,
3230                        RT5645_L_MUTE | RT5645_R_MUTE,
3231                        RT5645_L_MUTE | RT5645_R_MUTE);
3232                regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2,
3233                        RT5645_CBJ_MN_JD, RT5645_CBJ_MN_JD);
3234                regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1,
3235                        RT5645_CBJ_BST1_EN, 0);
3236
3237                if (rt5645->en_button_func)
3238                        rt5645_enable_push_button_irq(component, false);
3239
3240                if (rt5645->pdata.jd_mode == 0)
3241                        snd_soc_dapm_disable_pin(dapm, "LDO2");
3242                snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
3243                snd_soc_dapm_sync(dapm);
3244                if (rt5645->pdata.level_trigger_irq)
3245                        regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
3246                                RT5645_JD_1_1_MASK, RT5645_JD_1_1_INV);
3247        }
3248
3249        return rt5645->jack_type;
3250}
3251
3252static int rt5645_button_detect(struct snd_soc_component *component)
3253{
3254        int btn_type, val;
3255
3256        val = snd_soc_component_read32(component, RT5650_4BTN_IL_CMD1);
3257        pr_debug("val=0x%x\n", val);
3258        btn_type = val & 0xfff0;
3259        snd_soc_component_write(component, RT5650_4BTN_IL_CMD1, val);
3260
3261        return btn_type;
3262}
3263
3264static irqreturn_t rt5645_irq(int irq, void *data);
3265
3266int rt5645_set_jack_detect(struct snd_soc_component *component,
3267        struct snd_soc_jack *hp_jack, struct snd_soc_jack *mic_jack,
3268        struct snd_soc_jack *btn_jack)
3269{
3270        struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3271
3272        rt5645->hp_jack = hp_jack;
3273        rt5645->mic_jack = mic_jack;
3274        rt5645->btn_jack = btn_jack;
3275        if (rt5645->btn_jack && rt5645->codec_type == CODEC_TYPE_RT5650) {
3276                rt5645->en_button_func = true;
3277                regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3278                                RT5645_GP1_PIN_IRQ, RT5645_GP1_PIN_IRQ);
3279                regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL1,
3280                                RT5645_DIG_GATE_CTRL, RT5645_DIG_GATE_CTRL);
3281        }
3282        rt5645_irq(0, rt5645);
3283
3284        return 0;
3285}
3286EXPORT_SYMBOL_GPL(rt5645_set_jack_detect);
3287
3288static void rt5645_jack_detect_work(struct work_struct *work)
3289{
3290        struct rt5645_priv *rt5645 =
3291                container_of(work, struct rt5645_priv, jack_detect_work.work);
3292        int val, btn_type, gpio_state = 0, report = 0;
3293
3294        if (!rt5645->component)
3295                return;
3296
3297        switch (rt5645->pdata.jd_mode) {
3298        case 0: /* Not using rt5645 JD */
3299                if (rt5645->gpiod_hp_det) {
3300                        gpio_state = gpiod_get_value(rt5645->gpiod_hp_det);
3301                        dev_dbg(rt5645->component->dev, "gpio_state = %d\n",
3302                                gpio_state);
3303                        report = rt5645_jack_detect(rt5645->component, gpio_state);
3304                }
3305                snd_soc_jack_report(rt5645->hp_jack,
3306                                    report, SND_JACK_HEADPHONE);
3307                snd_soc_jack_report(rt5645->mic_jack,
3308                                    report, SND_JACK_MICROPHONE);
3309                return;
3310        default: /* read rt5645 jd1_1 status */
3311                val = snd_soc_component_read32(rt5645->component, RT5645_INT_IRQ_ST) & 0x1000;
3312                break;
3313
3314        }
3315
3316        if (!val && (rt5645->jack_type == 0)) { /* jack in */
3317                report = rt5645_jack_detect(rt5645->component, 1);
3318        } else if (!val && rt5645->jack_type != 0) {
3319                /* for push button and jack out */
3320                btn_type = 0;
3321                if (snd_soc_component_read32(rt5645->component, RT5645_INT_IRQ_ST) & 0x4) {
3322                        /* button pressed */
3323                        report = SND_JACK_HEADSET;
3324                        btn_type = rt5645_button_detect(rt5645->component);
3325                        /* rt5650 can report three kinds of button behavior,
3326                           one click, double click and hold. However,
3327                           currently we will report button pressed/released
3328                           event. So all the three button behaviors are
3329                           treated as button pressed. */
3330                        switch (btn_type) {
3331                        case 0x8000:
3332                        case 0x4000:
3333                        case 0x2000:
3334                                report |= SND_JACK_BTN_0;
3335                                break;
3336                        case 0x1000:
3337                        case 0x0800:
3338                        case 0x0400:
3339                                report |= SND_JACK_BTN_1;
3340                                break;
3341                        case 0x0200:
3342                        case 0x0100:
3343                        case 0x0080:
3344                                report |= SND_JACK_BTN_2;
3345                                break;
3346                        case 0x0040:
3347                        case 0x0020:
3348                        case 0x0010:
3349                                report |= SND_JACK_BTN_3;
3350                                break;
3351                        case 0x0000: /* unpressed */
3352                                break;
3353                        default:
3354                                dev_err(rt5645->component->dev,
3355                                        "Unexpected button code 0x%04x\n",
3356                                        btn_type);
3357                                break;
3358                        }
3359                }
3360                if (btn_type == 0)/* button release */
3361                        report =  rt5645->jack_type;
3362                else {
3363                        mod_timer(&rt5645->btn_check_timer,
3364                                msecs_to_jiffies(100));
3365                }
3366        } else {
3367                /* jack out */
3368                report = 0;
3369                snd_soc_component_update_bits(rt5645->component,
3370                                    RT5645_INT_IRQ_ST, 0x1, 0x0);
3371                rt5645_jack_detect(rt5645->component, 0);
3372        }
3373
3374        snd_soc_jack_report(rt5645->hp_jack, report, SND_JACK_HEADPHONE);
3375        snd_soc_jack_report(rt5645->mic_jack, report, SND_JACK_MICROPHONE);
3376        if (rt5645->en_button_func)
3377                snd_soc_jack_report(rt5645->btn_jack,
3378                        report, SND_JACK_BTN_0 | SND_JACK_BTN_1 |
3379                                SND_JACK_BTN_2 | SND_JACK_BTN_3);
3380}
3381
3382static void rt5645_rcclock_work(struct work_struct *work)
3383{
3384        struct rt5645_priv *rt5645 =
3385                container_of(work, struct rt5645_priv, rcclock_work.work);
3386
3387        regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
3388                RT5645_PWR_CLK25M_MASK, RT5645_PWR_CLK25M_PD);
3389}
3390
3391static irqreturn_t rt5645_irq(int irq, void *data)
3392{
3393        struct rt5645_priv *rt5645 = data;
3394
3395        queue_delayed_work(system_power_efficient_wq,
3396                           &rt5645->jack_detect_work, msecs_to_jiffies(250));
3397
3398        return IRQ_HANDLED;
3399}
3400
3401static void rt5645_btn_check_callback(struct timer_list *t)
3402{
3403        struct rt5645_priv *rt5645 = from_timer(rt5645, t, btn_check_timer);
3404
3405        queue_delayed_work(system_power_efficient_wq,
3406                   &rt5645->jack_detect_work, msecs_to_jiffies(5));
3407}
3408
3409static int rt5645_probe(struct snd_soc_component *component)
3410{
3411        struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
3412        struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3413
3414        rt5645->component = component;
3415
3416        switch (rt5645->codec_type) {
3417        case CODEC_TYPE_RT5645:
3418                snd_soc_dapm_new_controls(dapm,
3419                        rt5645_specific_dapm_widgets,
3420                        ARRAY_SIZE(rt5645_specific_dapm_widgets));
3421                snd_soc_dapm_add_routes(dapm,
3422                        rt5645_specific_dapm_routes,
3423                        ARRAY_SIZE(rt5645_specific_dapm_routes));
3424                if (rt5645->v_id < 3) {
3425                        snd_soc_dapm_add_routes(dapm,
3426                                rt5645_old_dapm_routes,
3427                                ARRAY_SIZE(rt5645_old_dapm_routes));
3428                }
3429                break;
3430        case CODEC_TYPE_RT5650:
3431                snd_soc_dapm_new_controls(dapm,
3432                        rt5650_specific_dapm_widgets,
3433                        ARRAY_SIZE(rt5650_specific_dapm_widgets));
3434                snd_soc_dapm_add_routes(dapm,
3435                        rt5650_specific_dapm_routes,
3436                        ARRAY_SIZE(rt5650_specific_dapm_routes));
3437                break;
3438        }
3439
3440        snd_soc_component_force_bias_level(component, SND_SOC_BIAS_OFF);
3441
3442        /* for JD function */
3443        if (rt5645->pdata.jd_mode) {
3444                snd_soc_dapm_force_enable_pin(dapm, "JD Power");
3445                snd_soc_dapm_force_enable_pin(dapm, "LDO2");
3446                snd_soc_dapm_sync(dapm);
3447        }
3448
3449        if (rt5645->pdata.long_name)
3450                component->card->long_name = rt5645->pdata.long_name;
3451
3452        rt5645->eq_param = devm_kzalloc(component->dev,
3453                RT5645_HWEQ_NUM * sizeof(struct rt5645_eq_param_s), GFP_KERNEL);
3454
3455        return 0;
3456}
3457
3458static void rt5645_remove(struct snd_soc_component *component)
3459{
3460        rt5645_reset(component);
3461}
3462
3463#ifdef CONFIG_PM
3464static int rt5645_suspend(struct snd_soc_component *component)
3465{
3466        struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3467
3468        regcache_cache_only(rt5645->regmap, true);
3469        regcache_mark_dirty(rt5645->regmap);
3470
3471        return 0;
3472}
3473
3474static int rt5645_resume(struct snd_soc_component *component)
3475{
3476        struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3477
3478        regcache_cache_only(rt5645->regmap, false);
3479        regcache_sync(rt5645->regmap);
3480
3481        return 0;
3482}
3483#else
3484#define rt5645_suspend NULL
3485#define rt5645_resume NULL
3486#endif
3487
3488#define RT5645_STEREO_RATES SNDRV_PCM_RATE_8000_96000
3489#define RT5645_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
3490                        SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
3491
3492static const struct snd_soc_dai_ops rt5645_aif_dai_ops = {
3493        .hw_params = rt5645_hw_params,
3494        .set_fmt = rt5645_set_dai_fmt,
3495        .set_sysclk = rt5645_set_dai_sysclk,
3496        .set_tdm_slot = rt5645_set_tdm_slot,
3497        .set_pll = rt5645_set_dai_pll,
3498};
3499
3500static struct snd_soc_dai_driver rt5645_dai[] = {
3501        {
3502                .name = "rt5645-aif1",
3503                .id = RT5645_AIF1,
3504                .playback = {
3505                        .stream_name = "AIF1 Playback",
3506                        .channels_min = 1,
3507                        .channels_max = 2,
3508                        .rates = RT5645_STEREO_RATES,
3509                        .formats = RT5645_FORMATS,
3510                },
3511                .capture = {
3512                        .stream_name = "AIF1 Capture",
3513                        .channels_min = 1,
3514                        .channels_max = 4,
3515                        .rates = RT5645_STEREO_RATES,
3516                        .formats = RT5645_FORMATS,
3517                },
3518                .ops = &rt5645_aif_dai_ops,
3519        },
3520        {
3521                .name = "rt5645-aif2",
3522                .id = RT5645_AIF2,
3523                .playback = {
3524                        .stream_name = "AIF2 Playback",
3525                        .channels_min = 1,
3526                        .channels_max = 2,
3527                        .rates = RT5645_STEREO_RATES,
3528                        .formats = RT5645_FORMATS,
3529                },
3530                .capture = {
3531                        .stream_name = "AIF2 Capture",
3532                        .channels_min = 1,
3533                        .channels_max = 2,
3534                        .rates = RT5645_STEREO_RATES,
3535                        .formats = RT5645_FORMATS,
3536                },
3537                .ops = &rt5645_aif_dai_ops,
3538        },
3539};
3540
3541static const struct snd_soc_component_driver soc_component_dev_rt5645 = {
3542        .probe                  = rt5645_probe,
3543        .remove                 = rt5645_remove,
3544        .suspend                = rt5645_suspend,
3545        .resume                 = rt5645_resume,
3546        .set_bias_level         = rt5645_set_bias_level,
3547        .controls               = rt5645_snd_controls,
3548        .num_controls           = ARRAY_SIZE(rt5645_snd_controls),
3549        .dapm_widgets           = rt5645_dapm_widgets,
3550        .num_dapm_widgets       = ARRAY_SIZE(rt5645_dapm_widgets),
3551        .dapm_routes            = rt5645_dapm_routes,
3552        .num_dapm_routes        = ARRAY_SIZE(rt5645_dapm_routes),
3553        .use_pmdown_time        = 1,
3554        .endianness             = 1,
3555        .non_legacy_dai_naming  = 1,
3556};
3557
3558static const struct regmap_config rt5645_regmap = {
3559        .reg_bits = 8,
3560        .val_bits = 16,
3561        .use_single_rw = true,
3562        .max_register = RT5645_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5645_ranges) *
3563                                               RT5645_PR_SPACING),
3564        .volatile_reg = rt5645_volatile_register,
3565        .readable_reg = rt5645_readable_register,
3566
3567        .cache_type = REGCACHE_RBTREE,
3568        .reg_defaults = rt5645_reg,
3569        .num_reg_defaults = ARRAY_SIZE(rt5645_reg),
3570        .ranges = rt5645_ranges,
3571        .num_ranges = ARRAY_SIZE(rt5645_ranges),
3572};
3573
3574static const struct regmap_config rt5650_regmap = {
3575        .reg_bits = 8,
3576        .val_bits = 16,
3577        .use_single_rw = true,
3578        .max_register = RT5645_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5645_ranges) *
3579                                               RT5645_PR_SPACING),
3580        .volatile_reg = rt5645_volatile_register,
3581        .readable_reg = rt5645_readable_register,
3582
3583        .cache_type = REGCACHE_RBTREE,
3584        .reg_defaults = rt5650_reg,
3585        .num_reg_defaults = ARRAY_SIZE(rt5650_reg),
3586        .ranges = rt5645_ranges,
3587        .num_ranges = ARRAY_SIZE(rt5645_ranges),
3588};
3589
3590static const struct regmap_config temp_regmap = {
3591        .name="nocache",
3592        .reg_bits = 8,
3593        .val_bits = 16,
3594        .use_single_rw = true,
3595        .max_register = RT5645_VENDOR_ID2 + 1,
3596        .cache_type = REGCACHE_NONE,
3597};
3598
3599static const struct i2c_device_id rt5645_i2c_id[] = {
3600        { "rt5645", 0 },
3601        { "rt5650", 0 },
3602        { }
3603};
3604MODULE_DEVICE_TABLE(i2c, rt5645_i2c_id);
3605
3606#ifdef CONFIG_OF
3607static const struct of_device_id rt5645_of_match[] = {
3608        { .compatible = "realtek,rt5645", },
3609        { .compatible = "realtek,rt5650", },
3610        { }
3611};
3612MODULE_DEVICE_TABLE(of, rt5645_of_match);
3613#endif
3614
3615#ifdef CONFIG_ACPI
3616static const struct acpi_device_id rt5645_acpi_match[] = {
3617        { "10EC5645", 0 },
3618        { "10EC5648", 0 },
3619        { "10EC5650", 0 },
3620        { "10EC5640", 0 },
3621        { "10EC3270", 0 },
3622        {},
3623};
3624MODULE_DEVICE_TABLE(acpi, rt5645_acpi_match);
3625#endif
3626
3627static const struct rt5645_platform_data intel_braswell_platform_data = {
3628        .dmic1_data_pin = RT5645_DMIC1_DISABLE,
3629        .dmic2_data_pin = RT5645_DMIC_DATA_IN2P,
3630        .jd_mode = 3,
3631};
3632
3633static const struct rt5645_platform_data buddy_platform_data = {
3634        .dmic1_data_pin = RT5645_DMIC_DATA_GPIO5,
3635        .dmic2_data_pin = RT5645_DMIC_DATA_IN2P,
3636        .jd_mode = 3,
3637        .level_trigger_irq = true,
3638};
3639
3640static const struct rt5645_platform_data gpd_win_platform_data = {
3641        .jd_mode = 3,
3642        .inv_jd1_1 = true,
3643        .long_name = "gpd-win-pocket-rt5645",
3644        /* The GPD pocket has a diff. mic, for the win this does not matter. */
3645        .in2_diff = true,
3646};
3647
3648static const struct rt5645_platform_data asus_t100ha_platform_data = {
3649        .dmic1_data_pin = RT5645_DMIC_DATA_IN2N,
3650        .dmic2_data_pin = RT5645_DMIC2_DISABLE,
3651        .jd_mode = 3,
3652        .inv_jd1_1 = true,
3653};
3654
3655static const struct rt5645_platform_data jd_mode3_platform_data = {
3656        .jd_mode = 3,
3657};
3658
3659static const struct dmi_system_id dmi_platform_data[] = {
3660        {
3661                .ident = "Chrome Buddy",
3662                .matches = {
3663                        DMI_MATCH(DMI_PRODUCT_NAME, "Buddy"),
3664                },
3665                .driver_data = (void *)&buddy_platform_data,
3666        },
3667        {
3668                .ident = "Intel Strago",
3669                .matches = {
3670                        DMI_MATCH(DMI_PRODUCT_NAME, "Strago"),
3671                },
3672                .driver_data = (void *)&intel_braswell_platform_data,
3673        },
3674        {
3675                .ident = "Google Chrome",
3676                .matches = {
3677                        DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
3678                },
3679                .driver_data = (void *)&intel_braswell_platform_data,
3680        },
3681        {
3682                .ident = "Google Setzer",
3683                .matches = {
3684                        DMI_MATCH(DMI_PRODUCT_NAME, "Setzer"),
3685                },
3686                .driver_data = (void *)&intel_braswell_platform_data,
3687        },
3688        {
3689                .ident = "Microsoft Surface 3",
3690                .matches = {
3691                        DMI_MATCH(DMI_PRODUCT_NAME, "Surface 3"),
3692                },
3693                .driver_data = (void *)&intel_braswell_platform_data,
3694        },
3695        {
3696                /*
3697                 * Match for the GPDwin which unfortunately uses somewhat
3698                 * generic dmi strings, which is why we test for 4 strings.
3699                 * Comparing against 23 other byt/cht boards, board_vendor
3700                 * and board_name are unique to the GPDwin, where as only one
3701                 * other board has the same board_serial and 3 others have
3702                 * the same default product_name. Also the GPDwin is the
3703                 * only device to have both board_ and product_name not set.
3704                 */
3705                .ident = "GPD Win / Pocket",
3706                .matches = {
3707                        DMI_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"),
3708                        DMI_MATCH(DMI_BOARD_NAME, "Default string"),
3709                        DMI_MATCH(DMI_BOARD_SERIAL, "Default string"),
3710                        DMI_MATCH(DMI_PRODUCT_NAME, "Default string"),
3711                },
3712                .driver_data = (void *)&gpd_win_platform_data,
3713        },
3714        {
3715                .ident = "ASUS T100HAN",
3716                .matches = {
3717                        DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
3718                        DMI_MATCH(DMI_PRODUCT_NAME, "T100HAN"),
3719                },
3720                .driver_data = (void *)&asus_t100ha_platform_data,
3721        },
3722        {
3723                .ident = "MINIX Z83-4",
3724                .matches = {
3725                        DMI_EXACT_MATCH(DMI_SYS_VENDOR, "MINIX"),
3726                        DMI_MATCH(DMI_PRODUCT_NAME, "Z83-4"),
3727                },
3728                .driver_data = (void *)&jd_mode3_platform_data,
3729        },
3730        {
3731                .ident = "Teclast X80 Pro",
3732                .matches = {
3733                        DMI_MATCH(DMI_SYS_VENDOR, "TECLAST"),
3734                        DMI_MATCH(DMI_PRODUCT_NAME, "X80 Pro"),
3735                },
3736                .driver_data = (void *)&jd_mode3_platform_data,
3737        },
3738        { }
3739};
3740
3741static bool rt5645_check_dp(struct device *dev)
3742{
3743        if (device_property_present(dev, "realtek,in2-differential") ||
3744            device_property_present(dev, "realtek,dmic1-data-pin") ||
3745            device_property_present(dev, "realtek,dmic2-data-pin") ||
3746            device_property_present(dev, "realtek,jd-mode"))
3747                return true;
3748
3749        return false;
3750}
3751
3752static int rt5645_parse_dt(struct rt5645_priv *rt5645, struct device *dev)
3753{
3754        rt5645->pdata.in2_diff = device_property_read_bool(dev,
3755                "realtek,in2-differential");
3756        device_property_read_u32(dev,
3757                "realtek,dmic1-data-pin", &rt5645->pdata.dmic1_data_pin);
3758        device_property_read_u32(dev,
3759                "realtek,dmic2-data-pin", &rt5645->pdata.dmic2_data_pin);
3760        device_property_read_u32(dev,
3761                "realtek,jd-mode", &rt5645->pdata.jd_mode);
3762
3763        return 0;
3764}
3765
3766static int rt5645_i2c_probe(struct i2c_client *i2c,
3767                    const struct i2c_device_id *id)
3768{
3769        struct rt5645_platform_data *pdata = dev_get_platdata(&i2c->dev);
3770        const struct dmi_system_id *dmi_data;
3771        struct rt5645_priv *rt5645;
3772        int ret, i;
3773        unsigned int val;
3774        struct regmap *regmap;
3775
3776        rt5645 = devm_kzalloc(&i2c->dev, sizeof(struct rt5645_priv),
3777                                GFP_KERNEL);
3778        if (rt5645 == NULL)
3779                return -ENOMEM;
3780
3781        rt5645->i2c = i2c;
3782        i2c_set_clientdata(i2c, rt5645);
3783
3784        dmi_data = dmi_first_match(dmi_platform_data);
3785        if (dmi_data) {
3786                dev_info(&i2c->dev, "Detected %s platform\n", dmi_data->ident);
3787                pdata = dmi_data->driver_data;
3788        }
3789
3790        if (pdata)
3791                rt5645->pdata = *pdata;
3792        else if (rt5645_check_dp(&i2c->dev))
3793                rt5645_parse_dt(rt5645, &i2c->dev);
3794        else
3795                rt5645->pdata = jd_mode3_platform_data;
3796
3797        if (quirk != -1) {
3798                rt5645->pdata.in2_diff = QUIRK_IN2_DIFF(quirk);
3799                rt5645->pdata.level_trigger_irq = QUIRK_LEVEL_IRQ(quirk);
3800                rt5645->pdata.inv_jd1_1 = QUIRK_INV_JD1_1(quirk);
3801                rt5645->pdata.jd_mode = QUIRK_JD_MODE(quirk);
3802                rt5645->pdata.dmic1_data_pin = QUIRK_DMIC1_DATA_PIN(quirk);
3803                rt5645->pdata.dmic2_data_pin = QUIRK_DMIC2_DATA_PIN(quirk);
3804        }
3805
3806        rt5645->gpiod_hp_det = devm_gpiod_get_optional(&i2c->dev, "hp-detect",
3807                                                       GPIOD_IN);
3808
3809        if (IS_ERR(rt5645->gpiod_hp_det)) {
3810                dev_info(&i2c->dev, "failed to initialize gpiod\n");
3811                ret = PTR_ERR(rt5645->gpiod_hp_det);
3812                /*
3813                 * Continue if optional gpiod is missing, bail for all other
3814                 * errors, including -EPROBE_DEFER
3815                 */
3816                if (ret != -ENOENT)
3817                        return ret;
3818        }
3819
3820        for (i = 0; i < ARRAY_SIZE(rt5645->supplies); i++)
3821                rt5645->supplies[i].supply = rt5645_supply_names[i];
3822
3823        ret = devm_regulator_bulk_get(&i2c->dev,
3824                                      ARRAY_SIZE(rt5645->supplies),
3825                                      rt5645->supplies);
3826        if (ret) {
3827                dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret);
3828                return ret;
3829        }
3830
3831        ret = regulator_bulk_enable(ARRAY_SIZE(rt5645->supplies),
3832                                    rt5645->supplies);
3833        if (ret) {
3834                dev_err(&i2c->dev, "Failed to enable supplies: %d\n", ret);
3835                return ret;
3836        }
3837
3838        regmap = devm_regmap_init_i2c(i2c, &temp_regmap);
3839        if (IS_ERR(regmap)) {
3840                ret = PTR_ERR(regmap);
3841                dev_err(&i2c->dev, "Failed to allocate temp register map: %d\n",
3842                        ret);
3843                return ret;
3844        }
3845
3846        /*
3847         * Read after 400msec, as it is the interval required between
3848         * read and power On.
3849         */
3850        msleep(TIME_TO_POWER_MS);
3851        regmap_read(regmap, RT5645_VENDOR_ID2, &val);
3852
3853        switch (val) {
3854        case RT5645_DEVICE_ID:
3855                rt5645->regmap = devm_regmap_init_i2c(i2c, &rt5645_regmap);
3856                rt5645->codec_type = CODEC_TYPE_RT5645;
3857                break;
3858        case RT5650_DEVICE_ID:
3859                rt5645->regmap = devm_regmap_init_i2c(i2c, &rt5650_regmap);
3860                rt5645->codec_type = CODEC_TYPE_RT5650;
3861                break;
3862        default:
3863                dev_err(&i2c->dev,
3864                        "Device with ID register %#x is not rt5645 or rt5650\n",
3865                        val);
3866                ret = -ENODEV;
3867                goto err_enable;
3868        }
3869
3870        if (IS_ERR(rt5645->regmap)) {
3871                ret = PTR_ERR(rt5645->regmap);
3872                dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
3873                        ret);
3874                return ret;
3875        }
3876
3877        regmap_write(rt5645->regmap, RT5645_RESET, 0);
3878
3879        regmap_read(regmap, RT5645_VENDOR_ID, &val);
3880        rt5645->v_id = val & 0xff;
3881
3882        regmap_write(rt5645->regmap, RT5645_AD_DA_MIXER, 0x8080);
3883
3884        ret = regmap_register_patch(rt5645->regmap, init_list,
3885                                    ARRAY_SIZE(init_list));
3886        if (ret != 0)
3887                dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
3888
3889        if (rt5645->codec_type == CODEC_TYPE_RT5650) {
3890                ret = regmap_register_patch(rt5645->regmap, rt5650_init_list,
3891                                    ARRAY_SIZE(rt5650_init_list));
3892                if (ret != 0)
3893                        dev_warn(&i2c->dev, "Apply rt5650 patch failed: %d\n",
3894                                           ret);
3895        }
3896
3897        regmap_update_bits(rt5645->regmap, RT5645_CLSD_OUT_CTRL, 0xc0, 0xc0);
3898
3899        if (rt5645->pdata.in2_diff)
3900                regmap_update_bits(rt5645->regmap, RT5645_IN2_CTRL,
3901                                        RT5645_IN_DF2, RT5645_IN_DF2);
3902
3903        if (rt5645->pdata.dmic1_data_pin || rt5645->pdata.dmic2_data_pin) {
3904                regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3905                        RT5645_GP2_PIN_MASK, RT5645_GP2_PIN_DMIC1_SCL);
3906        }
3907        switch (rt5645->pdata.dmic1_data_pin) {
3908        case RT5645_DMIC_DATA_IN2N:
3909                regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3910                        RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_IN2N);
3911                break;
3912
3913        case RT5645_DMIC_DATA_GPIO5:
3914                regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3915                        RT5645_I2S2_DAC_PIN_MASK, RT5645_I2S2_DAC_PIN_GPIO);
3916                regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3917                        RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO5);
3918                regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3919                        RT5645_GP5_PIN_MASK, RT5645_GP5_PIN_DMIC1_SDA);
3920                break;
3921
3922        case RT5645_DMIC_DATA_GPIO11:
3923                regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3924                        RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO11);
3925                regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3926                        RT5645_GP11_PIN_MASK,
3927                        RT5645_GP11_PIN_DMIC1_SDA);
3928                break;
3929
3930        default:
3931                break;
3932        }
3933
3934        switch (rt5645->pdata.dmic2_data_pin) {
3935        case RT5645_DMIC_DATA_IN2P:
3936                regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3937                        RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_IN2P);
3938                break;
3939
3940        case RT5645_DMIC_DATA_GPIO6:
3941                regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3942                        RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO6);
3943                regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3944                        RT5645_GP6_PIN_MASK, RT5645_GP6_PIN_DMIC2_SDA);
3945                break;
3946
3947        case RT5645_DMIC_DATA_GPIO10:
3948                regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3949                        RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO10);
3950                regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3951                        RT5645_GP10_PIN_MASK,
3952                        RT5645_GP10_PIN_DMIC2_SDA);
3953                break;
3954
3955        case RT5645_DMIC_DATA_GPIO12:
3956                regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3957                        RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO12);
3958                regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3959                        RT5645_GP12_PIN_MASK,
3960                        RT5645_GP12_PIN_DMIC2_SDA);
3961                break;
3962
3963        default:
3964                break;
3965        }
3966
3967        if (rt5645->pdata.jd_mode) {
3968                regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3,
3969                                   RT5645_IRQ_CLK_GATE_CTRL,
3970                                   RT5645_IRQ_CLK_GATE_CTRL);
3971                regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
3972                                   RT5645_IRQ_CLK_INT, RT5645_IRQ_CLK_INT);
3973                regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
3974                                   RT5645_IRQ_JD_1_1_EN, RT5645_IRQ_JD_1_1_EN);
3975                regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3,
3976                                   RT5645_JD_PSV_MODE, RT5645_JD_PSV_MODE);
3977                regmap_update_bits(rt5645->regmap, RT5645_HPO_MIXER,
3978                                   RT5645_IRQ_PSV_MODE, RT5645_IRQ_PSV_MODE);
3979                regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
3980                                   RT5645_MIC2_OVCD_EN, RT5645_MIC2_OVCD_EN);
3981                regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3982                                   RT5645_GP1_PIN_IRQ, RT5645_GP1_PIN_IRQ);
3983                switch (rt5645->pdata.jd_mode) {
3984                case 1:
3985                        regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
3986                                           RT5645_JD1_MODE_MASK,
3987                                           RT5645_JD1_MODE_0);
3988                        break;
3989                case 2:
3990                        regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
3991                                           RT5645_JD1_MODE_MASK,
3992                                           RT5645_JD1_MODE_1);
3993                        break;
3994                case 3:
3995                        regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
3996                                           RT5645_JD1_MODE_MASK,
3997                                           RT5645_JD1_MODE_2);
3998                        break;
3999                default:
4000                        break;

4001                }
4002                if (rt5645->pdata.inv_jd1_1) {
4003                        regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
4004                                RT5645_JD_1_1_MASK, RT5645_JD_1_1_INV);
4005                }
4006        }
4007
4008        regmap_update_bits(rt5645->regmap, RT5645_ADDA_CLK1,
4009                RT5645_I2S_PD1_MASK, RT5645_I2S_PD1_2);
4010
4011        if (rt5645->pdata.level_trigger_irq) {
4012                regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
4013                        RT5645_JD_1_1_MASK, RT5645_JD_1_1_INV);
4014        }
4015        timer_setup(&rt5645->btn_check_timer, rt5645_btn_check_callback, 0);
4016
4017        INIT_DELAYED_WORK(&rt5645->jack_detect_work, rt5645_jack_detect_work);
4018        INIT_DELAYED_WORK(&rt5645->rcclock_work, rt5645_rcclock_work);
4019
4020        if (rt5645->i2c->irq) {
4021                ret = request_threaded_irq(rt5645->i2c->irq, NULL, rt5645_irq,
4022                        IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING
4023                        | IRQF_ONESHOT, "rt5645", rt5645);
4024                if (ret) {
4025                        dev_err(&i2c->dev, "Failed to reguest IRQ: %d\n", ret);
4026                        goto err_enable;
4027                }
4028        }
4029
4030        ret = devm_snd_soc_register_component(&i2c->dev, &soc_component_dev_rt5645,
4031                                     rt5645_dai, ARRAY_SIZE(rt5645_dai));
4032        if (ret)
4033                goto err_irq;
4034
4035        return 0;
4036
4037err_irq:
4038        if (rt5645->i2c->irq)
4039                free_irq(rt5645->i2c->irq, rt5645);
4040err_enable:
4041        regulator_bulk_disable(ARRAY_SIZE(rt5645->supplies), rt5645->supplies);
4042        return ret;
4043}
4044
4045static int rt5645_i2c_remove(struct i2c_client *i2c)
4046{
4047        struct rt5645_priv *rt5645 = i2c_get_clientdata(i2c);
4048
4049        if (i2c->irq)
4050                free_irq(i2c->irq, rt5645);
4051
4052        cancel_delayed_work_sync(&rt5645->jack_detect_work);
4053        cancel_delayed_work_sync(&rt5645->rcclock_work);
4054        del_timer_sync(&rt5645->btn_check_timer);
4055
4056        regulator_bulk_disable(ARRAY_SIZE(rt5645->supplies), rt5645->supplies);
4057
4058        return 0;
4059}
4060
4061static void rt5645_i2c_shutdown(struct i2c_client *i2c)
4062{
4063        struct rt5645_priv *rt5645 = i2c_get_clientdata(i2c);
4064
4065        regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3,
4066                RT5645_RING2_SLEEVE_GND, RT5645_RING2_SLEEVE_GND);
4067        regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2, RT5645_CBJ_MN_JD,
4068                RT5645_CBJ_MN_JD);
4069        regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1, RT5645_CBJ_BST1_EN,
4070                0);
4071        msleep(20);
4072        regmap_write(rt5645->regmap, RT5645_RESET, 0);
4073}
4074
4075static struct i2c_driver rt5645_i2c_driver = {
4076        .driver = {
4077                .name = "rt5645",
4078                .of_match_table = of_match_ptr(rt5645_of_match),
4079                .acpi_match_table = ACPI_PTR(rt5645_acpi_match),
4080        },
4081        .probe = rt5645_i2c_probe,
4082        .remove = rt5645_i2c_remove,
4083        .shutdown = rt5645_i2c_shutdown,
4084        .id_table = rt5645_i2c_id,
4085};
4086module_i2c_driver(rt5645_i2c_driver);
4087
4088MODULE_DESCRIPTION("ASoC RT5645 driver");
4089MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
4090MODULE_LICENSE("GPL v2");
4091