LXR linux/sound/soc/intel/skylake/skl-sst-ipc.h

   1/*
   2 * Intel SKL IPC Support
   3 *
   4 * Copyright (C) 2014-15, Intel Corporation.
   5 *
   6 * This program is free software; you can redistribute it and/or modify
   7 * it under the terms of the GNU General Public License as version 2, as
   8 * published by the Free Software Foundation.
   9 *
  10 * This program is distributed in the hope that it will be useful, but
  11 * WITHOUT ANY WARRANTY; without even the implied warranty of
  12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  13 * General Public License for more details.
  14 */
  15
  16#ifndef __SKL_IPC_H
  17#define __SKL_IPC_H
  18
  19#include <linux/irqreturn.h>
  20#include "../common/sst-ipc.h"
  21
  22struct sst_dsp;
  23struct skl_sst;
  24struct sst_generic_ipc;
  25
  26enum skl_ipc_pipeline_state {
  27        PPL_INVALID_STATE =     0,
  28        PPL_UNINITIALIZED =     1,
  29        PPL_RESET =             2,
  30        PPL_PAUSED =            3,
  31        PPL_RUNNING =           4,
  32        PPL_ERROR_STOP =        5,
  33        PPL_SAVED =             6,
  34        PPL_RESTORED =          7
  35};
  36
  37struct skl_ipc_dxstate_info {
  38        u32 core_mask;
  39        u32 dx_mask;
  40};
  41
  42struct skl_ipc_header {
  43        u32 primary;
  44        u32 extension;
  45};
  46
  47struct skl_dsp_cores {
  48        unsigned int count;
  49        enum skl_dsp_states *state;
  50        int *usage_count;
  51};
  52
  53/**
  54 * skl_d0i3_data: skl D0i3 counters data struct
  55 *
  56 * @streaming: Count of usecases that can attempt streaming D0i3
  57 * @non_streaming: Count of usecases that can attempt non-streaming D0i3
  58 * @non_d0i3: Count of usecases that cannot attempt D0i3
  59 * @state: current state
  60 * @work: D0i3 worker thread
  61 */
  62struct skl_d0i3_data {
  63        int streaming;
  64        int non_streaming;
  65        int non_d0i3;
  66        enum skl_dsp_d0i3_states state;
  67        struct delayed_work work;
  68};
  69
  70#define SKL_LIB_NAME_LENGTH 128
  71#define SKL_MAX_LIB 16
  72
  73struct skl_lib_info {
  74        char name[SKL_LIB_NAME_LENGTH];
  75        const struct firmware *fw;
  76};
  77
  78struct skl_sst {
  79        struct device *dev;
  80        struct sst_dsp *dsp;
  81
  82        /* boot */
  83        wait_queue_head_t boot_wait;
  84        bool boot_complete;
  85
  86        /* module load */
  87        wait_queue_head_t mod_load_wait;
  88        bool mod_load_complete;
  89        bool mod_load_status;
  90
  91        /* IPC messaging */
  92        struct sst_generic_ipc ipc;
  93
  94        /* callback for miscbdge */
  95        void (*enable_miscbdcge)(struct device *dev, bool enable);
  96        /* Is CGCTL.MISCBDCGE disabled */
  97        bool miscbdcg_disabled;
  98
  99        /* Populate module information */
 100        struct list_head uuid_list;
 101
 102        /* Is firmware loaded */
 103        bool fw_loaded;
 104
 105        /* first boot ? */
 106        bool is_first_boot;
 107
 108        /* multi-core */
 109        struct skl_dsp_cores cores;
 110
 111        /* library info */
 112        struct skl_lib_info  lib_info[SKL_MAX_LIB];
 113        int lib_count;
 114
 115        /* Callback to update D0i3C register */
 116        void (*update_d0i3c)(struct device *dev, bool enable);
 117
 118        struct skl_d0i3_data d0i3;
 119
 120        const struct skl_dsp_ops *dsp_ops;
 121
 122        /* Callback to update dynamic clock and power gating registers */
 123        void (*clock_power_gating)(struct device *dev, bool enable);
 124};
 125
 126struct skl_ipc_init_instance_msg {
 127        u32 module_id;
 128        u32 instance_id;
 129        u16 param_data_size;
 130        u8 ppl_instance_id;
 131        u8 core_id;
 132        u8 domain;
 133};
 134
 135struct skl_ipc_bind_unbind_msg {
 136        u32 module_id;
 137        u32 instance_id;
 138        u32 dst_module_id;
 139        u32 dst_instance_id;
 140        u8 src_queue;
 141        u8 dst_queue;
 142        bool bind;
 143};
 144
 145struct skl_ipc_large_config_msg {
 146        u32 module_id;
 147        u32 instance_id;
 148        u32 large_param_id;
 149        u32 param_data_size;
 150};
 151
 152struct skl_ipc_d0ix_msg {
 153        u32 module_id;
 154        u32 instance_id;
 155        u8 streaming;
 156        u8 wake;
 157};
 158
 159#define SKL_IPC_BOOT_MSECS              3000
 160
 161#define SKL_IPC_D3_MASK 0
 162#define SKL_IPC_D0_MASK 3
 163
 164irqreturn_t skl_dsp_irq_thread_handler(int irq, void *context);
 165
 166int skl_ipc_create_pipeline(struct sst_generic_ipc *sst_ipc,
 167                u16 ppl_mem_size, u8 ppl_type, u8 instance_id, u8 lp_mode);
 168
 169int skl_ipc_delete_pipeline(struct sst_generic_ipc *sst_ipc, u8 instance_id);
 170
 171int skl_ipc_set_pipeline_state(struct sst_generic_ipc *sst_ipc,
 172                u8 instance_id, enum skl_ipc_pipeline_state state);
 173
 174int skl_ipc_save_pipeline(struct sst_generic_ipc *ipc,
 175                u8 instance_id, int dma_id);
 176
 177int skl_ipc_restore_pipeline(struct sst_generic_ipc *ipc, u8 instance_id);
 178
 179int skl_ipc_init_instance(struct sst_generic_ipc *sst_ipc,
 180                struct skl_ipc_init_instance_msg *msg, void *param_data);
 181
 182int skl_ipc_bind_unbind(struct sst_generic_ipc *sst_ipc,
 183                struct skl_ipc_bind_unbind_msg *msg);
 184
 185int skl_ipc_load_modules(struct sst_generic_ipc *ipc,
 186                                u8 module_cnt, void *data);
 187
 188int skl_ipc_unload_modules(struct sst_generic_ipc *ipc,
 189                                u8 module_cnt, void *data);
 190
 191int skl_ipc_set_dx(struct sst_generic_ipc *ipc,
 192                u8 instance_id, u16 module_id, struct skl_ipc_dxstate_info *dx);
 193
 194int skl_ipc_set_large_config(struct sst_generic_ipc *ipc,
 195                struct skl_ipc_large_config_msg *msg, u32 *param);
 196
 197int skl_ipc_get_large_config(struct sst_generic_ipc *ipc,
 198                struct skl_ipc_large_config_msg *msg, u32 *param);
 199
 200int skl_sst_ipc_load_library(struct sst_generic_ipc *ipc,
 201                        u8 dma_id, u8 table_id, bool wait);
 202
 203int skl_ipc_set_d0ix(struct sst_generic_ipc *ipc,
 204                struct skl_ipc_d0ix_msg *msg);
 205
 206int skl_ipc_check_D0i0(struct sst_dsp *dsp, bool state);
 207
 208void skl_ipc_int_enable(struct sst_dsp *dsp);
 209void skl_ipc_op_int_enable(struct sst_dsp *ctx);
 210void skl_ipc_op_int_disable(struct sst_dsp *ctx);
 211void skl_ipc_int_disable(struct sst_dsp *dsp);
 212
 213bool skl_ipc_int_status(struct sst_dsp *dsp);
 214void skl_ipc_free(struct sst_generic_ipc *ipc);
 215int skl_ipc_init(struct device *dev, struct skl_sst *skl);
 216void skl_clear_module_cnt(struct sst_dsp *ctx);
 217
 218void skl_ipc_process_reply(struct sst_generic_ipc *ipc,
 219                struct skl_ipc_header header);
 220int skl_ipc_process_notification(struct sst_generic_ipc *ipc,
 221                struct skl_ipc_header header);
 222void skl_ipc_tx_data_copy(struct ipc_message *msg, char *tx_data,
 223                size_t tx_size);
 224#endif /* __SKL_IPC_H */
 225