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13#include <dt-bindings/sound/samsung-i2s.h>
14#include <linux/delay.h>
15#include <linux/slab.h>
16#include <linux/clk.h>
17#include <linux/clk-provider.h>
18#include <linux/io.h>
19#include <linux/module.h>
20#include <linux/of.h>
21#include <linux/of_device.h>
22#include <linux/of_gpio.h>
23#include <linux/pm_runtime.h>
24
25#include <sound/soc.h>
26#include <sound/pcm_params.h>
27
28#include <linux/platform_data/asoc-s3c.h>
29
30#include "dma.h"
31#include "idma.h"
32#include "i2s.h"
33#include "i2s-regs.h"
34
35#define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
36
37struct samsung_i2s_variant_regs {
38 unsigned int bfs_off;
39 unsigned int rfs_off;
40 unsigned int sdf_off;
41 unsigned int txr_off;
42 unsigned int rclksrc_off;
43 unsigned int mss_off;
44 unsigned int cdclkcon_off;
45 unsigned int lrp_off;
46 unsigned int bfs_mask;
47 unsigned int rfs_mask;
48 unsigned int ftx0cnt_off;
49};
50
51struct samsung_i2s_dai_data {
52 u32 quirks;
53 unsigned int pcm_rates;
54 const struct samsung_i2s_variant_regs *i2s_variant_regs;
55};
56
57struct i2s_dai {
58
59 struct platform_device *pdev;
60
61 void __iomem *addr;
62
63 unsigned long rclk_srcrate;
64
65 unsigned frmclk;
66
67
68
69
70 unsigned rfs, bfs;
71
72 struct clk *clk;
73
74 struct clk *op_clk;
75
76 struct i2s_dai *pri_dai;
77
78 struct i2s_dai *sec_dai;
79#define DAI_OPENED (1 << 0)
80#define DAI_MANAGER (1 << 1)
81 unsigned mode;
82
83 struct snd_soc_dai_driver i2s_dai_drv;
84
85 struct snd_dmaengine_dai_dma_data dma_playback;
86 struct snd_dmaengine_dai_dma_data dma_capture;
87 struct snd_dmaengine_dai_dma_data idma_playback;
88 dma_filter_fn filter;
89 u32 quirks;
90 u32 suspend_i2smod;
91 u32 suspend_i2scon;
92 u32 suspend_i2spsr;
93 const struct samsung_i2s_variant_regs *variant_regs;
94
95
96 spinlock_t spinlock;
97 spinlock_t *lock;
98
99
100 struct clk *clk_table[3];
101 struct clk_onecell_data clk_data;
102};
103
104
105static DEFINE_SPINLOCK(lock);
106
107
108static inline bool is_secondary(struct i2s_dai *i2s)
109{
110 return i2s->pri_dai ? true : false;
111}
112
113
114static inline bool is_slave(struct i2s_dai *i2s)
115{
116 u32 mod = readl(i2s->addr + I2SMOD);
117 return (mod & (1 << i2s->variant_regs->mss_off)) ? true : false;
118}
119
120
121static inline bool tx_active(struct i2s_dai *i2s)
122{
123 u32 active;
124
125 if (!i2s)
126 return false;
127
128 active = readl(i2s->addr + I2SCON);
129
130 if (is_secondary(i2s))
131 active &= CON_TXSDMA_ACTIVE;
132 else
133 active &= CON_TXDMA_ACTIVE;
134
135 return active ? true : false;
136}
137
138
139static inline struct i2s_dai *get_other_dai(struct i2s_dai *i2s)
140{
141 return i2s->pri_dai ? : i2s->sec_dai;
142}
143
144
145static inline bool other_tx_active(struct i2s_dai *i2s)
146{
147 struct i2s_dai *other = get_other_dai(i2s);
148
149 return tx_active(other);
150}
151
152
153static inline bool any_tx_active(struct i2s_dai *i2s)
154{
155 return tx_active(i2s) || other_tx_active(i2s);
156}
157
158
159static inline bool rx_active(struct i2s_dai *i2s)
160{
161 u32 active;
162
163 if (!i2s)
164 return false;
165
166 active = readl(i2s->addr + I2SCON) & CON_RXDMA_ACTIVE;
167
168 return active ? true : false;
169}
170
171
172static inline bool other_rx_active(struct i2s_dai *i2s)
173{
174 struct i2s_dai *other = get_other_dai(i2s);
175
176 return rx_active(other);
177}
178
179
180static inline bool any_rx_active(struct i2s_dai *i2s)
181{
182 return rx_active(i2s) || other_rx_active(i2s);
183}
184
185
186static inline bool other_active(struct i2s_dai *i2s)
187{
188 return other_rx_active(i2s) || other_tx_active(i2s);
189}
190
191
192static inline bool this_active(struct i2s_dai *i2s)
193{
194 return tx_active(i2s) || rx_active(i2s);
195}
196
197
198static inline bool any_active(struct i2s_dai *i2s)
199{
200 return this_active(i2s) || other_active(i2s);
201}
202
203static inline struct i2s_dai *to_info(struct snd_soc_dai *dai)
204{
205 return snd_soc_dai_get_drvdata(dai);
206}
207
208static inline bool is_opened(struct i2s_dai *i2s)
209{
210 if (i2s && (i2s->mode & DAI_OPENED))
211 return true;
212 else
213 return false;
214}
215
216static inline bool is_manager(struct i2s_dai *i2s)
217{
218 if (is_opened(i2s) && (i2s->mode & DAI_MANAGER))
219 return true;
220 else
221 return false;
222}
223
224
225static inline unsigned get_rfs(struct i2s_dai *i2s)
226{
227 u32 rfs;
228 rfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->rfs_off;
229 rfs &= i2s->variant_regs->rfs_mask;
230
231 switch (rfs) {
232 case 7: return 192;
233 case 6: return 96;
234 case 5: return 128;
235 case 4: return 64;
236 case 3: return 768;
237 case 2: return 384;
238 case 1: return 512;
239 default: return 256;
240 }
241}
242
243
244static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs)
245{
246 u32 mod = readl(i2s->addr + I2SMOD);
247 int rfs_shift = i2s->variant_regs->rfs_off;
248
249 mod &= ~(i2s->variant_regs->rfs_mask << rfs_shift);
250
251 switch (rfs) {
252 case 192:
253 mod |= (EXYNOS7_MOD_RCLK_192FS << rfs_shift);
254 break;
255 case 96:
256 mod |= (EXYNOS7_MOD_RCLK_96FS << rfs_shift);
257 break;
258 case 128:
259 mod |= (EXYNOS7_MOD_RCLK_128FS << rfs_shift);
260 break;
261 case 64:
262 mod |= (EXYNOS7_MOD_RCLK_64FS << rfs_shift);
263 break;
264 case 768:
265 mod |= (MOD_RCLK_768FS << rfs_shift);
266 break;
267 case 512:
268 mod |= (MOD_RCLK_512FS << rfs_shift);
269 break;
270 case 384:
271 mod |= (MOD_RCLK_384FS << rfs_shift);
272 break;
273 default:
274 mod |= (MOD_RCLK_256FS << rfs_shift);
275 break;
276 }
277
278 writel(mod, i2s->addr + I2SMOD);
279}
280
281
282static inline unsigned get_bfs(struct i2s_dai *i2s)
283{
284 u32 bfs;
285 bfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->bfs_off;
286 bfs &= i2s->variant_regs->bfs_mask;
287
288 switch (bfs) {
289 case 8: return 256;
290 case 7: return 192;
291 case 6: return 128;
292 case 5: return 96;
293 case 4: return 64;
294 case 3: return 24;
295 case 2: return 16;
296 case 1: return 48;
297 default: return 32;
298 }
299}
300
301
302static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs)
303{
304 u32 mod = readl(i2s->addr + I2SMOD);
305 int tdm = i2s->quirks & QUIRK_SUPPORTS_TDM;
306 int bfs_shift = i2s->variant_regs->bfs_off;
307
308
309 if (!tdm && bfs > 48) {
310 dev_err(&i2s->pdev->dev, "Unsupported BCLK divider\n");
311 return;
312 }
313
314 mod &= ~(i2s->variant_regs->bfs_mask << bfs_shift);
315
316 switch (bfs) {
317 case 48:
318 mod |= (MOD_BCLK_48FS << bfs_shift);
319 break;
320 case 32:
321 mod |= (MOD_BCLK_32FS << bfs_shift);
322 break;
323 case 24:
324 mod |= (MOD_BCLK_24FS << bfs_shift);
325 break;
326 case 16:
327 mod |= (MOD_BCLK_16FS << bfs_shift);
328 break;
329 case 64:
330 mod |= (EXYNOS5420_MOD_BCLK_64FS << bfs_shift);
331 break;
332 case 96:
333 mod |= (EXYNOS5420_MOD_BCLK_96FS << bfs_shift);
334 break;
335 case 128:
336 mod |= (EXYNOS5420_MOD_BCLK_128FS << bfs_shift);
337 break;
338 case 192:
339 mod |= (EXYNOS5420_MOD_BCLK_192FS << bfs_shift);
340 break;
341 case 256:
342 mod |= (EXYNOS5420_MOD_BCLK_256FS << bfs_shift);
343 break;
344 default:
345 dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n");
346 return;
347 }
348
349 writel(mod, i2s->addr + I2SMOD);
350}
351
352
353static inline int get_blc(struct i2s_dai *i2s)
354{
355 int blc = readl(i2s->addr + I2SMOD);
356
357 blc = (blc >> 13) & 0x3;
358
359 switch (blc) {
360 case 2: return 24;
361 case 1: return 8;
362 default: return 16;
363 }
364}
365
366
367static void i2s_txctrl(struct i2s_dai *i2s, int on)
368{
369 void __iomem *addr = i2s->addr;
370 int txr_off = i2s->variant_regs->txr_off;
371 u32 con = readl(addr + I2SCON);
372 u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
373
374 if (on) {
375 con |= CON_ACTIVE;
376 con &= ~CON_TXCH_PAUSE;
377
378 if (is_secondary(i2s)) {
379 con |= CON_TXSDMA_ACTIVE;
380 con &= ~CON_TXSDMA_PAUSE;
381 } else {
382 con |= CON_TXDMA_ACTIVE;
383 con &= ~CON_TXDMA_PAUSE;
384 }
385
386 if (any_rx_active(i2s))
387 mod |= 2 << txr_off;
388 else
389 mod |= 0 << txr_off;
390 } else {
391 if (is_secondary(i2s)) {
392 con |= CON_TXSDMA_PAUSE;
393 con &= ~CON_TXSDMA_ACTIVE;
394 } else {
395 con |= CON_TXDMA_PAUSE;
396 con &= ~CON_TXDMA_ACTIVE;
397 }
398
399 if (other_tx_active(i2s)) {
400 writel(con, addr + I2SCON);
401 return;
402 }
403
404 con |= CON_TXCH_PAUSE;
405
406 if (any_rx_active(i2s))
407 mod |= 1 << txr_off;
408 else
409 con &= ~CON_ACTIVE;
410 }
411
412 writel(mod, addr + I2SMOD);
413 writel(con, addr + I2SCON);
414}
415
416
417static void i2s_rxctrl(struct i2s_dai *i2s, int on)
418{
419 void __iomem *addr = i2s->addr;
420 int txr_off = i2s->variant_regs->txr_off;
421 u32 con = readl(addr + I2SCON);
422 u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
423
424 if (on) {
425 con |= CON_RXDMA_ACTIVE | CON_ACTIVE;
426 con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE);
427
428 if (any_tx_active(i2s))
429 mod |= 2 << txr_off;
430 else
431 mod |= 1 << txr_off;
432 } else {
433 con |= CON_RXDMA_PAUSE | CON_RXCH_PAUSE;
434 con &= ~CON_RXDMA_ACTIVE;
435
436 if (any_tx_active(i2s))
437 mod |= 0 << txr_off;
438 else
439 con &= ~CON_ACTIVE;
440 }
441
442 writel(mod, addr + I2SMOD);
443 writel(con, addr + I2SCON);
444}
445
446
447static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush)
448{
449 void __iomem *fic;
450 u32 val;
451
452 if (!i2s)
453 return;
454
455 if (is_secondary(i2s))
456 fic = i2s->addr + I2SFICS;
457 else
458 fic = i2s->addr + I2SFIC;
459
460
461 writel(readl(fic) | flush, fic);
462
463
464 val = msecs_to_loops(1) / 1000;
465 while (--val)
466 cpu_relax();
467
468 writel(readl(fic) & ~flush, fic);
469}
470
471static int i2s_set_sysclk(struct snd_soc_dai *dai,
472 int clk_id, unsigned int rfs, int dir)
473{
474 struct i2s_dai *i2s = to_info(dai);
475 struct i2s_dai *other = get_other_dai(i2s);
476 const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
477 unsigned int cdcon_mask = 1 << i2s_regs->cdclkcon_off;
478 unsigned int rsrc_mask = 1 << i2s_regs->rclksrc_off;
479 u32 mod, mask, val = 0;
480 unsigned long flags;
481 int ret = 0;
482
483 pm_runtime_get_sync(dai->dev);
484
485 spin_lock_irqsave(i2s->lock, flags);
486 mod = readl(i2s->addr + I2SMOD);
487 spin_unlock_irqrestore(i2s->lock, flags);
488
489 switch (clk_id) {
490 case SAMSUNG_I2S_OPCLK:
491 mask = MOD_OPCLK_MASK;
492 val = (dir << MOD_OPCLK_SHIFT) & MOD_OPCLK_MASK;
493 break;
494 case SAMSUNG_I2S_CDCLK:
495 mask = 1 << i2s_regs->cdclkcon_off;
496
497 if (dir == SND_SOC_CLOCK_IN)
498 rfs = 0;
499
500 if ((rfs && other && other->rfs && (other->rfs != rfs)) ||
501 (any_active(i2s) &&
502 (((dir == SND_SOC_CLOCK_IN)
503 && !(mod & cdcon_mask)) ||
504 ((dir == SND_SOC_CLOCK_OUT)
505 && (mod & cdcon_mask))))) {
506 dev_err(&i2s->pdev->dev,
507 "%s:%d Other DAI busy\n", __func__, __LINE__);
508 ret = -EAGAIN;
509 goto err;
510 }
511
512 if (dir == SND_SOC_CLOCK_IN)
513 val = 1 << i2s_regs->cdclkcon_off;
514
515 i2s->rfs = rfs;
516 break;
517
518 case SAMSUNG_I2S_RCLKSRC_0:
519 case SAMSUNG_I2S_RCLKSRC_1:
520 mask = 1 << i2s_regs->rclksrc_off;
521
522 if ((i2s->quirks & QUIRK_NO_MUXPSR)
523 || (clk_id == SAMSUNG_I2S_RCLKSRC_0))
524 clk_id = 0;
525 else
526 clk_id = 1;
527
528 if (!any_active(i2s)) {
529 if (i2s->op_clk && !IS_ERR(i2s->op_clk)) {
530 if ((clk_id && !(mod & rsrc_mask)) ||
531 (!clk_id && (mod & rsrc_mask))) {
532 clk_disable_unprepare(i2s->op_clk);
533 clk_put(i2s->op_clk);
534 } else {
535 i2s->rclk_srcrate =
536 clk_get_rate(i2s->op_clk);
537 goto done;
538 }
539 }
540
541 if (clk_id)
542 i2s->op_clk = clk_get(&i2s->pdev->dev,
543 "i2s_opclk1");
544 else
545 i2s->op_clk = clk_get(&i2s->pdev->dev,
546 "i2s_opclk0");
547
548 if (WARN_ON(IS_ERR(i2s->op_clk))) {
549 ret = PTR_ERR(i2s->op_clk);
550 i2s->op_clk = NULL;
551 goto err;
552 }
553
554 ret = clk_prepare_enable(i2s->op_clk);
555 if (ret) {
556 clk_put(i2s->op_clk);
557 i2s->op_clk = NULL;
558 goto err;
559 }
560 i2s->rclk_srcrate = clk_get_rate(i2s->op_clk);
561
562
563 if (other) {
564 other->op_clk = i2s->op_clk;
565 other->rclk_srcrate = i2s->rclk_srcrate;
566 }
567 } else if ((!clk_id && (mod & rsrc_mask))
568 || (clk_id && !(mod & rsrc_mask))) {
569 dev_err(&i2s->pdev->dev,
570 "%s:%d Other DAI busy\n", __func__, __LINE__);
571 ret = -EAGAIN;
572 goto err;
573 } else {
574
575 i2s->op_clk = other->op_clk;
576 i2s->rclk_srcrate = other->rclk_srcrate;
577 goto done;
578 }
579
580 if (clk_id == 1)
581 val = 1 << i2s_regs->rclksrc_off;
582 break;
583 default:
584 dev_err(&i2s->pdev->dev, "We don't serve that!\n");
585 ret = -EINVAL;
586 goto err;
587 }
588
589 spin_lock_irqsave(i2s->lock, flags);
590 mod = readl(i2s->addr + I2SMOD);
591 mod = (mod & ~mask) | val;
592 writel(mod, i2s->addr + I2SMOD);
593 spin_unlock_irqrestore(i2s->lock, flags);
594done:
595 pm_runtime_put(dai->dev);
596
597 return 0;
598err:
599 pm_runtime_put(dai->dev);
600 return ret;
601}
602
603static int i2s_set_fmt(struct snd_soc_dai *dai,
604 unsigned int fmt)
605{
606 struct i2s_dai *i2s = to_info(dai);
607 int lrp_shift, sdf_shift, sdf_mask, lrp_rlow, mod_slave;
608 u32 mod, tmp = 0;
609 unsigned long flags;
610
611 lrp_shift = i2s->variant_regs->lrp_off;
612 sdf_shift = i2s->variant_regs->sdf_off;
613 mod_slave = 1 << i2s->variant_regs->mss_off;
614
615 sdf_mask = MOD_SDF_MASK << sdf_shift;
616 lrp_rlow = MOD_LR_RLOW << lrp_shift;
617
618
619 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
620 case SND_SOC_DAIFMT_RIGHT_J:
621 tmp |= lrp_rlow;
622 tmp |= (MOD_SDF_MSB << sdf_shift);
623 break;
624 case SND_SOC_DAIFMT_LEFT_J:
625 tmp |= lrp_rlow;
626 tmp |= (MOD_SDF_LSB << sdf_shift);
627 break;
628 case SND_SOC_DAIFMT_I2S:
629 tmp |= (MOD_SDF_IIS << sdf_shift);
630 break;
631 default:
632 dev_err(&i2s->pdev->dev, "Format not supported\n");
633 return -EINVAL;
634 }
635
636
637
638
639
640 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
641 case SND_SOC_DAIFMT_NB_NF:
642 break;
643 case SND_SOC_DAIFMT_NB_IF:
644 if (tmp & lrp_rlow)
645 tmp &= ~lrp_rlow;
646 else
647 tmp |= lrp_rlow;
648 break;
649 default:
650 dev_err(&i2s->pdev->dev, "Polarity not supported\n");
651 return -EINVAL;
652 }
653
654 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
655 case SND_SOC_DAIFMT_CBM_CFM:
656 tmp |= mod_slave;
657 break;
658 case SND_SOC_DAIFMT_CBS_CFS:
659
660
661
662
663
664 if (i2s->rclk_srcrate == 0 && i2s->clk_data.clks == NULL)
665 i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0,
666 0, SND_SOC_CLOCK_IN);
667 break;
668 default:
669 dev_err(&i2s->pdev->dev, "master/slave format not supported\n");
670 return -EINVAL;
671 }
672
673 pm_runtime_get_sync(dai->dev);
674 spin_lock_irqsave(i2s->lock, flags);
675 mod = readl(i2s->addr + I2SMOD);
676
677
678
679
680 if (any_active(i2s) &&
681 ((mod & (sdf_mask | lrp_rlow | mod_slave)) != tmp)) {
682 spin_unlock_irqrestore(i2s->lock, flags);
683 pm_runtime_put(dai->dev);
684 dev_err(&i2s->pdev->dev,
685 "%s:%d Other DAI busy\n", __func__, __LINE__);
686 return -EAGAIN;
687 }
688
689 mod &= ~(sdf_mask | lrp_rlow | mod_slave);
690 mod |= tmp;
691 writel(mod, i2s->addr + I2SMOD);
692 spin_unlock_irqrestore(i2s->lock, flags);
693 pm_runtime_put(dai->dev);
694
695 return 0;
696}
697
698static int i2s_hw_params(struct snd_pcm_substream *substream,
699 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
700{
701 struct i2s_dai *i2s = to_info(dai);
702 u32 mod, mask = 0, val = 0;
703 unsigned long flags;
704
705 WARN_ON(!pm_runtime_active(dai->dev));
706
707 if (!is_secondary(i2s))
708 mask |= (MOD_DC2_EN | MOD_DC1_EN);
709
710 switch (params_channels(params)) {
711 case 6:
712 val |= MOD_DC2_EN;
713 case 4:
714 val |= MOD_DC1_EN;
715 break;
716 case 2:
717 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
718 i2s->dma_playback.addr_width = 4;
719 else
720 i2s->dma_capture.addr_width = 4;
721 break;
722 case 1:
723 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
724 i2s->dma_playback.addr_width = 2;
725 else
726 i2s->dma_capture.addr_width = 2;
727
728 break;
729 default:
730 dev_err(&i2s->pdev->dev, "%d channels not supported\n",
731 params_channels(params));
732 return -EINVAL;
733 }
734
735 if (is_secondary(i2s))
736 mask |= MOD_BLCS_MASK;
737 else
738 mask |= MOD_BLCP_MASK;
739
740 if (is_manager(i2s))
741 mask |= MOD_BLC_MASK;
742
743 switch (params_width(params)) {
744 case 8:
745 if (is_secondary(i2s))
746 val |= MOD_BLCS_8BIT;
747 else
748 val |= MOD_BLCP_8BIT;
749 if (is_manager(i2s))
750 val |= MOD_BLC_8BIT;
751 break;
752 case 16:
753 if (is_secondary(i2s))
754 val |= MOD_BLCS_16BIT;
755 else
756 val |= MOD_BLCP_16BIT;
757 if (is_manager(i2s))
758 val |= MOD_BLC_16BIT;
759 break;
760 case 24:
761 if (is_secondary(i2s))
762 val |= MOD_BLCS_24BIT;
763 else
764 val |= MOD_BLCP_24BIT;
765 if (is_manager(i2s))
766 val |= MOD_BLC_24BIT;
767 break;
768 default:
769 dev_err(&i2s->pdev->dev, "Format(%d) not supported\n",
770 params_format(params));
771 return -EINVAL;
772 }
773
774 spin_lock_irqsave(i2s->lock, flags);
775 mod = readl(i2s->addr + I2SMOD);
776 mod = (mod & ~mask) | val;
777 writel(mod, i2s->addr + I2SMOD);
778 spin_unlock_irqrestore(i2s->lock, flags);
779
780 snd_soc_dai_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture);
781
782 i2s->frmclk = params_rate(params);
783
784 return 0;
785}
786
787
788static int i2s_startup(struct snd_pcm_substream *substream,
789 struct snd_soc_dai *dai)
790{
791 struct i2s_dai *i2s = to_info(dai);
792 struct i2s_dai *other = get_other_dai(i2s);
793 unsigned long flags;
794
795 pm_runtime_get_sync(dai->dev);
796
797 spin_lock_irqsave(&lock, flags);
798
799 i2s->mode |= DAI_OPENED;
800
801 if (is_manager(other))
802 i2s->mode &= ~DAI_MANAGER;
803 else
804 i2s->mode |= DAI_MANAGER;
805
806 if (!any_active(i2s) && (i2s->quirks & QUIRK_NEED_RSTCLR))
807 writel(CON_RSTCLR, i2s->addr + I2SCON);
808
809 spin_unlock_irqrestore(&lock, flags);
810
811 return 0;
812}
813
814static void i2s_shutdown(struct snd_pcm_substream *substream,
815 struct snd_soc_dai *dai)
816{
817 struct i2s_dai *i2s = to_info(dai);
818 struct i2s_dai *other = get_other_dai(i2s);
819 unsigned long flags;
820
821 spin_lock_irqsave(&lock, flags);
822
823 i2s->mode &= ~DAI_OPENED;
824 i2s->mode &= ~DAI_MANAGER;
825
826 if (is_opened(other))
827 other->mode |= DAI_MANAGER;
828
829
830 i2s->rfs = 0;
831 i2s->bfs = 0;
832
833 spin_unlock_irqrestore(&lock, flags);
834
835 pm_runtime_put(dai->dev);
836}
837
838static int config_setup(struct i2s_dai *i2s)
839{
840 struct i2s_dai *other = get_other_dai(i2s);
841 unsigned rfs, bfs, blc;
842 u32 psr;
843
844 blc = get_blc(i2s);
845
846 bfs = i2s->bfs;
847
848 if (!bfs && other)
849 bfs = other->bfs;
850
851
852 if (!bfs)
853 bfs = blc * 2;
854
855 rfs = i2s->rfs;
856
857 if (!rfs && other)
858 rfs = other->rfs;
859
860 if ((rfs == 256 || rfs == 512) && (blc == 24)) {
861 dev_err(&i2s->pdev->dev,
862 "%d-RFS not supported for 24-blc\n", rfs);
863 return -EINVAL;
864 }
865
866 if (!rfs) {
867 if (bfs == 16 || bfs == 32)
868 rfs = 256;
869 else
870 rfs = 384;
871 }
872
873
874 if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) {
875 dev_err(&i2s->pdev->dev,
876 "%s:%d Other DAI busy\n", __func__, __LINE__);
877 return -EAGAIN;
878 }
879
880 set_bfs(i2s, bfs);
881 set_rfs(i2s, rfs);
882
883
884 if (is_slave(i2s))
885 return 0;
886
887 if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
888 struct clk *rclksrc = i2s->clk_table[CLK_I2S_RCLK_SRC];
889
890 if (rclksrc && !IS_ERR(rclksrc))
891 i2s->rclk_srcrate = clk_get_rate(rclksrc);
892
893 psr = i2s->rclk_srcrate / i2s->frmclk / rfs;
894 writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR);
895 dev_dbg(&i2s->pdev->dev,
896 "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n",
897 i2s->rclk_srcrate, psr, rfs, bfs);
898 }
899
900 return 0;
901}
902
903static int i2s_trigger(struct snd_pcm_substream *substream,
904 int cmd, struct snd_soc_dai *dai)
905{
906 int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
907 struct snd_soc_pcm_runtime *rtd = substream->private_data;
908 struct i2s_dai *i2s = to_info(rtd->cpu_dai);
909 unsigned long flags;
910
911 switch (cmd) {
912 case SNDRV_PCM_TRIGGER_START:
913 case SNDRV_PCM_TRIGGER_RESUME:
914 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
915 pm_runtime_get_sync(dai->dev);
916 spin_lock_irqsave(i2s->lock, flags);
917
918 if (config_setup(i2s)) {
919 spin_unlock_irqrestore(i2s->lock, flags);
920 return -EINVAL;
921 }
922
923 if (capture)
924 i2s_rxctrl(i2s, 1);
925 else
926 i2s_txctrl(i2s, 1);
927
928 spin_unlock_irqrestore(i2s->lock, flags);
929 break;
930 case SNDRV_PCM_TRIGGER_STOP:
931 case SNDRV_PCM_TRIGGER_SUSPEND:
932 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
933 spin_lock_irqsave(i2s->lock, flags);
934
935 if (capture) {
936 i2s_rxctrl(i2s, 0);
937 i2s_fifo(i2s, FIC_RXFLUSH);
938 } else {
939 i2s_txctrl(i2s, 0);
940 i2s_fifo(i2s, FIC_TXFLUSH);
941 }
942
943 spin_unlock_irqrestore(i2s->lock, flags);
944 pm_runtime_put(dai->dev);
945 break;
946 }
947
948 return 0;
949}
950
951static int i2s_set_clkdiv(struct snd_soc_dai *dai,
952 int div_id, int div)
953{
954 struct i2s_dai *i2s = to_info(dai);
955 struct i2s_dai *other = get_other_dai(i2s);
956
957 switch (div_id) {
958 case SAMSUNG_I2S_DIV_BCLK:
959 pm_runtime_get_sync(dai->dev);
960 if ((any_active(i2s) && div && (get_bfs(i2s) != div))
961 || (other && other->bfs && (other->bfs != div))) {
962 pm_runtime_put(dai->dev);
963 dev_err(&i2s->pdev->dev,
964 "%s:%d Other DAI busy\n", __func__, __LINE__);
965 return -EAGAIN;
966 }
967 i2s->bfs = div;
968 pm_runtime_put(dai->dev);
969 break;
970 default:
971 dev_err(&i2s->pdev->dev,
972 "Invalid clock divider(%d)\n", div_id);
973 return -EINVAL;
974 }
975
976 return 0;
977}
978
979static snd_pcm_sframes_t
980i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
981{
982 struct i2s_dai *i2s = to_info(dai);
983 u32 reg = readl(i2s->addr + I2SFIC);
984 snd_pcm_sframes_t delay;
985 const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
986
987 WARN_ON(!pm_runtime_active(dai->dev));
988
989 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
990 delay = FIC_RXCOUNT(reg);
991 else if (is_secondary(i2s))
992 delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS));
993 else
994 delay = (reg >> i2s_regs->ftx0cnt_off) & 0x7f;
995
996 return delay;
997}
998
999#ifdef CONFIG_PM
1000static int i2s_suspend(struct snd_soc_dai *dai)
1001{
1002 return pm_runtime_force_suspend(dai->dev);
1003}
1004
1005static int i2s_resume(struct snd_soc_dai *dai)
1006{
1007 return pm_runtime_force_resume(dai->dev);
1008}
1009#else
1010#define i2s_suspend NULL
1011#define i2s_resume NULL
1012#endif
1013
1014static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
1015{
1016 struct i2s_dai *i2s = to_info(dai);
1017 struct i2s_dai *other = get_other_dai(i2s);
1018 unsigned long flags;
1019
1020 pm_runtime_get_sync(dai->dev);
1021
1022 if (is_secondary(i2s)) {
1023 snd_soc_dai_init_dma_data(dai, &other->sec_dai->dma_playback,
1024 NULL);
1025 } else {
1026 snd_soc_dai_init_dma_data(dai, &i2s->dma_playback,
1027 &i2s->dma_capture);
1028
1029 if (i2s->quirks & QUIRK_NEED_RSTCLR)
1030 writel(CON_RSTCLR, i2s->addr + I2SCON);
1031
1032 if (i2s->quirks & QUIRK_SUPPORTS_IDMA)
1033 idma_reg_addr_init(i2s->addr,
1034 i2s->sec_dai->idma_playback.addr);
1035 }
1036
1037
1038 i2s->rfs = 0;
1039 i2s->bfs = 0;
1040 i2s->rclk_srcrate = 0;
1041
1042 spin_lock_irqsave(i2s->lock, flags);
1043 i2s_txctrl(i2s, 0);
1044 i2s_rxctrl(i2s, 0);
1045 i2s_fifo(i2s, FIC_TXFLUSH);
1046 i2s_fifo(other, FIC_TXFLUSH);
1047 i2s_fifo(i2s, FIC_RXFLUSH);
1048 spin_unlock_irqrestore(i2s->lock, flags);
1049
1050
1051 if (!is_opened(other))
1052 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
1053 0, SND_SOC_CLOCK_IN);
1054 pm_runtime_put(dai->dev);
1055
1056 return 0;
1057}
1058
1059static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
1060{
1061 struct i2s_dai *i2s = snd_soc_dai_get_drvdata(dai);
1062 unsigned long flags;
1063
1064 pm_runtime_get_sync(dai->dev);
1065
1066 if (!is_secondary(i2s)) {
1067 if (i2s->quirks & QUIRK_NEED_RSTCLR) {
1068 spin_lock_irqsave(i2s->lock, flags);
1069 writel(0, i2s->addr + I2SCON);
1070 spin_unlock_irqrestore(i2s->lock, flags);
1071 }
1072 }
1073
1074 pm_runtime_put(dai->dev);
1075
1076 return 0;
1077}
1078
1079static const struct snd_soc_dai_ops samsung_i2s_dai_ops = {
1080 .trigger = i2s_trigger,
1081 .hw_params = i2s_hw_params,
1082 .set_fmt = i2s_set_fmt,
1083 .set_clkdiv = i2s_set_clkdiv,
1084 .set_sysclk = i2s_set_sysclk,
1085 .startup = i2s_startup,
1086 .shutdown = i2s_shutdown,
1087 .delay = i2s_delay,
1088};
1089
1090static const struct snd_soc_component_driver samsung_i2s_component = {
1091 .name = "samsung-i2s",
1092};
1093
1094#define SAMSUNG_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | \
1095 SNDRV_PCM_FMTBIT_S16_LE | \
1096 SNDRV_PCM_FMTBIT_S24_LE)
1097
1098static struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev,
1099 const struct samsung_i2s_dai_data *i2s_dai_data,
1100 bool sec)
1101{
1102 struct i2s_dai *i2s;
1103
1104 i2s = devm_kzalloc(&pdev->dev, sizeof(struct i2s_dai), GFP_KERNEL);
1105 if (i2s == NULL)
1106 return NULL;
1107
1108 i2s->pdev = pdev;
1109 i2s->pri_dai = NULL;
1110 i2s->sec_dai = NULL;
1111 i2s->i2s_dai_drv.id = 1;
1112 i2s->i2s_dai_drv.symmetric_rates = 1;
1113 i2s->i2s_dai_drv.probe = samsung_i2s_dai_probe;
1114 i2s->i2s_dai_drv.remove = samsung_i2s_dai_remove;
1115 i2s->i2s_dai_drv.ops = &samsung_i2s_dai_ops;
1116 i2s->i2s_dai_drv.suspend = i2s_suspend;
1117 i2s->i2s_dai_drv.resume = i2s_resume;
1118 i2s->i2s_dai_drv.playback.channels_min = 1;
1119 i2s->i2s_dai_drv.playback.channels_max = 2;
1120 i2s->i2s_dai_drv.playback.rates = i2s_dai_data->pcm_rates;
1121 i2s->i2s_dai_drv.playback.formats = SAMSUNG_I2S_FMTS;
1122
1123 if (!sec) {
1124 i2s->i2s_dai_drv.name = SAMSUNG_I2S_DAI;
1125 i2s->i2s_dai_drv.capture.channels_min = 1;
1126 i2s->i2s_dai_drv.capture.channels_max = 2;
1127 i2s->i2s_dai_drv.capture.rates = i2s_dai_data->pcm_rates;
1128 i2s->i2s_dai_drv.capture.formats = SAMSUNG_I2S_FMTS;
1129 } else {
1130 i2s->i2s_dai_drv.name = SAMSUNG_I2S_DAI_SEC;
1131 }
1132 return i2s;
1133}
1134
1135#ifdef CONFIG_PM
1136static int i2s_runtime_suspend(struct device *dev)
1137{
1138 struct i2s_dai *i2s = dev_get_drvdata(dev);
1139
1140 i2s->suspend_i2smod = readl(i2s->addr + I2SMOD);
1141 i2s->suspend_i2scon = readl(i2s->addr + I2SCON);
1142 i2s->suspend_i2spsr = readl(i2s->addr + I2SPSR);
1143
1144 if (i2s->op_clk)
1145 clk_disable_unprepare(i2s->op_clk);
1146 clk_disable_unprepare(i2s->clk);
1147
1148 return 0;
1149}
1150
1151static int i2s_runtime_resume(struct device *dev)
1152{
1153 struct i2s_dai *i2s = dev_get_drvdata(dev);
1154 int ret;
1155
1156 ret = clk_prepare_enable(i2s->clk);
1157 if (ret)
1158 return ret;
1159
1160 if (i2s->op_clk) {
1161 ret = clk_prepare_enable(i2s->op_clk);
1162 if (ret) {
1163 clk_disable_unprepare(i2s->clk);
1164 return ret;
1165 }
1166 }
1167
1168 writel(i2s->suspend_i2scon, i2s->addr + I2SCON);
1169 writel(i2s->suspend_i2smod, i2s->addr + I2SMOD);
1170 writel(i2s->suspend_i2spsr, i2s->addr + I2SPSR);
1171
1172 return 0;
1173}
1174#endif
1175
1176static void i2s_unregister_clocks(struct i2s_dai *i2s)
1177{
1178 int i;
1179
1180 for (i = 0; i < i2s->clk_data.clk_num; i++) {
1181 if (!IS_ERR(i2s->clk_table[i]))
1182 clk_unregister(i2s->clk_table[i]);
1183 }
1184}
1185
1186static void i2s_unregister_clock_provider(struct platform_device *pdev)
1187{
1188 struct i2s_dai *i2s = dev_get_drvdata(&pdev->dev);
1189
1190 of_clk_del_provider(pdev->dev.of_node);
1191 i2s_unregister_clocks(i2s);
1192}
1193
1194static int i2s_register_clock_provider(struct platform_device *pdev)
1195{
1196 const char * const i2s_clk_desc[] = { "cdclk", "rclk_src", "prescaler" };
1197 const char *clk_name[2] = { "i2s_opclk0", "i2s_opclk1" };
1198 const char *p_names[2] = { NULL };
1199 struct device *dev = &pdev->dev;
1200 struct i2s_dai *i2s = dev_get_drvdata(dev);
1201 const struct samsung_i2s_variant_regs *reg_info = i2s->variant_regs;
1202 const char *i2s_clk_name[ARRAY_SIZE(i2s_clk_desc)];
1203 struct clk *rclksrc;
1204 int ret, i;
1205
1206
1207 if (!of_find_property(dev->of_node, "#clock-cells", NULL))
1208 return 0;
1209
1210
1211 for (i = 0; i < ARRAY_SIZE(p_names); i++) {
1212 rclksrc = clk_get(dev, clk_name[i]);
1213 if (IS_ERR(rclksrc))
1214 continue;
1215 p_names[i] = __clk_get_name(rclksrc);
1216 clk_put(rclksrc);
1217 }
1218
1219 for (i = 0; i < ARRAY_SIZE(i2s_clk_desc); i++) {
1220 i2s_clk_name[i] = devm_kasprintf(dev, GFP_KERNEL, "%s_%s",
1221 dev_name(dev), i2s_clk_desc[i]);
1222 if (!i2s_clk_name[i])
1223 return -ENOMEM;
1224 }
1225
1226 if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
1227
1228 u32 val = readl(i2s->addr + I2SPSR);
1229 writel(val | PSR_PSREN, i2s->addr + I2SPSR);
1230
1231 i2s->clk_table[CLK_I2S_RCLK_SRC] = clk_register_mux(dev,
1232 i2s_clk_name[CLK_I2S_RCLK_SRC], p_names,
1233 ARRAY_SIZE(p_names),
1234 CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT,
1235 i2s->addr + I2SMOD, reg_info->rclksrc_off,
1236 1, 0, i2s->lock);
1237
1238 i2s->clk_table[CLK_I2S_RCLK_PSR] = clk_register_divider(dev,
1239 i2s_clk_name[CLK_I2S_RCLK_PSR],
1240 i2s_clk_name[CLK_I2S_RCLK_SRC],
1241 CLK_SET_RATE_PARENT,
1242 i2s->addr + I2SPSR, 8, 6, 0, i2s->lock);
1243
1244 p_names[0] = i2s_clk_name[CLK_I2S_RCLK_PSR];
1245 i2s->clk_data.clk_num = 2;
1246 }
1247
1248 i2s->clk_table[CLK_I2S_CDCLK] = clk_register_gate(dev,
1249 i2s_clk_name[CLK_I2S_CDCLK], p_names[0],
1250 CLK_SET_RATE_PARENT,
1251 i2s->addr + I2SMOD, reg_info->cdclkcon_off,
1252 CLK_GATE_SET_TO_DISABLE, i2s->lock);
1253
1254 i2s->clk_data.clk_num += 1;
1255 i2s->clk_data.clks = i2s->clk_table;
1256
1257 ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get,
1258 &i2s->clk_data);
1259 if (ret < 0) {
1260 dev_err(dev, "failed to add clock provider: %d\n", ret);
1261 i2s_unregister_clocks(i2s);
1262 }
1263
1264 return ret;
1265}
1266
1267static int samsung_i2s_probe(struct platform_device *pdev)
1268{
1269 struct i2s_dai *pri_dai, *sec_dai = NULL;
1270 struct s3c_audio_pdata *i2s_pdata = pdev->dev.platform_data;
1271 struct resource *res;
1272 u32 regs_base, quirks = 0, idma_addr = 0;
1273 struct device_node *np = pdev->dev.of_node;
1274 const struct samsung_i2s_dai_data *i2s_dai_data;
1275 int ret;
1276
1277 if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node)
1278 i2s_dai_data = of_device_get_match_data(&pdev->dev);
1279 else
1280 i2s_dai_data = (struct samsung_i2s_dai_data *)
1281 platform_get_device_id(pdev)->driver_data;
1282
1283 pri_dai = i2s_alloc_dai(pdev, i2s_dai_data, false);
1284 if (!pri_dai) {
1285 dev_err(&pdev->dev, "Unable to alloc I2S_pri\n");
1286 return -ENOMEM;
1287 }
1288
1289 spin_lock_init(&pri_dai->spinlock);
1290 pri_dai->lock = &pri_dai->spinlock;
1291
1292 if (!np) {
1293 if (i2s_pdata == NULL) {
1294 dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n");
1295 return -EINVAL;
1296 }
1297
1298 pri_dai->dma_playback.filter_data = i2s_pdata->dma_playback;
1299 pri_dai->dma_capture.filter_data = i2s_pdata->dma_capture;
1300 pri_dai->filter = i2s_pdata->dma_filter;
1301
1302 quirks = i2s_pdata->type.quirks;
1303 idma_addr = i2s_pdata->type.idma_addr;
1304 } else {
1305 quirks = i2s_dai_data->quirks;
1306 if (of_property_read_u32(np, "samsung,idma-addr",
1307 &idma_addr)) {
1308 if (quirks & QUIRK_SUPPORTS_IDMA) {
1309 dev_info(&pdev->dev, "idma address is not"\
1310 "specified");
1311 }
1312 }
1313 }
1314 quirks &= ~(QUIRK_SEC_DAI | QUIRK_SUPPORTS_IDMA);
1315
1316 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1317 pri_dai->addr = devm_ioremap_resource(&pdev->dev, res);
1318 if (IS_ERR(pri_dai->addr))
1319 return PTR_ERR(pri_dai->addr);
1320
1321 regs_base = res->start;
1322
1323 pri_dai->clk = devm_clk_get(&pdev->dev, "iis");
1324 if (IS_ERR(pri_dai->clk)) {
1325 dev_err(&pdev->dev, "Failed to get iis clock\n");
1326 return PTR_ERR(pri_dai->clk);
1327 }
1328
1329 ret = clk_prepare_enable(pri_dai->clk);
1330 if (ret != 0) {
1331 dev_err(&pdev->dev, "failed to enable clock: %d\n", ret);
1332 return ret;
1333 }
1334 pri_dai->dma_playback.addr = regs_base + I2STXD;
1335 pri_dai->dma_capture.addr = regs_base + I2SRXD;
1336 pri_dai->dma_playback.chan_name = "tx";
1337 pri_dai->dma_capture.chan_name = "rx";
1338 pri_dai->dma_playback.addr_width = 4;
1339 pri_dai->dma_capture.addr_width = 4;
1340 pri_dai->quirks = quirks;
1341 pri_dai->variant_regs = i2s_dai_data->i2s_variant_regs;
1342
1343 if (quirks & QUIRK_PRI_6CHAN)
1344 pri_dai->i2s_dai_drv.playback.channels_max = 6;
1345
1346 ret = samsung_asoc_dma_platform_register(&pdev->dev, pri_dai->filter,
1347 NULL, NULL);
1348 if (ret < 0)
1349 goto err_disable_clk;
1350
1351 ret = devm_snd_soc_register_component(&pdev->dev,
1352 &samsung_i2s_component,
1353 &pri_dai->i2s_dai_drv, 1);
1354 if (ret < 0)
1355 goto err_disable_clk;
1356
1357 if (quirks & QUIRK_SEC_DAI) {
1358 sec_dai = i2s_alloc_dai(pdev, i2s_dai_data, true);
1359 if (!sec_dai) {
1360 dev_err(&pdev->dev, "Unable to alloc I2S_sec\n");
1361 ret = -ENOMEM;
1362 goto err_disable_clk;
1363 }
1364
1365 sec_dai->lock = &pri_dai->spinlock;
1366 sec_dai->variant_regs = pri_dai->variant_regs;
1367 sec_dai->dma_playback.addr = regs_base + I2STXDS;
1368 sec_dai->dma_playback.chan_name = "tx-sec";
1369
1370 if (!np) {
1371 sec_dai->dma_playback.filter_data = i2s_pdata->dma_play_sec;
1372 sec_dai->filter = i2s_pdata->dma_filter;
1373 }
1374
1375 sec_dai->dma_playback.addr_width = 4;
1376 sec_dai->addr = pri_dai->addr;
1377 sec_dai->clk = pri_dai->clk;
1378 sec_dai->quirks = quirks;
1379 sec_dai->idma_playback.addr = idma_addr;
1380 sec_dai->pri_dai = pri_dai;
1381 pri_dai->sec_dai = sec_dai;
1382
1383 ret = samsung_asoc_dma_platform_register(&pdev->dev,
1384 sec_dai->filter, "tx-sec", NULL);
1385 if (ret < 0)
1386 goto err_disable_clk;
1387
1388 ret = devm_snd_soc_register_component(&pdev->dev,
1389 &samsung_i2s_component,
1390 &sec_dai->i2s_dai_drv, 1);
1391 if (ret < 0)
1392 goto err_disable_clk;
1393 }
1394
1395 if (i2s_pdata && i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) {
1396 dev_err(&pdev->dev, "Unable to configure gpio\n");
1397 ret = -EINVAL;
1398 goto err_disable_clk;
1399 }
1400
1401 dev_set_drvdata(&pdev->dev, pri_dai);
1402
1403 pm_runtime_set_active(&pdev->dev);
1404 pm_runtime_enable(&pdev->dev);
1405
1406 ret = i2s_register_clock_provider(pdev);
1407 if (ret < 0)
1408 goto err_disable_pm;
1409
1410 pri_dai->op_clk = clk_get_parent(pri_dai->clk_table[CLK_I2S_RCLK_SRC]);
1411
1412 return 0;
1413
1414err_disable_pm:
1415 pm_runtime_disable(&pdev->dev);
1416err_disable_clk:
1417 clk_disable_unprepare(pri_dai->clk);
1418 return ret;
1419}
1420
1421static int samsung_i2s_remove(struct platform_device *pdev)
1422{
1423 struct i2s_dai *pri_dai;
1424
1425 pri_dai = dev_get_drvdata(&pdev->dev);
1426
1427 pm_runtime_get_sync(&pdev->dev);
1428 pm_runtime_disable(&pdev->dev);
1429
1430 i2s_unregister_clock_provider(pdev);
1431 clk_disable_unprepare(pri_dai->clk);
1432 pm_runtime_put_noidle(&pdev->dev);
1433
1434 return 0;
1435}
1436
1437static const struct samsung_i2s_variant_regs i2sv3_regs = {
1438 .bfs_off = 1,
1439 .rfs_off = 3,
1440 .sdf_off = 5,
1441 .txr_off = 8,
1442 .rclksrc_off = 10,
1443 .mss_off = 11,
1444 .cdclkcon_off = 12,
1445 .lrp_off = 7,
1446 .bfs_mask = 0x3,
1447 .rfs_mask = 0x3,
1448 .ftx0cnt_off = 8,
1449};
1450
1451static const struct samsung_i2s_variant_regs i2sv6_regs = {
1452 .bfs_off = 0,
1453 .rfs_off = 4,
1454 .sdf_off = 6,
1455 .txr_off = 8,
1456 .rclksrc_off = 10,
1457 .mss_off = 11,
1458 .cdclkcon_off = 12,
1459 .lrp_off = 15,
1460 .bfs_mask = 0xf,
1461 .rfs_mask = 0x3,
1462 .ftx0cnt_off = 8,
1463};
1464
1465static const struct samsung_i2s_variant_regs i2sv7_regs = {
1466 .bfs_off = 0,
1467 .rfs_off = 4,
1468 .sdf_off = 7,
1469 .txr_off = 9,
1470 .rclksrc_off = 11,
1471 .mss_off = 12,
1472 .cdclkcon_off = 22,
1473 .lrp_off = 15,
1474 .bfs_mask = 0xf,
1475 .rfs_mask = 0x7,
1476 .ftx0cnt_off = 0,
1477};
1478
1479static const struct samsung_i2s_variant_regs i2sv5_i2s1_regs = {
1480 .bfs_off = 0,
1481 .rfs_off = 3,
1482 .sdf_off = 6,
1483 .txr_off = 8,
1484 .rclksrc_off = 10,
1485 .mss_off = 11,
1486 .cdclkcon_off = 12,
1487 .lrp_off = 15,
1488 .bfs_mask = 0x7,
1489 .rfs_mask = 0x7,
1490 .ftx0cnt_off = 8,
1491};
1492
1493static const struct samsung_i2s_dai_data i2sv3_dai_type = {
1494 .quirks = QUIRK_NO_MUXPSR,
1495 .pcm_rates = SNDRV_PCM_RATE_8000_96000,
1496 .i2s_variant_regs = &i2sv3_regs,
1497};
1498
1499static const struct samsung_i2s_dai_data i2sv5_dai_type = {
1500 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1501 QUIRK_SUPPORTS_IDMA,
1502 .pcm_rates = SNDRV_PCM_RATE_8000_96000,
1503 .i2s_variant_regs = &i2sv3_regs,
1504};
1505
1506static const struct samsung_i2s_dai_data i2sv6_dai_type = {
1507 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1508 QUIRK_SUPPORTS_TDM | QUIRK_SUPPORTS_IDMA,
1509 .pcm_rates = SNDRV_PCM_RATE_8000_96000,
1510 .i2s_variant_regs = &i2sv6_regs,
1511};
1512
1513static const struct samsung_i2s_dai_data i2sv7_dai_type = {
1514 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1515 QUIRK_SUPPORTS_TDM,
1516 .pcm_rates = SNDRV_PCM_RATE_8000_192000,
1517 .i2s_variant_regs = &i2sv7_regs,
1518};
1519
1520static const struct samsung_i2s_dai_data i2sv5_dai_type_i2s1 = {
1521 .quirks = QUIRK_PRI_6CHAN | QUIRK_NEED_RSTCLR,
1522 .pcm_rates = SNDRV_PCM_RATE_8000_96000,
1523 .i2s_variant_regs = &i2sv5_i2s1_regs,
1524};
1525
1526static const struct platform_device_id samsung_i2s_driver_ids[] = {
1527 {
1528 .name = "samsung-i2s",
1529 .driver_data = (kernel_ulong_t)&i2sv3_dai_type,
1530 },
1531 {},
1532};
1533MODULE_DEVICE_TABLE(platform, samsung_i2s_driver_ids);
1534
1535#ifdef CONFIG_OF
1536static const struct of_device_id exynos_i2s_match[] = {
1537 {
1538 .compatible = "samsung,s3c6410-i2s",
1539 .data = &i2sv3_dai_type,
1540 }, {
1541 .compatible = "samsung,s5pv210-i2s",
1542 .data = &i2sv5_dai_type,
1543 }, {
1544 .compatible = "samsung,exynos5420-i2s",
1545 .data = &i2sv6_dai_type,
1546 }, {
1547 .compatible = "samsung,exynos7-i2s",
1548 .data = &i2sv7_dai_type,
1549 }, {
1550 .compatible = "samsung,exynos7-i2s1",
1551 .data = &i2sv5_dai_type_i2s1,
1552 },
1553 {},
1554};
1555MODULE_DEVICE_TABLE(of, exynos_i2s_match);
1556#endif
1557
1558static const struct dev_pm_ops samsung_i2s_pm = {
1559 SET_RUNTIME_PM_OPS(i2s_runtime_suspend,
1560 i2s_runtime_resume, NULL)
1561 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
1562 pm_runtime_force_resume)
1563};
1564
1565static struct platform_driver samsung_i2s_driver = {
1566 .probe = samsung_i2s_probe,
1567 .remove = samsung_i2s_remove,
1568 .id_table = samsung_i2s_driver_ids,
1569 .driver = {
1570 .name = "samsung-i2s",
1571 .of_match_table = of_match_ptr(exynos_i2s_match),
1572 .pm = &samsung_i2s_pm,
1573 },
1574};
1575
1576module_platform_driver(samsung_i2s_driver);
1577
1578
1579MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>");
1580MODULE_DESCRIPTION("Samsung I2S Interface");
1581MODULE_ALIAS("platform:samsung-i2s");
1582MODULE_LICENSE("GPL");
1583
