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11#include <linux/cpu_pm.h>
12#include <linux/delay.h>
13#include <linux/init.h>
14#include <linux/io.h>
15#include <linux/ioport.h>
16#include <linux/of_address.h>
17#include <linux/smp.h>
18#include <linux/suspend.h>
19#include <linux/threads.h>
20#include <asm/cacheflush.h>
21#include <asm/cp15.h>
22#include <asm/proc-fns.h>
23#include <asm/smp_plat.h>
24#include <asm/suspend.h>
25#include "common.h"
26#include "platsmp-apmu.h"
27#include "rcar-gen2.h"
28
29static struct {
30 void __iomem *iomem;
31 int bit;
32} apmu_cpus[NR_CPUS];
33
34#define WUPCR_OFFS 0x10
35#define PSTR_OFFS 0x40
36#define CPUNCR_OFFS(n) (0x100 + (0x10 * (n)))
37
38#define DBGRCR_OFFS 0x180
39
40
41#define CPUNST(r, n) (((r) >> (n * 4)) & 3)
42#define CPUST_RUN 0
43#define CPUST_STANDBY 3
44
45
46#define DBGCPUREN BIT(24)
47#define DBGCPUNREN(n) BIT((n) + 20)
48#define DBGCPUPREN BIT(19)
49
50static int __maybe_unused apmu_power_on(void __iomem *p, int bit)
51{
52
53 writel_relaxed(BIT(bit), p + WUPCR_OFFS);
54
55
56 while (readl_relaxed(p + WUPCR_OFFS) != 0)
57 ;
58
59 return 0;
60}
61
62static int __maybe_unused apmu_power_off(void __iomem *p, int bit)
63{
64
65 writel_relaxed(3, p + CPUNCR_OFFS(bit));
66 return 0;
67}
68
69static int __maybe_unused apmu_power_off_poll(void __iomem *p, int bit)
70{
71 int k;
72
73 for (k = 0; k < 1000; k++) {
74 if (CPUNST(readl_relaxed(p + PSTR_OFFS), bit) == CPUST_STANDBY)
75 return 1;
76
77 mdelay(1);
78 }
79
80 return 0;
81}
82
83static int __maybe_unused apmu_wrap(int cpu, int (*fn)(void __iomem *p, int cpu))
84{
85 void __iomem *p = apmu_cpus[cpu].iomem;
86
87 return p ? fn(p, apmu_cpus[cpu].bit) : -EINVAL;
88}
89
90#ifdef CONFIG_SMP
91static void apmu_init_cpu(struct resource *res, int cpu, int bit)
92{
93 u32 x;
94
95 if ((cpu >= ARRAY_SIZE(apmu_cpus)) || apmu_cpus[cpu].iomem)
96 return;
97
98 apmu_cpus[cpu].iomem = ioremap_nocache(res->start, resource_size(res));
99 apmu_cpus[cpu].bit = bit;
100
101 pr_debug("apmu ioremap %d %d %pr\n", cpu, bit, res);
102
103
104 x = readl(apmu_cpus[cpu].iomem + DBGRCR_OFFS);
105 x |= DBGCPUREN | DBGCPUNREN(bit) | DBGCPUPREN;
106 writel(x, apmu_cpus[cpu].iomem + DBGRCR_OFFS);
107}
108
109static void apmu_parse_cfg(void (*fn)(struct resource *res, int cpu, int bit),
110 struct rcar_apmu_config *apmu_config, int num)
111{
112 int id;
113 int k;
114 int bit, index;
115 bool is_allowed;
116
117 for (k = 0; k < num; k++) {
118
119 is_allowed = false;
120 for (bit = 0; bit < ARRAY_SIZE(apmu_config[k].cpus); bit++) {
121 id = apmu_config[k].cpus[bit];
122 if (id >= 0) {
123 if (id == cpu_logical_map(0))
124 is_allowed = true;
125 }
126 }
127 if (!is_allowed)
128 continue;
129
130 for (bit = 0; bit < ARRAY_SIZE(apmu_config[k].cpus); bit++) {
131 id = apmu_config[k].cpus[bit];
132 if (id >= 0) {
133 index = get_logical_index(id);
134 if (index >= 0)
135 fn(&apmu_config[k].iomem, index, bit);
136 }
137 }
138 }
139}
140
141static const struct of_device_id apmu_ids[] = {
142 { .compatible = "renesas,apmu" },
143 { }
144};
145
146static void apmu_parse_dt(void (*fn)(struct resource *res, int cpu, int bit))
147{
148 struct device_node *np_apmu, *np_cpu;
149 struct resource res;
150 int bit, index;
151 u32 id;
152
153 for_each_matching_node(np_apmu, apmu_ids) {
154
155 bool is_allowed = false;
156
157 for (bit = 0; bit < CONFIG_NR_CPUS; bit++) {
158 np_cpu = of_parse_phandle(np_apmu, "cpus", bit);
159 if (np_cpu) {
160 if (!of_property_read_u32(np_cpu, "reg", &id)) {
161 if (id == cpu_logical_map(0)) {
162 is_allowed = true;
163 of_node_put(np_cpu);
164 break;
165 }
166
167 }
168 of_node_put(np_cpu);
169 }
170 }
171 if (!is_allowed)
172 continue;
173
174 for (bit = 0; bit < CONFIG_NR_CPUS; bit++) {
175 np_cpu = of_parse_phandle(np_apmu, "cpus", bit);
176 if (np_cpu) {
177 if (!of_property_read_u32(np_cpu, "reg", &id)) {
178 index = get_logical_index(id);
179 if ((index >= 0) &&
180 !of_address_to_resource(np_apmu,
181 0, &res))
182 fn(&res, index, bit);
183 }
184 of_node_put(np_cpu);
185 }
186 }
187 }
188}
189
190static void __init shmobile_smp_apmu_setup_boot(void)
191{
192
193 shmobile_boot_fn = __pa_symbol(shmobile_smp_boot);
194 shmobile_boot_fn_gen2 = shmobile_boot_fn;
195}
196
197void __init shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus,
198 struct rcar_apmu_config *apmu_config,
199 int num)
200{
201 shmobile_smp_apmu_setup_boot();
202 apmu_parse_cfg(apmu_init_cpu, apmu_config, num);
203}
204
205int shmobile_smp_apmu_boot_secondary(unsigned int cpu, struct task_struct *idle)
206{
207
208 shmobile_smp_hook(cpu, __pa_symbol(shmobile_boot_apmu), 0);
209
210 return apmu_wrap(cpu, apmu_power_on);
211}
212
213static void __init shmobile_smp_apmu_prepare_cpus_dt(unsigned int max_cpus)
214{
215 shmobile_smp_apmu_setup_boot();
216 apmu_parse_dt(apmu_init_cpu);
217 rcar_gen2_pm_init();
218}
219
220static struct smp_operations apmu_smp_ops __initdata = {
221 .smp_prepare_cpus = shmobile_smp_apmu_prepare_cpus_dt,
222 .smp_boot_secondary = shmobile_smp_apmu_boot_secondary,
223#ifdef CONFIG_HOTPLUG_CPU
224 .cpu_can_disable = shmobile_smp_cpu_can_disable,
225 .cpu_die = shmobile_smp_apmu_cpu_die,
226 .cpu_kill = shmobile_smp_apmu_cpu_kill,
227#endif
228};
229
230CPU_METHOD_OF_DECLARE(shmobile_smp_apmu, "renesas,apmu", &apmu_smp_ops);
231#endif
232
233#if defined(CONFIG_HOTPLUG_CPU) || defined(CONFIG_SUSPEND)
234
235static inline void cpu_enter_lowpower_a15(void)
236{
237 unsigned int v;
238
239 asm volatile(
240 " mrc p15, 0, %0, c1, c0, 0\n"
241 " bic %0, %0, %1\n"
242 " mcr p15, 0, %0, c1, c0, 0\n"
243 : "=&r" (v)
244 : "Ir" (CR_C)
245 : "cc");
246
247 flush_cache_louis();
248
249 asm volatile(
250
251
252
253 " mrc p15, 0, %0, c1, c0, 1\n"
254 " bic %0, %0, %1\n"
255 " mcr p15, 0, %0, c1, c0, 1\n"
256 : "=&r" (v)
257 : "Ir" (0x40)
258 : "cc");
259
260 isb();
261 dsb();
262}
263
264static void shmobile_smp_apmu_cpu_shutdown(unsigned int cpu)
265{
266
267
268 apmu_wrap(cpu, apmu_power_off);
269
270
271 cpu_enter_lowpower_a15();
272}
273
274static inline void cpu_leave_lowpower(void)
275{
276 unsigned int v;
277
278 asm volatile("mrc p15, 0, %0, c1, c0, 0\n"
279 " orr %0, %0, %1\n"
280 " mcr p15, 0, %0, c1, c0, 0\n"
281 " mrc p15, 0, %0, c1, c0, 1\n"
282 " orr %0, %0, %2\n"
283 " mcr p15, 0, %0, c1, c0, 1\n"
284 : "=&r" (v)
285 : "Ir" (CR_C), "Ir" (0x40)
286 : "cc");
287}
288#endif
289
290#if defined(CONFIG_HOTPLUG_CPU)
291void shmobile_smp_apmu_cpu_die(unsigned int cpu)
292{
293
294 shmobile_smp_hook(cpu, 0, 0);
295
296
297 shmobile_smp_apmu_cpu_shutdown(cpu);
298
299
300 shmobile_smp_sleep();
301}
302
303int shmobile_smp_apmu_cpu_kill(unsigned int cpu)
304{
305 return apmu_wrap(cpu, apmu_power_off_poll);
306}
307#endif
308
309#if defined(CONFIG_SUSPEND)
310static int shmobile_smp_apmu_do_suspend(unsigned long cpu)
311{
312 shmobile_smp_hook(cpu, __pa_symbol(cpu_resume), 0);
313 shmobile_smp_apmu_cpu_shutdown(cpu);
314 cpu_do_idle();
315 return 1;
316}
317
318static int shmobile_smp_apmu_enter_suspend(suspend_state_t state)
319{
320 cpu_suspend(smp_processor_id(), shmobile_smp_apmu_do_suspend);
321 cpu_leave_lowpower();
322 return 0;
323}
324
325void __init shmobile_smp_apmu_suspend_init(void)
326{
327 shmobile_suspend_ops.enter = shmobile_smp_apmu_enter_suspend;
328}
329#endif
330
