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8#ifndef __ASM_OCTEON_OCTEON_H
9#define __ASM_OCTEON_OCTEON_H
10
11#include <asm/octeon/cvmx.h>
12#include <asm/bitfield.h>
13
14extern uint64_t octeon_bootmem_alloc_range_phys(uint64_t size,
15 uint64_t alignment,
16 uint64_t min_addr,
17 uint64_t max_addr,
18 int do_locking);
19extern void *octeon_bootmem_alloc(uint64_t size, uint64_t alignment,
20 int do_locking);
21extern void *octeon_bootmem_alloc_range(uint64_t size, uint64_t alignment,
22 uint64_t min_addr, uint64_t max_addr,
23 int do_locking);
24extern void *octeon_bootmem_alloc_named(uint64_t size, uint64_t alignment,
25 char *name);
26extern void *octeon_bootmem_alloc_named_range(uint64_t size, uint64_t min_addr,
27 uint64_t max_addr, uint64_t align,
28 char *name);
29extern void *octeon_bootmem_alloc_named_address(uint64_t size, uint64_t address,
30 char *name);
31extern int octeon_bootmem_free_named(char *name);
32extern void octeon_bootmem_lock(void);
33extern void octeon_bootmem_unlock(void);
34
35extern int octeon_is_simulation(void);
36extern int octeon_is_pci_host(void);
37extern int octeon_usb_is_ref_clk(void);
38extern uint64_t octeon_get_clock_rate(void);
39extern u64 octeon_get_io_clock_rate(void);
40extern const char *octeon_board_type_string(void);
41extern const char *octeon_get_pci_interrupts(void);
42extern int octeon_get_southbridge_interrupt(void);
43extern int octeon_get_boot_coremask(void);
44extern int octeon_get_boot_num_arguments(void);
45extern const char *octeon_get_boot_argument(int arg);
46extern void octeon_hal_setup_reserved32(void);
47extern void octeon_user_io_init(void);
48
49extern void octeon_init_cvmcount(void);
50extern void octeon_setup_delays(void);
51extern void octeon_io_clk_delay(unsigned long);
52
53#define OCTEON_ARGV_MAX_ARGS 64
54#define OCTOEN_SERIAL_LEN 20
55
56struct octeon_boot_descriptor {
57#ifdef __BIG_ENDIAN_BITFIELD
58
59 uint32_t desc_version;
60 uint32_t desc_size;
61 uint64_t stack_top;
62 uint64_t heap_base;
63 uint64_t heap_end;
64
65 uint64_t entry_point;
66 uint64_t desc_vaddr;
67
68 uint32_t exception_base_addr;
69 uint32_t stack_size;
70 uint32_t heap_size;
71
72 uint32_t argc;
73 uint32_t argv[OCTEON_ARGV_MAX_ARGS];
74
75#define BOOT_FLAG_INIT_CORE (1 << 0)
76#define OCTEON_BL_FLAG_DEBUG (1 << 1)
77#define OCTEON_BL_FLAG_NO_MAGIC (1 << 2)
78
79#define OCTEON_BL_FLAG_CONSOLE_UART1 (1 << 3)
80
81#define OCTEON_BL_FLAG_CONSOLE_PCI (1 << 4)
82
83#define OCTEON_BL_FLAG_BREAK (1 << 5)
84
85 uint32_t flags;
86 uint32_t core_mask;
87
88 uint32_t dram_size;
89
90 uint32_t phy_mem_desc_addr;
91
92 uint32_t debugger_flags_base_addr;
93
94 uint32_t eclock_hz;
95
96 uint32_t dclock_hz;
97
98 uint32_t spi_clock_hz;
99 uint16_t board_type;
100 uint8_t board_rev_major;
101 uint8_t board_rev_minor;
102 uint16_t chip_type;
103 uint8_t chip_rev_major;
104 uint8_t chip_rev_minor;
105 char board_serial_number[OCTOEN_SERIAL_LEN];
106 uint8_t mac_addr_base[6];
107 uint8_t mac_addr_count;
108 uint64_t cvmx_desc_vaddr;
109#else
110 uint32_t desc_size;
111 uint32_t desc_version;
112 uint64_t stack_top;
113 uint64_t heap_base;
114 uint64_t heap_end;
115
116 uint64_t entry_point;
117 uint64_t desc_vaddr;
118
119 uint32_t stack_size;
120 uint32_t exception_base_addr;
121 uint32_t argc;
122 uint32_t heap_size;
123
124
125
126
127 uint32_t argv[OCTEON_ARGV_MAX_ARGS];
128
129#define BOOT_FLAG_INIT_CORE (1 << 0)
130#define OCTEON_BL_FLAG_DEBUG (1 << 1)
131#define OCTEON_BL_FLAG_NO_MAGIC (1 << 2)
132
133#define OCTEON_BL_FLAG_CONSOLE_UART1 (1 << 3)
134
135#define OCTEON_BL_FLAG_CONSOLE_PCI (1 << 4)
136
137#define OCTEON_BL_FLAG_BREAK (1 << 5)
138
139 uint32_t core_mask;
140 uint32_t flags;
141
142 uint32_t phy_mem_desc_addr;
143
144 uint32_t dram_size;
145
146 uint32_t eclock_hz;
147
148 uint32_t debugger_flags_base_addr;
149
150 uint32_t spi_clock_hz;
151
152 uint32_t dclock_hz;
153 uint8_t chip_rev_minor;
154 uint8_t chip_rev_major;
155 uint16_t chip_type;
156 uint8_t board_rev_minor;
157 uint8_t board_rev_major;
158 uint16_t board_type;
159
160 uint64_t unused1[4];
161
162 uint64_t cvmx_desc_vaddr;
163#endif
164};
165
166union octeon_cvmemctl {
167 uint64_t u64;
168 struct {
169
170 __BITFIELD_FIELD(uint64_t tlbbist:1,
171
172 __BITFIELD_FIELD(uint64_t l1cbist:1,
173
174 __BITFIELD_FIELD(uint64_t l1dbist:1,
175
176 __BITFIELD_FIELD(uint64_t dcmbist:1,
177
178 __BITFIELD_FIELD(uint64_t ptgbist:1,
179
180 __BITFIELD_FIELD(uint64_t wbfbist:1,
181
182 __BITFIELD_FIELD(uint64_t reserved:17,
183
184
185
186
187
188
189 __BITFIELD_FIELD(uint64_t tlbnlu:1,
190
191
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193
194
195
196 __BITFIELD_FIELD(uint64_t pausetime:3,
197
198
199 __BITFIELD_FIELD(uint64_t didtto2:1,
200
201
202
203 __BITFIELD_FIELD(uint64_t dismarkwblongto:1,
204
205
206 __BITFIELD_FIELD(uint64_t dismrgclrwbto:1,
207
208
209
210 __BITFIELD_FIELD(uint64_t iobdmascrmsb:2,
211
212
213
214
215 __BITFIELD_FIELD(uint64_t syncwsmarked:1,
216
217
218 __BITFIELD_FIELD(uint64_t dissyncws:1,
219
220
221 __BITFIELD_FIELD(uint64_t diswbfst:1,
222
223
224
225 __BITFIELD_FIELD(uint64_t xkmemenas:1,
226
227
228 __BITFIELD_FIELD(uint64_t xkmemenau:1,
229
230
231
232 __BITFIELD_FIELD(uint64_t xkioenas:1,
233
234
235 __BITFIELD_FIELD(uint64_t xkioenau:1,
236
237
238 __BITFIELD_FIELD(uint64_t allsyncw:1,
239
240
241 __BITFIELD_FIELD(uint64_t nomerge:1,
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243
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245
246
247 __BITFIELD_FIELD(uint64_t didtto:2,
248
249 __BITFIELD_FIELD(uint64_t csrckalwys:1,
250
251 __BITFIELD_FIELD(uint64_t mclkalwys:1,
252
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255
256
257
258
259 __BITFIELD_FIELD(uint64_t wbfltime:3,
260
261 __BITFIELD_FIELD(uint64_t istrnol2:1,
262
263 __BITFIELD_FIELD(uint64_t wbthresh:4,
264
265 __BITFIELD_FIELD(uint64_t reserved2:2,
266
267
268 __BITFIELD_FIELD(uint64_t cvmsegenak:1,
269
270
271 __BITFIELD_FIELD(uint64_t cvmsegenas:1,
272
273
274 __BITFIELD_FIELD(uint64_t cvmsegenau:1,
275
276
277 __BITFIELD_FIELD(uint64_t lmemsz:6,
278 ;)))))))))))))))))))))))))))))))))
279 } s;
280};
281
282extern void octeon_write_lcd(const char *s);
283extern void octeon_check_cpu_bist(void);
284extern int octeon_get_boot_uart(void);
285
286struct uart_port;
287extern unsigned int octeon_serial_in(struct uart_port *, int);
288extern void octeon_serial_out(struct uart_port *, int, int);
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295
296static inline void octeon_npi_write32(uint64_t address, uint32_t val)
297{
298 cvmx_write64_uint32(address ^ 4, val);
299 cvmx_read64_uint32(address ^ 4);
300}
301
302#ifdef CONFIG_SMP
303void octeon_setup_smp(void);
304#else
305static inline void octeon_setup_smp(void) {}
306#endif
307
308struct irq_domain;
309struct device_node;
310struct irq_data;
311struct irq_chip;
312void octeon_ciu3_mbox_send(int cpu, unsigned int mbox);
313int octeon_irq_ciu3_xlat(struct irq_domain *d,
314 struct device_node *node,
315 const u32 *intspec,
316 unsigned int intsize,
317 unsigned long *out_hwirq,
318 unsigned int *out_type);
319void octeon_irq_ciu3_enable(struct irq_data *data);
320void octeon_irq_ciu3_disable(struct irq_data *data);
321void octeon_irq_ciu3_ack(struct irq_data *data);
322void octeon_irq_ciu3_mask(struct irq_data *data);
323void octeon_irq_ciu3_mask_ack(struct irq_data *data);
324int octeon_irq_ciu3_mapx(struct irq_domain *d, unsigned int virq,
325 irq_hw_number_t hw, struct irq_chip *chip);
326
327
328void octeon_mult_save(void);
329void octeon_mult_restore(void);
330void octeon_mult_save_end(void);
331void octeon_mult_restore_end(void);
332void octeon_mult_save3(void);
333void octeon_mult_save3_end(void);
334void octeon_mult_save2(void);
335void octeon_mult_save2_end(void);
336void octeon_mult_restore3(void);
337void octeon_mult_restore3_end(void);
338void octeon_mult_restore2(void);
339void octeon_mult_restore2_end(void);
340
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347static inline uint32_t octeon_npi_read32(uint64_t address)
348{
349 return cvmx_read64_uint32(address ^ 4);
350}
351
352extern struct cvmx_bootinfo *octeon_bootinfo;
353
354extern uint64_t octeon_bootloader_entry_addr;
355
356extern void (*octeon_irq_setup_secondary)(void);
357
358typedef void (*octeon_irq_ip4_handler_t)(void);
359void octeon_irq_set_ip4_handler(octeon_irq_ip4_handler_t);
360
361extern void octeon_fixup_irqs(void);
362
363extern struct semaphore octeon_bootbus_sem;
364
365struct irq_domain *octeon_irq_get_block_domain(int node, uint8_t block);
366
367#endif
368