LXR linux/arch/powerpc/platforms/powermac/pfunc

   1// SPDX-License-Identifier: GPL-2.0
   2#include <linux/types.h>
   3#include <linux/init.h>
   4#include <linux/delay.h>
   5#include <linux/kernel.h>
   6#include <linux/interrupt.h>
   7#include <linux/spinlock.h>
   8#include <linux/of_irq.h>
   9
  10#include <asm/pmac_feature.h>
  11#include <asm/pmac_pfunc.h>
  12
  13#undef DEBUG
  14#ifdef DEBUG
  15#define DBG(fmt...)     printk(fmt)
  16#else
  17#define DBG(fmt...)
  18#endif
  19
  20static irqreturn_t macio_gpio_irq(int irq, void *data)
  21{
  22        pmf_do_irq(data);
  23
  24        return IRQ_HANDLED;
  25}
  26
  27static int macio_do_gpio_irq_enable(struct pmf_function *func)
  28{
  29        unsigned int irq = irq_of_parse_and_map(func->node, 0);
  30        if (!irq)
  31                return -EINVAL;
  32        return request_irq(irq, macio_gpio_irq, 0, func->node->name, func);
  33}
  34
  35static int macio_do_gpio_irq_disable(struct pmf_function *func)
  36{
  37        unsigned int irq = irq_of_parse_and_map(func->node, 0);
  38        if (!irq)
  39                return -EINVAL;
  40        free_irq(irq, func);
  41        return 0;
  42}
  43
  44static int macio_do_gpio_write(PMF_STD_ARGS, u8 value, u8 mask)
  45{
  46        u8 __iomem *addr = (u8 __iomem *)func->driver_data;
  47        unsigned long flags;
  48        u8 tmp;
  49
  50        /* Check polarity */
  51        if (args && args->count && !args->u[0].v)
  52                value = ~value;
  53
  54        /* Toggle the GPIO */
  55        raw_spin_lock_irqsave(&feature_lock, flags);
  56        tmp = readb(addr);
  57        tmp = (tmp & ~mask) | (value & mask);
  58        DBG("Do write 0x%02x to GPIO %pOF (%p)\n",
  59            tmp, func->node, addr);
  60        writeb(tmp, addr);
  61        raw_spin_unlock_irqrestore(&feature_lock, flags);
  62
  63        return 0;
  64}
  65
  66static int macio_do_gpio_read(PMF_STD_ARGS, u8 mask, int rshift, u8 xor)
  67{
  68        u8 __iomem *addr = (u8 __iomem *)func->driver_data;
  69        u32 value;
  70
  71        /* Check if we have room for reply */
  72        if (args == NULL || args->count == 0 || args->u[0].p == NULL)
  73                return -EINVAL;
  74
  75        value = readb(addr);
  76        *args->u[0].p = ((value & mask) >> rshift) ^ xor;
  77
  78        return 0;
  79}
  80
  81static int macio_do_delay(PMF_STD_ARGS, u32 duration)
  82{
  83        /* assume we can sleep ! */
  84        msleep((duration + 999) / 1000);
  85        return 0;
  86}
  87
  88static struct pmf_handlers macio_gpio_handlers = {
  89        .irq_enable     = macio_do_gpio_irq_enable,
  90        .irq_disable    = macio_do_gpio_irq_disable,
  91        .write_gpio     = macio_do_gpio_write,
  92        .read_gpio      = macio_do_gpio_read,
  93        .delay          = macio_do_delay,
  94};
  95
  96static void macio_gpio_init_one(struct macio_chip *macio)
  97{
  98        struct device_node *gparent, *gp;
  99
 100        /*
 101         * Find the "gpio" parent node
 102         */
 103
 104        for (gparent = NULL;
 105             (gparent = of_get_next_child(macio->of_node, gparent)) != NULL;)
 106                if (strcmp(gparent->name, "gpio") == 0)
 107                        break;
 108        if (gparent == NULL)
 109                return;
 110
 111        DBG("Installing GPIO functions for macio %pOF\n",
 112            macio->of_node);
 113
 114        /*
 115         * Ok, got one, we dont need anything special to track them down, so
 116         * we just create them all
 117         */
 118        for (gp = NULL; (gp = of_get_next_child(gparent, gp)) != NULL;) {
 119                const u32 *reg = of_get_property(gp, "reg", NULL);
 120                unsigned long offset;
 121                if (reg == NULL)
 122                        continue;
 123                offset = *reg;
 124                /* Deal with old style device-tree. We can safely hard code the
 125                 * offset for now too even if it's a bit gross ...
 126                 */
 127                if (offset < 0x50)
 128                        offset += 0x50;
 129                offset += (unsigned long)macio->base;
 130                pmf_register_driver(gp, &macio_gpio_handlers, (void *)offset);
 131        }
 132
 133        DBG("Calling initial GPIO functions for macio %pOF\n",
 134            macio->of_node);
 135
 136        /* And now we run all the init ones */
 137        for (gp = NULL; (gp = of_get_next_child(gparent, gp)) != NULL;)
 138                pmf_do_functions(gp, NULL, 0, PMF_FLAGS_ON_INIT, NULL);
 139
 140        /* Note: We do not at this point implement the "at sleep" or "at wake"
 141         * functions. I yet to find any for GPIOs anyway
 142         */
 143}
 144
 145static int macio_do_write_reg32(PMF_STD_ARGS, u32 offset, u32 value, u32 mask)
 146{
 147        struct macio_chip *macio = func->driver_data;
 148        unsigned long flags;
 149
 150        raw_spin_lock_irqsave(&feature_lock, flags);
 151        MACIO_OUT32(offset, (MACIO_IN32(offset) & ~mask) | (value & mask));
 152        raw_spin_unlock_irqrestore(&feature_lock, flags);
 153        return 0;
 154}
 155
 156static int macio_do_read_reg32(PMF_STD_ARGS, u32 offset)
 157{
 158        struct macio_chip *macio = func->driver_data;
 159
 160        /* Check if we have room for reply */
 161        if (args == NULL || args->count == 0 || args->u[0].p == NULL)
 162                return -EINVAL;
 163
 164        *args->u[0].p = MACIO_IN32(offset);
 165        return 0;
 166}
 167
 168static int macio_do_write_reg8(PMF_STD_ARGS, u32 offset, u8 value, u8 mask)
 169{
 170        struct macio_chip *macio = func->driver_data;
 171        unsigned long flags;
 172
 173        raw_spin_lock_irqsave(&feature_lock, flags);
 174        MACIO_OUT8(offset, (MACIO_IN8(offset) & ~mask) | (value & mask));
 175        raw_spin_unlock_irqrestore(&feature_lock, flags);
 176        return 0;
 177}
 178
 179static int macio_do_read_reg8(PMF_STD_ARGS, u32 offset)
 180{
 181        struct macio_chip *macio = func->driver_data;
 182
 183        /* Check if we have room for reply */
 184        if (args == NULL || args->count == 0 || args->u[0].p == NULL)
 185                return -EINVAL;
 186
 187        *((u8 *)(args->u[0].p)) = MACIO_IN8(offset);
 188        return 0;
 189}
 190
 191static int macio_do_read_reg32_msrx(PMF_STD_ARGS, u32 offset, u32 mask,
 192                                    u32 shift, u32 xor)
 193{
 194        struct macio_chip *macio = func->driver_data;
 195
 196        /* Check if we have room for reply */
 197        if (args == NULL || args->count == 0 || args->u[0].p == NULL)
 198                return -EINVAL;
 199
 200        *args->u[0].p = ((MACIO_IN32(offset) & mask) >> shift) ^ xor;
 201        return 0;
 202}
 203
 204static int macio_do_read_reg8_msrx(PMF_STD_ARGS, u32 offset, u32 mask,
 205                                   u32 shift, u32 xor)
 206{
 207        struct macio_chip *macio = func->driver_data;
 208
 209        /* Check if we have room for reply */
 210        if (args == NULL || args->count == 0 || args->u[0].p == NULL)
 211                return -EINVAL;
 212
 213        *((u8 *)(args->u[0].p)) = ((MACIO_IN8(offset) & mask) >> shift) ^ xor;
 214        return 0;
 215}
 216
 217static int macio_do_write_reg32_slm(PMF_STD_ARGS, u32 offset, u32 shift,
 218                                    u32 mask)
 219{
 220        struct macio_chip *macio = func->driver_data;
 221        unsigned long flags;
 222        u32 tmp, val;
 223
 224        /* Check args */
 225        if (args == NULL || args->count == 0)
 226                return -EINVAL;
 227
 228        raw_spin_lock_irqsave(&feature_lock, flags);
 229        tmp = MACIO_IN32(offset);
 230        val = args->u[0].v << shift;
 231        tmp = (tmp & ~mask) | (val & mask);
 232        MACIO_OUT32(offset, tmp);
 233        raw_spin_unlock_irqrestore(&feature_lock, flags);
 234        return 0;
 235}
 236
 237static int macio_do_write_reg8_slm(PMF_STD_ARGS, u32 offset, u32 shift,
 238                                   u32 mask)
 239{
 240        struct macio_chip *macio = func->driver_data;
 241        unsigned long flags;
 242        u32 tmp, val;
 243
 244        /* Check args */
 245        if (args == NULL || args->count == 0)
 246                return -EINVAL;
 247
 248        raw_spin_lock_irqsave(&feature_lock, flags);
 249        tmp = MACIO_IN8(offset);
 250        val = args->u[0].v << shift;
 251        tmp = (tmp & ~mask) | (val & mask);
 252        MACIO_OUT8(offset, tmp);
 253        raw_spin_unlock_irqrestore(&feature_lock, flags);
 254        return 0;
 255}
 256
 257static struct pmf_handlers macio_mmio_handlers = {
 258        .write_reg32            = macio_do_write_reg32,
 259        .read_reg32             = macio_do_read_reg32,
 260        .write_reg8             = macio_do_write_reg8,
 261        .read_reg8              = macio_do_read_reg8,
 262        .read_reg32_msrx        = macio_do_read_reg32_msrx,
 263        .read_reg8_msrx         = macio_do_read_reg8_msrx,
 264        .write_reg32_slm        = macio_do_write_reg32_slm,
 265        .write_reg8_slm         = macio_do_write_reg8_slm,
 266        .delay                  = macio_do_delay,
 267};
 268
 269static void macio_mmio_init_one(struct macio_chip *macio)
 270{
 271        DBG("Installing MMIO functions for macio %pOF\n",
 272            macio->of_node);
 273
 274        pmf_register_driver(macio->of_node, &macio_mmio_handlers, macio);
 275}
 276
 277static struct device_node *unin_hwclock;
 278
 279static int unin_do_write_reg32(PMF_STD_ARGS, u32 offset, u32 value, u32 mask)
 280{
 281        unsigned long flags;
 282
 283        raw_spin_lock_irqsave(&feature_lock, flags);
 284        /* This is fairly bogus in darwin, but it should work for our needs
 285         * implemeted that way:
 286         */
 287        UN_OUT(offset, (UN_IN(offset) & ~mask) | (value & mask));
 288        raw_spin_unlock_irqrestore(&feature_lock, flags);
 289        return 0;
 290}
 291
 292
 293static struct pmf_handlers unin_mmio_handlers = {
 294        .write_reg32            = unin_do_write_reg32,
 295        .delay                  = macio_do_delay,
 296};
 297
 298static void uninorth_install_pfunc(void)
 299{
 300        struct device_node *np;
 301
 302        DBG("Installing functions for UniN %pOF\n",
 303            uninorth_node);
 304
 305        /*
 306         * Install handlers for the bridge itself
 307         */
 308        pmf_register_driver(uninorth_node, &unin_mmio_handlers, NULL);
 309        pmf_do_functions(uninorth_node, NULL, 0, PMF_FLAGS_ON_INIT, NULL);
 310
 311
 312        /*
 313         * Install handlers for the hwclock child if any
 314         */
 315        for (np = NULL; (np = of_get_next_child(uninorth_node, np)) != NULL;)
 316                if (strcmp(np->name, "hw-clock") == 0) {
 317                        unin_hwclock = np;
 318                        break;
 319                }
 320        if (unin_hwclock) {
 321                DBG("Installing functions for UniN clock %pOF\n",
 322                    unin_hwclock);
 323                pmf_register_driver(unin_hwclock, &unin_mmio_handlers, NULL);
 324                pmf_do_functions(unin_hwclock, NULL, 0, PMF_FLAGS_ON_INIT,
 325                                 NULL);
 326        }
 327}
 328
 329/* We export this as the SMP code might init us early */
 330int __init pmac_pfunc_base_install(void)
 331{
 332        static int pfbase_inited;
 333        int i;
 334
 335        if (pfbase_inited)
 336                return 0;
 337        pfbase_inited = 1;
 338
 339        if (!machine_is(powermac))
 340                return 0;
 341
 342        DBG("Installing base platform functions...\n");
 343
 344        /*
 345         * Locate mac-io chips and install handlers
 346         */
 347        for (i = 0 ; i < MAX_MACIO_CHIPS; i++) {
 348                if (macio_chips[i].of_node) {
 349                        macio_mmio_init_one(&macio_chips[i]);
 350                        macio_gpio_init_one(&macio_chips[i]);
 351                }
 352        }
 353
 354        /*
 355         * Install handlers for northbridge and direct mapped hwclock
 356         * if any. We do not implement the config space access callback
 357         * which is only ever used for functions that we do not call in
 358         * the current driver (enabling/disabling cells in U2, mostly used
 359         * to restore the PCI settings, we do that differently)
 360         */
 361        if (uninorth_node && uninorth_base)
 362                uninorth_install_pfunc();
 363
 364        DBG("All base functions installed\n");
 365
 366        return 0;
 367}
 368machine_arch_initcall(powermac, pmac_pfunc_base_install);
 369
 370#ifdef CONFIG_PM
 371
 372/* Those can be called by pmac_feature. Ultimately, I should use a sysdev
 373 * or a device, but for now, that's good enough until I sort out some
 374 * ordering issues. Also, we do not bother with GPIOs, as so far I yet have
 375 * to see a case where a GPIO function has the on-suspend or on-resume bit
 376 */
 377void pmac_pfunc_base_suspend(void)
 378{
 379        int i;
 380
 381        for (i = 0 ; i < MAX_MACIO_CHIPS; i++) {
 382                if (macio_chips[i].of_node)
 383                        pmf_do_functions(macio_chips[i].of_node, NULL, 0,
 384                                         PMF_FLAGS_ON_SLEEP, NULL);
 385        }
 386        if (uninorth_node)
 387                pmf_do_functions(uninorth_node, NULL, 0,
 388                                 PMF_FLAGS_ON_SLEEP, NULL);
 389        if (unin_hwclock)
 390                pmf_do_functions(unin_hwclock, NULL, 0,
 391                                 PMF_FLAGS_ON_SLEEP, NULL);
 392}
 393
 394void pmac_pfunc_base_resume(void)
 395{
 396        int i;
 397
 398        if (unin_hwclock)
 399                pmf_do_functions(unin_hwclock, NULL, 0,
 400                                 PMF_FLAGS_ON_WAKE, NULL);
 401        if (uninorth_node)
 402                pmf_do_functions(uninorth_node, NULL, 0,
 403                                 PMF_FLAGS_ON_WAKE, NULL);
 404        for (i = 0 ; i < MAX_MACIO_CHIPS; i++) {
 405                if (macio_chips[i].of_node)
 406                        pmf_do_functions(macio_chips[i].of_node, NULL, 0,
 407                                         PMF_FLAGS_ON_WAKE, NULL);
 408        }
 409}
 410
 411#endif /* CONFIG_PM */
 412