linux/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_thermal.c
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   1/*
   2 * Copyright 2017 Advanced Micro Devices, Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 */
  23
  24#include "vega12_thermal.h"
  25#include "vega12_hwmgr.h"
  26#include "vega12_smumgr.h"
  27#include "vega12_ppsmc.h"
  28#include "vega12_inc.h"
  29#include "soc15_common.h"
  30#include "pp_debug.h"
  31
  32static int vega12_get_current_rpm(struct pp_hwmgr *hwmgr, uint32_t *current_rpm)
  33{
  34        PP_ASSERT_WITH_CODE(!smum_send_msg_to_smc(hwmgr,
  35                                PPSMC_MSG_GetCurrentRpm),
  36                        "Attempt to get current RPM from SMC Failed!",
  37                        return -1);
  38        PP_ASSERT_WITH_CODE(!vega12_read_arg_from_smc(hwmgr,
  39                        current_rpm),
  40                        "Attempt to read current RPM from SMC Failed!",
  41                        return -1);
  42        return 0;
  43}
  44
  45int vega12_fan_ctrl_get_fan_speed_info(struct pp_hwmgr *hwmgr,
  46                struct phm_fan_speed_info *fan_speed_info)
  47{
  48        memset(fan_speed_info, 0, sizeof(*fan_speed_info));
  49        fan_speed_info->supports_percent_read = false;
  50        fan_speed_info->supports_percent_write = false;
  51        fan_speed_info->supports_rpm_read = true;
  52        fan_speed_info->supports_rpm_write = true;
  53
  54        return 0;
  55}
  56
  57int vega12_fan_ctrl_get_fan_speed_rpm(struct pp_hwmgr *hwmgr, uint32_t *speed)
  58{
  59        *speed = 0;
  60
  61        return vega12_get_current_rpm(hwmgr, speed);
  62}
  63
  64/**
  65 * @fn vega12_enable_fan_control_feature
  66 * @brief Enables the SMC Fan Control Feature.
  67 *
  68 * @param    hwmgr - the address of the powerplay hardware manager.
  69 * @return   0 on success. -1 otherwise.
  70 */
  71static int vega12_enable_fan_control_feature(struct pp_hwmgr *hwmgr)
  72{
  73#if 0
  74        struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
  75
  76        if (data->smu_features[GNLD_FAN_CONTROL].supported) {
  77                PP_ASSERT_WITH_CODE(!vega12_enable_smc_features(
  78                                hwmgr, true,
  79                                data->smu_features[GNLD_FAN_CONTROL].
  80                                smu_feature_bitmap),
  81                                "Attempt to Enable FAN CONTROL feature Failed!",
  82                                return -1);
  83                data->smu_features[GNLD_FAN_CONTROL].enabled = true;
  84        }
  85#endif
  86        return 0;
  87}
  88
  89static int vega12_disable_fan_control_feature(struct pp_hwmgr *hwmgr)
  90{
  91#if 0
  92        struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
  93
  94        if (data->smu_features[GNLD_FAN_CONTROL].supported) {
  95                PP_ASSERT_WITH_CODE(!vega12_enable_smc_features(
  96                                hwmgr, false,
  97                                data->smu_features[GNLD_FAN_CONTROL].
  98                                smu_feature_bitmap),
  99                                "Attempt to Enable FAN CONTROL feature Failed!",
 100                                return -1);
 101                data->smu_features[GNLD_FAN_CONTROL].enabled = false;
 102        }
 103#endif
 104        return 0;
 105}
 106
 107int vega12_fan_ctrl_start_smc_fan_control(struct pp_hwmgr *hwmgr)
 108{
 109        struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
 110
 111        if (data->smu_features[GNLD_FAN_CONTROL].supported)
 112                PP_ASSERT_WITH_CODE(
 113                                !vega12_enable_fan_control_feature(hwmgr),
 114                                "Attempt to Enable SMC FAN CONTROL Feature Failed!",
 115                                return -1);
 116
 117        return 0;
 118}
 119
 120
 121int vega12_fan_ctrl_stop_smc_fan_control(struct pp_hwmgr *hwmgr)
 122{
 123        struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
 124
 125        if (data->smu_features[GNLD_FAN_CONTROL].supported)
 126                PP_ASSERT_WITH_CODE(!vega12_disable_fan_control_feature(hwmgr),
 127                                "Attempt to Disable SMC FAN CONTROL Feature Failed!",
 128                                return -1);
 129
 130        return 0;
 131}
 132
 133/**
 134* Reset Fan Speed to default.
 135* @param    hwmgr  the address of the powerplay hardware manager.
 136* @exception Always succeeds.
 137*/
 138int vega12_fan_ctrl_reset_fan_speed_to_default(struct pp_hwmgr *hwmgr)
 139{
 140        return vega12_fan_ctrl_start_smc_fan_control(hwmgr);
 141}
 142
 143/**
 144* Reads the remote temperature from the SIslands thermal controller.
 145*
 146* @param    hwmgr The address of the hardware manager.
 147*/
 148int vega12_thermal_get_temperature(struct pp_hwmgr *hwmgr)
 149{
 150        struct amdgpu_device *adev = hwmgr->adev;
 151        int temp = 0;
 152
 153        temp = RREG32_SOC15(THM, 0, mmCG_MULT_THERMAL_STATUS);
 154
 155        temp = (temp & CG_MULT_THERMAL_STATUS__CTF_TEMP_MASK) >>
 156                        CG_MULT_THERMAL_STATUS__CTF_TEMP__SHIFT;
 157
 158        temp = temp & 0x1ff;
 159
 160        temp *= PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
 161        return temp;
 162}
 163
 164/**
 165* Set the requested temperature range for high and low alert signals
 166*
 167* @param    hwmgr The address of the hardware manager.
 168* @param    range Temperature range to be programmed for
 169*           high and low alert signals
 170* @exception PP_Result_BadInput if the input data is not valid.
 171*/
 172static int vega12_thermal_set_temperature_range(struct pp_hwmgr *hwmgr,
 173                struct PP_TemperatureRange *range)
 174{
 175        struct amdgpu_device *adev = hwmgr->adev;
 176        int low = VEGA12_THERMAL_MINIMUM_ALERT_TEMP *
 177                        PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
 178        int high = VEGA12_THERMAL_MAXIMUM_ALERT_TEMP *
 179                        PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
 180        uint32_t val;
 181
 182        if (low < range->min)
 183                low = range->min;
 184        if (high > range->max)
 185                high = range->max;
 186
 187        if (low > high)
 188                return -EINVAL;
 189
 190        val = RREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL);
 191
 192        val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, MAX_IH_CREDIT, 5);
 193        val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, THERM_IH_HW_ENA, 1);
 194        val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTH, (high / PP_TEMPERATURE_UNITS_PER_CENTIGRADES));
 195        val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTL, (low / PP_TEMPERATURE_UNITS_PER_CENTIGRADES));
 196        val = val & (~THM_THERMAL_INT_CTRL__THERM_TRIGGER_MASK_MASK);
 197
 198        WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL, val);
 199
 200        return 0;
 201}
 202
 203/**
 204* Enable thermal alerts on the RV770 thermal controller.
 205*
 206* @param    hwmgr The address of the hardware manager.
 207*/
 208static int vega12_thermal_enable_alert(struct pp_hwmgr *hwmgr)
 209{
 210        struct amdgpu_device *adev = hwmgr->adev;
 211        uint32_t val = 0;
 212
 213        val |= (1 << THM_THERMAL_INT_ENA__THERM_INTH_CLR__SHIFT);
 214        val |= (1 << THM_THERMAL_INT_ENA__THERM_INTL_CLR__SHIFT);
 215        val |= (1 << THM_THERMAL_INT_ENA__THERM_TRIGGER_CLR__SHIFT);
 216
 217        WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_ENA, val);
 218
 219        return 0;
 220}
 221
 222/**
 223* Disable thermal alerts on the RV770 thermal controller.
 224* @param    hwmgr The address of the hardware manager.
 225*/
 226int vega12_thermal_disable_alert(struct pp_hwmgr *hwmgr)
 227{
 228        struct amdgpu_device *adev = hwmgr->adev;
 229
 230        WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_ENA, 0);
 231
 232        return 0;
 233}
 234
 235/**
 236* Uninitialize the thermal controller.
 237* Currently just disables alerts.
 238* @param    hwmgr The address of the hardware manager.
 239*/
 240int vega12_thermal_stop_thermal_controller(struct pp_hwmgr *hwmgr)
 241{
 242        int result = vega12_thermal_disable_alert(hwmgr);
 243
 244        return result;
 245}
 246
 247/**
 248* Set up the fan table to control the fan using the SMC.
 249* @param    hwmgr  the address of the powerplay hardware manager.
 250* @param    pInput the pointer to input data
 251* @param    pOutput the pointer to output data
 252* @param    pStorage the pointer to temporary storage
 253* @param    Result the last failure code
 254* @return   result from set temperature range routine
 255*/
 256int vega12_thermal_setup_fan_table(struct pp_hwmgr *hwmgr)
 257{
 258        int ret;
 259        struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
 260        PPTable_t *table = &(data->smc_state_table.pp_table);
 261
 262        ret = smum_send_msg_to_smc_with_parameter(hwmgr,
 263                                PPSMC_MSG_SetFanTemperatureTarget,
 264                                (uint32_t)table->FanTargetTemperature);
 265
 266        return ret;
 267}
 268
 269/**
 270* Start the fan control on the SMC.
 271* @param    hwmgr  the address of the powerplay hardware manager.
 272* @param    pInput the pointer to input data
 273* @param    pOutput the pointer to output data
 274* @param    pStorage the pointer to temporary storage
 275* @param    Result the last failure code
 276* @return   result from set temperature range routine
 277*/
 278int vega12_thermal_start_smc_fan_control(struct pp_hwmgr *hwmgr)
 279{
 280        /* If the fantable setup has failed we could have disabled
 281         * PHM_PlatformCaps_MicrocodeFanControl even after
 282         * this function was included in the table.
 283         * Make sure that we still think controlling the fan is OK.
 284         */
 285        if (PP_CAP(PHM_PlatformCaps_MicrocodeFanControl))
 286                vega12_fan_ctrl_start_smc_fan_control(hwmgr);
 287
 288        return 0;
 289}
 290
 291
 292int vega12_start_thermal_controller(struct pp_hwmgr *hwmgr,
 293                                struct PP_TemperatureRange *range)
 294{
 295        int ret = 0;
 296
 297        if (range == NULL)
 298                return -EINVAL;
 299
 300        ret = vega12_thermal_set_temperature_range(hwmgr, range);
 301        if (ret)
 302                return -EINVAL;
 303
 304        vega12_thermal_enable_alert(hwmgr);
 305        /* We should restrict performance levels to low before we halt the SMC.
 306         * On the other hand we are still in boot state when we do this
 307         * so it would be pointless.
 308         * If this assumption changes we have to revisit this table.
 309         */
 310        ret = vega12_thermal_setup_fan_table(hwmgr);
 311        if (ret)
 312                return -EINVAL;
 313
 314        vega12_thermal_start_smc_fan_control(hwmgr);
 315
 316        return 0;
 317};
 318