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31#ifndef __IW_CXGB4_H__
32#define __IW_CXGB4_H__
33
34#include <linux/mutex.h>
35#include <linux/list.h>
36#include <linux/spinlock.h>
37#include <linux/idr.h>
38#include <linux/completion.h>
39#include <linux/netdevice.h>
40#include <linux/sched/mm.h>
41#include <linux/pci.h>
42#include <linux/dma-mapping.h>
43#include <linux/inet.h>
44#include <linux/wait.h>
45#include <linux/kref.h>
46#include <linux/timer.h>
47#include <linux/io.h>
48#include <linux/workqueue.h>
49
50#include <asm/byteorder.h>
51
52#include <net/net_namespace.h>
53
54#include <rdma/ib_verbs.h>
55#include <rdma/iw_cm.h>
56#include <rdma/rdma_netlink.h>
57#include <rdma/iw_portmap.h>
58#include <rdma/restrack.h>
59
60#include "cxgb4.h"
61#include "cxgb4_uld.h"
62#include "l2t.h"
63#include <rdma/cxgb4-abi.h>
64
65#define DRV_NAME "iw_cxgb4"
66#define MOD DRV_NAME ":"
67
68#ifdef pr_fmt
69#undef pr_fmt
70#endif
71
72#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
73
74#include "t4.h"
75
76#define PBL_OFF(rdev_p, a) ((a) - (rdev_p)->lldi.vr->pbl.start)
77#define RQT_OFF(rdev_p, a) ((a) - (rdev_p)->lldi.vr->rq.start)
78
79static inline void *cplhdr(struct sk_buff *skb)
80{
81 return skb->data;
82}
83
84#define C4IW_ID_TABLE_F_RANDOM 1
85#define C4IW_ID_TABLE_F_EMPTY 2
86
87struct c4iw_id_table {
88 u32 flags;
89 u32 start;
90 u32 last;
91 u32 max;
92 spinlock_t lock;
93 unsigned long *table;
94};
95
96struct c4iw_resource {
97 struct c4iw_id_table tpt_table;
98 struct c4iw_id_table qid_table;
99 struct c4iw_id_table pdid_table;
100};
101
102struct c4iw_qid_list {
103 struct list_head entry;
104 u32 qid;
105};
106
107struct c4iw_dev_ucontext {
108 struct list_head qpids;
109 struct list_head cqids;
110 struct mutex lock;
111 struct kref kref;
112};
113
114enum c4iw_rdev_flags {
115 T4_FATAL_ERROR = (1<<0),
116 T4_STATUS_PAGE_DISABLED = (1<<1),
117};
118
119struct c4iw_stat {
120 u64 total;
121 u64 cur;
122 u64 max;
123 u64 fail;
124};
125
126struct c4iw_stats {
127 struct mutex lock;
128 struct c4iw_stat qid;
129 struct c4iw_stat pd;
130 struct c4iw_stat stag;
131 struct c4iw_stat pbl;
132 struct c4iw_stat rqt;
133 struct c4iw_stat ocqp;
134 u64 db_full;
135 u64 db_empty;
136 u64 db_drop;
137 u64 db_state_transitions;
138 u64 db_fc_interruptions;
139 u64 tcam_full;
140 u64 act_ofld_conn_fails;
141 u64 pas_ofld_conn_fails;
142 u64 neg_adv;
143};
144
145struct c4iw_hw_queue {
146 int t4_eq_status_entries;
147 int t4_max_eq_size;
148 int t4_max_iq_size;
149 int t4_max_rq_size;
150 int t4_max_sq_size;
151 int t4_max_qp_depth;
152 int t4_max_cq_depth;
153 int t4_stat_len;
154};
155
156struct wr_log_entry {
157 ktime_t post_host_time;
158 ktime_t poll_host_time;
159 u64 post_sge_ts;
160 u64 cqe_sge_ts;
161 u64 poll_sge_ts;
162 u16 qid;
163 u16 wr_id;
164 u8 opcode;
165 u8 valid;
166};
167
168struct c4iw_rdev {
169 struct c4iw_resource resource;
170 u32 qpmask;
171 u32 cqmask;
172 struct c4iw_dev_ucontext uctx;
173 struct gen_pool *pbl_pool;
174 struct gen_pool *rqt_pool;
175 struct gen_pool *ocqp_pool;
176 u32 flags;
177 struct cxgb4_lld_info lldi;
178 unsigned long bar2_pa;
179 void __iomem *bar2_kva;
180 unsigned long oc_mw_pa;
181 void __iomem *oc_mw_kva;
182 struct c4iw_stats stats;
183 struct c4iw_hw_queue hw_queue;
184 struct t4_dev_status_page *status_page;
185 atomic_t wr_log_idx;
186 struct wr_log_entry *wr_log;
187 int wr_log_size;
188 struct workqueue_struct *free_workq;
189 struct completion rqt_compl;
190 struct completion pbl_compl;
191 struct kref rqt_kref;
192 struct kref pbl_kref;
193};
194
195static inline int c4iw_fatal_error(struct c4iw_rdev *rdev)
196{
197 return rdev->flags & T4_FATAL_ERROR;
198}
199
200static inline int c4iw_num_stags(struct c4iw_rdev *rdev)
201{
202 return (int)(rdev->lldi.vr->stag.size >> 5);
203}
204
205#define C4IW_WR_TO (60*HZ)
206
207struct c4iw_wr_wait {
208 struct completion completion;
209 int ret;
210 struct kref kref;
211};
212
213void _c4iw_free_wr_wait(struct kref *kref);
214
215static inline void c4iw_put_wr_wait(struct c4iw_wr_wait *wr_waitp)
216{
217 pr_debug("wr_wait %p ref before put %u\n", wr_waitp,
218 kref_read(&wr_waitp->kref));
219 WARN_ON(kref_read(&wr_waitp->kref) == 0);
220 kref_put(&wr_waitp->kref, _c4iw_free_wr_wait);
221}
222
223static inline void c4iw_get_wr_wait(struct c4iw_wr_wait *wr_waitp)
224{
225 pr_debug("wr_wait %p ref before get %u\n", wr_waitp,
226 kref_read(&wr_waitp->kref));
227 WARN_ON(kref_read(&wr_waitp->kref) == 0);
228 kref_get(&wr_waitp->kref);
229}
230
231static inline void c4iw_init_wr_wait(struct c4iw_wr_wait *wr_waitp)
232{
233 wr_waitp->ret = 0;
234 init_completion(&wr_waitp->completion);
235}
236
237static inline void _c4iw_wake_up(struct c4iw_wr_wait *wr_waitp, int ret,
238 bool deref)
239{
240 wr_waitp->ret = ret;
241 complete(&wr_waitp->completion);
242 if (deref)
243 c4iw_put_wr_wait(wr_waitp);
244}
245
246static inline void c4iw_wake_up_noref(struct c4iw_wr_wait *wr_waitp, int ret)
247{
248 _c4iw_wake_up(wr_waitp, ret, false);
249}
250
251static inline void c4iw_wake_up_deref(struct c4iw_wr_wait *wr_waitp, int ret)
252{
253 _c4iw_wake_up(wr_waitp, ret, true);
254}
255
256static inline int c4iw_wait_for_reply(struct c4iw_rdev *rdev,
257 struct c4iw_wr_wait *wr_waitp,
258 u32 hwtid, u32 qpid,
259 const char *func)
260{
261 int ret;
262
263 if (c4iw_fatal_error(rdev)) {
264 wr_waitp->ret = -EIO;
265 goto out;
266 }
267
268 ret = wait_for_completion_timeout(&wr_waitp->completion, C4IW_WR_TO);
269 if (!ret) {
270 pr_err("%s - Device %s not responding (disabling device) - tid %u qpid %u\n",
271 func, pci_name(rdev->lldi.pdev), hwtid, qpid);
272 rdev->flags |= T4_FATAL_ERROR;
273 wr_waitp->ret = -EIO;
274 goto out;
275 }
276 if (wr_waitp->ret)
277 pr_debug("%s: FW reply %d tid %u qpid %u\n",
278 pci_name(rdev->lldi.pdev), wr_waitp->ret, hwtid, qpid);
279out:
280 return wr_waitp->ret;
281}
282
283int c4iw_ofld_send(struct c4iw_rdev *rdev, struct sk_buff *skb);
284
285static inline int c4iw_ref_send_wait(struct c4iw_rdev *rdev,
286 struct sk_buff *skb,
287 struct c4iw_wr_wait *wr_waitp,
288 u32 hwtid, u32 qpid,
289 const char *func)
290{
291 int ret;
292
293 pr_debug("%s wr_wait %p hwtid %u qpid %u\n", func, wr_waitp, hwtid,
294 qpid);
295 c4iw_get_wr_wait(wr_waitp);
296 ret = c4iw_ofld_send(rdev, skb);
297 if (ret) {
298 c4iw_put_wr_wait(wr_waitp);
299 return ret;
300 }
301 return c4iw_wait_for_reply(rdev, wr_waitp, hwtid, qpid, func);
302}
303
304enum db_state {
305 NORMAL = 0,
306 FLOW_CONTROL = 1,
307 RECOVERY = 2,
308 STOPPED = 3
309};
310
311struct c4iw_dev {
312 struct ib_device ibdev;
313 struct c4iw_rdev rdev;
314 u32 device_cap_flags;
315 struct idr cqidr;
316 struct idr qpidr;
317 struct idr mmidr;
318 spinlock_t lock;
319 struct mutex db_mutex;
320 struct dentry *debugfs_root;
321 enum db_state db_state;
322 struct idr hwtid_idr;
323 struct idr atid_idr;
324 struct idr stid_idr;
325 struct list_head db_fc_list;
326 u32 avail_ird;
327 wait_queue_head_t wait;
328};
329
330struct uld_ctx {
331 struct list_head entry;
332 struct cxgb4_lld_info lldi;
333 struct c4iw_dev *dev;
334 struct work_struct reg_work;
335};
336
337static inline struct c4iw_dev *to_c4iw_dev(struct ib_device *ibdev)
338{
339 return container_of(ibdev, struct c4iw_dev, ibdev);
340}
341
342static inline struct c4iw_dev *rdev_to_c4iw_dev(struct c4iw_rdev *rdev)
343{
344 return container_of(rdev, struct c4iw_dev, rdev);
345}
346
347static inline struct c4iw_cq *get_chp(struct c4iw_dev *rhp, u32 cqid)
348{
349 return idr_find(&rhp->cqidr, cqid);
350}
351
352static inline struct c4iw_qp *get_qhp(struct c4iw_dev *rhp, u32 qpid)
353{
354 return idr_find(&rhp->qpidr, qpid);
355}
356
357static inline struct c4iw_mr *get_mhp(struct c4iw_dev *rhp, u32 mmid)
358{
359 return idr_find(&rhp->mmidr, mmid);
360}
361
362static inline int _insert_handle(struct c4iw_dev *rhp, struct idr *idr,
363 void *handle, u32 id, int lock)
364{
365 int ret;
366
367 if (lock) {
368 idr_preload(GFP_KERNEL);
369 spin_lock_irq(&rhp->lock);
370 }
371
372 ret = idr_alloc(idr, handle, id, id + 1, GFP_ATOMIC);
373
374 if (lock) {
375 spin_unlock_irq(&rhp->lock);
376 idr_preload_end();
377 }
378
379 return ret < 0 ? ret : 0;
380}
381
382static inline int insert_handle(struct c4iw_dev *rhp, struct idr *idr,
383 void *handle, u32 id)
384{
385 return _insert_handle(rhp, idr, handle, id, 1);
386}
387
388static inline int insert_handle_nolock(struct c4iw_dev *rhp, struct idr *idr,
389 void *handle, u32 id)
390{
391 return _insert_handle(rhp, idr, handle, id, 0);
392}
393
394static inline void _remove_handle(struct c4iw_dev *rhp, struct idr *idr,
395 u32 id, int lock)
396{
397 if (lock)
398 spin_lock_irq(&rhp->lock);
399 idr_remove(idr, id);
400 if (lock)
401 spin_unlock_irq(&rhp->lock);
402}
403
404static inline void remove_handle(struct c4iw_dev *rhp, struct idr *idr, u32 id)
405{
406 _remove_handle(rhp, idr, id, 1);
407}
408
409static inline void remove_handle_nolock(struct c4iw_dev *rhp,
410 struct idr *idr, u32 id)
411{
412 _remove_handle(rhp, idr, id, 0);
413}
414
415extern uint c4iw_max_read_depth;
416
417static inline int cur_max_read_depth(struct c4iw_dev *dev)
418{
419 return min(dev->rdev.lldi.max_ordird_qp, c4iw_max_read_depth);
420}
421
422struct c4iw_pd {
423 struct ib_pd ibpd;
424 u32 pdid;
425 struct c4iw_dev *rhp;
426};
427
428static inline struct c4iw_pd *to_c4iw_pd(struct ib_pd *ibpd)
429{
430 return container_of(ibpd, struct c4iw_pd, ibpd);
431}
432
433struct tpt_attributes {
434 u64 len;
435 u64 va_fbo;
436 enum fw_ri_mem_perms perms;
437 u32 stag;
438 u32 pdid;
439 u32 qpid;
440 u32 pbl_addr;
441 u32 pbl_size;
442 u32 state:1;
443 u32 type:2;
444 u32 rsvd:1;
445 u32 remote_invaliate_disable:1;
446 u32 zbva:1;
447 u32 mw_bind_enable:1;
448 u32 page_size:5;
449};
450
451struct c4iw_mr {
452 struct ib_mr ibmr;
453 struct ib_umem *umem;
454 struct c4iw_dev *rhp;
455 struct sk_buff *dereg_skb;
456 u64 kva;
457 struct tpt_attributes attr;
458 u64 *mpl;
459 dma_addr_t mpl_addr;
460 u32 max_mpl_len;
461 u32 mpl_len;
462 struct c4iw_wr_wait *wr_waitp;
463};
464
465static inline struct c4iw_mr *to_c4iw_mr(struct ib_mr *ibmr)
466{
467 return container_of(ibmr, struct c4iw_mr, ibmr);
468}
469
470struct c4iw_mw {
471 struct ib_mw ibmw;
472 struct c4iw_dev *rhp;
473 struct sk_buff *dereg_skb;
474 u64 kva;
475 struct tpt_attributes attr;
476 struct c4iw_wr_wait *wr_waitp;
477};
478
479static inline struct c4iw_mw *to_c4iw_mw(struct ib_mw *ibmw)
480{
481 return container_of(ibmw, struct c4iw_mw, ibmw);
482}
483
484struct c4iw_cq {
485 struct ib_cq ibcq;
486 struct c4iw_dev *rhp;
487 struct sk_buff *destroy_skb;
488 struct t4_cq cq;
489 spinlock_t lock;
490 spinlock_t comp_handler_lock;
491 atomic_t refcnt;
492 wait_queue_head_t wait;
493 struct c4iw_wr_wait *wr_waitp;
494};
495
496static inline struct c4iw_cq *to_c4iw_cq(struct ib_cq *ibcq)
497{
498 return container_of(ibcq, struct c4iw_cq, ibcq);
499}
500
501struct c4iw_mpa_attributes {
502 u8 initiator;
503 u8 recv_marker_enabled;
504 u8 xmit_marker_enabled;
505 u8 crc_enabled;
506 u8 enhanced_rdma_conn;
507 u8 version;
508 u8 p2p_type;
509};
510
511struct c4iw_qp_attributes {
512 u32 scq;
513 u32 rcq;
514 u32 sq_num_entries;
515 u32 rq_num_entries;
516 u32 sq_max_sges;
517 u32 sq_max_sges_rdma_write;
518 u32 rq_max_sges;
519 u32 state;
520 u8 enable_rdma_read;
521 u8 enable_rdma_write;
522 u8 enable_bind;
523 u8 enable_mmid0_fastreg;
524 u32 max_ord;
525 u32 max_ird;
526 u32 pd;
527 u32 next_state;
528 char terminate_buffer[52];
529 u32 terminate_msg_len;
530 u8 is_terminate_local;
531 struct c4iw_mpa_attributes mpa_attr;
532 struct c4iw_ep *llp_stream_handle;
533 u8 layer_etype;
534 u8 ecode;
535 u16 sq_db_inc;
536 u16 rq_db_inc;
537 u8 send_term;
538};
539
540struct c4iw_qp {
541 struct ib_qp ibqp;
542 struct list_head db_fc_entry;
543 struct c4iw_dev *rhp;
544 struct c4iw_ep *ep;
545 struct c4iw_qp_attributes attr;
546 struct t4_wq wq;
547 spinlock_t lock;
548 struct mutex mutex;
549 struct kref kref;
550 wait_queue_head_t wait;
551 int sq_sig_all;
552 struct work_struct free_work;
553 struct c4iw_ucontext *ucontext;
554 struct c4iw_wr_wait *wr_waitp;
555};
556
557static inline struct c4iw_qp *to_c4iw_qp(struct ib_qp *ibqp)
558{
559 return container_of(ibqp, struct c4iw_qp, ibqp);
560}
561
562struct c4iw_ucontext {
563 struct ib_ucontext ibucontext;
564 struct c4iw_dev_ucontext uctx;
565 u32 key;
566 spinlock_t mmap_lock;
567 struct list_head mmaps;
568 struct kref kref;
569};
570
571static inline struct c4iw_ucontext *to_c4iw_ucontext(struct ib_ucontext *c)
572{
573 return container_of(c, struct c4iw_ucontext, ibucontext);
574}
575
576void _c4iw_free_ucontext(struct kref *kref);
577
578static inline void c4iw_put_ucontext(struct c4iw_ucontext *ucontext)
579{
580 kref_put(&ucontext->kref, _c4iw_free_ucontext);
581}
582
583static inline void c4iw_get_ucontext(struct c4iw_ucontext *ucontext)
584{
585 kref_get(&ucontext->kref);
586}
587
588struct c4iw_mm_entry {
589 struct list_head entry;
590 u64 addr;
591 u32 key;
592 unsigned len;
593};
594
595static inline struct c4iw_mm_entry *remove_mmap(struct c4iw_ucontext *ucontext,
596 u32 key, unsigned len)
597{
598 struct list_head *pos, *nxt;
599 struct c4iw_mm_entry *mm;
600
601 spin_lock(&ucontext->mmap_lock);
602 list_for_each_safe(pos, nxt, &ucontext->mmaps) {
603
604 mm = list_entry(pos, struct c4iw_mm_entry, entry);
605 if (mm->key == key && mm->len == len) {
606 list_del_init(&mm->entry);
607 spin_unlock(&ucontext->mmap_lock);
608 pr_debug("key 0x%x addr 0x%llx len %d\n", key,
609 (unsigned long long)mm->addr, mm->len);
610 return mm;
611 }
612 }
613 spin_unlock(&ucontext->mmap_lock);
614 return NULL;
615}
616
617static inline void insert_mmap(struct c4iw_ucontext *ucontext,
618 struct c4iw_mm_entry *mm)
619{
620 spin_lock(&ucontext->mmap_lock);
621 pr_debug("key 0x%x addr 0x%llx len %d\n",
622 mm->key, (unsigned long long)mm->addr, mm->len);
623 list_add_tail(&mm->entry, &ucontext->mmaps);
624 spin_unlock(&ucontext->mmap_lock);
625}
626
627enum c4iw_qp_attr_mask {
628 C4IW_QP_ATTR_NEXT_STATE = 1 << 0,
629 C4IW_QP_ATTR_SQ_DB = 1<<1,
630 C4IW_QP_ATTR_RQ_DB = 1<<2,
631 C4IW_QP_ATTR_ENABLE_RDMA_READ = 1 << 7,
632 C4IW_QP_ATTR_ENABLE_RDMA_WRITE = 1 << 8,
633 C4IW_QP_ATTR_ENABLE_RDMA_BIND = 1 << 9,
634 C4IW_QP_ATTR_MAX_ORD = 1 << 11,
635 C4IW_QP_ATTR_MAX_IRD = 1 << 12,
636 C4IW_QP_ATTR_LLP_STREAM_HANDLE = 1 << 22,
637 C4IW_QP_ATTR_STREAM_MSG_BUFFER = 1 << 23,
638 C4IW_QP_ATTR_MPA_ATTR = 1 << 24,
639 C4IW_QP_ATTR_QP_CONTEXT_ACTIVATE = 1 << 25,
640 C4IW_QP_ATTR_VALID_MODIFY = (C4IW_QP_ATTR_ENABLE_RDMA_READ |
641 C4IW_QP_ATTR_ENABLE_RDMA_WRITE |
642 C4IW_QP_ATTR_MAX_ORD |
643 C4IW_QP_ATTR_MAX_IRD |
644 C4IW_QP_ATTR_LLP_STREAM_HANDLE |
645 C4IW_QP_ATTR_STREAM_MSG_BUFFER |
646 C4IW_QP_ATTR_MPA_ATTR |
647 C4IW_QP_ATTR_QP_CONTEXT_ACTIVATE)
648};
649
650int c4iw_modify_qp(struct c4iw_dev *rhp,
651 struct c4iw_qp *qhp,
652 enum c4iw_qp_attr_mask mask,
653 struct c4iw_qp_attributes *attrs,
654 int internal);
655
656enum c4iw_qp_state {
657 C4IW_QP_STATE_IDLE,
658 C4IW_QP_STATE_RTS,
659 C4IW_QP_STATE_ERROR,
660 C4IW_QP_STATE_TERMINATE,
661 C4IW_QP_STATE_CLOSING,
662 C4IW_QP_STATE_TOT
663};
664
665static inline int c4iw_convert_state(enum ib_qp_state ib_state)
666{
667 switch (ib_state) {
668 case IB_QPS_RESET:
669 case IB_QPS_INIT:
670 return C4IW_QP_STATE_IDLE;
671 case IB_QPS_RTS:
672 return C4IW_QP_STATE_RTS;
673 case IB_QPS_SQD:
674 return C4IW_QP_STATE_CLOSING;
675 case IB_QPS_SQE:
676 return C4IW_QP_STATE_TERMINATE;
677 case IB_QPS_ERR:
678 return C4IW_QP_STATE_ERROR;
679 default:
680 return -1;
681 }
682}
683
684static inline int to_ib_qp_state(int c4iw_qp_state)
685{
686 switch (c4iw_qp_state) {
687 case C4IW_QP_STATE_IDLE:
688 return IB_QPS_INIT;
689 case C4IW_QP_STATE_RTS:
690 return IB_QPS_RTS;
691 case C4IW_QP_STATE_CLOSING:
692 return IB_QPS_SQD;
693 case C4IW_QP_STATE_TERMINATE:
694 return IB_QPS_SQE;
695 case C4IW_QP_STATE_ERROR:
696 return IB_QPS_ERR;
697 }
698 return IB_QPS_ERR;
699}
700
701static inline u32 c4iw_ib_to_tpt_access(int a)
702{
703 return (a & IB_ACCESS_REMOTE_WRITE ? FW_RI_MEM_ACCESS_REM_WRITE : 0) |
704 (a & IB_ACCESS_REMOTE_READ ? FW_RI_MEM_ACCESS_REM_READ : 0) |
705 (a & IB_ACCESS_LOCAL_WRITE ? FW_RI_MEM_ACCESS_LOCAL_WRITE : 0) |
706 FW_RI_MEM_ACCESS_LOCAL_READ;
707}
708
709static inline u32 c4iw_ib_to_tpt_bind_access(int acc)
710{
711 return (acc & IB_ACCESS_REMOTE_WRITE ? FW_RI_MEM_ACCESS_REM_WRITE : 0) |
712 (acc & IB_ACCESS_REMOTE_READ ? FW_RI_MEM_ACCESS_REM_READ : 0);
713}
714
715enum c4iw_mmid_state {
716 C4IW_STAG_STATE_VALID,
717 C4IW_STAG_STATE_INVALID
718};
719
720#define C4IW_NODE_DESC "cxgb4 Chelsio Communications"
721
722#define MPA_KEY_REQ "MPA ID Req Frame"
723#define MPA_KEY_REP "MPA ID Rep Frame"
724
725#define MPA_MAX_PRIVATE_DATA 256
726#define MPA_ENHANCED_RDMA_CONN 0x10
727#define MPA_REJECT 0x20
728#define MPA_CRC 0x40
729#define MPA_MARKERS 0x80
730#define MPA_FLAGS_MASK 0xE0
731
732#define MPA_V2_PEER2PEER_MODEL 0x8000
733#define MPA_V2_ZERO_LEN_FPDU_RTR 0x4000
734#define MPA_V2_RDMA_WRITE_RTR 0x8000
735#define MPA_V2_RDMA_READ_RTR 0x4000
736#define MPA_V2_IRD_ORD_MASK 0x3FFF
737
738#define c4iw_put_ep(ep) { \
739 pr_debug("put_ep ep %p refcnt %d\n", \
740 ep, kref_read(&((ep)->kref))); \
741 WARN_ON(kref_read(&((ep)->kref)) < 1); \
742 kref_put(&((ep)->kref), _c4iw_free_ep); \
743}
744
745#define c4iw_get_ep(ep) { \
746 pr_debug("get_ep ep %p, refcnt %d\n", \
747 ep, kref_read(&((ep)->kref))); \
748 kref_get(&((ep)->kref)); \
749}
750void _c4iw_free_ep(struct kref *kref);
751
752struct mpa_message {
753 u8 key[16];
754 u8 flags;
755 u8 revision;
756 __be16 private_data_size;
757 u8 private_data[0];
758};
759
760struct mpa_v2_conn_params {
761 __be16 ird;
762 __be16 ord;
763};
764
765struct terminate_message {
766 u8 layer_etype;
767 u8 ecode;
768 __be16 hdrct_rsvd;
769 u8 len_hdrs[0];
770};
771
772#define TERM_MAX_LENGTH (sizeof(struct terminate_message) + 2 + 18 + 28)
773
774enum c4iw_layers_types {
775 LAYER_RDMAP = 0x00,
776 LAYER_DDP = 0x10,
777 LAYER_MPA = 0x20,
778 RDMAP_LOCAL_CATA = 0x00,
779 RDMAP_REMOTE_PROT = 0x01,
780 RDMAP_REMOTE_OP = 0x02,
781 DDP_LOCAL_CATA = 0x00,
782 DDP_TAGGED_ERR = 0x01,
783 DDP_UNTAGGED_ERR = 0x02,
784 DDP_LLP = 0x03
785};
786
787enum c4iw_rdma_ecodes {
788 RDMAP_INV_STAG = 0x00,
789 RDMAP_BASE_BOUNDS = 0x01,
790 RDMAP_ACC_VIOL = 0x02,
791 RDMAP_STAG_NOT_ASSOC = 0x03,
792 RDMAP_TO_WRAP = 0x04,
793 RDMAP_INV_VERS = 0x05,
794 RDMAP_INV_OPCODE = 0x06,
795 RDMAP_STREAM_CATA = 0x07,
796 RDMAP_GLOBAL_CATA = 0x08,
797 RDMAP_CANT_INV_STAG = 0x09,
798 RDMAP_UNSPECIFIED = 0xff
799};
800
801enum c4iw_ddp_ecodes {
802 DDPT_INV_STAG = 0x00,
803 DDPT_BASE_BOUNDS = 0x01,
804 DDPT_STAG_NOT_ASSOC = 0x02,
805 DDPT_TO_WRAP = 0x03,
806 DDPT_INV_VERS = 0x04,
807 DDPU_INV_QN = 0x01,
808 DDPU_INV_MSN_NOBUF = 0x02,
809 DDPU_INV_MSN_RANGE = 0x03,
810 DDPU_INV_MO = 0x04,
811 DDPU_MSG_TOOBIG = 0x05,
812 DDPU_INV_VERS = 0x06
813};
814
815enum c4iw_mpa_ecodes {
816 MPA_CRC_ERR = 0x02,
817 MPA_MARKER_ERR = 0x03,
818 MPA_LOCAL_CATA = 0x05,
819 MPA_INSUFF_IRD = 0x06,
820 MPA_NOMATCH_RTR = 0x07,
821};
822
823enum c4iw_ep_state {
824 IDLE = 0,
825 LISTEN,
826 CONNECTING,
827 MPA_REQ_WAIT,
828 MPA_REQ_SENT,
829 MPA_REQ_RCVD,
830 MPA_REP_SENT,
831 FPDU_MODE,
832 ABORTING,
833 CLOSING,
834 MORIBUND,
835 DEAD,
836};
837
838enum c4iw_ep_flags {
839 PEER_ABORT_IN_PROGRESS = 0,
840 ABORT_REQ_IN_PROGRESS = 1,
841 RELEASE_RESOURCES = 2,
842 CLOSE_SENT = 3,
843 TIMEOUT = 4,
844 QP_REFERENCED = 5,
845 STOP_MPA_TIMER = 7,
846};
847
848enum c4iw_ep_history {
849 ACT_OPEN_REQ = 0,
850 ACT_OFLD_CONN = 1,
851 ACT_OPEN_RPL = 2,
852 ACT_ESTAB = 3,
853 PASS_ACCEPT_REQ = 4,
854 PASS_ESTAB = 5,
855 ABORT_UPCALL = 6,
856 ESTAB_UPCALL = 7,
857 CLOSE_UPCALL = 8,
858 ULP_ACCEPT = 9,
859 ULP_REJECT = 10,
860 TIMEDOUT = 11,
861 PEER_ABORT = 12,
862 PEER_CLOSE = 13,
863 CONNREQ_UPCALL = 14,
864 ABORT_CONN = 15,
865 DISCONN_UPCALL = 16,
866 EP_DISC_CLOSE = 17,
867 EP_DISC_ABORT = 18,
868 CONN_RPL_UPCALL = 19,
869 ACT_RETRY_NOMEM = 20,
870 ACT_RETRY_INUSE = 21,
871 CLOSE_CON_RPL = 22,
872 EP_DISC_FAIL = 24,
873 QP_REFED = 25,
874 QP_DEREFED = 26,
875 CM_ID_REFED = 27,
876 CM_ID_DEREFED = 28,
877};
878
879enum conn_pre_alloc_buffers {
880 CN_ABORT_REQ_BUF,
881 CN_ABORT_RPL_BUF,
882 CN_CLOSE_CON_REQ_BUF,
883 CN_DESTROY_BUF,
884 CN_FLOWC_BUF,
885 CN_MAX_CON_BUF
886};
887
888#define FLOWC_LEN 80
889union cpl_wr_size {
890 struct cpl_abort_req abrt_req;
891 struct cpl_abort_rpl abrt_rpl;
892 struct fw_ri_wr ri_req;
893 struct cpl_close_con_req close_req;
894 char flowc_buf[FLOWC_LEN];
895};
896
897struct c4iw_ep_common {
898 struct iw_cm_id *cm_id;
899 struct c4iw_qp *qp;
900 struct c4iw_dev *dev;
901 struct sk_buff_head ep_skb_list;
902 enum c4iw_ep_state state;
903 struct kref kref;
904 struct mutex mutex;
905 struct sockaddr_storage local_addr;
906 struct sockaddr_storage remote_addr;
907 struct c4iw_wr_wait *wr_waitp;
908 unsigned long flags;
909 unsigned long history;
910};
911
912struct c4iw_listen_ep {
913 struct c4iw_ep_common com;
914 unsigned int stid;
915 int backlog;
916};
917
918struct c4iw_ep_stats {
919 unsigned connect_neg_adv;
920 unsigned abort_neg_adv;
921};
922
923struct c4iw_ep {
924 struct c4iw_ep_common com;
925 struct c4iw_ep *parent_ep;
926 struct timer_list timer;
927 struct list_head entry;
928 unsigned int atid;
929 u32 hwtid;
930 u32 snd_seq;
931 u32 rcv_seq;
932 struct l2t_entry *l2t;
933 struct dst_entry *dst;
934 struct sk_buff *mpa_skb;
935 struct c4iw_mpa_attributes mpa_attr;
936 u8 mpa_pkt[sizeof(struct mpa_message) + MPA_MAX_PRIVATE_DATA];
937 unsigned int mpa_pkt_len;
938 u32 ird;
939 u32 ord;
940 u32 smac_idx;
941 u32 tx_chan;
942 u32 mtu;
943 u16 mss;
944 u16 emss;
945 u16 plen;
946 u16 rss_qid;
947 u16 txq_idx;
948 u16 ctrlq_idx;
949 u8 tos;
950 u8 retry_with_mpa_v1;
951 u8 tried_with_mpa_v1;
952 unsigned int retry_count;
953 int snd_win;
954 int rcv_win;
955 struct c4iw_ep_stats stats;
956};
957
958static inline struct c4iw_ep *to_ep(struct iw_cm_id *cm_id)
959{
960 return cm_id->provider_data;
961}
962
963static inline struct c4iw_listen_ep *to_listen_ep(struct iw_cm_id *cm_id)
964{
965 return cm_id->provider_data;
966}
967
968static inline int ocqp_supported(const struct cxgb4_lld_info *infop)
969{
970#if defined(__i386__) || defined(__x86_64__) || defined(CONFIG_PPC64)
971 return infop->vr->ocq.size > 0;
972#else
973 return 0;
974#endif
975}
976
977u32 c4iw_id_alloc(struct c4iw_id_table *alloc);
978void c4iw_id_free(struct c4iw_id_table *alloc, u32 obj);
979int c4iw_id_table_alloc(struct c4iw_id_table *alloc, u32 start, u32 num,
980 u32 reserved, u32 flags);
981void c4iw_id_table_free(struct c4iw_id_table *alloc);
982
983typedef int (*c4iw_handler_func)(struct c4iw_dev *dev, struct sk_buff *skb);
984
985int c4iw_ep_redirect(void *ctx, struct dst_entry *old, struct dst_entry *new,
986 struct l2t_entry *l2t);
987void c4iw_put_qpid(struct c4iw_rdev *rdev, u32 qpid,
988 struct c4iw_dev_ucontext *uctx);
989u32 c4iw_get_resource(struct c4iw_id_table *id_table);
990void c4iw_put_resource(struct c4iw_id_table *id_table, u32 entry);
991int c4iw_init_resource(struct c4iw_rdev *rdev, u32 nr_tpt, u32 nr_pdid);
992int c4iw_init_ctrl_qp(struct c4iw_rdev *rdev);
993int c4iw_pblpool_create(struct c4iw_rdev *rdev);
994int c4iw_rqtpool_create(struct c4iw_rdev *rdev);
995int c4iw_ocqp_pool_create(struct c4iw_rdev *rdev);
996void c4iw_pblpool_destroy(struct c4iw_rdev *rdev);
997void c4iw_rqtpool_destroy(struct c4iw_rdev *rdev);
998void c4iw_ocqp_pool_destroy(struct c4iw_rdev *rdev);
999void c4iw_destroy_resource(struct c4iw_resource *rscp);
1000int c4iw_destroy_ctrl_qp(struct c4iw_rdev *rdev);
1001void c4iw_register_device(struct work_struct *work);
1002void c4iw_unregister_device(struct c4iw_dev *dev);
1003int __init c4iw_cm_init(void);
1004void c4iw_cm_term(void);
1005void c4iw_release_dev_ucontext(struct c4iw_rdev *rdev,
1006 struct c4iw_dev_ucontext *uctx);
1007void c4iw_init_dev_ucontext(struct c4iw_rdev *rdev,
1008 struct c4iw_dev_ucontext *uctx);
1009int c4iw_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc);
1010int c4iw_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
1011 struct ib_send_wr **bad_wr);
1012int c4iw_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
1013 struct ib_recv_wr **bad_wr);
1014int c4iw_connect(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param);
1015int c4iw_create_listen(struct iw_cm_id *cm_id, int backlog);
1016int c4iw_destroy_listen(struct iw_cm_id *cm_id);
1017int c4iw_accept_cr(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param);
1018int c4iw_reject_cr(struct iw_cm_id *cm_id, const void *pdata, u8 pdata_len);
1019void c4iw_qp_add_ref(struct ib_qp *qp);
1020void c4iw_qp_rem_ref(struct ib_qp *qp);
1021struct ib_mr *c4iw_alloc_mr(struct ib_pd *pd,
1022 enum ib_mr_type mr_type,
1023 u32 max_num_sg);
1024int c4iw_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg, int sg_nents,
1025 unsigned int *sg_offset);
1026int c4iw_dealloc_mw(struct ib_mw *mw);
1027void c4iw_dealloc(struct uld_ctx *ctx);
1028struct ib_mw *c4iw_alloc_mw(struct ib_pd *pd, enum ib_mw_type type,
1029 struct ib_udata *udata);
1030struct ib_mr *c4iw_reg_user_mr(struct ib_pd *pd, u64 start,
1031 u64 length, u64 virt, int acc,
1032 struct ib_udata *udata);
1033struct ib_mr *c4iw_get_dma_mr(struct ib_pd *pd, int acc);
1034int c4iw_dereg_mr(struct ib_mr *ib_mr);
1035int c4iw_destroy_cq(struct ib_cq *ib_cq);
1036struct ib_cq *c4iw_create_cq(struct ib_device *ibdev,
1037 const struct ib_cq_init_attr *attr,
1038 struct ib_ucontext *ib_context,
1039 struct ib_udata *udata);
1040int c4iw_resize_cq(struct ib_cq *cq, int cqe, struct ib_udata *udata);
1041int c4iw_arm_cq(struct ib_cq *ibcq, enum ib_cq_notify_flags flags);
1042int c4iw_destroy_qp(struct ib_qp *ib_qp);
1043struct ib_qp *c4iw_create_qp(struct ib_pd *pd,
1044 struct ib_qp_init_attr *attrs,
1045 struct ib_udata *udata);
1046int c4iw_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1047 int attr_mask, struct ib_udata *udata);
1048int c4iw_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1049 int attr_mask, struct ib_qp_init_attr *init_attr);
1050struct ib_qp *c4iw_get_qp(struct ib_device *dev, int qpn);
1051u32 c4iw_rqtpool_alloc(struct c4iw_rdev *rdev, int size);
1052void c4iw_rqtpool_free(struct c4iw_rdev *rdev, u32 addr, int size);
1053u32 c4iw_pblpool_alloc(struct c4iw_rdev *rdev, int size);
1054void c4iw_pblpool_free(struct c4iw_rdev *rdev, u32 addr, int size);
1055u32 c4iw_ocqp_pool_alloc(struct c4iw_rdev *rdev, int size);
1056void c4iw_ocqp_pool_free(struct c4iw_rdev *rdev, u32 addr, int size);
1057void c4iw_flush_hw_cq(struct c4iw_cq *chp, struct c4iw_qp *flush_qhp);
1058void c4iw_count_rcqes(struct t4_cq *cq, struct t4_wq *wq, int *count);
1059int c4iw_ep_disconnect(struct c4iw_ep *ep, int abrupt, gfp_t gfp);
1060int c4iw_flush_rq(struct t4_wq *wq, struct t4_cq *cq, int count);
1061int c4iw_flush_sq(struct c4iw_qp *qhp);
1062int c4iw_ev_handler(struct c4iw_dev *rnicp, u32 qid);
1063u16 c4iw_rqes_posted(struct c4iw_qp *qhp);
1064int c4iw_post_terminate(struct c4iw_qp *qhp, struct t4_cqe *err_cqe);
1065u32 c4iw_get_cqid(struct c4iw_rdev *rdev, struct c4iw_dev_ucontext *uctx);
1066void c4iw_put_cqid(struct c4iw_rdev *rdev, u32 qid,
1067 struct c4iw_dev_ucontext *uctx);
1068u32 c4iw_get_qpid(struct c4iw_rdev *rdev, struct c4iw_dev_ucontext *uctx);
1069void c4iw_put_qpid(struct c4iw_rdev *rdev, u32 qid,
1070 struct c4iw_dev_ucontext *uctx);
1071void c4iw_ev_dispatch(struct c4iw_dev *dev, struct t4_cqe *err_cqe);
1072
1073extern struct cxgb4_client t4c_client;
1074extern c4iw_handler_func c4iw_handlers[NUM_CPL_CMDS];
1075void __iomem *c4iw_bar2_addrs(struct c4iw_rdev *rdev, unsigned int qid,
1076 enum cxgb4_bar2_qtype qtype,
1077 unsigned int *pbar2_qid, u64 *pbar2_pa);
1078extern void c4iw_log_wr_stats(struct t4_wq *wq, struct t4_cqe *cqe);
1079extern int c4iw_wr_log;
1080extern int db_fc_threshold;
1081extern int db_coalescing_threshold;
1082extern int use_dsgl;
1083void c4iw_invalidate_mr(struct c4iw_dev *rhp, u32 rkey);
1084struct c4iw_wr_wait *c4iw_alloc_wr_wait(gfp_t gfp);
1085
1086typedef int c4iw_restrack_func(struct sk_buff *msg,
1087 struct rdma_restrack_entry *res);
1088extern c4iw_restrack_func *c4iw_restrack_funcs[RDMA_RESTRACK_MAX];
1089
1090#endif
1091
