linux/drivers/net/ethernet/hisilicon/hns/hns_dsaf_xgmac.c
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   1/*
   2 * Copyright (c) 2014-2015 Hisilicon Limited.
   3 *
   4 * This program is free software; you can redistribute it and/or modify
   5 * it under the terms of the GNU General Public License as published by
   6 * the Free Software Foundation; either version 2 of the License, or
   7 * (at your option) any later version.
   8 */
   9
  10#include <linux/io-64-nonatomic-hi-lo.h>
  11#include <linux/of_mdio.h>
  12#include "hns_dsaf_main.h"
  13#include "hns_dsaf_mac.h"
  14#include "hns_dsaf_xgmac.h"
  15#include "hns_dsaf_reg.h"
  16
  17static const struct mac_stats_string g_xgmac_stats_string[] = {
  18        {"xgmac_tx_bad_pkts_minto64", MAC_STATS_FIELD_OFF(tx_fragment_err)},
  19        {"xgmac_tx_good_pkts_minto64", MAC_STATS_FIELD_OFF(tx_undersize)},
  20        {"xgmac_tx_total_pkts_minto64", MAC_STATS_FIELD_OFF(tx_under_min_pkts)},
  21        {"xgmac_tx_pkts_64", MAC_STATS_FIELD_OFF(tx_64bytes)},
  22        {"xgmac_tx_pkts_65to127", MAC_STATS_FIELD_OFF(tx_65to127)},
  23        {"xgmac_tx_pkts_128to255", MAC_STATS_FIELD_OFF(tx_128to255)},
  24        {"xgmac_tx_pkts_256to511", MAC_STATS_FIELD_OFF(tx_256to511)},
  25        {"xgmac_tx_pkts_512to1023", MAC_STATS_FIELD_OFF(tx_512to1023)},
  26        {"xgmac_tx_pkts_1024to1518", MAC_STATS_FIELD_OFF(tx_1024to1518)},
  27        {"xgmac_tx_pkts_1519tomax", MAC_STATS_FIELD_OFF(tx_1519tomax)},
  28        {"xgmac_tx_good_pkts_1519tomax",
  29                MAC_STATS_FIELD_OFF(tx_1519tomax_good)},
  30        {"xgmac_tx_good_pkts_untralmax", MAC_STATS_FIELD_OFF(tx_oversize)},
  31        {"xgmac_tx_bad_pkts_untralmax", MAC_STATS_FIELD_OFF(tx_jabber_err)},
  32        {"xgmac_tx_good_pkts_all", MAC_STATS_FIELD_OFF(tx_good_pkts)},
  33        {"xgmac_tx_good_byte_all", MAC_STATS_FIELD_OFF(tx_good_bytes)},
  34        {"xgmac_tx_total_pkt", MAC_STATS_FIELD_OFF(tx_total_pkts)},
  35        {"xgmac_tx_total_byt", MAC_STATS_FIELD_OFF(tx_total_bytes)},
  36        {"xgmac_tx_uc_pkt", MAC_STATS_FIELD_OFF(tx_uc_pkts)},
  37        {"xgmac_tx_mc_pkt", MAC_STATS_FIELD_OFF(tx_mc_pkts)},
  38        {"xgmac_tx_bc_pkt", MAC_STATS_FIELD_OFF(tx_bc_pkts)},
  39        {"xgmac_tx_pause_frame_num", MAC_STATS_FIELD_OFF(tx_pfc_tc0)},
  40        {"xgmac_tx_pfc_per_1pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc1)},
  41        {"xgmac_tx_pfc_per_2pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc2)},
  42        {"xgmac_tx_pfc_per_3pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc3)},
  43        {"xgmac_tx_pfc_per_4pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc4)},
  44        {"xgmac_tx_pfc_per_5pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc5)},
  45        {"xgmac_tx_pfc_per_6pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc6)},
  46        {"xgmac_tx_pfc_per_7pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc7)},
  47        {"xgmac_tx_mac_ctrol_frame", MAC_STATS_FIELD_OFF(tx_ctrl)},
  48        {"xgmac_tx_1731_pkts", MAC_STATS_FIELD_OFF(tx_1731_pkts)},
  49        {"xgmac_tx_1588_pkts", MAC_STATS_FIELD_OFF(tx_1588_pkts)},
  50        {"xgmac_rx_good_pkt_from_dsaf", MAC_STATS_FIELD_OFF(rx_good_from_sw)},
  51        {"xgmac_rx_bad_pkt_from_dsaf", MAC_STATS_FIELD_OFF(rx_bad_from_sw)},
  52        {"xgmac_tx_bad_pkt_64tomax", MAC_STATS_FIELD_OFF(tx_bad_pkts)},
  53
  54        {"xgmac_rx_bad_pkts_minto64", MAC_STATS_FIELD_OFF(rx_fragment_err)},
  55        {"xgmac_rx_good_pkts_minto64", MAC_STATS_FIELD_OFF(rx_undersize)},
  56        {"xgmac_rx_total_pkts_minto64", MAC_STATS_FIELD_OFF(rx_under_min)},
  57        {"xgmac_rx_pkt_64", MAC_STATS_FIELD_OFF(rx_64bytes)},
  58        {"xgmac_rx_pkt_65to127", MAC_STATS_FIELD_OFF(rx_65to127)},
  59        {"xgmac_rx_pkt_128to255", MAC_STATS_FIELD_OFF(rx_128to255)},
  60        {"xgmac_rx_pkt_256to511", MAC_STATS_FIELD_OFF(rx_256to511)},
  61        {"xgmac_rx_pkt_512to1023", MAC_STATS_FIELD_OFF(rx_512to1023)},
  62        {"xgmac_rx_pkt_1024to1518", MAC_STATS_FIELD_OFF(rx_1024to1518)},
  63        {"xgmac_rx_pkt_1519tomax", MAC_STATS_FIELD_OFF(rx_1519tomax)},
  64        {"xgmac_rx_good_pkt_1519tomax", MAC_STATS_FIELD_OFF(rx_1519tomax_good)},
  65        {"xgmac_rx_good_pkt_untramax", MAC_STATS_FIELD_OFF(rx_oversize)},
  66        {"xgmac_rx_bad_pkt_untramax", MAC_STATS_FIELD_OFF(rx_jabber_err)},
  67        {"xgmac_rx_good_pkt", MAC_STATS_FIELD_OFF(rx_good_pkts)},
  68        {"xgmac_rx_good_byt", MAC_STATS_FIELD_OFF(rx_good_bytes)},
  69        {"xgmac_rx_pkt", MAC_STATS_FIELD_OFF(rx_total_pkts)},
  70        {"xgmac_rx_byt", MAC_STATS_FIELD_OFF(rx_total_bytes)},
  71        {"xgmac_rx_uc_pkt", MAC_STATS_FIELD_OFF(rx_uc_pkts)},
  72        {"xgmac_rx_mc_pkt", MAC_STATS_FIELD_OFF(rx_mc_pkts)},
  73        {"xgmac_rx_bc_pkt", MAC_STATS_FIELD_OFF(rx_bc_pkts)},
  74        {"xgmac_rx_pause_frame_num", MAC_STATS_FIELD_OFF(rx_pfc_tc0)},
  75        {"xgmac_rx_pfc_per_1pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc1)},
  76        {"xgmac_rx_pfc_per_2pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc2)},
  77        {"xgmac_rx_pfc_per_3pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc3)},
  78        {"xgmac_rx_pfc_per_4pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc4)},
  79        {"xgmac_rx_pfc_per_5pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc5)},
  80        {"xgmac_rx_pfc_per_6pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc6)},
  81        {"xgmac_rx_pfc_per_7pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc7)},
  82        {"xgmac_rx_mac_control", MAC_STATS_FIELD_OFF(rx_unknown_ctrl)},
  83        {"xgmac_tx_good_pkt_todsaf", MAC_STATS_FIELD_OFF(tx_good_to_sw)},
  84        {"xgmac_tx_bad_pkt_todsaf", MAC_STATS_FIELD_OFF(tx_bad_to_sw)},
  85        {"xgmac_rx_1731_pkt", MAC_STATS_FIELD_OFF(rx_1731_pkts)},
  86        {"xgmac_rx_symbol_err_pkt", MAC_STATS_FIELD_OFF(rx_symbol_err)},
  87        {"xgmac_rx_fcs_pkt", MAC_STATS_FIELD_OFF(rx_fcs_err)}
  88};
  89
  90/**
  91 *hns_xgmac_tx_enable - xgmac port tx enable
  92 *@drv: mac driver
  93 *@value: value of enable
  94 */
  95static void hns_xgmac_tx_enable(struct mac_driver *drv, u32 value)
  96{
  97        dsaf_set_dev_bit(drv, XGMAC_MAC_ENABLE_REG, XGMAC_ENABLE_TX_B, !!value);
  98}
  99
 100/**
 101 *hns_xgmac_rx_enable - xgmac port rx enable
 102 *@drv: mac driver
 103 *@value: value of enable
 104 */
 105static void hns_xgmac_rx_enable(struct mac_driver *drv, u32 value)
 106{
 107        dsaf_set_dev_bit(drv, XGMAC_MAC_ENABLE_REG, XGMAC_ENABLE_RX_B, !!value);
 108}
 109
 110/**
 111 * hns_xgmac_tx_lf_rf_insert - insert lf rf control about xgmac
 112 * @mac_drv: mac driver
 113 * @mode: inserf rf or lf
 114 */
 115static void hns_xgmac_lf_rf_insert(struct mac_driver *mac_drv, u32 mode)
 116{
 117        dsaf_set_dev_field(mac_drv, XGMAC_MAC_TX_LF_RF_CONTROL_REG,
 118                           XGMAC_LF_RF_INSERT_M, XGMAC_LF_RF_INSERT_S, mode);
 119}
 120
 121/**
 122 * hns_xgmac__lf_rf_control_init - initial the lf rf control register
 123 * @mac_drv: mac driver
 124 */
 125static void hns_xgmac_lf_rf_control_init(struct mac_driver *mac_drv)
 126{
 127        u32 val = 0;
 128
 129        dsaf_set_bit(val, XGMAC_UNIDIR_EN_B, 0);
 130        dsaf_set_bit(val, XGMAC_RF_TX_EN_B, 1);
 131        dsaf_set_field(val, XGMAC_LF_RF_INSERT_M, XGMAC_LF_RF_INSERT_S, 0);
 132        dsaf_write_reg(mac_drv, XGMAC_MAC_TX_LF_RF_CONTROL_REG, val);
 133}
 134
 135/**
 136 *hns_xgmac_enable - enable xgmac port
 137 *@drv: mac driver
 138 *@mode: mode of mac port
 139 */
 140static void hns_xgmac_enable(void *mac_drv, enum mac_commom_mode mode)
 141{
 142        struct mac_driver *drv = (struct mac_driver *)mac_drv;
 143
 144        hns_xgmac_lf_rf_insert(drv, HNS_XGMAC_NO_LF_RF_INSERT);
 145
 146        /*enable XGE rX/tX */
 147        if (mode == MAC_COMM_MODE_TX) {
 148                hns_xgmac_tx_enable(drv, 1);
 149        } else if (mode == MAC_COMM_MODE_RX) {
 150                hns_xgmac_rx_enable(drv, 1);
 151        } else if (mode == MAC_COMM_MODE_RX_AND_TX) {
 152                hns_xgmac_tx_enable(drv, 1);
 153                hns_xgmac_rx_enable(drv, 1);
 154        } else {
 155                dev_err(drv->dev, "error mac mode:%d\n", mode);
 156        }
 157}
 158
 159/**
 160 *hns_xgmac_disable - disable xgmac port
 161 *@mac_drv: mac driver
 162 *@mode: mode of mac port
 163 */
 164static void hns_xgmac_disable(void *mac_drv, enum mac_commom_mode mode)
 165{
 166        struct mac_driver *drv = (struct mac_driver *)mac_drv;
 167
 168        if (mode == MAC_COMM_MODE_TX) {
 169                hns_xgmac_tx_enable(drv, 0);
 170        } else if (mode == MAC_COMM_MODE_RX) {
 171                hns_xgmac_rx_enable(drv, 0);
 172        } else if (mode == MAC_COMM_MODE_RX_AND_TX) {
 173                hns_xgmac_tx_enable(drv, 0);
 174                hns_xgmac_rx_enable(drv, 0);
 175        }
 176        hns_xgmac_lf_rf_insert(drv, HNS_XGMAC_LF_INSERT);
 177}
 178
 179/**
 180 *hns_xgmac_pma_fec_enable - xgmac PMA FEC enable
 181 *@drv: mac driver
 182 *@tx_value: tx value
 183 *@rx_value: rx value
 184 *return status
 185 */
 186static void hns_xgmac_pma_fec_enable(struct mac_driver *drv, u32 tx_value,
 187                                     u32 rx_value)
 188{
 189        u32 origin = dsaf_read_dev(drv, XGMAC_PMA_FEC_CONTROL_REG);
 190
 191        dsaf_set_bit(origin, XGMAC_PMA_FEC_CTL_TX_B, !!tx_value);
 192        dsaf_set_bit(origin, XGMAC_PMA_FEC_CTL_RX_B, !!rx_value);
 193        dsaf_write_dev(drv, XGMAC_PMA_FEC_CONTROL_REG, origin);
 194}
 195
 196/* clr exc irq for xge*/
 197static void hns_xgmac_exc_irq_en(struct mac_driver *drv, u32 en)
 198{
 199        u32 clr_vlue = 0xfffffffful;
 200        u32 msk_vlue = en ? 0xfffffffful : 0; /*1 is en, 0 is dis*/
 201
 202        dsaf_write_dev(drv, XGMAC_INT_STATUS_REG, clr_vlue);
 203        dsaf_write_dev(drv, XGMAC_INT_ENABLE_REG, msk_vlue);
 204}
 205
 206/**
 207 *hns_xgmac_init - initialize XGE
 208 *@mac_drv: mac driver
 209 */
 210static void hns_xgmac_init(void *mac_drv)
 211{
 212        struct mac_driver *drv = (struct mac_driver *)mac_drv;
 213        struct dsaf_device *dsaf_dev
 214                = (struct dsaf_device *)dev_get_drvdata(drv->dev);
 215        u32 port = drv->mac_id;
 216
 217        dsaf_dev->misc_op->xge_srst(dsaf_dev, port, 0);
 218        mdelay(100);
 219        dsaf_dev->misc_op->xge_srst(dsaf_dev, port, 1);
 220
 221        mdelay(100);
 222        hns_xgmac_lf_rf_control_init(drv);
 223        hns_xgmac_exc_irq_en(drv, 0);
 224
 225        hns_xgmac_pma_fec_enable(drv, 0x0, 0x0);
 226
 227        hns_xgmac_disable(mac_drv, MAC_COMM_MODE_RX_AND_TX);
 228}
 229
 230/**
 231 *hns_xgmac_config_pad_and_crc - set xgmac pad and crc enable the same time
 232 *@mac_drv: mac driver
 233 *@newval:enable of pad and crc
 234 */
 235static void hns_xgmac_config_pad_and_crc(void *mac_drv, u8 newval)
 236{
 237        struct mac_driver *drv = (struct mac_driver *)mac_drv;
 238        u32 origin = dsaf_read_dev(drv, XGMAC_MAC_CONTROL_REG);
 239
 240        dsaf_set_bit(origin, XGMAC_CTL_TX_PAD_B, !!newval);
 241        dsaf_set_bit(origin, XGMAC_CTL_TX_FCS_B, !!newval);
 242        dsaf_set_bit(origin, XGMAC_CTL_RX_FCS_B, !!newval);
 243        dsaf_write_dev(drv, XGMAC_MAC_CONTROL_REG, origin);
 244}
 245
 246/**
 247 *hns_xgmac_pausefrm_cfg - set pause param about xgmac
 248 *@mac_drv: mac driver
 249 *@newval:enable of pad and crc
 250 */
 251static void hns_xgmac_pausefrm_cfg(void *mac_drv, u32 rx_en, u32 tx_en)
 252{
 253        struct mac_driver *drv = (struct mac_driver *)mac_drv;
 254        u32 origin = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_CTRL_REG);
 255
 256        dsaf_set_bit(origin, XGMAC_PAUSE_CTL_TX_B, !!tx_en);
 257        dsaf_set_bit(origin, XGMAC_PAUSE_CTL_RX_B, !!rx_en);
 258        dsaf_write_dev(drv, XGMAC_MAC_PAUSE_CTRL_REG, origin);
 259}
 260
 261static void hns_xgmac_set_pausefrm_mac_addr(void *mac_drv, char *mac_addr)
 262{
 263        struct mac_driver *drv = (struct mac_driver *)mac_drv;
 264
 265        u32 high_val = mac_addr[1] | (mac_addr[0] << 8);
 266        u32 low_val = mac_addr[5] | (mac_addr[4] << 8)
 267                | (mac_addr[3] << 16) | (mac_addr[2] << 24);
 268        dsaf_write_dev(drv, XGMAC_MAC_PAUSE_LOCAL_MAC_L_REG, low_val);
 269        dsaf_write_dev(drv, XGMAC_MAC_PAUSE_LOCAL_MAC_H_REG, high_val);
 270}
 271
 272/**
 273 *hns_xgmac_set_rx_ignore_pause_frames - set rx pause param about xgmac
 274 *@mac_drv: mac driver
 275 *@enable:enable rx pause param
 276 */
 277static void hns_xgmac_set_rx_ignore_pause_frames(void *mac_drv, u32 enable)
 278{
 279        struct mac_driver *drv = (struct mac_driver *)mac_drv;
 280
 281        dsaf_set_dev_bit(drv, XGMAC_MAC_PAUSE_CTRL_REG,
 282                         XGMAC_PAUSE_CTL_RX_B, !!enable);
 283}
 284
 285/**
 286 *hns_xgmac_set_tx_auto_pause_frames - set tx pause param about xgmac
 287 *@mac_drv: mac driver
 288 *@enable:enable tx pause param
 289 */
 290static void hns_xgmac_set_tx_auto_pause_frames(void *mac_drv, u16 enable)
 291{
 292        struct mac_driver *drv = (struct mac_driver *)mac_drv;
 293
 294        dsaf_set_dev_bit(drv, XGMAC_MAC_PAUSE_CTRL_REG,
 295                         XGMAC_PAUSE_CTL_TX_B, !!enable);
 296
 297        /*if enable is not zero ,set tx pause time */
 298        if (enable)
 299                dsaf_write_dev(drv, XGMAC_MAC_PAUSE_TIME_REG, enable);
 300}
 301
 302/**
 303 *hns_xgmac_config_max_frame_length - set xgmac max frame length
 304 *@mac_drv: mac driver
 305 *@newval:xgmac max frame length
 306 */
 307static void hns_xgmac_config_max_frame_length(void *mac_drv, u16 newval)
 308{
 309        struct mac_driver *drv = (struct mac_driver *)mac_drv;
 310
 311        dsaf_write_dev(drv, XGMAC_MAC_MAX_PKT_SIZE_REG, newval);
 312}
 313
 314void hns_xgmac_update_stats(void *mac_drv)
 315{
 316        struct mac_driver *drv = (struct mac_driver *)mac_drv;
 317        struct mac_hw_stats *hw_stats = &drv->mac_cb->hw_stats;
 318
 319        /* TX */
 320        hw_stats->tx_fragment_err
 321                = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_FRAGMENT);
 322        hw_stats->tx_undersize
 323                = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_UNDERSIZE);
 324        hw_stats->tx_under_min_pkts
 325                = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_UNDERMIN);
 326        hw_stats->tx_64bytes = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_64OCTETS);
 327        hw_stats->tx_65to127
 328                = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_65TO127OCTETS);
 329        hw_stats->tx_128to255
 330                = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_128TO255OCTETS);
 331        hw_stats->tx_256to511
 332                = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_256TO511OCTETS);
 333        hw_stats->tx_512to1023
 334                = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_512TO1023OCTETS);
 335        hw_stats->tx_1024to1518
 336                = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_1024TO1518OCTETS);
 337        hw_stats->tx_1519tomax
 338                = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_1519TOMAXOCTETS);
 339        hw_stats->tx_1519tomax_good
 340                = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_1519TOMAXOCTETSOK);
 341        hw_stats->tx_oversize = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_OVERSIZE);
 342        hw_stats->tx_jabber_err = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_JABBER);
 343        hw_stats->tx_good_pkts = hns_mac_reg_read64(drv, XGMAC_TX_GOODPKTS);
 344        hw_stats->tx_good_bytes = hns_mac_reg_read64(drv, XGMAC_TX_GOODOCTETS);
 345        hw_stats->tx_total_pkts = hns_mac_reg_read64(drv, XGMAC_TX_TOTAL_PKTS);
 346        hw_stats->tx_total_bytes
 347                = hns_mac_reg_read64(drv, XGMAC_TX_TOTALOCTETS);
 348        hw_stats->tx_uc_pkts = hns_mac_reg_read64(drv, XGMAC_TX_UNICASTPKTS);
 349        hw_stats->tx_mc_pkts = hns_mac_reg_read64(drv, XGMAC_TX_MULTICASTPKTS);
 350        hw_stats->tx_bc_pkts = hns_mac_reg_read64(drv, XGMAC_TX_BROADCASTPKTS);
 351        hw_stats->tx_pfc_tc0 = hns_mac_reg_read64(drv, XGMAC_TX_PRI0PAUSEPKTS);
 352        hw_stats->tx_pfc_tc1 = hns_mac_reg_read64(drv, XGMAC_TX_PRI1PAUSEPKTS);
 353        hw_stats->tx_pfc_tc2 = hns_mac_reg_read64(drv, XGMAC_TX_PRI2PAUSEPKTS);
 354        hw_stats->tx_pfc_tc3 = hns_mac_reg_read64(drv, XGMAC_TX_PRI3PAUSEPKTS);
 355        hw_stats->tx_pfc_tc4 = hns_mac_reg_read64(drv, XGMAC_TX_PRI4PAUSEPKTS);
 356        hw_stats->tx_pfc_tc5 = hns_mac_reg_read64(drv, XGMAC_TX_PRI5PAUSEPKTS);
 357        hw_stats->tx_pfc_tc6 = hns_mac_reg_read64(drv, XGMAC_TX_PRI6PAUSEPKTS);
 358        hw_stats->tx_pfc_tc7 = hns_mac_reg_read64(drv, XGMAC_TX_PRI7PAUSEPKTS);
 359        hw_stats->tx_ctrl = hns_mac_reg_read64(drv, XGMAC_TX_MACCTRLPKTS);
 360        hw_stats->tx_1731_pkts = hns_mac_reg_read64(drv, XGMAC_TX_1731PKTS);
 361        hw_stats->tx_1588_pkts = hns_mac_reg_read64(drv, XGMAC_TX_1588PKTS);
 362        hw_stats->rx_good_from_sw
 363                = hns_mac_reg_read64(drv, XGMAC_RX_FROMAPPGOODPKTS);
 364        hw_stats->rx_bad_from_sw
 365                = hns_mac_reg_read64(drv, XGMAC_RX_FROMAPPBADPKTS);
 366        hw_stats->tx_bad_pkts = hns_mac_reg_read64(drv, XGMAC_TX_ERRALLPKTS);
 367
 368        /* RX */
 369        hw_stats->rx_fragment_err
 370                = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_FRAGMENT);
 371        hw_stats->rx_undersize
 372                = hns_mac_reg_read64(drv, XGMAC_RX_PKTSUNDERSIZE);
 373        hw_stats->rx_under_min
 374                = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_UNDERMIN);
 375        hw_stats->rx_64bytes = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_64OCTETS);
 376        hw_stats->rx_65to127
 377                = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_65TO127OCTETS);
 378        hw_stats->rx_128to255
 379                = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_128TO255OCTETS);
 380        hw_stats->rx_256to511
 381                = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_256TO511OCTETS);
 382        hw_stats->rx_512to1023
 383                = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_512TO1023OCTETS);
 384        hw_stats->rx_1024to1518
 385                = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_1024TO1518OCTETS);
 386        hw_stats->rx_1519tomax
 387                = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_1519TOMAXOCTETS);
 388        hw_stats->rx_1519tomax_good
 389                = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_1519TOMAXOCTETSOK);
 390        hw_stats->rx_oversize = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_OVERSIZE);
 391        hw_stats->rx_jabber_err = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_JABBER);
 392        hw_stats->rx_good_pkts = hns_mac_reg_read64(drv, XGMAC_RX_GOODPKTS);
 393        hw_stats->rx_good_bytes = hns_mac_reg_read64(drv, XGMAC_RX_GOODOCTETS);
 394        hw_stats->rx_total_pkts = hns_mac_reg_read64(drv, XGMAC_RX_TOTAL_PKTS);
 395        hw_stats->rx_total_bytes
 396                = hns_mac_reg_read64(drv, XGMAC_RX_TOTALOCTETS);
 397        hw_stats->rx_uc_pkts = hns_mac_reg_read64(drv, XGMAC_RX_UNICASTPKTS);
 398        hw_stats->rx_mc_pkts = hns_mac_reg_read64(drv, XGMAC_RX_MULTICASTPKTS);
 399        hw_stats->rx_bc_pkts = hns_mac_reg_read64(drv, XGMAC_RX_BROADCASTPKTS);
 400        hw_stats->rx_pfc_tc0 = hns_mac_reg_read64(drv, XGMAC_RX_PRI0PAUSEPKTS);
 401        hw_stats->rx_pfc_tc1 = hns_mac_reg_read64(drv, XGMAC_RX_PRI1PAUSEPKTS);
 402        hw_stats->rx_pfc_tc2 = hns_mac_reg_read64(drv, XGMAC_RX_PRI2PAUSEPKTS);
 403        hw_stats->rx_pfc_tc3 = hns_mac_reg_read64(drv, XGMAC_RX_PRI3PAUSEPKTS);
 404        hw_stats->rx_pfc_tc4 = hns_mac_reg_read64(drv, XGMAC_RX_PRI4PAUSEPKTS);
 405        hw_stats->rx_pfc_tc5 = hns_mac_reg_read64(drv, XGMAC_RX_PRI5PAUSEPKTS);
 406        hw_stats->rx_pfc_tc6 = hns_mac_reg_read64(drv, XGMAC_RX_PRI6PAUSEPKTS);
 407        hw_stats->rx_pfc_tc7 = hns_mac_reg_read64(drv, XGMAC_RX_PRI7PAUSEPKTS);
 408
 409        hw_stats->rx_unknown_ctrl
 410                = hns_mac_reg_read64(drv, XGMAC_RX_MACCTRLPKTS);
 411        hw_stats->tx_good_to_sw
 412                = hns_mac_reg_read64(drv, XGMAC_TX_SENDAPPGOODPKTS);
 413        hw_stats->tx_bad_to_sw
 414                = hns_mac_reg_read64(drv, XGMAC_TX_SENDAPPBADPKTS);
 415        hw_stats->rx_1731_pkts = hns_mac_reg_read64(drv, XGMAC_RX_1731PKTS);
 416        hw_stats->rx_symbol_err
 417                = hns_mac_reg_read64(drv, XGMAC_RX_SYMBOLERRPKTS);
 418        hw_stats->rx_fcs_err = hns_mac_reg_read64(drv, XGMAC_RX_FCSERRPKTS);
 419}
 420
 421/**
 422 *hns_xgmac_free - free xgmac driver
 423 *@mac_drv: mac driver
 424 */
 425static void hns_xgmac_free(void *mac_drv)
 426{
 427        struct mac_driver *drv = (struct mac_driver *)mac_drv;
 428        struct dsaf_device *dsaf_dev
 429                = (struct dsaf_device *)dev_get_drvdata(drv->dev);
 430
 431        u32 mac_id = drv->mac_id;
 432
 433        dsaf_dev->misc_op->xge_srst(dsaf_dev, mac_id, 0);
 434}
 435
 436/**
 437 *hns_xgmac_get_info - get xgmac information
 438 *@mac_drv: mac driver
 439 *@mac_info:mac information
 440 */
 441static void hns_xgmac_get_info(void *mac_drv, struct mac_info *mac_info)
 442{
 443        struct mac_driver *drv = (struct mac_driver *)mac_drv;
 444        u32 pause_time, pause_ctrl, port_mode, ctrl_val;
 445
 446        ctrl_val = dsaf_read_dev(drv, XGMAC_MAC_CONTROL_REG);
 447        mac_info->pad_and_crc_en = dsaf_get_bit(ctrl_val, XGMAC_CTL_TX_PAD_B);
 448        mac_info->auto_neg = 0;
 449
 450        pause_time = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_TIME_REG);
 451        mac_info->tx_pause_time = pause_time;
 452
 453        port_mode = dsaf_read_dev(drv, XGMAC_PORT_MODE_REG);
 454        mac_info->port_en = dsaf_get_field(port_mode, XGMAC_PORT_MODE_TX_M,
 455                                           XGMAC_PORT_MODE_TX_S) &&
 456                                dsaf_get_field(port_mode, XGMAC_PORT_MODE_RX_M,
 457                                               XGMAC_PORT_MODE_RX_S);
 458        mac_info->duplex = 1;
 459        mac_info->speed = MAC_SPEED_10000;
 460
 461        pause_ctrl = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_CTRL_REG);
 462        mac_info->rx_pause_en = dsaf_get_bit(pause_ctrl, XGMAC_PAUSE_CTL_RX_B);
 463        mac_info->tx_pause_en = dsaf_get_bit(pause_ctrl, XGMAC_PAUSE_CTL_TX_B);
 464}
 465
 466/**
 467 *hns_xgmac_get_pausefrm_cfg - get xgmac pause param
 468 *@mac_drv: mac driver
 469 *@rx_en:xgmac rx pause enable
 470 *@tx_en:xgmac tx pause enable
 471 */
 472static void hns_xgmac_get_pausefrm_cfg(void *mac_drv, u32 *rx_en, u32 *tx_en)
 473{
 474        struct mac_driver *drv = (struct mac_driver *)mac_drv;
 475        u32 pause_ctrl;
 476
 477        pause_ctrl = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_CTRL_REG);
 478        *rx_en = dsaf_get_bit(pause_ctrl, XGMAC_PAUSE_CTL_RX_B);
 479        *tx_en = dsaf_get_bit(pause_ctrl, XGMAC_PAUSE_CTL_TX_B);
 480}
 481
 482/**
 483 *hns_xgmac_get_link_status - get xgmac link status
 484 *@mac_drv: mac driver
 485 *@link_stat: xgmac link stat
 486 */
 487static void hns_xgmac_get_link_status(void *mac_drv, u32 *link_stat)
 488{
 489        struct mac_driver *drv = (struct mac_driver *)mac_drv;
 490
 491        *link_stat = dsaf_read_dev(drv, XGMAC_LINK_STATUS_REG);
 492}
 493
 494/**
 495 *hns_xgmac_get_regs - dump xgmac regs
 496 *@mac_drv: mac driver
 497 *@cmd:ethtool cmd
 498 *@data:data for value of regs
 499 */
 500static void hns_xgmac_get_regs(void *mac_drv, void *data)
 501{
 502        u32 i = 0;
 503        struct mac_driver *drv = (struct mac_driver *)mac_drv;
 504        u32 *regs = data;
 505        u64 qtmp;
 506
 507        /* base config registers */
 508        regs[0] = dsaf_read_dev(drv, XGMAC_INT_STATUS_REG);
 509        regs[1] = dsaf_read_dev(drv, XGMAC_INT_ENABLE_REG);
 510        regs[2] = dsaf_read_dev(drv, XGMAC_INT_SET_REG);
 511        regs[3] = dsaf_read_dev(drv, XGMAC_IERR_U_INFO_REG);
 512        regs[4] = dsaf_read_dev(drv, XGMAC_OVF_INFO_REG);
 513        regs[5] = dsaf_read_dev(drv, XGMAC_OVF_CNT_REG);
 514        regs[6] = dsaf_read_dev(drv, XGMAC_PORT_MODE_REG);
 515        regs[7] = dsaf_read_dev(drv, XGMAC_CLK_ENABLE_REG);
 516        regs[8] = dsaf_read_dev(drv, XGMAC_RESET_REG);
 517        regs[9] = dsaf_read_dev(drv, XGMAC_LINK_CONTROL_REG);
 518        regs[10] = dsaf_read_dev(drv, XGMAC_LINK_STATUS_REG);
 519
 520        regs[11] = dsaf_read_dev(drv, XGMAC_SPARE_REG);
 521        regs[12] = dsaf_read_dev(drv, XGMAC_SPARE_CNT_REG);
 522        regs[13] = dsaf_read_dev(drv, XGMAC_MAC_ENABLE_REG);
 523        regs[14] = dsaf_read_dev(drv, XGMAC_MAC_CONTROL_REG);
 524        regs[15] = dsaf_read_dev(drv, XGMAC_MAC_IPG_REG);
 525        regs[16] = dsaf_read_dev(drv, XGMAC_MAC_MSG_CRC_EN_REG);
 526        regs[17] = dsaf_read_dev(drv, XGMAC_MAC_MSG_IMG_REG);
 527        regs[18] = dsaf_read_dev(drv, XGMAC_MAC_MSG_FC_CFG_REG);
 528        regs[19] = dsaf_read_dev(drv, XGMAC_MAC_MSG_TC_CFG_REG);
 529        regs[20] = dsaf_read_dev(drv, XGMAC_MAC_PAD_SIZE_REG);
 530        regs[21] = dsaf_read_dev(drv, XGMAC_MAC_MIN_PKT_SIZE_REG);
 531        regs[22] = dsaf_read_dev(drv, XGMAC_MAC_MAX_PKT_SIZE_REG);
 532        regs[23] = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_CTRL_REG);
 533        regs[24] = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_TIME_REG);
 534        regs[25] = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_GAP_REG);
 535        regs[26] = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_LOCAL_MAC_H_REG);
 536        regs[27] = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_LOCAL_MAC_L_REG);
 537        regs[28] = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_PEER_MAC_H_REG);
 538        regs[29] = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_PEER_MAC_L_REG);
 539        regs[30] = dsaf_read_dev(drv, XGMAC_MAC_PFC_PRI_EN_REG);
 540        regs[31] = dsaf_read_dev(drv, XGMAC_MAC_1588_CTRL_REG);
 541        regs[32] = dsaf_read_dev(drv, XGMAC_MAC_1588_TX_PORT_DLY_REG);
 542        regs[33] = dsaf_read_dev(drv, XGMAC_MAC_1588_RX_PORT_DLY_REG);
 543        regs[34] = dsaf_read_dev(drv, XGMAC_MAC_1588_ASYM_DLY_REG);
 544        regs[35] = dsaf_read_dev(drv, XGMAC_MAC_1588_ADJUST_CFG_REG);
 545
 546        regs[36] = dsaf_read_dev(drv, XGMAC_MAC_Y1731_ETH_TYPE_REG);
 547        regs[37] = dsaf_read_dev(drv, XGMAC_MAC_MIB_CONTROL_REG);
 548        regs[38] = dsaf_read_dev(drv, XGMAC_MAC_WAN_RATE_ADJUST_REG);
 549        regs[39] = dsaf_read_dev(drv, XGMAC_MAC_TX_ERR_MARK_REG);
 550        regs[40] = dsaf_read_dev(drv, XGMAC_MAC_TX_LF_RF_CONTROL_REG);
 551        regs[41] = dsaf_read_dev(drv, XGMAC_MAC_RX_LF_RF_STATUS_REG);
 552        regs[42] = dsaf_read_dev(drv, XGMAC_MAC_TX_RUNT_PKT_CNT_REG);
 553        regs[43] = dsaf_read_dev(drv, XGMAC_MAC_RX_RUNT_PKT_CNT_REG);
 554        regs[44] = dsaf_read_dev(drv, XGMAC_MAC_RX_PREAM_ERR_PKT_CNT_REG);
 555        regs[45] = dsaf_read_dev(drv, XGMAC_MAC_TX_LF_RF_TERM_PKT_CNT_REG);
 556        regs[46] = dsaf_read_dev(drv, XGMAC_MAC_TX_SN_MISMATCH_PKT_CNT_REG);
 557        regs[47] = dsaf_read_dev(drv, XGMAC_MAC_RX_ERR_MSG_CNT_REG);
 558        regs[48] = dsaf_read_dev(drv, XGMAC_MAC_RX_ERR_EFD_CNT_REG);
 559        regs[49] = dsaf_read_dev(drv, XGMAC_MAC_ERR_INFO_REG);
 560        regs[50] = dsaf_read_dev(drv, XGMAC_MAC_DBG_INFO_REG);
 561
 562        regs[51] = dsaf_read_dev(drv, XGMAC_PCS_BASER_SYNC_THD_REG);
 563        regs[52] = dsaf_read_dev(drv, XGMAC_PCS_STATUS1_REG);
 564        regs[53] = dsaf_read_dev(drv, XGMAC_PCS_BASER_STATUS1_REG);
 565        regs[54] = dsaf_read_dev(drv, XGMAC_PCS_BASER_STATUS2_REG);
 566        regs[55] = dsaf_read_dev(drv, XGMAC_PCS_BASER_SEEDA_0_REG);
 567        regs[56] = dsaf_read_dev(drv, XGMAC_PCS_BASER_SEEDA_1_REG);
 568        regs[57] = dsaf_read_dev(drv, XGMAC_PCS_BASER_SEEDB_0_REG);
 569        regs[58] = dsaf_read_dev(drv, XGMAC_PCS_BASER_SEEDB_1_REG);
 570        regs[59] = dsaf_read_dev(drv, XGMAC_PCS_BASER_TEST_CONTROL_REG);
 571        regs[60] = dsaf_read_dev(drv, XGMAC_PCS_BASER_TEST_ERR_CNT_REG);
 572        regs[61] = dsaf_read_dev(drv, XGMAC_PCS_DBG_INFO_REG);
 573        regs[62] = dsaf_read_dev(drv, XGMAC_PCS_DBG_INFO1_REG);
 574        regs[63] = dsaf_read_dev(drv, XGMAC_PCS_DBG_INFO2_REG);
 575        regs[64] = dsaf_read_dev(drv, XGMAC_PCS_DBG_INFO3_REG);
 576
 577        regs[65] = dsaf_read_dev(drv, XGMAC_PMA_ENABLE_REG);
 578        regs[66] = dsaf_read_dev(drv, XGMAC_PMA_CONTROL_REG);
 579        regs[67] = dsaf_read_dev(drv, XGMAC_PMA_SIGNAL_STATUS_REG);
 580        regs[68] = dsaf_read_dev(drv, XGMAC_PMA_DBG_INFO_REG);
 581        regs[69] = dsaf_read_dev(drv, XGMAC_PMA_FEC_ABILITY_REG);
 582        regs[70] = dsaf_read_dev(drv, XGMAC_PMA_FEC_CONTROL_REG);
 583        regs[71] = dsaf_read_dev(drv, XGMAC_PMA_FEC_CORR_BLOCK_CNT__REG);
 584        regs[72] = dsaf_read_dev(drv, XGMAC_PMA_FEC_UNCORR_BLOCK_CNT__REG);
 585
 586        /* status registers */
 587#define hns_xgmac_cpy_q(p, q) \
 588        do {\
 589                *(p) = (u32)(q);\
 590                *((p) + 1) = (u32)((q) >> 32);\
 591        } while (0)
 592
 593        qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_FRAGMENT);
 594        hns_xgmac_cpy_q(&regs[73], qtmp);
 595        qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_UNDERSIZE);
 596        hns_xgmac_cpy_q(&regs[75], qtmp);
 597        qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_UNDERMIN);
 598        hns_xgmac_cpy_q(&regs[77], qtmp);
 599        qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_64OCTETS);
 600        hns_xgmac_cpy_q(&regs[79], qtmp);
 601        qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_65TO127OCTETS);
 602        hns_xgmac_cpy_q(&regs[81], qtmp);
 603        qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_128TO255OCTETS);
 604        hns_xgmac_cpy_q(&regs[83], qtmp);
 605        qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_256TO511OCTETS);
 606        hns_xgmac_cpy_q(&regs[85], qtmp);
 607        qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_512TO1023OCTETS);
 608        hns_xgmac_cpy_q(&regs[87], qtmp);
 609        qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_1024TO1518OCTETS);
 610        hns_xgmac_cpy_q(&regs[89], qtmp);
 611        qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_1519TOMAXOCTETS);
 612        hns_xgmac_cpy_q(&regs[91], qtmp);
 613        qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_1519TOMAXOCTETSOK);
 614        hns_xgmac_cpy_q(&regs[93], qtmp);
 615        qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_OVERSIZE);
 616        hns_xgmac_cpy_q(&regs[95], qtmp);
 617        qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_JABBER);
 618        hns_xgmac_cpy_q(&regs[97], qtmp);
 619        qtmp = hns_mac_reg_read64(drv, XGMAC_TX_GOODPKTS);
 620        hns_xgmac_cpy_q(&regs[99], qtmp);
 621        qtmp = hns_mac_reg_read64(drv, XGMAC_TX_GOODOCTETS);
 622        hns_xgmac_cpy_q(&regs[101], qtmp);
 623        qtmp = hns_mac_reg_read64(drv, XGMAC_TX_TOTAL_PKTS);
 624        hns_xgmac_cpy_q(&regs[103], qtmp);
 625        qtmp = hns_mac_reg_read64(drv, XGMAC_TX_TOTALOCTETS);
 626        hns_xgmac_cpy_q(&regs[105], qtmp);
 627        qtmp = hns_mac_reg_read64(drv, XGMAC_TX_UNICASTPKTS);
 628        hns_xgmac_cpy_q(&regs[107], qtmp);
 629        qtmp = hns_mac_reg_read64(drv, XGMAC_TX_MULTICASTPKTS);
 630        hns_xgmac_cpy_q(&regs[109], qtmp);
 631        qtmp = hns_mac_reg_read64(drv, XGMAC_TX_BROADCASTPKTS);
 632        hns_xgmac_cpy_q(&regs[111], qtmp);
 633        qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PRI0PAUSEPKTS);
 634        hns_xgmac_cpy_q(&regs[113], qtmp);
 635        qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PRI1PAUSEPKTS);
 636        hns_xgmac_cpy_q(&regs[115], qtmp);
 637        qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PRI2PAUSEPKTS);
 638        hns_xgmac_cpy_q(&regs[117], qtmp);
 639        qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PRI3PAUSEPKTS);
 640        hns_xgmac_cpy_q(&regs[119], qtmp);
 641        qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PRI4PAUSEPKTS);
 642        hns_xgmac_cpy_q(&regs[121], qtmp);
 643        qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PRI5PAUSEPKTS);
 644        hns_xgmac_cpy_q(&regs[123], qtmp);
 645        qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PRI6PAUSEPKTS);
 646        hns_xgmac_cpy_q(&regs[125], qtmp);
 647        qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PRI7PAUSEPKTS);
 648        hns_xgmac_cpy_q(&regs[127], qtmp);
 649        qtmp = hns_mac_reg_read64(drv, XGMAC_TX_MACCTRLPKTS);
 650        hns_xgmac_cpy_q(&regs[129], qtmp);
 651        qtmp = hns_mac_reg_read64(drv, XGMAC_TX_1731PKTS);
 652        hns_xgmac_cpy_q(&regs[131], qtmp);
 653        qtmp = hns_mac_reg_read64(drv, XGMAC_TX_1588PKTS);
 654        hns_xgmac_cpy_q(&regs[133], qtmp);
 655        qtmp = hns_mac_reg_read64(drv, XGMAC_RX_FROMAPPGOODPKTS);
 656        hns_xgmac_cpy_q(&regs[135], qtmp);
 657        qtmp = hns_mac_reg_read64(drv, XGMAC_RX_FROMAPPBADPKTS);
 658        hns_xgmac_cpy_q(&regs[137], qtmp);
 659        qtmp = hns_mac_reg_read64(drv, XGMAC_TX_ERRALLPKTS);
 660        hns_xgmac_cpy_q(&regs[139], qtmp);
 661
 662        /* RX */
 663        qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_FRAGMENT);
 664        hns_xgmac_cpy_q(&regs[141], qtmp);
 665        qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTSUNDERSIZE);
 666        hns_xgmac_cpy_q(&regs[143], qtmp);
 667        qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_UNDERMIN);
 668        hns_xgmac_cpy_q(&regs[145], qtmp);
 669        qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_64OCTETS);
 670        hns_xgmac_cpy_q(&regs[147], qtmp);
 671        qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_65TO127OCTETS);
 672        hns_xgmac_cpy_q(&regs[149], qtmp);
 673        qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_128TO255OCTETS);
 674        hns_xgmac_cpy_q(&regs[151], qtmp);
 675        qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_256TO511OCTETS);
 676        hns_xgmac_cpy_q(&regs[153], qtmp);
 677        qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_512TO1023OCTETS);
 678        hns_xgmac_cpy_q(&regs[155], qtmp);
 679        qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_1024TO1518OCTETS);
 680        hns_xgmac_cpy_q(&regs[157], qtmp);
 681        qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_1519TOMAXOCTETS);
 682        hns_xgmac_cpy_q(&regs[159], qtmp);
 683        qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_1519TOMAXOCTETSOK);
 684        hns_xgmac_cpy_q(&regs[161], qtmp);
 685        qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_OVERSIZE);
 686        hns_xgmac_cpy_q(&regs[163], qtmp);
 687        qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_JABBER);
 688        hns_xgmac_cpy_q(&regs[165], qtmp);
 689        qtmp = hns_mac_reg_read64(drv, XGMAC_RX_GOODPKTS);
 690        hns_xgmac_cpy_q(&regs[167], qtmp);
 691        qtmp = hns_mac_reg_read64(drv, XGMAC_RX_GOODOCTETS);
 692        hns_xgmac_cpy_q(&regs[169], qtmp);
 693        qtmp = hns_mac_reg_read64(drv, XGMAC_RX_TOTAL_PKTS);
 694        hns_xgmac_cpy_q(&regs[171], qtmp);
 695        qtmp = hns_mac_reg_read64(drv, XGMAC_RX_TOTALOCTETS);
 696        hns_xgmac_cpy_q(&regs[173], qtmp);
 697        qtmp = hns_mac_reg_read64(drv, XGMAC_RX_UNICASTPKTS);
 698        hns_xgmac_cpy_q(&regs[175], qtmp);
 699        qtmp = hns_mac_reg_read64(drv, XGMAC_RX_MULTICASTPKTS);
 700        hns_xgmac_cpy_q(&regs[177], qtmp);
 701        qtmp = hns_mac_reg_read64(drv, XGMAC_RX_BROADCASTPKTS);
 702        hns_xgmac_cpy_q(&regs[179], qtmp);
 703        qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PRI0PAUSEPKTS);
 704        hns_xgmac_cpy_q(&regs[181], qtmp);
 705        qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PRI1PAUSEPKTS);
 706        hns_xgmac_cpy_q(&regs[183], qtmp);
 707        qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PRI2PAUSEPKTS);
 708        hns_xgmac_cpy_q(&regs[185], qtmp);
 709        qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PRI3PAUSEPKTS);
 710        hns_xgmac_cpy_q(&regs[187], qtmp);
 711        qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PRI4PAUSEPKTS);
 712        hns_xgmac_cpy_q(&regs[189], qtmp);
 713        qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PRI5PAUSEPKTS);
 714        hns_xgmac_cpy_q(&regs[191], qtmp);
 715        qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PRI6PAUSEPKTS);
 716        hns_xgmac_cpy_q(&regs[193], qtmp);
 717        qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PRI7PAUSEPKTS);
 718        hns_xgmac_cpy_q(&regs[195], qtmp);
 719
 720        qtmp = hns_mac_reg_read64(drv, XGMAC_RX_MACCTRLPKTS);
 721        hns_xgmac_cpy_q(&regs[197], qtmp);
 722        qtmp = hns_mac_reg_read64(drv, XGMAC_TX_SENDAPPGOODPKTS);
 723        hns_xgmac_cpy_q(&regs[199], qtmp);
 724        qtmp = hns_mac_reg_read64(drv, XGMAC_TX_SENDAPPBADPKTS);
 725        hns_xgmac_cpy_q(&regs[201], qtmp);
 726        qtmp = hns_mac_reg_read64(drv, XGMAC_RX_1731PKTS);
 727        hns_xgmac_cpy_q(&regs[203], qtmp);
 728        qtmp = hns_mac_reg_read64(drv, XGMAC_RX_SYMBOLERRPKTS);
 729        hns_xgmac_cpy_q(&regs[205], qtmp);
 730        qtmp = hns_mac_reg_read64(drv, XGMAC_RX_FCSERRPKTS);
 731        hns_xgmac_cpy_q(&regs[207], qtmp);
 732
 733        /* mark end of mac regs */
 734        for (i = 208; i < 214; i++)
 735                regs[i] = 0xaaaaaaaa;
 736}
 737
 738/**
 739 *hns_xgmac_get_stats - get xgmac statistic
 740 *@mac_drv: mac driver
 741 *@data:data for value of stats regs
 742 */
 743static void hns_xgmac_get_stats(void *mac_drv, u64 *data)
 744{
 745        u32 i;
 746        u64 *buf = data;
 747        struct mac_driver *drv = (struct mac_driver *)mac_drv;
 748        struct mac_hw_stats *hw_stats = NULL;
 749
 750        hw_stats = &drv->mac_cb->hw_stats;
 751
 752        for (i = 0; i < ARRAY_SIZE(g_xgmac_stats_string); i++) {
 753                buf[i] = DSAF_STATS_READ(hw_stats,
 754                        g_xgmac_stats_string[i].offset);
 755        }
 756}
 757
 758/**
 759 *hns_xgmac_get_strings - get xgmac strings name
 760 *@stringset: type of values in data
 761 *@data:data for value of string name
 762 */
 763static void hns_xgmac_get_strings(u32 stringset, u8 *data)
 764{
 765        char *buff = (char *)data;
 766        u32 i;
 767
 768        if (stringset != ETH_SS_STATS)
 769                return;
 770
 771        for (i = 0; i < ARRAY_SIZE(g_xgmac_stats_string); i++) {
 772                snprintf(buff, ETH_GSTRING_LEN, g_xgmac_stats_string[i].desc);
 773                buff = buff + ETH_GSTRING_LEN;
 774        }
 775}
 776
 777/**
 778 *hns_xgmac_get_sset_count - get xgmac string set count
 779 *@stringset: type of values in data
 780 *return xgmac string set count
 781 */
 782static int hns_xgmac_get_sset_count(int stringset)
 783{
 784        if (stringset == ETH_SS_STATS || stringset == ETH_SS_PRIV_FLAGS)
 785                return ARRAY_SIZE(g_xgmac_stats_string);
 786
 787        return 0;
 788}
 789
 790/**
 791 *hns_xgmac_get_regs_count - get xgmac regs count
 792 *return xgmac regs count
 793 */
 794static int hns_xgmac_get_regs_count(void)
 795{
 796        return HNS_XGMAC_DUMP_NUM;
 797}
 798
 799void *hns_xgmac_config(struct hns_mac_cb *mac_cb, struct mac_params *mac_param)
 800{
 801        struct mac_driver *mac_drv;
 802
 803        mac_drv = devm_kzalloc(mac_cb->dev, sizeof(*mac_drv), GFP_KERNEL);
 804        if (!mac_drv)
 805                return NULL;
 806
 807        mac_drv->mac_init = hns_xgmac_init;
 808        mac_drv->mac_enable = hns_xgmac_enable;
 809        mac_drv->mac_disable = hns_xgmac_disable;
 810
 811        mac_drv->mac_id = mac_param->mac_id;
 812        mac_drv->mac_mode = mac_param->mac_mode;
 813        mac_drv->io_base = mac_param->vaddr;
 814        mac_drv->dev = mac_param->dev;
 815        mac_drv->mac_cb = mac_cb;
 816
 817        mac_drv->set_mac_addr = hns_xgmac_set_pausefrm_mac_addr;
 818        mac_drv->set_an_mode = NULL;
 819        mac_drv->config_loopback = NULL;
 820        mac_drv->config_pad_and_crc = hns_xgmac_config_pad_and_crc;
 821        mac_drv->config_half_duplex = NULL;
 822        mac_drv->set_rx_ignore_pause_frames =
 823                hns_xgmac_set_rx_ignore_pause_frames;
 824        mac_drv->mac_free = hns_xgmac_free;
 825        mac_drv->adjust_link = NULL;
 826        mac_drv->set_tx_auto_pause_frames = hns_xgmac_set_tx_auto_pause_frames;
 827        mac_drv->config_max_frame_length = hns_xgmac_config_max_frame_length;
 828        mac_drv->mac_pausefrm_cfg = hns_xgmac_pausefrm_cfg;
 829        mac_drv->autoneg_stat = NULL;
 830        mac_drv->get_info = hns_xgmac_get_info;
 831        mac_drv->get_pause_enable = hns_xgmac_get_pausefrm_cfg;
 832        mac_drv->get_link_status = hns_xgmac_get_link_status;
 833        mac_drv->get_regs = hns_xgmac_get_regs;
 834        mac_drv->get_ethtool_stats = hns_xgmac_get_stats;
 835        mac_drv->get_sset_count = hns_xgmac_get_sset_count;
 836        mac_drv->get_regs_count = hns_xgmac_get_regs_count;
 837        mac_drv->get_strings = hns_xgmac_get_strings;
 838        mac_drv->update_stats = hns_xgmac_update_stats;
 839
 840        return (void *)mac_drv;
 841}
 842