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23#include "ath5k.h"
24#include "reg.h"
25#include "debug.h"
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52void
53ath5k_hw_set_ledstate(struct ath5k_hw *ah, unsigned int state)
54{
55 u32 led;
56
57 u32 led_5210;
58
59
60 if (ah->ah_version != AR5K_AR5210)
61 AR5K_REG_DISABLE_BITS(ah, AR5K_PCICFG,
62 AR5K_PCICFG_LEDMODE | AR5K_PCICFG_LED);
63 else
64 AR5K_REG_DISABLE_BITS(ah, AR5K_PCICFG, AR5K_PCICFG_LED);
65
66
67
68
69 switch (state) {
70 case AR5K_LED_SCAN:
71 case AR5K_LED_AUTH:
72 led = AR5K_PCICFG_LEDMODE_PROP | AR5K_PCICFG_LED_PEND;
73 led_5210 = AR5K_PCICFG_LED_PEND | AR5K_PCICFG_LED_BCTL;
74 break;
75
76 case AR5K_LED_INIT:
77 led = AR5K_PCICFG_LEDMODE_PROP | AR5K_PCICFG_LED_NONE;
78 led_5210 = AR5K_PCICFG_LED_PEND;
79 break;
80
81 case AR5K_LED_ASSOC:
82 case AR5K_LED_RUN:
83 led = AR5K_PCICFG_LEDMODE_PROP | AR5K_PCICFG_LED_ASSOC;
84 led_5210 = AR5K_PCICFG_LED_ASSOC;
85 break;
86
87 default:
88 led = AR5K_PCICFG_LEDMODE_PROM | AR5K_PCICFG_LED_NONE;
89 led_5210 = AR5K_PCICFG_LED_PEND;
90 break;
91 }
92
93
94 if (ah->ah_version != AR5K_AR5210)
95 AR5K_REG_ENABLE_BITS(ah, AR5K_PCICFG, led);
96 else
97 AR5K_REG_ENABLE_BITS(ah, AR5K_PCICFG, led_5210);
98}
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104
105int
106ath5k_hw_set_gpio_input(struct ath5k_hw *ah, u32 gpio)
107{
108 if (gpio >= AR5K_NUM_GPIO)
109 return -EINVAL;
110
111 ath5k_hw_reg_write(ah,
112 (ath5k_hw_reg_read(ah, AR5K_GPIOCR) & ~AR5K_GPIOCR_OUT(gpio))
113 | AR5K_GPIOCR_IN(gpio), AR5K_GPIOCR);
114
115 return 0;
116}
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122
123int
124ath5k_hw_set_gpio_output(struct ath5k_hw *ah, u32 gpio)
125{
126 if (gpio >= AR5K_NUM_GPIO)
127 return -EINVAL;
128
129 ath5k_hw_reg_write(ah,
130 (ath5k_hw_reg_read(ah, AR5K_GPIOCR) & ~AR5K_GPIOCR_OUT(gpio))
131 | AR5K_GPIOCR_OUT(gpio), AR5K_GPIOCR);
132
133 return 0;
134}
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141u32
142ath5k_hw_get_gpio(struct ath5k_hw *ah, u32 gpio)
143{
144 if (gpio >= AR5K_NUM_GPIO)
145 return 0xffffffff;
146
147
148 return ((ath5k_hw_reg_read(ah, AR5K_GPIODI) & AR5K_GPIODI_M) >> gpio) &
149 0x1;
150}
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157
158int
159ath5k_hw_set_gpio(struct ath5k_hw *ah, u32 gpio, u32 val)
160{
161 u32 data;
162
163 if (gpio >= AR5K_NUM_GPIO)
164 return -EINVAL;
165
166
167 data = ath5k_hw_reg_read(ah, AR5K_GPIODO);
168
169 data &= ~(1 << gpio);
170 data |= (val & 1) << gpio;
171
172 ath5k_hw_reg_write(ah, data, AR5K_GPIODO);
173
174 return 0;
175}
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188void
189ath5k_hw_set_gpio_intr(struct ath5k_hw *ah, unsigned int gpio,
190 u32 interrupt_level)
191{
192 u32 data;
193
194 if (gpio >= AR5K_NUM_GPIO)
195 return;
196
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200 data = (ath5k_hw_reg_read(ah, AR5K_GPIOCR) &
201 ~(AR5K_GPIOCR_INT_SEL(gpio) | AR5K_GPIOCR_INT_SELH |
202 AR5K_GPIOCR_INT_ENA | AR5K_GPIOCR_OUT(gpio))) |
203 (AR5K_GPIOCR_INT_SEL(gpio) | AR5K_GPIOCR_INT_ENA);
204
205 ath5k_hw_reg_write(ah, interrupt_level ? data :
206 (data | AR5K_GPIOCR_INT_SELH), AR5K_GPIOCR);
207
208 ah->ah_imr |= AR5K_IMR_GPIO;
209
210
211 AR5K_REG_ENABLE_BITS(ah, AR5K_PIMR, AR5K_IMR_GPIO);
212}
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214