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9#ifndef __QETH_CORE_MPC_H__
10#define __QETH_CORE_MPC_H__
11
12#include <asm/qeth.h>
13#include <uapi/linux/if_ether.h>
14
15#define IPA_PDU_HEADER_SIZE 0x40
16#define QETH_IPA_PDU_LEN_TOTAL(buffer) (buffer + 0x0e)
17#define QETH_IPA_PDU_LEN_PDU1(buffer) (buffer + 0x26)
18#define QETH_IPA_PDU_LEN_PDU2(buffer) (buffer + 0x29)
19#define QETH_IPA_PDU_LEN_PDU3(buffer) (buffer + 0x3a)
20
21extern unsigned char IPA_PDU_HEADER[];
22#define QETH_IPA_CMD_DEST_ADDR(buffer) (buffer + 0x2c)
23
24#define IPA_CMD_LENGTH (IPA_PDU_HEADER_SIZE + sizeof(struct qeth_ipa_cmd))
25
26#define QETH_SEQ_NO_LENGTH 4
27#define QETH_MPC_TOKEN_LENGTH 4
28#define QETH_MCL_LENGTH 4
29
30#define QETH_TIMEOUT (10 * HZ)
31#define QETH_IPA_TIMEOUT (45 * HZ)
32#define QETH_IDX_COMMAND_SEQNO 0xffff0000
33
34#define QETH_CLEAR_CHANNEL_PARM -10
35#define QETH_HALT_CHANNEL_PARM -11
36#define QETH_RCD_PARM -12
37
38static inline bool qeth_intparm_is_iob(unsigned long intparm)
39{
40 switch (intparm) {
41 case QETH_CLEAR_CHANNEL_PARM:
42 case QETH_HALT_CHANNEL_PARM:
43 case QETH_RCD_PARM:
44 case 0:
45 return false;
46 }
47 return true;
48}
49
50
51
52
53#define IPA_CMD_INITIATOR_HOST 0x00
54#define IPA_CMD_INITIATOR_OSA 0x01
55#define IPA_CMD_INITIATOR_HOST_REPLY 0x80
56#define IPA_CMD_INITIATOR_OSA_REPLY 0x81
57#define IPA_CMD_PRIM_VERSION_NO 0x01
58
59enum qeth_card_types {
60 QETH_CARD_TYPE_OSD = 1,
61 QETH_CARD_TYPE_IQD = 5,
62 QETH_CARD_TYPE_OSN = 6,
63 QETH_CARD_TYPE_OSM = 3,
64 QETH_CARD_TYPE_OSX = 2,
65};
66
67#define QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE 0x18
68
69enum qeth_link_types {
70 QETH_LINK_TYPE_FAST_ETH = 0x01,
71 QETH_LINK_TYPE_HSTR = 0x02,
72 QETH_LINK_TYPE_GBIT_ETH = 0x03,
73 QETH_LINK_TYPE_OSN = 0x04,
74 QETH_LINK_TYPE_10GBIT_ETH = 0x10,
75 QETH_LINK_TYPE_LANE_ETH100 = 0x81,
76 QETH_LINK_TYPE_LANE_TR = 0x82,
77 QETH_LINK_TYPE_LANE_ETH1000 = 0x83,
78 QETH_LINK_TYPE_LANE = 0x88,
79};
80
81
82
83
84#define RESET_ROUTING_FLAG 0x10
85enum qeth_routing_types {
86
87 NO_ROUTER = 0,
88 PRIMARY_ROUTER = 1,
89 SECONDARY_ROUTER = 2,
90 MULTICAST_ROUTER = 3,
91 PRIMARY_CONNECTOR = 4,
92 SECONDARY_CONNECTOR = 5,
93};
94
95
96enum qeth_ipa_cmds {
97 IPA_CMD_STARTLAN = 0x01,
98 IPA_CMD_STOPLAN = 0x02,
99 IPA_CMD_SETVMAC = 0x21,
100 IPA_CMD_DELVMAC = 0x22,
101 IPA_CMD_SETGMAC = 0x23,
102 IPA_CMD_DELGMAC = 0x24,
103 IPA_CMD_SETVLAN = 0x25,
104 IPA_CMD_DELVLAN = 0x26,
105 IPA_CMD_VNICC = 0x2a,
106 IPA_CMD_SETBRIDGEPORT_OSA = 0x2b,
107 IPA_CMD_SETCCID = 0x41,
108 IPA_CMD_DELCCID = 0x42,
109 IPA_CMD_MODCCID = 0x43,
110 IPA_CMD_SETIP = 0xb1,
111 IPA_CMD_QIPASSIST = 0xb2,
112 IPA_CMD_SETASSPARMS = 0xb3,
113 IPA_CMD_SETIPM = 0xb4,
114 IPA_CMD_DELIPM = 0xb5,
115 IPA_CMD_SETRTG = 0xb6,
116 IPA_CMD_DELIP = 0xb7,
117 IPA_CMD_SETADAPTERPARMS = 0xb8,
118 IPA_CMD_SET_DIAG_ASS = 0xb9,
119 IPA_CMD_SETBRIDGEPORT_IQD = 0xbe,
120 IPA_CMD_CREATE_ADDR = 0xc3,
121 IPA_CMD_DESTROY_ADDR = 0xc4,
122 IPA_CMD_REGISTER_LOCAL_ADDR = 0xd1,
123 IPA_CMD_UNREGISTER_LOCAL_ADDR = 0xd2,
124 IPA_CMD_ADDRESS_CHANGE_NOTIF = 0xd3,
125 IPA_CMD_UNKNOWN = 0x00
126};
127
128enum qeth_ip_ass_cmds {
129 IPA_CMD_ASS_START = 0x0001,
130 IPA_CMD_ASS_STOP = 0x0002,
131 IPA_CMD_ASS_CONFIGURE = 0x0003,
132 IPA_CMD_ASS_ENABLE = 0x0004,
133};
134
135enum qeth_arp_process_subcmds {
136 IPA_CMD_ASS_ARP_SET_NO_ENTRIES = 0x0003,
137 IPA_CMD_ASS_ARP_QUERY_CACHE = 0x0004,
138 IPA_CMD_ASS_ARP_ADD_ENTRY = 0x0005,
139 IPA_CMD_ASS_ARP_REMOVE_ENTRY = 0x0006,
140 IPA_CMD_ASS_ARP_FLUSH_CACHE = 0x0007,
141 IPA_CMD_ASS_ARP_QUERY_INFO = 0x0104,
142 IPA_CMD_ASS_ARP_QUERY_STATS = 0x0204,
143};
144
145
146
147
148
149enum qeth_ipa_return_codes {
150 IPA_RC_SUCCESS = 0x0000,
151 IPA_RC_NOTSUPP = 0x0001,
152 IPA_RC_IP_TABLE_FULL = 0x0002,
153 IPA_RC_UNKNOWN_ERROR = 0x0003,
154 IPA_RC_UNSUPPORTED_COMMAND = 0x0004,
155 IPA_RC_TRACE_ALREADY_ACTIVE = 0x0005,
156 IPA_RC_INVALID_FORMAT = 0x0006,
157 IPA_RC_DUP_IPV6_REMOTE = 0x0008,
158 IPA_RC_SBP_IQD_NOT_CONFIGURED = 0x000C,
159 IPA_RC_DUP_IPV6_HOME = 0x0010,
160 IPA_RC_UNREGISTERED_ADDR = 0x0011,
161 IPA_RC_NO_ID_AVAILABLE = 0x0012,
162 IPA_RC_ID_NOT_FOUND = 0x0013,
163 IPA_RC_SBP_IQD_ANO_DEV_PRIMARY = 0x0014,
164 IPA_RC_SBP_IQD_CURRENT_SECOND = 0x0018,
165 IPA_RC_SBP_IQD_LIMIT_SECOND = 0x001C,
166 IPA_RC_INVALID_IP_VERSION = 0x0020,
167 IPA_RC_SBP_IQD_CURRENT_PRIMARY = 0x0024,
168 IPA_RC_LAN_FRAME_MISMATCH = 0x0040,
169 IPA_RC_SBP_IQD_NO_QDIO_QUEUES = 0x00EB,
170 IPA_RC_L2_UNSUPPORTED_CMD = 0x2003,
171 IPA_RC_L2_DUP_MAC = 0x2005,
172 IPA_RC_L2_ADDR_TABLE_FULL = 0x2006,
173 IPA_RC_L2_DUP_LAYER3_MAC = 0x200a,
174 IPA_RC_L2_GMAC_NOT_FOUND = 0x200b,
175 IPA_RC_L2_MAC_NOT_AUTH_BY_HYP = 0x200c,
176 IPA_RC_L2_MAC_NOT_AUTH_BY_ADP = 0x200d,
177 IPA_RC_L2_MAC_NOT_FOUND = 0x2010,
178 IPA_RC_L2_INVALID_VLAN_ID = 0x2015,
179 IPA_RC_L2_DUP_VLAN_ID = 0x2016,
180 IPA_RC_L2_VLAN_ID_NOT_FOUND = 0x2017,
181 IPA_RC_L2_VLAN_ID_NOT_ALLOWED = 0x2050,
182 IPA_RC_VNICC_VNICBP = 0x20B0,
183 IPA_RC_SBP_OSA_NOT_CONFIGURED = 0x2B0C,
184 IPA_RC_SBP_OSA_OS_MISMATCH = 0x2B10,
185 IPA_RC_SBP_OSA_ANO_DEV_PRIMARY = 0x2B14,
186 IPA_RC_SBP_OSA_CURRENT_SECOND = 0x2B18,
187 IPA_RC_SBP_OSA_LIMIT_SECOND = 0x2B1C,
188 IPA_RC_SBP_OSA_NOT_AUTHD_BY_ZMAN = 0x2B20,
189 IPA_RC_SBP_OSA_CURRENT_PRIMARY = 0x2B24,
190 IPA_RC_SBP_OSA_NO_QDIO_QUEUES = 0x2BEB,
191 IPA_RC_DATA_MISMATCH = 0xe001,
192 IPA_RC_INVALID_MTU_SIZE = 0xe002,
193 IPA_RC_INVALID_LANTYPE = 0xe003,
194 IPA_RC_INVALID_LANNUM = 0xe004,
195 IPA_RC_DUPLICATE_IP_ADDRESS = 0xe005,
196 IPA_RC_IP_ADDR_TABLE_FULL = 0xe006,
197 IPA_RC_LAN_PORT_STATE_ERROR = 0xe007,
198 IPA_RC_SETIP_NO_STARTLAN = 0xe008,
199 IPA_RC_SETIP_ALREADY_RECEIVED = 0xe009,
200 IPA_RC_IP_ADDR_ALREADY_USED = 0xe00a,
201 IPA_RC_MC_ADDR_NOT_FOUND = 0xe00b,
202 IPA_RC_SETIP_INVALID_VERSION = 0xe00d,
203 IPA_RC_UNSUPPORTED_SUBCMD = 0xe00e,
204 IPA_RC_ARP_ASSIST_NO_ENABLE = 0xe00f,
205 IPA_RC_PRIMARY_ALREADY_DEFINED = 0xe010,
206 IPA_RC_SECOND_ALREADY_DEFINED = 0xe011,
207 IPA_RC_INVALID_SETRTG_INDICATOR = 0xe012,
208 IPA_RC_MC_ADDR_ALREADY_DEFINED = 0xe013,
209 IPA_RC_LAN_OFFLINE = 0xe080,
210 IPA_RC_VEPA_TO_VEB_TRANSITION = 0xe090,
211 IPA_RC_INVALID_IP_VERSION2 = 0xf001,
212 IPA_RC_ENOMEM = 0xfffe,
213 IPA_RC_FFFF = 0xffff
214};
215
216#define IPA_RC_VNICC_OOSEQ 0x0005
217
218
219#define IPA_RC_INVALID_SUBCMD IPA_RC_IP_TABLE_FULL
220#define IPA_RC_HARDWARE_AUTH_ERROR IPA_RC_UNKNOWN_ERROR
221
222
223#define IPA_RC_SBP_IQD_OS_MISMATCH IPA_RC_DUP_IPV6_HOME
224#define IPA_RC_SBP_IQD_NOT_AUTHD_BY_ZMAN IPA_RC_INVALID_IP_VERSION
225
226
227enum qeth_ipa_funcs {
228 IPA_ARP_PROCESSING = 0x00000001L,
229 IPA_INBOUND_CHECKSUM = 0x00000002L,
230 IPA_OUTBOUND_CHECKSUM = 0x00000004L,
231
232 IPA_FILTERING = 0x00000010L,
233 IPA_IPV6 = 0x00000020L,
234 IPA_MULTICASTING = 0x00000040L,
235 IPA_IP_REASSEMBLY = 0x00000080L,
236 IPA_QUERY_ARP_COUNTERS = 0x00000100L,
237 IPA_QUERY_ARP_ADDR_INFO = 0x00000200L,
238 IPA_SETADAPTERPARMS = 0x00000400L,
239 IPA_VLAN_PRIO = 0x00000800L,
240 IPA_PASSTHRU = 0x00001000L,
241 IPA_FLUSH_ARP_SUPPORT = 0x00002000L,
242 IPA_FULL_VLAN = 0x00004000L,
243 IPA_INBOUND_PASSTHRU = 0x00008000L,
244 IPA_SOURCE_MAC = 0x00010000L,
245 IPA_OSA_MC_ROUTER = 0x00020000L,
246 IPA_QUERY_ARP_ASSIST = 0x00040000L,
247 IPA_INBOUND_TSO = 0x00080000L,
248 IPA_OUTBOUND_TSO = 0x00100000L,
249 IPA_INBOUND_CHECKSUM_V6 = 0x00400000L,
250 IPA_OUTBOUND_CHECKSUM_V6 = 0x00800000L,
251};
252
253
254enum qeth_ipa_setdelip_flags {
255 QETH_IPA_SETDELIP_DEFAULT = 0x00L,
256 QETH_IPA_SETIP_VIPA_FLAG = 0x01L,
257 QETH_IPA_SETIP_TAKEOVER_FLAG = 0x02L,
258 QETH_IPA_DELIP_ADDR_2_B_TAKEN_OVER = 0x20L,
259 QETH_IPA_DELIP_VIPA_FLAG = 0x40L,
260 QETH_IPA_DELIP_ADDR_NEEDS_SETIP = 0x80L,
261};
262
263
264enum qeth_ipa_setadp_cmd {
265 IPA_SETADP_QUERY_COMMANDS_SUPPORTED = 0x00000001L,
266 IPA_SETADP_ALTER_MAC_ADDRESS = 0x00000002L,
267 IPA_SETADP_ADD_DELETE_GROUP_ADDRESS = 0x00000004L,
268 IPA_SETADP_ADD_DELETE_FUNCTIONAL_ADDR = 0x00000008L,
269 IPA_SETADP_SET_ADDRESSING_MODE = 0x00000010L,
270 IPA_SETADP_SET_CONFIG_PARMS = 0x00000020L,
271 IPA_SETADP_SET_CONFIG_PARMS_EXTENDED = 0x00000040L,
272 IPA_SETADP_SET_BROADCAST_MODE = 0x00000080L,
273 IPA_SETADP_SEND_OSA_MESSAGE = 0x00000100L,
274 IPA_SETADP_SET_SNMP_CONTROL = 0x00000200L,
275 IPA_SETADP_QUERY_CARD_INFO = 0x00000400L,
276 IPA_SETADP_SET_PROMISC_MODE = 0x00000800L,
277 IPA_SETADP_SET_DIAG_ASSIST = 0x00002000L,
278 IPA_SETADP_SET_ACCESS_CONTROL = 0x00010000L,
279 IPA_SETADP_QUERY_OAT = 0x00080000L,
280 IPA_SETADP_QUERY_SWITCH_ATTRIBUTES = 0x00100000L,
281};
282enum qeth_ipa_mac_ops {
283 CHANGE_ADDR_READ_MAC = 0,
284 CHANGE_ADDR_REPLACE_MAC = 1,
285 CHANGE_ADDR_ADD_MAC = 2,
286 CHANGE_ADDR_DEL_MAC = 4,
287 CHANGE_ADDR_RESET_MAC = 8,
288};
289enum qeth_ipa_addr_ops {
290 CHANGE_ADDR_READ_ADDR = 0,
291 CHANGE_ADDR_ADD_ADDR = 1,
292 CHANGE_ADDR_DEL_ADDR = 2,
293 CHANGE_ADDR_FLUSH_ADDR_TABLE = 4,
294};
295enum qeth_ipa_promisc_modes {
296 SET_PROMISC_MODE_OFF = 0,
297 SET_PROMISC_MODE_ON = 1,
298};
299enum qeth_ipa_isolation_modes {
300 ISOLATION_MODE_NONE = 0x00000000L,
301 ISOLATION_MODE_FWD = 0x00000001L,
302 ISOLATION_MODE_DROP = 0x00000002L,
303};
304enum qeth_ipa_set_access_mode_rc {
305 SET_ACCESS_CTRL_RC_SUCCESS = 0x0000,
306 SET_ACCESS_CTRL_RC_NOT_SUPPORTED = 0x0004,
307 SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED = 0x0008,
308 SET_ACCESS_CTRL_RC_ALREADY_ISOLATED = 0x0010,
309 SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER = 0x0014,
310 SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF = 0x0018,
311 SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED = 0x0022,
312 SET_ACCESS_CTRL_RC_REFLREL_FAILED = 0x0024,
313 SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED = 0x0028,
314};
315enum qeth_card_info_card_type {
316 CARD_INFO_TYPE_1G_COPPER_A = 0x61,
317 CARD_INFO_TYPE_1G_FIBRE_A = 0x71,
318 CARD_INFO_TYPE_10G_FIBRE_A = 0x91,
319 CARD_INFO_TYPE_1G_COPPER_B = 0xb1,
320 CARD_INFO_TYPE_1G_FIBRE_B = 0xa1,
321 CARD_INFO_TYPE_10G_FIBRE_B = 0xc1,
322};
323enum qeth_card_info_port_mode {
324 CARD_INFO_PORTM_HALFDUPLEX = 0x0002,
325 CARD_INFO_PORTM_FULLDUPLEX = 0x0003,
326};
327enum qeth_card_info_port_speed {
328 CARD_INFO_PORTS_10M = 0x00000005,
329 CARD_INFO_PORTS_100M = 0x00000006,
330 CARD_INFO_PORTS_1G = 0x00000007,
331 CARD_INFO_PORTS_10G = 0x00000008,
332};
333
334
335struct qeth_ipacmd_setdelip4 {
336 __u8 ip_addr[4];
337 __u8 mask[4];
338 __u32 flags;
339} __attribute__ ((packed));
340
341struct qeth_ipacmd_setdelip6 {
342 __u8 ip_addr[16];
343 __u8 mask[16];
344 __u32 flags;
345} __attribute__ ((packed));
346
347struct qeth_ipacmd_setdelipm {
348 __u8 mac[6];
349 __u8 padding[2];
350 __u8 ip6[12];
351 __u8 ip4[4];
352} __attribute__ ((packed));
353
354struct qeth_ipacmd_layer2setdelmac {
355 __u32 mac_length;
356 __u8 mac[6];
357} __attribute__ ((packed));
358
359struct qeth_ipacmd_layer2setdelvlan {
360 __u16 vlan_id;
361} __attribute__ ((packed));
362
363
364struct qeth_ipacmd_setassparms_hdr {
365 __u32 assist_no;
366 __u16 length;
367 __u16 command_code;
368 __u16 return_code;
369 __u8 number_of_replies;
370 __u8 seq_no;
371} __attribute__((packed));
372
373struct qeth_arp_query_data {
374 __u16 request_bits;
375 __u16 reply_bits;
376 __u32 no_entries;
377 char data;
378} __attribute__((packed));
379
380
381struct qeth_arp_query_info {
382 __u32 udata_len;
383 __u16 mask_bits;
384 __u32 udata_offset;
385 __u32 no_entries;
386 char *udata;
387};
388
389
390
391
392enum qeth_ipa_checksum_bits {
393 QETH_IPA_CHECKSUM_IP_HDR = 0x0002,
394 QETH_IPA_CHECKSUM_UDP = 0x0008,
395 QETH_IPA_CHECKSUM_TCP = 0x0010,
396 QETH_IPA_CHECKSUM_LP2LP = 0x0020
397};
398
399
400struct qeth_checksum_cmd {
401 __u32 supported;
402 __u32 enabled;
403} __packed;
404
405
406struct qeth_ipacmd_setassparms {
407 struct qeth_ipacmd_setassparms_hdr hdr;
408 union {
409 __u32 flags_32bit;
410 struct qeth_checksum_cmd chksum;
411 struct qeth_arp_cache_entry add_arp_entry;
412 struct qeth_arp_query_data query_arp;
413 __u8 ip[16];
414 } data;
415} __attribute__ ((packed));
416
417
418
419struct qeth_set_routing {
420 __u8 type;
421};
422
423
424struct qeth_query_cmds_supp {
425 __u32 no_lantypes_supp;
426 __u8 lan_type;
427 __u8 reserved1[3];
428 __u32 supported_cmds;
429 __u8 reserved2[8];
430} __attribute__ ((packed));
431
432struct qeth_change_addr {
433 u32 cmd;
434 u32 addr_size;
435 u32 no_macs;
436 u8 addr[ETH_ALEN];
437};
438
439struct qeth_snmp_cmd {
440 __u8 token[16];
441 __u32 request;
442 __u32 interface;
443 __u32 returncode;
444 __u32 firmwarelevel;
445 __u32 seqno;
446 __u8 data;
447} __attribute__ ((packed));
448
449struct qeth_snmp_ureq_hdr {
450 __u32 data_len;
451 __u32 req_len;
452 __u32 reserved1;
453 __u32 reserved2;
454} __attribute__ ((packed));
455
456struct qeth_snmp_ureq {
457 struct qeth_snmp_ureq_hdr hdr;
458 struct qeth_snmp_cmd cmd;
459} __attribute__((packed));
460
461
462struct qeth_set_access_ctrl {
463 __u32 subcmd_code;
464 __u8 reserved[8];
465} __attribute__((packed));
466
467struct qeth_query_oat {
468 __u32 subcmd_code;
469 __u8 reserved[12];
470} __packed;
471
472struct qeth_qoat_priv {
473 __u32 buffer_len;
474 __u32 response_len;
475 char *buffer;
476};
477
478struct qeth_query_card_info {
479 __u8 card_type;
480 __u8 reserved1;
481 __u16 port_mode;
482 __u32 port_speed;
483 __u32 reserved2;
484};
485
486#define QETH_SWITCH_FORW_802_1 0x00000001
487#define QETH_SWITCH_FORW_REFL_RELAY 0x00000002
488#define QETH_SWITCH_CAP_RTE 0x00000004
489#define QETH_SWITCH_CAP_ECP 0x00000008
490#define QETH_SWITCH_CAP_VDP 0x00000010
491
492struct qeth_query_switch_attributes {
493 __u8 version;
494 __u8 reserved1;
495 __u16 reserved2;
496 __u32 capabilities;
497 __u32 settings;
498 __u8 reserved3[8];
499};
500
501struct qeth_ipacmd_setadpparms_hdr {
502 __u32 supp_hw_cmds;
503 __u32 reserved1;
504 __u16 cmdlength;
505 __u16 reserved2;
506 __u32 command_code;
507 __u16 return_code;
508 __u8 used_total;
509 __u8 seq_no;
510 __u32 reserved3;
511} __attribute__ ((packed));
512
513struct qeth_ipacmd_setadpparms {
514 struct qeth_ipacmd_setadpparms_hdr hdr;
515 union {
516 struct qeth_query_cmds_supp query_cmds_supp;
517 struct qeth_change_addr change_addr;
518 struct qeth_snmp_cmd snmp;
519 struct qeth_set_access_ctrl set_access_ctrl;
520 struct qeth_query_oat query_oat;
521 struct qeth_query_card_info card_info;
522 struct qeth_query_switch_attributes query_switch_attributes;
523 __u32 mode;
524 } data;
525} __attribute__ ((packed));
526
527
528struct qeth_create_destroy_address {
529 __u8 unique_id[8];
530} __attribute__ ((packed));
531
532
533
534enum qeth_diags_cmds {
535 QETH_DIAGS_CMD_QUERY = 0x0001,
536 QETH_DIAGS_CMD_TRAP = 0x0002,
537 QETH_DIAGS_CMD_TRACE = 0x0004,
538 QETH_DIAGS_CMD_NOLOG = 0x0008,
539 QETH_DIAGS_CMD_DUMP = 0x0010,
540};
541
542enum qeth_diags_trace_types {
543 QETH_DIAGS_TYPE_HIPERSOCKET = 0x02,
544};
545
546enum qeth_diags_trace_cmds {
547 QETH_DIAGS_CMD_TRACE_ENABLE = 0x0001,
548 QETH_DIAGS_CMD_TRACE_DISABLE = 0x0002,
549 QETH_DIAGS_CMD_TRACE_MODIFY = 0x0004,
550 QETH_DIAGS_CMD_TRACE_REPLACE = 0x0008,
551 QETH_DIAGS_CMD_TRACE_QUERY = 0x0010,
552};
553
554enum qeth_diags_trap_action {
555 QETH_DIAGS_TRAP_ARM = 0x01,
556 QETH_DIAGS_TRAP_DISARM = 0x02,
557 QETH_DIAGS_TRAP_CAPTURE = 0x04,
558};
559
560struct qeth_ipacmd_diagass {
561 __u32 host_tod2;
562 __u32:32;
563 __u16 subcmd_len;
564 __u16:16;
565 __u32 subcmd;
566 __u8 type;
567 __u8 action;
568 __u16 options;
569 __u32 ext;
570 __u8 cdata[64];
571} __attribute__ ((packed));
572
573
574
575#define IPA_VNICC_QUERY_CHARS 0x00000000L
576#define IPA_VNICC_QUERY_CMDS 0x00000001L
577#define IPA_VNICC_ENABLE 0x00000002L
578#define IPA_VNICC_DISABLE 0x00000004L
579#define IPA_VNICC_SET_TIMEOUT 0x00000008L
580#define IPA_VNICC_GET_TIMEOUT 0x00000010L
581
582
583#define QETH_VNICC_FLOODING 0x80000000
584#define QETH_VNICC_MCAST_FLOODING 0x40000000
585#define QETH_VNICC_LEARNING 0x20000000
586#define QETH_VNICC_TAKEOVER_SETVMAC 0x10000000
587#define QETH_VNICC_TAKEOVER_LEARNING 0x08000000
588#define QETH_VNICC_BRIDGE_INVISIBLE 0x04000000
589#define QETH_VNICC_RX_BCAST 0x02000000
590
591
592#define QETH_VNICC_ALL 0xff000000
593#define QETH_VNICC_DEFAULT QETH_VNICC_RX_BCAST
594
595#define QETH_VNICC_DEFAULT_TIMEOUT 600
596
597
598struct qeth_ipacmd_vnicc_hdr {
599 u32 sup;
600 u32 cur;
601};
602
603
604struct qeth_vnicc_sub_hdr {
605 u16 data_length;
606 u16 reserved;
607 u32 sub_command;
608};
609
610
611struct qeth_vnicc_query_cmds {
612 u32 vnic_char;
613 u32 sup_cmds;
614};
615
616
617struct qeth_vnicc_set_char {
618 u32 vnic_char;
619};
620
621
622struct qeth_vnicc_getset_timeout {
623 u32 vnic_char;
624 u32 timeout;
625};
626
627
628struct qeth_ipacmd_vnicc {
629 struct qeth_ipacmd_vnicc_hdr hdr;
630 struct qeth_vnicc_sub_hdr sub_hdr;
631 union {
632 struct qeth_vnicc_query_cmds query_cmds;
633 struct qeth_vnicc_set_char set_char;
634 struct qeth_vnicc_getset_timeout getset_timeout;
635 };
636};
637
638
639enum qeth_ipa_sbp_cmd {
640 IPA_SBP_QUERY_COMMANDS_SUPPORTED = 0x00000000L,
641 IPA_SBP_RESET_BRIDGE_PORT_ROLE = 0x00000001L,
642 IPA_SBP_SET_PRIMARY_BRIDGE_PORT = 0x00000002L,
643 IPA_SBP_SET_SECONDARY_BRIDGE_PORT = 0x00000004L,
644 IPA_SBP_QUERY_BRIDGE_PORTS = 0x00000008L,
645 IPA_SBP_BRIDGE_PORT_STATE_CHANGE = 0x00000010L,
646};
647
648struct net_if_token {
649 __u16 devnum;
650 __u8 cssid;
651 __u8 iid;
652 __u8 ssid;
653 __u8 chpid;
654 __u16 chid;
655} __packed;
656
657struct mac_addr_lnid {
658 __u8 mac[6];
659 __u16 lnid;
660} __packed;
661
662struct qeth_ipacmd_sbp_hdr {
663 __u32 supported_sbp_cmds;
664 __u32 enabled_sbp_cmds;
665 __u16 cmdlength;
666 __u16 reserved1;
667 __u32 command_code;
668 __u16 return_code;
669 __u8 used_total;
670 __u8 seq_no;
671 __u32 reserved2;
672} __packed;
673
674struct qeth_sbp_query_cmds_supp {
675 __u32 supported_cmds;
676 __u32 reserved;
677} __packed;
678
679struct qeth_sbp_reset_role {
680} __packed;
681
682struct qeth_sbp_set_primary {
683 struct net_if_token token;
684} __packed;
685
686struct qeth_sbp_set_secondary {
687} __packed;
688
689struct qeth_sbp_port_entry {
690 __u8 role;
691 __u8 state;
692 __u8 reserved1;
693 __u8 reserved2;
694 struct net_if_token token;
695} __packed;
696
697struct qeth_sbp_query_ports {
698 __u8 primary_bp_supported;
699 __u8 secondary_bp_supported;
700 __u8 num_entries;
701 __u8 entry_length;
702 struct qeth_sbp_port_entry entry[];
703} __packed;
704
705struct qeth_sbp_state_change {
706 __u8 primary_bp_supported;
707 __u8 secondary_bp_supported;
708 __u8 num_entries;
709 __u8 entry_length;
710 struct qeth_sbp_port_entry entry[];
711} __packed;
712
713struct qeth_ipacmd_setbridgeport {
714 struct qeth_ipacmd_sbp_hdr hdr;
715 union {
716 struct qeth_sbp_query_cmds_supp query_cmds_supp;
717 struct qeth_sbp_reset_role reset_role;
718 struct qeth_sbp_set_primary set_primary;
719 struct qeth_sbp_set_secondary set_secondary;
720 struct qeth_sbp_query_ports query_ports;
721 struct qeth_sbp_state_change state_change;
722 } data;
723} __packed;
724
725
726
727enum qeth_ipa_addr_change_code {
728 IPA_ADDR_CHANGE_CODE_VLANID = 0x01,
729 IPA_ADDR_CHANGE_CODE_MACADDR = 0x02,
730 IPA_ADDR_CHANGE_CODE_REMOVAL = 0x80,
731};
732
733struct qeth_ipacmd_addr_change_entry {
734 struct net_if_token token;
735 struct mac_addr_lnid addr_lnid;
736 __u8 change_code;
737 __u8 reserved1;
738 __u16 reserved2;
739} __packed;
740
741struct qeth_ipacmd_addr_change {
742 __u8 lost_event_mask;
743 __u8 reserved;
744 __u16 num_entries;
745 struct qeth_ipacmd_addr_change_entry entry[];
746} __packed;
747
748
749struct qeth_ipacmd_hdr {
750 __u8 command;
751 __u8 initiator;
752 __u16 seqno;
753 __u16 return_code;
754 __u8 adapter_type;
755 __u8 rel_adapter_no;
756 __u8 prim_version_no;
757 __u8 param_count;
758 __u16 prot_version;
759 __u32 ipa_supported;
760 __u32 ipa_enabled;
761} __attribute__ ((packed));
762
763
764struct qeth_ipa_cmd {
765 struct qeth_ipacmd_hdr hdr;
766 union {
767 struct qeth_ipacmd_setdelip4 setdelip4;
768 struct qeth_ipacmd_setdelip6 setdelip6;
769 struct qeth_ipacmd_setdelipm setdelipm;
770 struct qeth_ipacmd_setassparms setassparms;
771 struct qeth_ipacmd_layer2setdelmac setdelmac;
772 struct qeth_ipacmd_layer2setdelvlan setdelvlan;
773 struct qeth_create_destroy_address create_destroy_addr;
774 struct qeth_ipacmd_setadpparms setadapterparms;
775 struct qeth_set_routing setrtg;
776 struct qeth_ipacmd_diagass diagass;
777 struct qeth_ipacmd_setbridgeport sbp;
778 struct qeth_ipacmd_addr_change addrchange;
779 struct qeth_ipacmd_vnicc vnicc;
780 } data;
781} __attribute__ ((packed));
782
783
784
785
786
787
788enum qeth_ipa_arp_return_codes {
789 QETH_IPA_ARP_RC_SUCCESS = 0x0000,
790 QETH_IPA_ARP_RC_FAILED = 0x0001,
791 QETH_IPA_ARP_RC_NOTSUPP = 0x0002,
792 QETH_IPA_ARP_RC_OUT_OF_RANGE = 0x0003,
793 QETH_IPA_ARP_RC_Q_NOTSUPP = 0x0004,
794 QETH_IPA_ARP_RC_Q_NO_DATA = 0x0008,
795};
796
797extern char *qeth_get_ipa_msg(enum qeth_ipa_return_codes rc);
798extern char *qeth_get_ipa_cmd_name(enum qeth_ipa_cmds cmd);
799
800#define QETH_SETASS_BASE_LEN (sizeof(struct qeth_ipacmd_hdr) + \
801 sizeof(struct qeth_ipacmd_setassparms_hdr))
802#define QETH_IPA_ARP_DATA_POS(buffer) (buffer + IPA_PDU_HEADER_SIZE + \
803 QETH_SETASS_BASE_LEN)
804#define QETH_SETADP_BASE_LEN (sizeof(struct qeth_ipacmd_hdr) + \
805 sizeof(struct qeth_ipacmd_setadpparms_hdr))
806#define QETH_SNMP_SETADP_CMDLENGTH 16
807
808#define QETH_ARP_DATA_SIZE 3968
809#define QETH_ARP_CMD_LEN (QETH_ARP_DATA_SIZE + 8)
810
811#define IS_IPA_REPLY(cmd) ((cmd->hdr.initiator == IPA_CMD_INITIATOR_HOST) || \
812 (cmd->hdr.initiator == IPA_CMD_INITIATOR_OSA_REPLY))
813
814
815
816
817
818
819extern unsigned char WRITE_CCW[];
820extern unsigned char READ_CCW[];
821
822extern unsigned char CM_ENABLE[];
823#define CM_ENABLE_SIZE 0x63
824#define QETH_CM_ENABLE_ISSUER_RM_TOKEN(buffer) (buffer + 0x2c)
825#define QETH_CM_ENABLE_FILTER_TOKEN(buffer) (buffer + 0x53)
826#define QETH_CM_ENABLE_USER_DATA(buffer) (buffer + 0x5b)
827
828#define QETH_CM_ENABLE_RESP_FILTER_TOKEN(buffer) \
829 (PDU_ENCAPSULATION(buffer) + 0x13)
830
831
832extern unsigned char CM_SETUP[];
833#define CM_SETUP_SIZE 0x64
834#define QETH_CM_SETUP_DEST_ADDR(buffer) (buffer + 0x2c)
835#define QETH_CM_SETUP_CONNECTION_TOKEN(buffer) (buffer + 0x51)
836#define QETH_CM_SETUP_FILTER_TOKEN(buffer) (buffer + 0x5a)
837
838#define QETH_CM_SETUP_RESP_DEST_ADDR(buffer) \
839 (PDU_ENCAPSULATION(buffer) + 0x1a)
840
841extern unsigned char ULP_ENABLE[];
842#define ULP_ENABLE_SIZE 0x6b
843#define QETH_ULP_ENABLE_LINKNUM(buffer) (buffer + 0x61)
844#define QETH_ULP_ENABLE_DEST_ADDR(buffer) (buffer + 0x2c)
845#define QETH_ULP_ENABLE_FILTER_TOKEN(buffer) (buffer + 0x53)
846#define QETH_ULP_ENABLE_PORTNAME_AND_LL(buffer) (buffer + 0x62)
847#define QETH_ULP_ENABLE_RESP_FILTER_TOKEN(buffer) \
848 (PDU_ENCAPSULATION(buffer) + 0x13)
849#define QETH_ULP_ENABLE_RESP_MAX_MTU(buffer) \
850 (PDU_ENCAPSULATION(buffer) + 0x1f)
851#define QETH_ULP_ENABLE_RESP_DIFINFO_LEN(buffer) \
852 (PDU_ENCAPSULATION(buffer) + 0x17)
853#define QETH_ULP_ENABLE_RESP_LINK_TYPE(buffer) \
854 (PDU_ENCAPSULATION(buffer) + 0x2b)
855
856#define QETH_PROT_LAYER2 0x08
857#define QETH_PROT_TCPIP 0x03
858#define QETH_PROT_OSN2 0x0a
859#define QETH_ULP_ENABLE_PROT_TYPE(buffer) (buffer + 0x50)
860#define QETH_IPA_CMD_PROT_TYPE(buffer) (buffer + 0x19)
861
862extern unsigned char ULP_SETUP[];
863#define ULP_SETUP_SIZE 0x6c
864#define QETH_ULP_SETUP_DEST_ADDR(buffer) (buffer + 0x2c)
865#define QETH_ULP_SETUP_CONNECTION_TOKEN(buffer) (buffer + 0x51)
866#define QETH_ULP_SETUP_FILTER_TOKEN(buffer) (buffer + 0x5a)
867#define QETH_ULP_SETUP_CUA(buffer) (buffer + 0x68)
868#define QETH_ULP_SETUP_REAL_DEVADDR(buffer) (buffer + 0x6a)
869
870#define QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(buffer) \
871 (PDU_ENCAPSULATION(buffer) + 0x1a)
872
873
874extern unsigned char DM_ACT[];
875#define DM_ACT_SIZE 0x55
876#define QETH_DM_ACT_DEST_ADDR(buffer) (buffer + 0x2c)
877#define QETH_DM_ACT_CONNECTION_TOKEN(buffer) (buffer + 0x51)
878
879
880
881#define QETH_TRANSPORT_HEADER_SEQ_NO(buffer) (buffer + 4)
882#define QETH_PDU_HEADER_SEQ_NO(buffer) (buffer + 0x1c)
883#define QETH_PDU_HEADER_ACK_SEQ_NO(buffer) (buffer + 0x20)
884
885extern unsigned char IDX_ACTIVATE_READ[];
886extern unsigned char IDX_ACTIVATE_WRITE[];
887
888#define IDX_ACTIVATE_SIZE 0x22
889#define QETH_IDX_ACT_PNO(buffer) (buffer+0x0b)
890#define QETH_IDX_ACT_ISSUER_RM_TOKEN(buffer) (buffer + 0x0c)
891#define QETH_IDX_NO_PORTNAME_REQUIRED(buffer) ((buffer)[0x0b] & 0x80)
892#define QETH_IDX_ACT_FUNC_LEVEL(buffer) (buffer + 0x10)
893#define QETH_IDX_ACT_DATASET_NAME(buffer) (buffer + 0x16)
894#define QETH_IDX_ACT_QDIO_DEV_CUA(buffer) (buffer + 0x1e)
895#define QETH_IDX_ACT_QDIO_DEV_REALADDR(buffer) (buffer + 0x20)
896#define QETH_IS_IDX_ACT_POS_REPLY(buffer) (((buffer)[0x08] & 3) == 2)
897#define QETH_IDX_REPLY_LEVEL(buffer) (buffer + 0x12)
898#define QETH_IDX_ACT_CAUSE_CODE(buffer) (buffer)[0x09]
899#define QETH_IDX_ACT_ERR_EXCL 0x19
900#define QETH_IDX_ACT_ERR_AUTH 0x1E
901#define QETH_IDX_ACT_ERR_AUTH_USER 0x20
902
903#define PDU_ENCAPSULATION(buffer) \
904 (buffer + *(buffer + (*(buffer + 0x0b)) + \
905 *(buffer + *(buffer + 0x0b) + 0x11) + 0x07))
906
907#define IS_IPA(buffer) \
908 ((buffer) && \
909 (*(buffer + ((*(buffer + 0x0b)) + 4)) == 0xc1))
910
911#endif
912
