linux/drivers/usb/host/ohci-hcd.c
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   1// SPDX-License-Identifier: GPL-1.0+
   2/*
   3 * Open Host Controller Interface (OHCI) driver for USB.
   4 *
   5 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
   6 *
   7 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
   8 * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
   9 *
  10 * [ Initialisation is based on Linus'  ]
  11 * [ uhci code and gregs ohci fragments ]
  12 * [ (C) Copyright 1999 Linus Torvalds  ]
  13 * [ (C) Copyright 1999 Gregory P. Smith]
  14 *
  15 *
  16 * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller
  17 * interfaces (though some non-x86 Intel chips use it).  It supports
  18 * smarter hardware than UHCI.  A download link for the spec available
  19 * through the http://www.usb.org website.
  20 *
  21 * This file is licenced under the GPL.
  22 */
  23
  24#include <linux/module.h>
  25#include <linux/moduleparam.h>
  26#include <linux/pci.h>
  27#include <linux/kernel.h>
  28#include <linux/delay.h>
  29#include <linux/ioport.h>
  30#include <linux/sched.h>
  31#include <linux/slab.h>
  32#include <linux/errno.h>
  33#include <linux/init.h>
  34#include <linux/timer.h>
  35#include <linux/list.h>
  36#include <linux/usb.h>
  37#include <linux/usb/otg.h>
  38#include <linux/usb/hcd.h>
  39#include <linux/dma-mapping.h>
  40#include <linux/dmapool.h>
  41#include <linux/workqueue.h>
  42#include <linux/debugfs.h>
  43
  44#include <asm/io.h>
  45#include <asm/irq.h>
  46#include <asm/unaligned.h>
  47#include <asm/byteorder.h>
  48
  49
  50#define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell"
  51#define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver"
  52
  53/*-------------------------------------------------------------------------*/
  54
  55/* For initializing controller (mask in an HCFS mode too) */
  56#define OHCI_CONTROL_INIT       OHCI_CTRL_CBSR
  57#define OHCI_INTR_INIT \
  58                (OHCI_INTR_MIE | OHCI_INTR_RHSC | OHCI_INTR_UE \
  59                | OHCI_INTR_RD | OHCI_INTR_WDH)
  60
  61#ifdef __hppa__
  62/* On PA-RISC, PDC can leave IR set incorrectly; ignore it there. */
  63#define IR_DISABLE
  64#endif
  65
  66#ifdef CONFIG_ARCH_OMAP
  67/* OMAP doesn't support IR (no SMM; not needed) */
  68#define IR_DISABLE
  69#endif
  70
  71/*-------------------------------------------------------------------------*/
  72
  73static const char       hcd_name [] = "ohci_hcd";
  74
  75#define STATECHANGE_DELAY       msecs_to_jiffies(300)
  76#define IO_WATCHDOG_DELAY       msecs_to_jiffies(275)
  77#define IO_WATCHDOG_OFF         0xffffff00
  78
  79#include "ohci.h"
  80#include "pci-quirks.h"
  81
  82static void ohci_dump(struct ohci_hcd *ohci);
  83static void ohci_stop(struct usb_hcd *hcd);
  84static void io_watchdog_func(struct timer_list *t);
  85
  86#include "ohci-hub.c"
  87#include "ohci-dbg.c"
  88#include "ohci-mem.c"
  89#include "ohci-q.c"
  90
  91
  92/*
  93 * On architectures with edge-triggered interrupts we must never return
  94 * IRQ_NONE.
  95 */
  96#if defined(CONFIG_SA1111)  /* ... or other edge-triggered systems */
  97#define IRQ_NOTMINE     IRQ_HANDLED
  98#else
  99#define IRQ_NOTMINE     IRQ_NONE
 100#endif
 101
 102
 103/* Some boards misreport power switching/overcurrent */
 104static bool distrust_firmware = true;
 105module_param (distrust_firmware, bool, 0);
 106MODULE_PARM_DESC (distrust_firmware,
 107        "true to distrust firmware power/overcurrent setup");
 108
 109/* Some boards leave IR set wrongly, since they fail BIOS/SMM handshakes */
 110static bool no_handshake;
 111module_param (no_handshake, bool, 0);
 112MODULE_PARM_DESC (no_handshake, "true (not default) disables BIOS handshake");
 113
 114/*-------------------------------------------------------------------------*/
 115
 116static int number_of_tds(struct urb *urb)
 117{
 118        int                     len, i, num, this_sg_len;
 119        struct scatterlist      *sg;
 120
 121        len = urb->transfer_buffer_length;
 122        i = urb->num_mapped_sgs;
 123
 124        if (len > 0 && i > 0) {         /* Scatter-gather transfer */
 125                num = 0;
 126                sg = urb->sg;
 127                for (;;) {
 128                        this_sg_len = min_t(int, sg_dma_len(sg), len);
 129                        num += DIV_ROUND_UP(this_sg_len, 4096);
 130                        len -= this_sg_len;
 131                        if (--i <= 0 || len <= 0)
 132                                break;
 133                        sg = sg_next(sg);
 134                }
 135
 136        } else {                        /* Non-SG transfer */
 137                /* one TD for every 4096 Bytes (could be up to 8K) */
 138                num = DIV_ROUND_UP(len, 4096);
 139        }
 140        return num;
 141}
 142
 143/*
 144 * queue up an urb for anything except the root hub
 145 */
 146static int ohci_urb_enqueue (
 147        struct usb_hcd  *hcd,
 148        struct urb      *urb,
 149        gfp_t           mem_flags
 150) {
 151        struct ohci_hcd *ohci = hcd_to_ohci (hcd);
 152        struct ed       *ed;
 153        urb_priv_t      *urb_priv;
 154        unsigned int    pipe = urb->pipe;
 155        int             i, size = 0;
 156        unsigned long   flags;
 157        int             retval = 0;
 158
 159        /* every endpoint has a ed, locate and maybe (re)initialize it */
 160        ed = ed_get(ohci, urb->ep, urb->dev, pipe, urb->interval);
 161        if (! ed)
 162                return -ENOMEM;
 163
 164        /* for the private part of the URB we need the number of TDs (size) */
 165        switch (ed->type) {
 166                case PIPE_CONTROL:
 167                        /* td_submit_urb() doesn't yet handle these */
 168                        if (urb->transfer_buffer_length > 4096)
 169                                return -EMSGSIZE;
 170
 171                        /* 1 TD for setup, 1 for ACK, plus ... */
 172                        size = 2;
 173                        /* FALLTHROUGH */
 174                // case PIPE_INTERRUPT:
 175                // case PIPE_BULK:
 176                default:
 177                        size += number_of_tds(urb);
 178                        /* maybe a zero-length packet to wrap it up */
 179                        if (size == 0)
 180                                size++;
 181                        else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0
 182                                && (urb->transfer_buffer_length
 183                                        % usb_maxpacket (urb->dev, pipe,
 184                                                usb_pipeout (pipe))) == 0)
 185                                size++;
 186                        break;
 187                case PIPE_ISOCHRONOUS: /* number of packets from URB */
 188                        size = urb->number_of_packets;
 189                        break;
 190        }
 191
 192        /* allocate the private part of the URB */
 193        urb_priv = kzalloc (sizeof (urb_priv_t) + size * sizeof (struct td *),
 194                        mem_flags);
 195        if (!urb_priv)
 196                return -ENOMEM;
 197        INIT_LIST_HEAD (&urb_priv->pending);
 198        urb_priv->length = size;
 199        urb_priv->ed = ed;
 200
 201        /* allocate the TDs (deferring hash chain updates) */
 202        for (i = 0; i < size; i++) {
 203                urb_priv->td [i] = td_alloc (ohci, mem_flags);
 204                if (!urb_priv->td [i]) {
 205                        urb_priv->length = i;
 206                        urb_free_priv (ohci, urb_priv);
 207                        return -ENOMEM;
 208                }
 209        }
 210
 211        spin_lock_irqsave (&ohci->lock, flags);
 212
 213        /* don't submit to a dead HC */
 214        if (!HCD_HW_ACCESSIBLE(hcd)) {
 215                retval = -ENODEV;
 216                goto fail;
 217        }
 218        if (ohci->rh_state != OHCI_RH_RUNNING) {
 219                retval = -ENODEV;
 220                goto fail;
 221        }
 222        retval = usb_hcd_link_urb_to_ep(hcd, urb);
 223        if (retval)
 224                goto fail;
 225
 226        /* schedule the ed if needed */
 227        if (ed->state == ED_IDLE) {
 228                retval = ed_schedule (ohci, ed);
 229                if (retval < 0) {
 230                        usb_hcd_unlink_urb_from_ep(hcd, urb);
 231                        goto fail;
 232                }
 233
 234                /* Start up the I/O watchdog timer, if it's not running */
 235                if (ohci->prev_frame_no == IO_WATCHDOG_OFF &&
 236                                list_empty(&ohci->eds_in_use) &&
 237                                !(ohci->flags & OHCI_QUIRK_QEMU)) {
 238                        ohci->prev_frame_no = ohci_frame_no(ohci);
 239                        mod_timer(&ohci->io_watchdog,
 240                                        jiffies + IO_WATCHDOG_DELAY);
 241                }
 242                list_add(&ed->in_use_list, &ohci->eds_in_use);
 243
 244                if (ed->type == PIPE_ISOCHRONOUS) {
 245                        u16     frame = ohci_frame_no(ohci);
 246
 247                        /* delay a few frames before the first TD */
 248                        frame += max_t (u16, 8, ed->interval);
 249                        frame &= ~(ed->interval - 1);
 250                        frame |= ed->branch;
 251                        urb->start_frame = frame;
 252                        ed->last_iso = frame + ed->interval * (size - 1);
 253                }
 254        } else if (ed->type == PIPE_ISOCHRONOUS) {
 255                u16     next = ohci_frame_no(ohci) + 1;
 256                u16     frame = ed->last_iso + ed->interval;
 257                u16     length = ed->interval * (size - 1);
 258
 259                /* Behind the scheduling threshold? */
 260                if (unlikely(tick_before(frame, next))) {
 261
 262                        /* URB_ISO_ASAP: Round up to the first available slot */
 263                        if (urb->transfer_flags & URB_ISO_ASAP) {
 264                                frame += (next - frame + ed->interval - 1) &
 265                                                -ed->interval;
 266
 267                        /*
 268                         * Not ASAP: Use the next slot in the stream,
 269                         * no matter what.
 270                         */
 271                        } else {
 272                                /*
 273                                 * Some OHCI hardware doesn't handle late TDs
 274                                 * correctly.  After retiring them it proceeds
 275                                 * to the next ED instead of the next TD.
 276                                 * Therefore we have to omit the late TDs
 277                                 * entirely.
 278                                 */
 279                                urb_priv->td_cnt = DIV_ROUND_UP(
 280                                                (u16) (next - frame),
 281                                                ed->interval);
 282                                if (urb_priv->td_cnt >= urb_priv->length) {
 283                                        ++urb_priv->td_cnt;     /* Mark it */
 284                                        ohci_dbg(ohci, "iso underrun %p (%u+%u < %u)\n",
 285                                                        urb, frame, length,
 286                                                        next);
 287                                }
 288                        }
 289                }
 290                urb->start_frame = frame;
 291                ed->last_iso = frame + length;
 292        }
 293
 294        /* fill the TDs and link them to the ed; and
 295         * enable that part of the schedule, if needed
 296         * and update count of queued periodic urbs
 297         */
 298        urb->hcpriv = urb_priv;
 299        td_submit_urb (ohci, urb);
 300
 301fail:
 302        if (retval)
 303                urb_free_priv (ohci, urb_priv);
 304        spin_unlock_irqrestore (&ohci->lock, flags);
 305        return retval;
 306}
 307
 308/*
 309 * decouple the URB from the HC queues (TDs, urb_priv).
 310 * reporting is always done
 311 * asynchronously, and we might be dealing with an urb that's
 312 * partially transferred, or an ED with other urbs being unlinked.
 313 */
 314static int ohci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
 315{
 316        struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 317        unsigned long           flags;
 318        int                     rc;
 319        urb_priv_t              *urb_priv;
 320
 321        spin_lock_irqsave (&ohci->lock, flags);
 322        rc = usb_hcd_check_unlink_urb(hcd, urb, status);
 323        if (rc == 0) {
 324
 325                /* Unless an IRQ completed the unlink while it was being
 326                 * handed to us, flag it for unlink and giveback, and force
 327                 * some upcoming INTR_SF to call finish_unlinks()
 328                 */
 329                urb_priv = urb->hcpriv;
 330                if (urb_priv->ed->state == ED_OPER)
 331                        start_ed_unlink(ohci, urb_priv->ed);
 332
 333                if (ohci->rh_state != OHCI_RH_RUNNING) {
 334                        /* With HC dead, we can clean up right away */
 335                        ohci_work(ohci);
 336                }
 337        }
 338        spin_unlock_irqrestore (&ohci->lock, flags);
 339        return rc;
 340}
 341
 342/*-------------------------------------------------------------------------*/
 343
 344/* frees config/altsetting state for endpoints,
 345 * including ED memory, dummy TD, and bulk/intr data toggle
 346 */
 347
 348static void
 349ohci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
 350{
 351        struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 352        unsigned long           flags;
 353        struct ed               *ed = ep->hcpriv;
 354        unsigned                limit = 1000;
 355
 356        /* ASSERT:  any requests/urbs are being unlinked */
 357        /* ASSERT:  nobody can be submitting urbs for this any more */
 358
 359        if (!ed)
 360                return;
 361
 362rescan:
 363        spin_lock_irqsave (&ohci->lock, flags);
 364
 365        if (ohci->rh_state != OHCI_RH_RUNNING) {
 366sanitize:
 367                ed->state = ED_IDLE;
 368                ohci_work(ohci);
 369        }
 370
 371        switch (ed->state) {
 372        case ED_UNLINK:         /* wait for hw to finish? */
 373                /* major IRQ delivery trouble loses INTR_SF too... */
 374                if (limit-- == 0) {
 375                        ohci_warn(ohci, "ED unlink timeout\n");
 376                        goto sanitize;
 377                }
 378                spin_unlock_irqrestore (&ohci->lock, flags);
 379                schedule_timeout_uninterruptible(1);
 380                goto rescan;
 381        case ED_IDLE:           /* fully unlinked */
 382                if (list_empty (&ed->td_list)) {
 383                        td_free (ohci, ed->dummy);
 384                        ed_free (ohci, ed);
 385                        break;
 386                }
 387                /* fall through */
 388        default:
 389                /* caller was supposed to have unlinked any requests;
 390                 * that's not our job.  can't recover; must leak ed.
 391                 */
 392                ohci_err (ohci, "leak ed %p (#%02x) state %d%s\n",
 393                        ed, ep->desc.bEndpointAddress, ed->state,
 394                        list_empty (&ed->td_list) ? "" : " (has tds)");
 395                td_free (ohci, ed->dummy);
 396                break;
 397        }
 398        ep->hcpriv = NULL;
 399        spin_unlock_irqrestore (&ohci->lock, flags);
 400}
 401
 402static int ohci_get_frame (struct usb_hcd *hcd)
 403{
 404        struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 405
 406        return ohci_frame_no(ohci);
 407}
 408
 409static void ohci_usb_reset (struct ohci_hcd *ohci)
 410{
 411        ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
 412        ohci->hc_control &= OHCI_CTRL_RWC;
 413        ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 414        ohci->rh_state = OHCI_RH_HALTED;
 415}
 416
 417/* ohci_shutdown forcibly disables IRQs and DMA, helping kexec and
 418 * other cases where the next software may expect clean state from the
 419 * "firmware".  this is bus-neutral, unlike shutdown() methods.
 420 */
 421static void
 422ohci_shutdown (struct usb_hcd *hcd)
 423{
 424        struct ohci_hcd *ohci;
 425
 426        ohci = hcd_to_ohci (hcd);
 427        ohci_writel(ohci, (u32) ~0, &ohci->regs->intrdisable);
 428
 429        /* Software reset, after which the controller goes into SUSPEND */
 430        ohci_writel(ohci, OHCI_HCR, &ohci->regs->cmdstatus);
 431        ohci_readl(ohci, &ohci->regs->cmdstatus);       /* flush the writes */
 432        udelay(10);
 433
 434        ohci_writel(ohci, ohci->fminterval, &ohci->regs->fminterval);
 435        ohci->rh_state = OHCI_RH_HALTED;
 436}
 437
 438/*-------------------------------------------------------------------------*
 439 * HC functions
 440 *-------------------------------------------------------------------------*/
 441
 442/* init memory, and kick BIOS/SMM off */
 443
 444static int ohci_init (struct ohci_hcd *ohci)
 445{
 446        int ret;
 447        struct usb_hcd *hcd = ohci_to_hcd(ohci);
 448
 449        /* Accept arbitrarily long scatter-gather lists */
 450        if (!(hcd->driver->flags & HCD_LOCAL_MEM))
 451                hcd->self.sg_tablesize = ~0;
 452
 453        if (distrust_firmware)
 454                ohci->flags |= OHCI_QUIRK_HUB_POWER;
 455
 456        ohci->rh_state = OHCI_RH_HALTED;
 457        ohci->regs = hcd->regs;
 458
 459        /* REVISIT this BIOS handshake is now moved into PCI "quirks", and
 460         * was never needed for most non-PCI systems ... remove the code?
 461         */
 462
 463#ifndef IR_DISABLE
 464        /* SMM owns the HC?  not for long! */
 465        if (!no_handshake && ohci_readl (ohci,
 466                                        &ohci->regs->control) & OHCI_CTRL_IR) {
 467                u32 temp;
 468
 469                ohci_dbg (ohci, "USB HC TakeOver from BIOS/SMM\n");
 470
 471                /* this timeout is arbitrary.  we make it long, so systems
 472                 * depending on usb keyboards may be usable even if the
 473                 * BIOS/SMM code seems pretty broken.
 474                 */
 475                temp = 500;     /* arbitrary: five seconds */
 476
 477                ohci_writel (ohci, OHCI_INTR_OC, &ohci->regs->intrenable);
 478                ohci_writel (ohci, OHCI_OCR, &ohci->regs->cmdstatus);
 479                while (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_IR) {
 480                        msleep (10);
 481                        if (--temp == 0) {
 482                                ohci_err (ohci, "USB HC takeover failed!"
 483                                        "  (BIOS/SMM bug)\n");
 484                                return -EBUSY;
 485                        }
 486                }
 487                ohci_usb_reset (ohci);
 488        }
 489#endif
 490
 491        /* Disable HC interrupts */
 492        ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
 493
 494        /* flush the writes, and save key bits like RWC */
 495        if (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_RWC)
 496                ohci->hc_control |= OHCI_CTRL_RWC;
 497
 498        /* Read the number of ports unless overridden */
 499        if (ohci->num_ports == 0)
 500                ohci->num_ports = roothub_a(ohci) & RH_A_NDP;
 501
 502        if (ohci->hcca)
 503                return 0;
 504
 505        timer_setup(&ohci->io_watchdog, io_watchdog_func, 0);
 506        ohci->prev_frame_no = IO_WATCHDOG_OFF;
 507
 508        ohci->hcca = dma_alloc_coherent (hcd->self.controller,
 509                        sizeof(*ohci->hcca), &ohci->hcca_dma, GFP_KERNEL);
 510        if (!ohci->hcca)
 511                return -ENOMEM;
 512
 513        if ((ret = ohci_mem_init (ohci)) < 0)
 514                ohci_stop (hcd);
 515        else {
 516                create_debug_files (ohci);
 517        }
 518
 519        return ret;
 520}
 521
 522/*-------------------------------------------------------------------------*/
 523
 524/* Start an OHCI controller, set the BUS operational
 525 * resets USB and controller
 526 * enable interrupts
 527 */
 528static int ohci_run (struct ohci_hcd *ohci)
 529{
 530        u32                     mask, val;
 531        int                     first = ohci->fminterval == 0;
 532        struct usb_hcd          *hcd = ohci_to_hcd(ohci);
 533
 534        ohci->rh_state = OHCI_RH_HALTED;
 535
 536        /* boot firmware should have set this up (5.1.1.3.1) */
 537        if (first) {
 538
 539                val = ohci_readl (ohci, &ohci->regs->fminterval);
 540                ohci->fminterval = val & 0x3fff;
 541                if (ohci->fminterval != FI)
 542                        ohci_dbg (ohci, "fminterval delta %d\n",
 543                                ohci->fminterval - FI);
 544                ohci->fminterval |= FSMP (ohci->fminterval) << 16;
 545                /* also: power/overcurrent flags in roothub.a */
 546        }
 547
 548        /* Reset USB nearly "by the book".  RemoteWakeupConnected has
 549         * to be checked in case boot firmware (BIOS/SMM/...) has set up
 550         * wakeup in a way the bus isn't aware of (e.g., legacy PCI PM).
 551         * If the bus glue detected wakeup capability then it should
 552         * already be enabled; if so we'll just enable it again.
 553         */
 554        if ((ohci->hc_control & OHCI_CTRL_RWC) != 0)
 555                device_set_wakeup_capable(hcd->self.controller, 1);
 556
 557        switch (ohci->hc_control & OHCI_CTRL_HCFS) {
 558        case OHCI_USB_OPER:
 559                val = 0;
 560                break;
 561        case OHCI_USB_SUSPEND:
 562        case OHCI_USB_RESUME:
 563                ohci->hc_control &= OHCI_CTRL_RWC;
 564                ohci->hc_control |= OHCI_USB_RESUME;
 565                val = 10 /* msec wait */;
 566                break;
 567        // case OHCI_USB_RESET:
 568        default:
 569                ohci->hc_control &= OHCI_CTRL_RWC;
 570                ohci->hc_control |= OHCI_USB_RESET;
 571                val = 50 /* msec wait */;
 572                break;
 573        }
 574        ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 575        // flush the writes
 576        (void) ohci_readl (ohci, &ohci->regs->control);
 577        msleep(val);
 578
 579        memset (ohci->hcca, 0, sizeof (struct ohci_hcca));
 580
 581        /* 2msec timelimit here means no irqs/preempt */
 582        spin_lock_irq (&ohci->lock);
 583
 584retry:
 585        /* HC Reset requires max 10 us delay */
 586        ohci_writel (ohci, OHCI_HCR,  &ohci->regs->cmdstatus);
 587        val = 30;       /* ... allow extra time */
 588        while ((ohci_readl (ohci, &ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
 589                if (--val == 0) {
 590                        spin_unlock_irq (&ohci->lock);
 591                        ohci_err (ohci, "USB HC reset timed out!\n");
 592                        return -1;
 593                }
 594                udelay (1);
 595        }
 596
 597        /* now we're in the SUSPEND state ... must go OPERATIONAL
 598         * within 2msec else HC enters RESUME
 599         *
 600         * ... but some hardware won't init fmInterval "by the book"
 601         * (SiS, OPTi ...), so reset again instead.  SiS doesn't need
 602         * this if we write fmInterval after we're OPERATIONAL.
 603         * Unclear about ALi, ServerWorks, and others ... this could
 604         * easily be a longstanding bug in chip init on Linux.
 605         */
 606        if (ohci->flags & OHCI_QUIRK_INITRESET) {
 607                ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 608                // flush those writes
 609                (void) ohci_readl (ohci, &ohci->regs->control);
 610        }
 611
 612        /* Tell the controller where the control and bulk lists are
 613         * The lists are empty now. */
 614        ohci_writel (ohci, 0, &ohci->regs->ed_controlhead);
 615        ohci_writel (ohci, 0, &ohci->regs->ed_bulkhead);
 616
 617        /* a reset clears this */
 618        ohci_writel (ohci, (u32) ohci->hcca_dma, &ohci->regs->hcca);
 619
 620        periodic_reinit (ohci);
 621
 622        /* some OHCI implementations are finicky about how they init.
 623         * bogus values here mean not even enumeration could work.
 624         */
 625        if ((ohci_readl (ohci, &ohci->regs->fminterval) & 0x3fff0000) == 0
 626                        || !ohci_readl (ohci, &ohci->regs->periodicstart)) {
 627                if (!(ohci->flags & OHCI_QUIRK_INITRESET)) {
 628                        ohci->flags |= OHCI_QUIRK_INITRESET;
 629                        ohci_dbg (ohci, "enabling initreset quirk\n");
 630                        goto retry;
 631                }
 632                spin_unlock_irq (&ohci->lock);
 633                ohci_err (ohci, "init err (%08x %04x)\n",
 634                        ohci_readl (ohci, &ohci->regs->fminterval),
 635                        ohci_readl (ohci, &ohci->regs->periodicstart));
 636                return -EOVERFLOW;
 637        }
 638
 639        /* use rhsc irqs after hub_wq is allocated */
 640        set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
 641        hcd->uses_new_polling = 1;
 642
 643        /* start controller operations */
 644        ohci->hc_control &= OHCI_CTRL_RWC;
 645        ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER;
 646        ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 647        ohci->rh_state = OHCI_RH_RUNNING;
 648
 649        /* wake on ConnectStatusChange, matching external hubs */
 650        ohci_writel (ohci, RH_HS_DRWE, &ohci->regs->roothub.status);
 651
 652        /* Choose the interrupts we care about now, others later on demand */
 653        mask = OHCI_INTR_INIT;
 654        ohci_writel (ohci, ~0, &ohci->regs->intrstatus);
 655        ohci_writel (ohci, mask, &ohci->regs->intrenable);
 656
 657        /* handle root hub init quirks ... */
 658        val = roothub_a (ohci);
 659        val &= ~(RH_A_PSM | RH_A_OCPM);
 660        if (ohci->flags & OHCI_QUIRK_SUPERIO) {
 661                /* NSC 87560 and maybe others */
 662                val |= RH_A_NOCP;
 663                val &= ~(RH_A_POTPGT | RH_A_NPS);
 664                ohci_writel (ohci, val, &ohci->regs->roothub.a);
 665        } else if ((ohci->flags & OHCI_QUIRK_AMD756) ||
 666                        (ohci->flags & OHCI_QUIRK_HUB_POWER)) {
 667                /* hub power always on; required for AMD-756 and some
 668                 * Mac platforms.  ganged overcurrent reporting, if any.
 669                 */
 670                val |= RH_A_NPS;
 671                ohci_writel (ohci, val, &ohci->regs->roothub.a);
 672        }
 673        ohci_writel (ohci, RH_HS_LPSC, &ohci->regs->roothub.status);
 674        ohci_writel (ohci, (val & RH_A_NPS) ? 0 : RH_B_PPCM,
 675                                                &ohci->regs->roothub.b);
 676        // flush those writes
 677        (void) ohci_readl (ohci, &ohci->regs->control);
 678
 679        ohci->next_statechange = jiffies + STATECHANGE_DELAY;
 680        spin_unlock_irq (&ohci->lock);
 681
 682        // POTPGT delay is bits 24-31, in 2 ms units.
 683        mdelay ((val >> 23) & 0x1fe);
 684
 685        ohci_dump(ohci);
 686
 687        return 0;
 688}
 689
 690/* ohci_setup routine for generic controller initialization */
 691
 692int ohci_setup(struct usb_hcd *hcd)
 693{
 694        struct ohci_hcd         *ohci = hcd_to_ohci(hcd);
 695
 696        ohci_hcd_init(ohci);
 697        
 698        return ohci_init(ohci);
 699}
 700EXPORT_SYMBOL_GPL(ohci_setup);
 701
 702/* ohci_start routine for generic controller start of all OHCI bus glue */
 703static int ohci_start(struct usb_hcd *hcd)
 704{
 705        struct ohci_hcd         *ohci = hcd_to_ohci(hcd);
 706        int     ret;
 707
 708        ret = ohci_run(ohci);
 709        if (ret < 0) {
 710                ohci_err(ohci, "can't start\n");
 711                ohci_stop(hcd);
 712        }
 713        return ret;
 714}
 715
 716/*-------------------------------------------------------------------------*/
 717
 718/*
 719 * Some OHCI controllers are known to lose track of completed TDs.  They
 720 * don't add the TDs to the hardware done queue, which means we never see
 721 * them as being completed.
 722 *
 723 * This watchdog routine checks for such problems.  Without some way to
 724 * tell when those TDs have completed, we would never take their EDs off
 725 * the unlink list.  As a result, URBs could never be dequeued and
 726 * endpoints could never be released.
 727 */
 728static void io_watchdog_func(struct timer_list *t)
 729{
 730        struct ohci_hcd *ohci = from_timer(ohci, t, io_watchdog);
 731        bool            takeback_all_pending = false;
 732        u32             status;
 733        u32             head;
 734        struct ed       *ed;
 735        struct td       *td, *td_start, *td_next;
 736        unsigned        frame_no, prev_frame_no = IO_WATCHDOG_OFF;
 737        unsigned long   flags;
 738
 739        spin_lock_irqsave(&ohci->lock, flags);
 740
 741        /*
 742         * One way to lose track of completed TDs is if the controller
 743         * never writes back the done queue head.  If it hasn't been
 744         * written back since the last time this function ran and if it
 745         * was non-empty at that time, something is badly wrong with the
 746         * hardware.
 747         */
 748        status = ohci_readl(ohci, &ohci->regs->intrstatus);
 749        if (!(status & OHCI_INTR_WDH) && ohci->wdh_cnt == ohci->prev_wdh_cnt) {
 750                if (ohci->prev_donehead) {
 751                        ohci_err(ohci, "HcDoneHead not written back; disabled\n");
 752 died:
 753                        usb_hc_died(ohci_to_hcd(ohci));
 754                        ohci_dump(ohci);
 755                        ohci_shutdown(ohci_to_hcd(ohci));
 756                        goto done;
 757                } else {
 758                        /* No write back because the done queue was empty */
 759                        takeback_all_pending = true;
 760                }
 761        }
 762
 763        /* Check every ED which might have pending TDs */
 764        list_for_each_entry(ed, &ohci->eds_in_use, in_use_list) {
 765                if (ed->pending_td) {
 766                        if (takeback_all_pending ||
 767                                        OKAY_TO_TAKEBACK(ohci, ed)) {
 768                                unsigned tmp = hc32_to_cpu(ohci, ed->hwINFO);
 769
 770                                ohci_dbg(ohci, "takeback pending TD for dev %d ep 0x%x\n",
 771                                                0x007f & tmp,
 772                                                (0x000f & (tmp >> 7)) +
 773                                                        ((tmp & ED_IN) >> 5));
 774                                add_to_done_list(ohci, ed->pending_td);
 775                        }
 776                }
 777
 778                /* Starting from the latest pending TD, */
 779                td = ed->pending_td;
 780
 781                /* or the last TD on the done list, */
 782                if (!td) {
 783                        list_for_each_entry(td_next, &ed->td_list, td_list) {
 784                                if (!td_next->next_dl_td)
 785                                        break;
 786                                td = td_next;
 787                        }
 788                }
 789
 790                /* find the last TD processed by the controller. */
 791                head = hc32_to_cpu(ohci, READ_ONCE(ed->hwHeadP)) & TD_MASK;
 792                td_start = td;
 793                td_next = list_prepare_entry(td, &ed->td_list, td_list);
 794                list_for_each_entry_continue(td_next, &ed->td_list, td_list) {
 795                        if (head == (u32) td_next->td_dma)
 796                                break;
 797                        td = td_next;   /* head pointer has passed this TD */
 798                }
 799                if (td != td_start) {
 800                        /*
 801                         * In case a WDH cycle is in progress, we will wait
 802                         * for the next two cycles to complete before assuming
 803                         * this TD will never get on the done queue.
 804                         */
 805                        ed->takeback_wdh_cnt = ohci->wdh_cnt + 2;
 806                        ed->pending_td = td;
 807                }
 808        }
 809
 810        ohci_work(ohci);
 811
 812        if (ohci->rh_state == OHCI_RH_RUNNING) {
 813
 814                /*
 815                 * Sometimes a controller just stops working.  We can tell
 816                 * by checking that the frame counter has advanced since
 817                 * the last time we ran.
 818                 *
 819                 * But be careful: Some controllers violate the spec by
 820                 * stopping their frame counter when no ports are active.
 821                 */
 822                frame_no = ohci_frame_no(ohci);
 823                if (frame_no == ohci->prev_frame_no) {
 824                        int             active_cnt = 0;
 825                        int             i;
 826                        unsigned        tmp;
 827
 828                        for (i = 0; i < ohci->num_ports; ++i) {
 829                                tmp = roothub_portstatus(ohci, i);
 830                                /* Enabled and not suspended? */
 831                                if ((tmp & RH_PS_PES) && !(tmp & RH_PS_PSS))
 832                                        ++active_cnt;
 833                        }
 834
 835                        if (active_cnt > 0) {
 836                                ohci_err(ohci, "frame counter not updating; disabled\n");
 837                                goto died;
 838                        }
 839                }
 840                if (!list_empty(&ohci->eds_in_use)) {
 841                        prev_frame_no = frame_no;
 842                        ohci->prev_wdh_cnt = ohci->wdh_cnt;
 843                        ohci->prev_donehead = ohci_readl(ohci,
 844                                        &ohci->regs->donehead);
 845                        mod_timer(&ohci->io_watchdog,
 846                                        jiffies + IO_WATCHDOG_DELAY);
 847                }
 848        }
 849
 850 done:
 851        ohci->prev_frame_no = prev_frame_no;
 852        spin_unlock_irqrestore(&ohci->lock, flags);
 853}
 854
 855/* an interrupt happens */
 856
 857static irqreturn_t ohci_irq (struct usb_hcd *hcd)
 858{
 859        struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 860        struct ohci_regs __iomem *regs = ohci->regs;
 861        int                     ints;
 862
 863        /* Read interrupt status (and flush pending writes).  We ignore the
 864         * optimization of checking the LSB of hcca->done_head; it doesn't
 865         * work on all systems (edge triggering for OHCI can be a factor).
 866         */
 867        ints = ohci_readl(ohci, &regs->intrstatus);
 868
 869        /* Check for an all 1's result which is a typical consequence
 870         * of dead, unclocked, or unplugged (CardBus...) devices
 871         */
 872        if (ints == ~(u32)0) {
 873                ohci->rh_state = OHCI_RH_HALTED;
 874                ohci_dbg (ohci, "device removed!\n");
 875                usb_hc_died(hcd);
 876                return IRQ_HANDLED;
 877        }
 878
 879        /* We only care about interrupts that are enabled */
 880        ints &= ohci_readl(ohci, &regs->intrenable);
 881
 882        /* interrupt for some other device? */
 883        if (ints == 0 || unlikely(ohci->rh_state == OHCI_RH_HALTED))
 884                return IRQ_NOTMINE;
 885
 886        if (ints & OHCI_INTR_UE) {
 887                // e.g. due to PCI Master/Target Abort
 888                if (quirk_nec(ohci)) {
 889                        /* Workaround for a silicon bug in some NEC chips used
 890                         * in Apple's PowerBooks. Adapted from Darwin code.
 891                         */
 892                        ohci_err (ohci, "OHCI Unrecoverable Error, scheduling NEC chip restart\n");
 893
 894                        ohci_writel (ohci, OHCI_INTR_UE, &regs->intrdisable);
 895
 896                        schedule_work (&ohci->nec_work);
 897                } else {
 898                        ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n");
 899                        ohci->rh_state = OHCI_RH_HALTED;
 900                        usb_hc_died(hcd);
 901                }
 902
 903                ohci_dump(ohci);
 904                ohci_usb_reset (ohci);
 905        }
 906
 907        if (ints & OHCI_INTR_RHSC) {
 908                ohci_dbg(ohci, "rhsc\n");
 909                ohci->next_statechange = jiffies + STATECHANGE_DELAY;
 910                ohci_writel(ohci, OHCI_INTR_RD | OHCI_INTR_RHSC,
 911                                &regs->intrstatus);
 912
 913                /* NOTE: Vendors didn't always make the same implementation
 914                 * choices for RHSC.  Many followed the spec; RHSC triggers
 915                 * on an edge, like setting and maybe clearing a port status
 916                 * change bit.  With others it's level-triggered, active
 917                 * until hub_wq clears all the port status change bits.  We'll
 918                 * always disable it here and rely on polling until hub_wq
 919                 * re-enables it.
 920                 */
 921                ohci_writel(ohci, OHCI_INTR_RHSC, &regs->intrdisable);
 922                usb_hcd_poll_rh_status(hcd);
 923        }
 924
 925        /* For connect and disconnect events, we expect the controller
 926         * to turn on RHSC along with RD.  But for remote wakeup events
 927         * this might not happen.
 928         */
 929        else if (ints & OHCI_INTR_RD) {
 930                ohci_dbg(ohci, "resume detect\n");
 931                ohci_writel(ohci, OHCI_INTR_RD, &regs->intrstatus);
 932                set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
 933                if (ohci->autostop) {
 934                        spin_lock (&ohci->lock);
 935                        ohci_rh_resume (ohci);
 936                        spin_unlock (&ohci->lock);
 937                } else
 938                        usb_hcd_resume_root_hub(hcd);
 939        }
 940
 941        spin_lock(&ohci->lock);
 942        if (ints & OHCI_INTR_WDH)
 943                update_done_list(ohci);
 944
 945        /* could track INTR_SO to reduce available PCI/... bandwidth */
 946
 947        /* handle any pending URB/ED unlinks, leaving INTR_SF enabled
 948         * when there's still unlinking to be done (next frame).
 949         */
 950        ohci_work(ohci);
 951        if ((ints & OHCI_INTR_SF) != 0 && !ohci->ed_rm_list
 952                        && ohci->rh_state == OHCI_RH_RUNNING)
 953                ohci_writel (ohci, OHCI_INTR_SF, &regs->intrdisable);
 954
 955        if (ohci->rh_state == OHCI_RH_RUNNING) {
 956                ohci_writel (ohci, ints, &regs->intrstatus);
 957                if (ints & OHCI_INTR_WDH)
 958                        ++ohci->wdh_cnt;
 959
 960                ohci_writel (ohci, OHCI_INTR_MIE, &regs->intrenable);
 961                // flush those writes
 962                (void) ohci_readl (ohci, &ohci->regs->control);
 963        }
 964        spin_unlock(&ohci->lock);
 965
 966        return IRQ_HANDLED;
 967}
 968
 969/*-------------------------------------------------------------------------*/
 970
 971static void ohci_stop (struct usb_hcd *hcd)
 972{
 973        struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 974
 975        ohci_dump(ohci);
 976
 977        if (quirk_nec(ohci))
 978                flush_work(&ohci->nec_work);
 979        del_timer_sync(&ohci->io_watchdog);
 980        ohci->prev_frame_no = IO_WATCHDOG_OFF;
 981
 982        ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
 983        ohci_usb_reset(ohci);
 984        free_irq(hcd->irq, hcd);
 985        hcd->irq = 0;
 986
 987        if (quirk_amdiso(ohci))
 988                usb_amd_dev_put();
 989
 990        remove_debug_files (ohci);
 991        ohci_mem_cleanup (ohci);
 992        if (ohci->hcca) {
 993                dma_free_coherent (hcd->self.controller,
 994                                sizeof *ohci->hcca,
 995                                ohci->hcca, ohci->hcca_dma);
 996                ohci->hcca = NULL;
 997                ohci->hcca_dma = 0;
 998        }
 999}
1000
1001/*-------------------------------------------------------------------------*/
1002
1003#if defined(CONFIG_PM) || defined(CONFIG_USB_PCI)
1004
1005/* must not be called from interrupt context */
1006int ohci_restart(struct ohci_hcd *ohci)
1007{
1008        int temp;
1009        int i;
1010        struct urb_priv *priv;
1011
1012        ohci_init(ohci);
1013        spin_lock_irq(&ohci->lock);
1014        ohci->rh_state = OHCI_RH_HALTED;
1015
1016        /* Recycle any "live" eds/tds (and urbs). */
1017        if (!list_empty (&ohci->pending))
1018                ohci_dbg(ohci, "abort schedule...\n");
1019        list_for_each_entry (priv, &ohci->pending, pending) {
1020                struct urb      *urb = priv->td[0]->urb;
1021                struct ed       *ed = priv->ed;
1022
1023                switch (ed->state) {
1024                case ED_OPER:
1025                        ed->state = ED_UNLINK;
1026                        ed->hwINFO |= cpu_to_hc32(ohci, ED_DEQUEUE);
1027                        ed_deschedule (ohci, ed);
1028
1029                        ed->ed_next = ohci->ed_rm_list;
1030                        ed->ed_prev = NULL;
1031                        ohci->ed_rm_list = ed;
1032                        /* FALLTHROUGH */
1033                case ED_UNLINK:
1034                        break;
1035                default:
1036                        ohci_dbg(ohci, "bogus ed %p state %d\n",
1037                                        ed, ed->state);
1038                }
1039
1040                if (!urb->unlinked)
1041                        urb->unlinked = -ESHUTDOWN;
1042        }
1043        ohci_work(ohci);
1044        spin_unlock_irq(&ohci->lock);
1045
1046        /* paranoia, in case that didn't work: */
1047
1048        /* empty the interrupt branches */
1049        for (i = 0; i < NUM_INTS; i++) ohci->load [i] = 0;
1050        for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table [i] = 0;
1051
1052        /* no EDs to remove */
1053        ohci->ed_rm_list = NULL;
1054
1055        /* empty control and bulk lists */
1056        ohci->ed_controltail = NULL;
1057        ohci->ed_bulktail    = NULL;
1058
1059        if ((temp = ohci_run (ohci)) < 0) {
1060                ohci_err (ohci, "can't restart, %d\n", temp);
1061                return temp;
1062        }
1063        ohci_dbg(ohci, "restart complete\n");
1064        return 0;
1065}
1066EXPORT_SYMBOL_GPL(ohci_restart);
1067
1068#endif
1069
1070#ifdef CONFIG_PM
1071
1072int ohci_suspend(struct usb_hcd *hcd, bool do_wakeup)
1073{
1074        struct ohci_hcd *ohci = hcd_to_ohci (hcd);
1075        unsigned long   flags;
1076        int             rc = 0;
1077
1078        /* Disable irq emission and mark HW unaccessible. Use
1079         * the spinlock to properly synchronize with possible pending
1080         * RH suspend or resume activity.
1081         */
1082        spin_lock_irqsave (&ohci->lock, flags);
1083        ohci_writel(ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
1084        (void)ohci_readl(ohci, &ohci->regs->intrdisable);
1085
1086        clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1087        spin_unlock_irqrestore (&ohci->lock, flags);
1088
1089        synchronize_irq(hcd->irq);
1090
1091        if (do_wakeup && HCD_WAKEUP_PENDING(hcd)) {
1092                ohci_resume(hcd, false);
1093                rc = -EBUSY;
1094        }
1095        return rc;
1096}
1097EXPORT_SYMBOL_GPL(ohci_suspend);
1098
1099
1100int ohci_resume(struct usb_hcd *hcd, bool hibernated)
1101{
1102        struct ohci_hcd         *ohci = hcd_to_ohci(hcd);
1103        int                     port;
1104        bool                    need_reinit = false;
1105
1106        set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1107
1108        /* Make sure resume from hibernation re-enumerates everything */
1109        if (hibernated)
1110                ohci_usb_reset(ohci);
1111
1112        /* See if the controller is already running or has been reset */
1113        ohci->hc_control = ohci_readl(ohci, &ohci->regs->control);
1114        if (ohci->hc_control & (OHCI_CTRL_IR | OHCI_SCHED_ENABLES)) {
1115                need_reinit = true;
1116        } else {
1117                switch (ohci->hc_control & OHCI_CTRL_HCFS) {
1118                case OHCI_USB_OPER:
1119                case OHCI_USB_RESET:
1120                        need_reinit = true;
1121                }
1122        }
1123
1124        /* If needed, reinitialize and suspend the root hub */
1125        if (need_reinit) {
1126                spin_lock_irq(&ohci->lock);
1127                ohci_rh_resume(ohci);
1128                ohci_rh_suspend(ohci, 0);
1129                spin_unlock_irq(&ohci->lock);
1130        }
1131
1132        /* Normally just turn on port power and enable interrupts */
1133        else {
1134                ohci_dbg(ohci, "powerup ports\n");
1135                for (port = 0; port < ohci->num_ports; port++)
1136                        ohci_writel(ohci, RH_PS_PPS,
1137                                        &ohci->regs->roothub.portstatus[port]);
1138
1139                ohci_writel(ohci, OHCI_INTR_MIE, &ohci->regs->intrenable);
1140                ohci_readl(ohci, &ohci->regs->intrenable);
1141                msleep(20);
1142        }
1143
1144        usb_hcd_resume_root_hub(hcd);
1145
1146        return 0;
1147}
1148EXPORT_SYMBOL_GPL(ohci_resume);
1149
1150#endif
1151
1152/*-------------------------------------------------------------------------*/
1153
1154/*
1155 * Generic structure: This gets copied for platform drivers so that
1156 * individual entries can be overridden as needed.
1157 */
1158
1159static const struct hc_driver ohci_hc_driver = {
1160        .description =          hcd_name,
1161        .product_desc =         "OHCI Host Controller",
1162        .hcd_priv_size =        sizeof(struct ohci_hcd),
1163
1164        /*
1165         * generic hardware linkage
1166        */
1167        .irq =                  ohci_irq,
1168        .flags =                HCD_MEMORY | HCD_USB11,
1169
1170        /*
1171        * basic lifecycle operations
1172        */
1173        .reset =                ohci_setup,
1174        .start =                ohci_start,
1175        .stop =                 ohci_stop,
1176        .shutdown =             ohci_shutdown,
1177
1178        /*
1179         * managing i/o requests and associated device resources
1180        */
1181        .urb_enqueue =          ohci_urb_enqueue,
1182        .urb_dequeue =          ohci_urb_dequeue,
1183        .endpoint_disable =     ohci_endpoint_disable,
1184
1185        /*
1186        * scheduling support
1187        */
1188        .get_frame_number =     ohci_get_frame,
1189
1190        /*
1191        * root hub support
1192        */
1193        .hub_status_data =      ohci_hub_status_data,
1194        .hub_control =          ohci_hub_control,
1195#ifdef CONFIG_PM
1196        .bus_suspend =          ohci_bus_suspend,
1197        .bus_resume =           ohci_bus_resume,
1198#endif
1199        .start_port_reset =     ohci_start_port_reset,
1200};
1201
1202void ohci_init_driver(struct hc_driver *drv,
1203                const struct ohci_driver_overrides *over)
1204{
1205        /* Copy the generic table to drv and then apply the overrides */
1206        *drv = ohci_hc_driver;
1207
1208        if (over) {
1209                drv->product_desc = over->product_desc;
1210                drv->hcd_priv_size += over->extra_priv_size;
1211                if (over->reset)
1212                        drv->reset = over->reset;
1213        }
1214}
1215EXPORT_SYMBOL_GPL(ohci_init_driver);
1216
1217/*-------------------------------------------------------------------------*/
1218
1219MODULE_AUTHOR (DRIVER_AUTHOR);
1220MODULE_DESCRIPTION(DRIVER_DESC);
1221MODULE_LICENSE ("GPL");
1222
1223#if defined(CONFIG_ARCH_SA1100) && defined(CONFIG_SA1111)
1224#include "ohci-sa1111.c"
1225#define SA1111_DRIVER           ohci_hcd_sa1111_driver
1226#endif
1227
1228#ifdef CONFIG_USB_OHCI_HCD_PPC_OF
1229#include "ohci-ppc-of.c"
1230#define OF_PLATFORM_DRIVER      ohci_hcd_ppc_of_driver
1231#endif
1232
1233#ifdef CONFIG_PPC_PS3
1234#include "ohci-ps3.c"
1235#define PS3_SYSTEM_BUS_DRIVER   ps3_ohci_driver
1236#endif
1237
1238#ifdef CONFIG_MFD_SM501
1239#include "ohci-sm501.c"
1240#define SM501_OHCI_DRIVER       ohci_hcd_sm501_driver
1241#endif
1242
1243#ifdef CONFIG_MFD_TC6393XB
1244#include "ohci-tmio.c"
1245#define TMIO_OHCI_DRIVER        ohci_hcd_tmio_driver
1246#endif
1247
1248static int __init ohci_hcd_mod_init(void)
1249{
1250        int retval = 0;
1251
1252        if (usb_disabled())
1253                return -ENODEV;
1254
1255        printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
1256        pr_debug ("%s: block sizes: ed %zd td %zd\n", hcd_name,
1257                sizeof (struct ed), sizeof (struct td));
1258        set_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
1259
1260        ohci_debug_root = debugfs_create_dir("ohci", usb_debug_root);
1261
1262#ifdef PS3_SYSTEM_BUS_DRIVER
1263        retval = ps3_ohci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1264        if (retval < 0)
1265                goto error_ps3;
1266#endif
1267
1268#ifdef OF_PLATFORM_DRIVER
1269        retval = platform_driver_register(&OF_PLATFORM_DRIVER);
1270        if (retval < 0)
1271                goto error_of_platform;
1272#endif
1273
1274#ifdef SA1111_DRIVER
1275        retval = sa1111_driver_register(&SA1111_DRIVER);
1276        if (retval < 0)
1277                goto error_sa1111;
1278#endif
1279
1280#ifdef SM501_OHCI_DRIVER
1281        retval = platform_driver_register(&SM501_OHCI_DRIVER);
1282        if (retval < 0)
1283                goto error_sm501;
1284#endif
1285
1286#ifdef TMIO_OHCI_DRIVER
1287        retval = platform_driver_register(&TMIO_OHCI_DRIVER);
1288        if (retval < 0)
1289                goto error_tmio;
1290#endif
1291
1292        return retval;
1293
1294        /* Error path */
1295#ifdef TMIO_OHCI_DRIVER
1296        platform_driver_unregister(&TMIO_OHCI_DRIVER);
1297 error_tmio:
1298#endif
1299#ifdef SM501_OHCI_DRIVER
1300        platform_driver_unregister(&SM501_OHCI_DRIVER);
1301 error_sm501:
1302#endif
1303#ifdef SA1111_DRIVER
1304        sa1111_driver_unregister(&SA1111_DRIVER);
1305 error_sa1111:
1306#endif
1307#ifdef OF_PLATFORM_DRIVER
1308        platform_driver_unregister(&OF_PLATFORM_DRIVER);
1309 error_of_platform:
1310#endif
1311#ifdef PS3_SYSTEM_BUS_DRIVER
1312        ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1313 error_ps3:
1314#endif
1315        debugfs_remove(ohci_debug_root);
1316        ohci_debug_root = NULL;
1317
1318        clear_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
1319        return retval;
1320}
1321module_init(ohci_hcd_mod_init);
1322
1323static void __exit ohci_hcd_mod_exit(void)
1324{
1325#ifdef TMIO_OHCI_DRIVER
1326        platform_driver_unregister(&TMIO_OHCI_DRIVER);
1327#endif
1328#ifdef SM501_OHCI_DRIVER
1329        platform_driver_unregister(&SM501_OHCI_DRIVER);
1330#endif
1331#ifdef SA1111_DRIVER
1332        sa1111_driver_unregister(&SA1111_DRIVER);
1333#endif
1334#ifdef OF_PLATFORM_DRIVER
1335        platform_driver_unregister(&OF_PLATFORM_DRIVER);
1336#endif
1337#ifdef PS3_SYSTEM_BUS_DRIVER
1338        ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1339#endif
1340        debugfs_remove(ohci_debug_root);
1341        clear_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
1342}
1343module_exit(ohci_hcd_mod_exit);
1344
1345