linux/drivers/usb/musb/musb_dsps.c
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   1// SPDX-License-Identifier: GPL-2.0
   2/*
   3 * Texas Instruments DSPS platforms "glue layer"
   4 *
   5 * Copyright (C) 2012, by Texas Instruments
   6 *
   7 * Based on the am35x "glue layer" code.
   8 *
   9 * This file is part of the Inventra Controller Driver for Linux.
  10 *
  11 * musb_dsps.c will be a common file for all the TI DSPS platforms
  12 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
  13 * For now only ti81x is using this and in future davinci.c, am35x.c
  14 * da8xx.c would be merged to this file after testing.
  15 */
  16
  17#include <linux/io.h>
  18#include <linux/err.h>
  19#include <linux/platform_device.h>
  20#include <linux/dma-mapping.h>
  21#include <linux/pm_runtime.h>
  22#include <linux/module.h>
  23#include <linux/usb/usb_phy_generic.h>
  24#include <linux/platform_data/usb-omap.h>
  25#include <linux/sizes.h>
  26
  27#include <linux/of.h>
  28#include <linux/of_device.h>
  29#include <linux/of_address.h>
  30#include <linux/of_irq.h>
  31#include <linux/usb/of.h>
  32
  33#include <linux/debugfs.h>
  34
  35#include "musb_core.h"
  36
  37static const struct of_device_id musb_dsps_of_match[];
  38
  39/**
  40 * DSPS musb wrapper register offset.
  41 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS
  42 * musb ips.
  43 */
  44struct dsps_musb_wrapper {
  45        u16     revision;
  46        u16     control;
  47        u16     status;
  48        u16     epintr_set;
  49        u16     epintr_clear;
  50        u16     epintr_status;
  51        u16     coreintr_set;
  52        u16     coreintr_clear;
  53        u16     coreintr_status;
  54        u16     phy_utmi;
  55        u16     mode;
  56        u16     tx_mode;
  57        u16     rx_mode;
  58
  59        /* bit positions for control */
  60        unsigned        reset:5;
  61
  62        /* bit positions for interrupt */
  63        unsigned        usb_shift:5;
  64        u32             usb_mask;
  65        u32             usb_bitmap;
  66        unsigned        drvvbus:5;
  67
  68        unsigned        txep_shift:5;
  69        u32             txep_mask;
  70        u32             txep_bitmap;
  71
  72        unsigned        rxep_shift:5;
  73        u32             rxep_mask;
  74        u32             rxep_bitmap;
  75
  76        /* bit positions for phy_utmi */
  77        unsigned        otg_disable:5;
  78
  79        /* bit positions for mode */
  80        unsigned        iddig:5;
  81        unsigned        iddig_mux:5;
  82        /* miscellaneous stuff */
  83        unsigned        poll_timeout;
  84};
  85
  86/*
  87 * register shadow for suspend
  88 */
  89struct dsps_context {
  90        u32 control;
  91        u32 epintr;
  92        u32 coreintr;
  93        u32 phy_utmi;
  94        u32 mode;
  95        u32 tx_mode;
  96        u32 rx_mode;
  97};
  98
  99/**
 100 * DSPS glue structure.
 101 */
 102struct dsps_glue {
 103        struct device *dev;
 104        struct platform_device *musb;   /* child musb pdev */
 105        const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */
 106        int vbus_irq;                   /* optional vbus irq */
 107        unsigned long last_timer;    /* last timer data for each instance */
 108        bool sw_babble_enabled;
 109        void __iomem *usbss_base;
 110
 111        struct dsps_context context;
 112        struct debugfs_regset32 regset;
 113        struct dentry *dbgfs_root;
 114};
 115
 116static const struct debugfs_reg32 dsps_musb_regs[] = {
 117        { "revision",           0x00 },
 118        { "control",            0x14 },
 119        { "status",             0x18 },
 120        { "eoi",                0x24 },
 121        { "intr0_stat",         0x30 },
 122        { "intr1_stat",         0x34 },
 123        { "intr0_set",          0x38 },
 124        { "intr1_set",          0x3c },
 125        { "txmode",             0x70 },
 126        { "rxmode",             0x74 },
 127        { "autoreq",            0xd0 },
 128        { "srpfixtime",         0xd4 },
 129        { "tdown",              0xd8 },
 130        { "phy_utmi",           0xe0 },
 131        { "mode",               0xe8 },
 132};
 133
 134static void dsps_mod_timer(struct dsps_glue *glue, int wait_ms)
 135{
 136        struct musb *musb = platform_get_drvdata(glue->musb);
 137        int wait;
 138
 139        if (wait_ms < 0)
 140                wait = msecs_to_jiffies(glue->wrp->poll_timeout);
 141        else
 142                wait = msecs_to_jiffies(wait_ms);
 143
 144        mod_timer(&musb->dev_timer, jiffies + wait);
 145}
 146
 147/*
 148 * If no vbus irq from the PMIC is configured, we need to poll VBUS status.
 149 */
 150static void dsps_mod_timer_optional(struct dsps_glue *glue)
 151{
 152        if (glue->vbus_irq)
 153                return;
 154
 155        dsps_mod_timer(glue, -1);
 156}
 157
 158/* USBSS  / USB AM335x */
 159#define USBSS_IRQ_STATUS        0x28
 160#define USBSS_IRQ_ENABLER       0x2c
 161#define USBSS_IRQ_CLEARR        0x30
 162
 163#define USBSS_IRQ_PD_COMP       (1 << 2)
 164
 165/**
 166 * dsps_musb_enable - enable interrupts
 167 */
 168static void dsps_musb_enable(struct musb *musb)
 169{
 170        struct device *dev = musb->controller;
 171        struct platform_device *pdev = to_platform_device(dev->parent);
 172        struct dsps_glue *glue = platform_get_drvdata(pdev);
 173        const struct dsps_musb_wrapper *wrp = glue->wrp;
 174        void __iomem *reg_base = musb->ctrl_base;
 175        u32 epmask, coremask;
 176
 177        /* Workaround: setup IRQs through both register sets. */
 178        epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) |
 179               ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift);
 180        coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF);
 181
 182        musb_writel(reg_base, wrp->epintr_set, epmask);
 183        musb_writel(reg_base, wrp->coreintr_set, coremask);
 184        /* start polling for ID change in dual-role idle mode */
 185        if (musb->xceiv->otg->state == OTG_STATE_B_IDLE &&
 186                        musb->port_mode == MUSB_OTG)
 187                dsps_mod_timer(glue, -1);
 188}
 189
 190/**
 191 * dsps_musb_disable - disable HDRC and flush interrupts
 192 */
 193static void dsps_musb_disable(struct musb *musb)
 194{
 195        struct device *dev = musb->controller;
 196        struct platform_device *pdev = to_platform_device(dev->parent);
 197        struct dsps_glue *glue = platform_get_drvdata(pdev);
 198        const struct dsps_musb_wrapper *wrp = glue->wrp;
 199        void __iomem *reg_base = musb->ctrl_base;
 200
 201        musb_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap);
 202        musb_writel(reg_base, wrp->epintr_clear,
 203                         wrp->txep_bitmap | wrp->rxep_bitmap);
 204        del_timer_sync(&musb->dev_timer);
 205}
 206
 207/* Caller must take musb->lock */
 208static int dsps_check_status(struct musb *musb, void *unused)
 209{
 210        void __iomem *mregs = musb->mregs;
 211        struct device *dev = musb->controller;
 212        struct dsps_glue *glue = dev_get_drvdata(dev->parent);
 213        const struct dsps_musb_wrapper *wrp = glue->wrp;
 214        u8 devctl;
 215        int skip_session = 0;
 216
 217        if (glue->vbus_irq)
 218                del_timer(&musb->dev_timer);
 219
 220        /*
 221         * We poll because DSPS IP's won't expose several OTG-critical
 222         * status change events (from the transceiver) otherwise.
 223         */
 224        devctl = musb_readb(mregs, MUSB_DEVCTL);
 225        dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
 226                                usb_otg_state_string(musb->xceiv->otg->state));
 227
 228        switch (musb->xceiv->otg->state) {
 229        case OTG_STATE_A_WAIT_VRISE:
 230                dsps_mod_timer_optional(glue);
 231                break;
 232        case OTG_STATE_A_WAIT_BCON:
 233                /* keep VBUS on for host-only mode */
 234                if (musb->port_mode == MUSB_HOST) {
 235                        dsps_mod_timer_optional(glue);
 236                        break;
 237                }
 238                musb_writeb(musb->mregs, MUSB_DEVCTL, 0);
 239                skip_session = 1;
 240                /* fall */
 241
 242        case OTG_STATE_A_IDLE:
 243        case OTG_STATE_B_IDLE:
 244                if (!glue->vbus_irq) {
 245                        if (devctl & MUSB_DEVCTL_BDEVICE) {
 246                                musb->xceiv->otg->state = OTG_STATE_B_IDLE;
 247                                MUSB_DEV_MODE(musb);
 248                        } else {
 249                                musb->xceiv->otg->state = OTG_STATE_A_IDLE;
 250                                MUSB_HST_MODE(musb);
 251                        }
 252                        if (!(devctl & MUSB_DEVCTL_SESSION) && !skip_session)
 253                                musb_writeb(mregs, MUSB_DEVCTL,
 254                                            MUSB_DEVCTL_SESSION);
 255                }
 256                dsps_mod_timer_optional(glue);
 257                break;
 258        case OTG_STATE_A_WAIT_VFALL:
 259                musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
 260                musb_writel(musb->ctrl_base, wrp->coreintr_set,
 261                            MUSB_INTR_VBUSERROR << wrp->usb_shift);
 262                break;
 263        default:
 264                break;
 265        }
 266
 267        return 0;
 268}
 269
 270static void otg_timer(struct timer_list *t)
 271{
 272        struct musb *musb = from_timer(musb, t, dev_timer);
 273        struct device *dev = musb->controller;
 274        unsigned long flags;
 275        int err;
 276
 277        err = pm_runtime_get(dev);
 278        if ((err != -EINPROGRESS) && err < 0) {
 279                dev_err(dev, "Poll could not pm_runtime_get: %i\n", err);
 280                pm_runtime_put_noidle(dev);
 281
 282                return;
 283        }
 284
 285        spin_lock_irqsave(&musb->lock, flags);
 286        err = musb_queue_resume_work(musb, dsps_check_status, NULL);
 287        if (err < 0)
 288                dev_err(dev, "%s resume work: %i\n", __func__, err);
 289        spin_unlock_irqrestore(&musb->lock, flags);
 290        pm_runtime_mark_last_busy(dev);
 291        pm_runtime_put_autosuspend(dev);
 292}
 293
 294static void dsps_musb_clear_ep_rxintr(struct musb *musb, int epnum)
 295{
 296        u32 epintr;
 297        struct dsps_glue *glue = dev_get_drvdata(musb->controller->parent);
 298        const struct dsps_musb_wrapper *wrp = glue->wrp;
 299
 300        /* musb->lock might already been held */
 301        epintr = (1 << epnum) << wrp->rxep_shift;
 302        musb_writel(musb->ctrl_base, wrp->epintr_status, epintr);
 303}
 304
 305static irqreturn_t dsps_interrupt(int irq, void *hci)
 306{
 307        struct musb  *musb = hci;
 308        void __iomem *reg_base = musb->ctrl_base;
 309        struct device *dev = musb->controller;
 310        struct dsps_glue *glue = dev_get_drvdata(dev->parent);
 311        const struct dsps_musb_wrapper *wrp = glue->wrp;
 312        unsigned long flags;
 313        irqreturn_t ret = IRQ_NONE;
 314        u32 epintr, usbintr;
 315
 316        spin_lock_irqsave(&musb->lock, flags);
 317
 318        /* Get endpoint interrupts */
 319        epintr = musb_readl(reg_base, wrp->epintr_status);
 320        musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift;
 321        musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift;
 322
 323        if (epintr)
 324                musb_writel(reg_base, wrp->epintr_status, epintr);
 325
 326        /* Get usb core interrupts */
 327        usbintr = musb_readl(reg_base, wrp->coreintr_status);
 328        if (!usbintr && !epintr)
 329                goto out;
 330
 331        musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift;
 332        if (usbintr)
 333                musb_writel(reg_base, wrp->coreintr_status, usbintr);
 334
 335        dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n",
 336                        usbintr, epintr);
 337
 338        if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) {
 339                int drvvbus = musb_readl(reg_base, wrp->status);
 340                void __iomem *mregs = musb->mregs;
 341                u8 devctl = musb_readb(mregs, MUSB_DEVCTL);
 342                int err;
 343
 344                err = musb->int_usb & MUSB_INTR_VBUSERROR;
 345                if (err) {
 346                        /*
 347                         * The Mentor core doesn't debounce VBUS as needed
 348                         * to cope with device connect current spikes. This
 349                         * means it's not uncommon for bus-powered devices
 350                         * to get VBUS errors during enumeration.
 351                         *
 352                         * This is a workaround, but newer RTL from Mentor
 353                         * seems to allow a better one: "re"-starting sessions
 354                         * without waiting for VBUS to stop registering in
 355                         * devctl.
 356                         */
 357                        musb->int_usb &= ~MUSB_INTR_VBUSERROR;
 358                        musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL;
 359                        dsps_mod_timer_optional(glue);
 360                        WARNING("VBUS error workaround (delay coming)\n");
 361                } else if (drvvbus) {
 362                        MUSB_HST_MODE(musb);
 363                        musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
 364                        dsps_mod_timer_optional(glue);
 365                } else {
 366                        musb->is_active = 0;
 367                        MUSB_DEV_MODE(musb);
 368                        musb->xceiv->otg->state = OTG_STATE_B_IDLE;
 369                }
 370
 371                /* NOTE: this must complete power-on within 100 ms. */
 372                dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
 373                                drvvbus ? "on" : "off",
 374                                usb_otg_state_string(musb->xceiv->otg->state),
 375                                err ? " ERROR" : "",
 376                                devctl);
 377                ret = IRQ_HANDLED;
 378        }
 379
 380        if (musb->int_tx || musb->int_rx || musb->int_usb)
 381                ret |= musb_interrupt(musb);
 382
 383        /* Poll for ID change and connect */
 384        switch (musb->xceiv->otg->state) {
 385        case OTG_STATE_B_IDLE:
 386        case OTG_STATE_A_WAIT_BCON:
 387                dsps_mod_timer_optional(glue);
 388                break;
 389        default:
 390                break;
 391        }
 392
 393out:
 394        spin_unlock_irqrestore(&musb->lock, flags);
 395
 396        return ret;
 397}
 398
 399static int dsps_musb_dbg_init(struct musb *musb, struct dsps_glue *glue)
 400{
 401        struct dentry *root;
 402        char buf[128];
 403
 404        sprintf(buf, "%s.dsps", dev_name(musb->controller));
 405        root = debugfs_create_dir(buf, NULL);
 406        glue->dbgfs_root = root;
 407
 408        glue->regset.regs = dsps_musb_regs;
 409        glue->regset.nregs = ARRAY_SIZE(dsps_musb_regs);
 410        glue->regset.base = musb->ctrl_base;
 411
 412        debugfs_create_regset32("regdump", S_IRUGO, root, &glue->regset);
 413        return 0;
 414}
 415
 416static int dsps_musb_init(struct musb *musb)
 417{
 418        struct device *dev = musb->controller;
 419        struct dsps_glue *glue = dev_get_drvdata(dev->parent);
 420        struct platform_device *parent = to_platform_device(dev->parent);
 421        const struct dsps_musb_wrapper *wrp = glue->wrp;
 422        void __iomem *reg_base;
 423        struct resource *r;
 424        u32 rev, val;
 425        int ret;
 426
 427        r = platform_get_resource_byname(parent, IORESOURCE_MEM, "control");
 428        reg_base = devm_ioremap_resource(dev, r);
 429        if (IS_ERR(reg_base))
 430                return PTR_ERR(reg_base);
 431        musb->ctrl_base = reg_base;
 432
 433        /* NOP driver needs change if supporting dual instance */
 434        musb->xceiv = devm_usb_get_phy_by_phandle(dev->parent, "phys", 0);
 435        if (IS_ERR(musb->xceiv))
 436                return PTR_ERR(musb->xceiv);
 437
 438        musb->phy = devm_phy_get(dev->parent, "usb2-phy");
 439
 440        /* Returns zero if e.g. not clocked */
 441        rev = musb_readl(reg_base, wrp->revision);
 442        if (!rev)
 443                return -ENODEV;
 444
 445        if (IS_ERR(musb->phy))  {
 446                musb->phy = NULL;
 447        } else {
 448                ret = phy_init(musb->phy);
 449                if (ret < 0)
 450                        return ret;
 451                ret = phy_power_on(musb->phy);
 452                if (ret) {
 453                        phy_exit(musb->phy);
 454                        return ret;
 455                }
 456        }
 457
 458        timer_setup(&musb->dev_timer, otg_timer, 0);
 459
 460        /* Reset the musb */
 461        musb_writel(reg_base, wrp->control, (1 << wrp->reset));
 462
 463        musb->isr = dsps_interrupt;
 464
 465        /* reset the otgdisable bit, needed for host mode to work */
 466        val = musb_readl(reg_base, wrp->phy_utmi);
 467        val &= ~(1 << wrp->otg_disable);
 468        musb_writel(musb->ctrl_base, wrp->phy_utmi, val);
 469
 470        /*
 471         *  Check whether the dsps version has babble control enabled.
 472         * In latest silicon revision the babble control logic is enabled.
 473         * If MUSB_BABBLE_CTL returns 0x4 then we have the babble control
 474         * logic enabled.
 475         */
 476        val = musb_readb(musb->mregs, MUSB_BABBLE_CTL);
 477        if (val & MUSB_BABBLE_RCV_DISABLE) {
 478                glue->sw_babble_enabled = true;
 479                val |= MUSB_BABBLE_SW_SESSION_CTRL;
 480                musb_writeb(musb->mregs, MUSB_BABBLE_CTL, val);
 481        }
 482
 483        dsps_mod_timer(glue, -1);
 484
 485        return dsps_musb_dbg_init(musb, glue);
 486}
 487
 488static int dsps_musb_exit(struct musb *musb)
 489{
 490        struct device *dev = musb->controller;
 491        struct dsps_glue *glue = dev_get_drvdata(dev->parent);
 492
 493        del_timer_sync(&musb->dev_timer);
 494        phy_power_off(musb->phy);
 495        phy_exit(musb->phy);
 496        debugfs_remove_recursive(glue->dbgfs_root);
 497
 498        return 0;
 499}
 500
 501static int dsps_musb_set_mode(struct musb *musb, u8 mode)
 502{
 503        struct device *dev = musb->controller;
 504        struct dsps_glue *glue = dev_get_drvdata(dev->parent);
 505        const struct dsps_musb_wrapper *wrp = glue->wrp;
 506        void __iomem *ctrl_base = musb->ctrl_base;
 507        u32 reg;
 508
 509        reg = musb_readl(ctrl_base, wrp->mode);
 510
 511        switch (mode) {
 512        case MUSB_HOST:
 513                reg &= ~(1 << wrp->iddig);
 514
 515                /*
 516                 * if we're setting mode to host-only or device-only, we're
 517                 * going to ignore whatever the PHY sends us and just force
 518                 * ID pin status by SW
 519                 */
 520                reg |= (1 << wrp->iddig_mux);
 521
 522                musb_writel(ctrl_base, wrp->mode, reg);
 523                musb_writel(ctrl_base, wrp->phy_utmi, 0x02);
 524                break;
 525        case MUSB_PERIPHERAL:
 526                reg |= (1 << wrp->iddig);
 527
 528                /*
 529                 * if we're setting mode to host-only or device-only, we're
 530                 * going to ignore whatever the PHY sends us and just force
 531                 * ID pin status by SW
 532                 */
 533                reg |= (1 << wrp->iddig_mux);
 534
 535                musb_writel(ctrl_base, wrp->mode, reg);
 536                break;
 537        case MUSB_OTG:
 538                musb_writel(ctrl_base, wrp->phy_utmi, 0x02);
 539                break;
 540        default:
 541                dev_err(glue->dev, "unsupported mode %d\n", mode);
 542                return -EINVAL;
 543        }
 544
 545        return 0;
 546}
 547
 548static bool dsps_sw_babble_control(struct musb *musb)
 549{
 550        u8 babble_ctl;
 551        bool session_restart =  false;
 552
 553        babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL);
 554        dev_dbg(musb->controller, "babble: MUSB_BABBLE_CTL value %x\n",
 555                babble_ctl);
 556        /*
 557         * check line monitor flag to check whether babble is
 558         * due to noise
 559         */
 560        dev_dbg(musb->controller, "STUCK_J is %s\n",
 561                babble_ctl & MUSB_BABBLE_STUCK_J ? "set" : "reset");
 562
 563        if (babble_ctl & MUSB_BABBLE_STUCK_J) {
 564                int timeout = 10;
 565
 566                /*
 567                 * babble is due to noise, then set transmit idle (d7 bit)
 568                 * to resume normal operation
 569                 */
 570                babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL);
 571                babble_ctl |= MUSB_BABBLE_FORCE_TXIDLE;
 572                musb_writeb(musb->mregs, MUSB_BABBLE_CTL, babble_ctl);
 573
 574                /* wait till line monitor flag cleared */
 575                dev_dbg(musb->controller, "Set TXIDLE, wait J to clear\n");
 576                do {
 577                        babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL);
 578                        udelay(1);
 579                } while ((babble_ctl & MUSB_BABBLE_STUCK_J) && timeout--);
 580
 581                /* check whether stuck_at_j bit cleared */
 582                if (babble_ctl & MUSB_BABBLE_STUCK_J) {
 583                        /*
 584                         * real babble condition has occurred
 585                         * restart the controller to start the
 586                         * session again
 587                         */
 588                        dev_dbg(musb->controller, "J not cleared, misc (%x)\n",
 589                                babble_ctl);
 590                        session_restart = true;
 591                }
 592        } else {
 593                session_restart = true;
 594        }
 595
 596        return session_restart;
 597}
 598
 599static int dsps_musb_recover(struct musb *musb)
 600{
 601        struct device *dev = musb->controller;
 602        struct dsps_glue *glue = dev_get_drvdata(dev->parent);
 603        int session_restart = 0;
 604
 605        if (glue->sw_babble_enabled)
 606                session_restart = dsps_sw_babble_control(musb);
 607        else
 608                session_restart = 1;
 609
 610        return session_restart ? 0 : -EPIPE;
 611}
 612
 613/* Similar to am35x, dm81xx support only 32-bit read operation */
 614static void dsps_read_fifo32(struct musb_hw_ep *hw_ep, u16 len, u8 *dst)
 615{
 616        void __iomem *fifo = hw_ep->fifo;
 617
 618        if (len >= 4) {
 619                ioread32_rep(fifo, dst, len >> 2);
 620                dst += len & ~0x03;
 621                len &= 0x03;
 622        }
 623
 624        /* Read any remaining 1 to 3 bytes */
 625        if (len > 0) {
 626                u32 val = musb_readl(fifo, 0);
 627                memcpy(dst, &val, len);
 628        }
 629}
 630
 631#ifdef CONFIG_USB_TI_CPPI41_DMA
 632static void dsps_dma_controller_callback(struct dma_controller *c)
 633{
 634        struct musb *musb = c->musb;
 635        struct dsps_glue *glue = dev_get_drvdata(musb->controller->parent);
 636        void __iomem *usbss_base = glue->usbss_base;
 637        u32 status;
 638
 639        status = musb_readl(usbss_base, USBSS_IRQ_STATUS);
 640        if (status & USBSS_IRQ_PD_COMP)
 641                musb_writel(usbss_base, USBSS_IRQ_STATUS, USBSS_IRQ_PD_COMP);
 642}
 643
 644static struct dma_controller *
 645dsps_dma_controller_create(struct musb *musb, void __iomem *base)
 646{
 647        struct dma_controller *controller;
 648        struct dsps_glue *glue = dev_get_drvdata(musb->controller->parent);
 649        void __iomem *usbss_base = glue->usbss_base;
 650
 651        controller = cppi41_dma_controller_create(musb, base);
 652        if (IS_ERR_OR_NULL(controller))
 653                return controller;
 654
 655        musb_writel(usbss_base, USBSS_IRQ_ENABLER, USBSS_IRQ_PD_COMP);
 656        controller->dma_callback = dsps_dma_controller_callback;
 657
 658        return controller;
 659}
 660
 661static void dsps_dma_controller_destroy(struct dma_controller *c)
 662{
 663        struct musb *musb = c->musb;
 664        struct dsps_glue *glue = dev_get_drvdata(musb->controller->parent);
 665        void __iomem *usbss_base = glue->usbss_base;
 666
 667        musb_writel(usbss_base, USBSS_IRQ_CLEARR, USBSS_IRQ_PD_COMP);
 668        cppi41_dma_controller_destroy(c);
 669}
 670
 671#ifdef CONFIG_PM_SLEEP
 672static void dsps_dma_controller_suspend(struct dsps_glue *glue)
 673{
 674        void __iomem *usbss_base = glue->usbss_base;
 675
 676        musb_writel(usbss_base, USBSS_IRQ_CLEARR, USBSS_IRQ_PD_COMP);
 677}
 678
 679static void dsps_dma_controller_resume(struct dsps_glue *glue)
 680{
 681        void __iomem *usbss_base = glue->usbss_base;
 682
 683        musb_writel(usbss_base, USBSS_IRQ_ENABLER, USBSS_IRQ_PD_COMP);
 684}
 685#endif
 686#else /* CONFIG_USB_TI_CPPI41_DMA */
 687#ifdef CONFIG_PM_SLEEP
 688static void dsps_dma_controller_suspend(struct dsps_glue *glue) {}
 689static void dsps_dma_controller_resume(struct dsps_glue *glue) {}
 690#endif
 691#endif /* CONFIG_USB_TI_CPPI41_DMA */
 692
 693static struct musb_platform_ops dsps_ops = {
 694        .quirks         = MUSB_DMA_CPPI41 | MUSB_INDEXED_EP,
 695        .init           = dsps_musb_init,
 696        .exit           = dsps_musb_exit,
 697
 698#ifdef CONFIG_USB_TI_CPPI41_DMA
 699        .dma_init       = dsps_dma_controller_create,
 700        .dma_exit       = dsps_dma_controller_destroy,
 701#endif
 702        .enable         = dsps_musb_enable,
 703        .disable        = dsps_musb_disable,
 704
 705        .set_mode       = dsps_musb_set_mode,
 706        .recover        = dsps_musb_recover,
 707        .clear_ep_rxintr = dsps_musb_clear_ep_rxintr,
 708};
 709
 710static u64 musb_dmamask = DMA_BIT_MASK(32);
 711
 712static int get_int_prop(struct device_node *dn, const char *s)
 713{
 714        int ret;
 715        u32 val;
 716
 717        ret = of_property_read_u32(dn, s, &val);
 718        if (ret)
 719                return 0;
 720        return val;
 721}
 722
 723static int dsps_create_musb_pdev(struct dsps_glue *glue,
 724                struct platform_device *parent)
 725{
 726        struct musb_hdrc_platform_data pdata;
 727        struct resource resources[2];
 728        struct resource *res;
 729        struct device *dev = &parent->dev;
 730        struct musb_hdrc_config *config;
 731        struct platform_device *musb;
 732        struct device_node *dn = parent->dev.of_node;
 733        int ret, val;
 734
 735        memset(resources, 0, sizeof(resources));
 736        res = platform_get_resource_byname(parent, IORESOURCE_MEM, "mc");
 737        if (!res) {
 738                dev_err(dev, "failed to get memory.\n");
 739                return -EINVAL;
 740        }
 741        resources[0] = *res;
 742
 743        res = platform_get_resource_byname(parent, IORESOURCE_IRQ, "mc");
 744        if (!res) {
 745                dev_err(dev, "failed to get irq.\n");
 746                return -EINVAL;
 747        }
 748        resources[1] = *res;
 749
 750        /* allocate the child platform device */
 751        musb = platform_device_alloc("musb-hdrc",
 752                        (resources[0].start & 0xFFF) == 0x400 ? 0 : 1);
 753        if (!musb) {
 754                dev_err(dev, "failed to allocate musb device\n");
 755                return -ENOMEM;
 756        }
 757
 758        musb->dev.parent                = dev;
 759        musb->dev.dma_mask              = &musb_dmamask;
 760        musb->dev.coherent_dma_mask     = musb_dmamask;
 761        device_set_of_node_from_dev(&musb->dev, &parent->dev);
 762
 763        glue->musb = musb;
 764
 765        ret = platform_device_add_resources(musb, resources,
 766                        ARRAY_SIZE(resources));
 767        if (ret) {
 768                dev_err(dev, "failed to add resources\n");
 769                goto err;
 770        }
 771
 772        config = devm_kzalloc(&parent->dev, sizeof(*config), GFP_KERNEL);
 773        if (!config) {
 774                ret = -ENOMEM;
 775                goto err;
 776        }
 777        pdata.config = config;
 778        pdata.platform_ops = &dsps_ops;
 779
 780        config->num_eps = get_int_prop(dn, "mentor,num-eps");
 781        config->ram_bits = get_int_prop(dn, "mentor,ram-bits");
 782        config->host_port_deassert_reset_at_resume = 1;
 783        pdata.mode = musb_get_mode(dev);
 784        /* DT keeps this entry in mA, musb expects it as per USB spec */
 785        pdata.power = get_int_prop(dn, "mentor,power") / 2;
 786
 787        ret = of_property_read_u32(dn, "mentor,multipoint", &val);
 788        if (!ret && val)
 789                config->multipoint = true;
 790
 791        config->maximum_speed = usb_get_maximum_speed(&parent->dev);
 792        switch (config->maximum_speed) {
 793        case USB_SPEED_LOW:
 794        case USB_SPEED_FULL:
 795                break;
 796        case USB_SPEED_SUPER:
 797                dev_warn(dev, "ignore incorrect maximum_speed "
 798                                "(super-speed) setting in dts");
 799                /* fall through */
 800        default:
 801                config->maximum_speed = USB_SPEED_HIGH;
 802        }
 803
 804        ret = platform_device_add_data(musb, &pdata, sizeof(pdata));
 805        if (ret) {
 806                dev_err(dev, "failed to add platform_data\n");
 807                goto err;
 808        }
 809
 810        ret = platform_device_add(musb);
 811        if (ret) {
 812                dev_err(dev, "failed to register musb device\n");
 813                goto err;
 814        }
 815        return 0;
 816
 817err:
 818        platform_device_put(musb);
 819        return ret;
 820}
 821
 822static irqreturn_t dsps_vbus_threaded_irq(int irq, void *priv)
 823{
 824        struct dsps_glue *glue = priv;
 825        struct musb *musb = platform_get_drvdata(glue->musb);
 826
 827        if (!musb)
 828                return IRQ_NONE;
 829
 830        dev_dbg(glue->dev, "VBUS interrupt\n");
 831        dsps_mod_timer(glue, 0);
 832
 833        return IRQ_HANDLED;
 834}
 835
 836static int dsps_setup_optional_vbus_irq(struct platform_device *pdev,
 837                                        struct dsps_glue *glue)
 838{
 839        int error;
 840
 841        glue->vbus_irq = platform_get_irq_byname(pdev, "vbus");
 842        if (glue->vbus_irq == -EPROBE_DEFER)
 843                return -EPROBE_DEFER;
 844
 845        if (glue->vbus_irq <= 0) {
 846                glue->vbus_irq = 0;
 847                return 0;
 848        }
 849
 850        error = devm_request_threaded_irq(glue->dev, glue->vbus_irq,
 851                                          NULL, dsps_vbus_threaded_irq,
 852                                          IRQF_ONESHOT,
 853                                          "vbus", glue);
 854        if (error) {
 855                glue->vbus_irq = 0;
 856                return error;
 857        }
 858        dev_dbg(glue->dev, "VBUS irq %i configured\n", glue->vbus_irq);
 859
 860        return 0;
 861}
 862
 863static int dsps_probe(struct platform_device *pdev)
 864{
 865        const struct of_device_id *match;
 866        const struct dsps_musb_wrapper *wrp;
 867        struct dsps_glue *glue;
 868        int ret;
 869
 870        if (!strcmp(pdev->name, "musb-hdrc"))
 871                return -ENODEV;
 872
 873        match = of_match_node(musb_dsps_of_match, pdev->dev.of_node);
 874        if (!match) {
 875                dev_err(&pdev->dev, "fail to get matching of_match struct\n");
 876                return -EINVAL;
 877        }
 878        wrp = match->data;
 879
 880        if (of_device_is_compatible(pdev->dev.of_node, "ti,musb-dm816"))
 881                dsps_ops.read_fifo = dsps_read_fifo32;
 882
 883        /* allocate glue */
 884        glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
 885        if (!glue)
 886                return -ENOMEM;
 887
 888        glue->dev = &pdev->dev;
 889        glue->wrp = wrp;
 890        glue->usbss_base = of_iomap(pdev->dev.parent->of_node, 0);
 891        if (!glue->usbss_base)
 892                return -ENXIO;
 893
 894        if (usb_get_dr_mode(&pdev->dev) == USB_DR_MODE_PERIPHERAL) {
 895                ret = dsps_setup_optional_vbus_irq(pdev, glue);
 896                if (ret)
 897                        goto err_iounmap;
 898        }
 899
 900        platform_set_drvdata(pdev, glue);
 901        pm_runtime_enable(&pdev->dev);
 902        ret = dsps_create_musb_pdev(glue, pdev);
 903        if (ret)
 904                goto err;
 905
 906        return 0;
 907
 908err:
 909        pm_runtime_disable(&pdev->dev);
 910err_iounmap:
 911        iounmap(glue->usbss_base);
 912        return ret;
 913}
 914
 915static int dsps_remove(struct platform_device *pdev)
 916{
 917        struct dsps_glue *glue = platform_get_drvdata(pdev);
 918
 919        platform_device_unregister(glue->musb);
 920
 921        pm_runtime_disable(&pdev->dev);
 922        iounmap(glue->usbss_base);
 923
 924        return 0;
 925}
 926
 927static const struct dsps_musb_wrapper am33xx_driver_data = {
 928        .revision               = 0x00,
 929        .control                = 0x14,
 930        .status                 = 0x18,
 931        .epintr_set             = 0x38,
 932        .epintr_clear           = 0x40,
 933        .epintr_status          = 0x30,
 934        .coreintr_set           = 0x3c,
 935        .coreintr_clear         = 0x44,
 936        .coreintr_status        = 0x34,
 937        .phy_utmi               = 0xe0,
 938        .mode                   = 0xe8,
 939        .tx_mode                = 0x70,
 940        .rx_mode                = 0x74,
 941        .reset                  = 0,
 942        .otg_disable            = 21,
 943        .iddig                  = 8,
 944        .iddig_mux              = 7,
 945        .usb_shift              = 0,
 946        .usb_mask               = 0x1ff,
 947        .usb_bitmap             = (0x1ff << 0),
 948        .drvvbus                = 8,
 949        .txep_shift             = 0,
 950        .txep_mask              = 0xffff,
 951        .txep_bitmap            = (0xffff << 0),
 952        .rxep_shift             = 16,
 953        .rxep_mask              = 0xfffe,
 954        .rxep_bitmap            = (0xfffe << 16),
 955        .poll_timeout           = 2000, /* ms */
 956};
 957
 958static const struct of_device_id musb_dsps_of_match[] = {
 959        { .compatible = "ti,musb-am33xx",
 960                .data = &am33xx_driver_data, },
 961        { .compatible = "ti,musb-dm816",
 962                .data = &am33xx_driver_data, },
 963        {  },
 964};
 965MODULE_DEVICE_TABLE(of, musb_dsps_of_match);
 966
 967#ifdef CONFIG_PM_SLEEP
 968static int dsps_suspend(struct device *dev)
 969{
 970        struct dsps_glue *glue = dev_get_drvdata(dev);
 971        const struct dsps_musb_wrapper *wrp = glue->wrp;
 972        struct musb *musb = platform_get_drvdata(glue->musb);
 973        void __iomem *mbase;
 974        int ret;
 975
 976        if (!musb)
 977                /* This can happen if the musb device is in -EPROBE_DEFER */
 978                return 0;
 979
 980        ret = pm_runtime_get_sync(dev);
 981        if (ret < 0) {
 982                pm_runtime_put_noidle(dev);
 983                return ret;
 984        }
 985
 986        del_timer_sync(&musb->dev_timer);
 987
 988        mbase = musb->ctrl_base;
 989        glue->context.control = musb_readl(mbase, wrp->control);
 990        glue->context.epintr = musb_readl(mbase, wrp->epintr_set);
 991        glue->context.coreintr = musb_readl(mbase, wrp->coreintr_set);
 992        glue->context.phy_utmi = musb_readl(mbase, wrp->phy_utmi);
 993        glue->context.mode = musb_readl(mbase, wrp->mode);
 994        glue->context.tx_mode = musb_readl(mbase, wrp->tx_mode);
 995        glue->context.rx_mode = musb_readl(mbase, wrp->rx_mode);
 996
 997        dsps_dma_controller_suspend(glue);
 998
 999        return 0;
1000}
1001
1002static int dsps_resume(struct device *dev)
1003{
1004        struct dsps_glue *glue = dev_get_drvdata(dev);
1005        const struct dsps_musb_wrapper *wrp = glue->wrp;
1006        struct musb *musb = platform_get_drvdata(glue->musb);
1007        void __iomem *mbase;
1008
1009        if (!musb)
1010                return 0;
1011
1012        dsps_dma_controller_resume(glue);
1013
1014        mbase = musb->ctrl_base;
1015        musb_writel(mbase, wrp->control, glue->context.control);
1016        musb_writel(mbase, wrp->epintr_set, glue->context.epintr);
1017        musb_writel(mbase, wrp->coreintr_set, glue->context.coreintr);
1018        musb_writel(mbase, wrp->phy_utmi, glue->context.phy_utmi);
1019        musb_writel(mbase, wrp->mode, glue->context.mode);
1020        musb_writel(mbase, wrp->tx_mode, glue->context.tx_mode);
1021        musb_writel(mbase, wrp->rx_mode, glue->context.rx_mode);
1022        if (musb->xceiv->otg->state == OTG_STATE_B_IDLE &&
1023            musb->port_mode == MUSB_OTG)
1024                dsps_mod_timer(glue, -1);
1025
1026        pm_runtime_put(dev);
1027
1028        return 0;
1029}
1030#endif
1031
1032static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume);
1033
1034static struct platform_driver dsps_usbss_driver = {
1035        .probe          = dsps_probe,
1036        .remove         = dsps_remove,
1037        .driver         = {
1038                .name   = "musb-dsps",
1039                .pm     = &dsps_pm_ops,
1040                .of_match_table = musb_dsps_of_match,
1041        },
1042};
1043
1044MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
1045MODULE_AUTHOR("Ravi B <ravibabu@ti.com>");
1046MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>");
1047MODULE_LICENSE("GPL v2");
1048
1049module_platform_driver(dsps_usbss_driver);
1050