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24#ifndef _UAPI__SOUND_ASOUND_H
25#define _UAPI__SOUND_ASOUND_H
26
27#if defined(__KERNEL__) || defined(__linux__)
28#include <linux/types.h>
29#else
30#include <sys/ioctl.h>
31#endif
32
33#ifndef __KERNEL__
34#include <stdlib.h>
35#endif
36
37
38
39
40
41#define SNDRV_PROTOCOL_VERSION(major, minor, subminor) (((major)<<16)|((minor)<<8)|(subminor))
42#define SNDRV_PROTOCOL_MAJOR(version) (((version)>>16)&0xffff)
43#define SNDRV_PROTOCOL_MINOR(version) (((version)>>8)&0xff)
44#define SNDRV_PROTOCOL_MICRO(version) ((version)&0xff)
45#define SNDRV_PROTOCOL_INCOMPATIBLE(kversion, uversion) \
46 (SNDRV_PROTOCOL_MAJOR(kversion) != SNDRV_PROTOCOL_MAJOR(uversion) || \
47 (SNDRV_PROTOCOL_MAJOR(kversion) == SNDRV_PROTOCOL_MAJOR(uversion) && \
48 SNDRV_PROTOCOL_MINOR(kversion) != SNDRV_PROTOCOL_MINOR(uversion)))
49
50
51
52
53
54
55
56struct snd_aes_iec958 {
57 unsigned char status[24];
58 unsigned char subcode[147];
59 unsigned char pad;
60 unsigned char dig_subframe[4];
61};
62
63
64
65
66
67
68
69struct snd_cea_861_aud_if {
70 unsigned char db1_ct_cc;
71 unsigned char db2_sf_ss;
72 unsigned char db3;
73 unsigned char db4_ca;
74 unsigned char db5_dminh_lsv;
75};
76
77
78
79
80
81
82
83#define SNDRV_HWDEP_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 1)
84
85enum {
86 SNDRV_HWDEP_IFACE_OPL2 = 0,
87 SNDRV_HWDEP_IFACE_OPL3,
88 SNDRV_HWDEP_IFACE_OPL4,
89 SNDRV_HWDEP_IFACE_SB16CSP,
90 SNDRV_HWDEP_IFACE_EMU10K1,
91 SNDRV_HWDEP_IFACE_YSS225,
92 SNDRV_HWDEP_IFACE_ICS2115,
93 SNDRV_HWDEP_IFACE_SSCAPE,
94 SNDRV_HWDEP_IFACE_VX,
95 SNDRV_HWDEP_IFACE_MIXART,
96 SNDRV_HWDEP_IFACE_USX2Y,
97 SNDRV_HWDEP_IFACE_EMUX_WAVETABLE,
98 SNDRV_HWDEP_IFACE_BLUETOOTH,
99 SNDRV_HWDEP_IFACE_USX2Y_PCM,
100 SNDRV_HWDEP_IFACE_PCXHR,
101 SNDRV_HWDEP_IFACE_SB_RC,
102 SNDRV_HWDEP_IFACE_HDA,
103 SNDRV_HWDEP_IFACE_USB_STREAM,
104 SNDRV_HWDEP_IFACE_FW_DICE,
105 SNDRV_HWDEP_IFACE_FW_FIREWORKS,
106 SNDRV_HWDEP_IFACE_FW_BEBOB,
107 SNDRV_HWDEP_IFACE_FW_OXFW,
108 SNDRV_HWDEP_IFACE_FW_DIGI00X,
109 SNDRV_HWDEP_IFACE_FW_TASCAM,
110 SNDRV_HWDEP_IFACE_LINE6,
111 SNDRV_HWDEP_IFACE_FW_MOTU,
112 SNDRV_HWDEP_IFACE_FW_FIREFACE,
113
114
115 SNDRV_HWDEP_IFACE_LAST = SNDRV_HWDEP_IFACE_FW_FIREFACE
116};
117
118struct snd_hwdep_info {
119 unsigned int device;
120 int card;
121 unsigned char id[64];
122 unsigned char name[80];
123 int iface;
124 unsigned char reserved[64];
125};
126
127
128struct snd_hwdep_dsp_status {
129 unsigned int version;
130 unsigned char id[32];
131 unsigned int num_dsps;
132 unsigned int dsp_loaded;
133 unsigned int chip_ready;
134 unsigned char reserved[16];
135};
136
137struct snd_hwdep_dsp_image {
138 unsigned int index;
139 unsigned char name[64];
140 unsigned char __user *image;
141 size_t length;
142 unsigned long driver_data;
143};
144
145#define SNDRV_HWDEP_IOCTL_PVERSION _IOR ('H', 0x00, int)
146#define SNDRV_HWDEP_IOCTL_INFO _IOR ('H', 0x01, struct snd_hwdep_info)
147#define SNDRV_HWDEP_IOCTL_DSP_STATUS _IOR('H', 0x02, struct snd_hwdep_dsp_status)
148#define SNDRV_HWDEP_IOCTL_DSP_LOAD _IOW('H', 0x03, struct snd_hwdep_dsp_image)
149
150
151
152
153
154
155
156#define SNDRV_PCM_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 14)
157
158typedef unsigned long snd_pcm_uframes_t;
159typedef signed long snd_pcm_sframes_t;
160
161enum {
162 SNDRV_PCM_CLASS_GENERIC = 0,
163 SNDRV_PCM_CLASS_MULTI,
164 SNDRV_PCM_CLASS_MODEM,
165 SNDRV_PCM_CLASS_DIGITIZER,
166
167 SNDRV_PCM_CLASS_LAST = SNDRV_PCM_CLASS_DIGITIZER,
168};
169
170enum {
171 SNDRV_PCM_SUBCLASS_GENERIC_MIX = 0,
172 SNDRV_PCM_SUBCLASS_MULTI_MIX,
173
174 SNDRV_PCM_SUBCLASS_LAST = SNDRV_PCM_SUBCLASS_MULTI_MIX,
175};
176
177enum {
178 SNDRV_PCM_STREAM_PLAYBACK = 0,
179 SNDRV_PCM_STREAM_CAPTURE,
180 SNDRV_PCM_STREAM_LAST = SNDRV_PCM_STREAM_CAPTURE,
181};
182
183typedef int __bitwise snd_pcm_access_t;
184#define SNDRV_PCM_ACCESS_MMAP_INTERLEAVED ((__force snd_pcm_access_t) 0)
185#define SNDRV_PCM_ACCESS_MMAP_NONINTERLEAVED ((__force snd_pcm_access_t) 1)
186#define SNDRV_PCM_ACCESS_MMAP_COMPLEX ((__force snd_pcm_access_t) 2)
187#define SNDRV_PCM_ACCESS_RW_INTERLEAVED ((__force snd_pcm_access_t) 3)
188#define SNDRV_PCM_ACCESS_RW_NONINTERLEAVED ((__force snd_pcm_access_t) 4)
189#define SNDRV_PCM_ACCESS_LAST SNDRV_PCM_ACCESS_RW_NONINTERLEAVED
190
191typedef int __bitwise snd_pcm_format_t;
192#define SNDRV_PCM_FORMAT_S8 ((__force snd_pcm_format_t) 0)
193#define SNDRV_PCM_FORMAT_U8 ((__force snd_pcm_format_t) 1)
194#define SNDRV_PCM_FORMAT_S16_LE ((__force snd_pcm_format_t) 2)
195#define SNDRV_PCM_FORMAT_S16_BE ((__force snd_pcm_format_t) 3)
196#define SNDRV_PCM_FORMAT_U16_LE ((__force snd_pcm_format_t) 4)
197#define SNDRV_PCM_FORMAT_U16_BE ((__force snd_pcm_format_t) 5)
198#define SNDRV_PCM_FORMAT_S24_LE ((__force snd_pcm_format_t) 6)
199#define SNDRV_PCM_FORMAT_S24_BE ((__force snd_pcm_format_t) 7)
200#define SNDRV_PCM_FORMAT_U24_LE ((__force snd_pcm_format_t) 8)
201#define SNDRV_PCM_FORMAT_U24_BE ((__force snd_pcm_format_t) 9)
202#define SNDRV_PCM_FORMAT_S32_LE ((__force snd_pcm_format_t) 10)
203#define SNDRV_PCM_FORMAT_S32_BE ((__force snd_pcm_format_t) 11)
204#define SNDRV_PCM_FORMAT_U32_LE ((__force snd_pcm_format_t) 12)
205#define SNDRV_PCM_FORMAT_U32_BE ((__force snd_pcm_format_t) 13)
206#define SNDRV_PCM_FORMAT_FLOAT_LE ((__force snd_pcm_format_t) 14)
207#define SNDRV_PCM_FORMAT_FLOAT_BE ((__force snd_pcm_format_t) 15)
208#define SNDRV_PCM_FORMAT_FLOAT64_LE ((__force snd_pcm_format_t) 16)
209#define SNDRV_PCM_FORMAT_FLOAT64_BE ((__force snd_pcm_format_t) 17)
210#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE ((__force snd_pcm_format_t) 18)
211#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE ((__force snd_pcm_format_t) 19)
212#define SNDRV_PCM_FORMAT_MU_LAW ((__force snd_pcm_format_t) 20)
213#define SNDRV_PCM_FORMAT_A_LAW ((__force snd_pcm_format_t) 21)
214#define SNDRV_PCM_FORMAT_IMA_ADPCM ((__force snd_pcm_format_t) 22)
215#define SNDRV_PCM_FORMAT_MPEG ((__force snd_pcm_format_t) 23)
216#define SNDRV_PCM_FORMAT_GSM ((__force snd_pcm_format_t) 24)
217#define SNDRV_PCM_FORMAT_S20_LE ((__force snd_pcm_format_t) 25)
218#define SNDRV_PCM_FORMAT_S20_BE ((__force snd_pcm_format_t) 26)
219#define SNDRV_PCM_FORMAT_U20_LE ((__force snd_pcm_format_t) 27)
220#define SNDRV_PCM_FORMAT_U20_BE ((__force snd_pcm_format_t) 28)
221
222#define SNDRV_PCM_FORMAT_SPECIAL ((__force snd_pcm_format_t) 31)
223#define SNDRV_PCM_FORMAT_S24_3LE ((__force snd_pcm_format_t) 32)
224#define SNDRV_PCM_FORMAT_S24_3BE ((__force snd_pcm_format_t) 33)
225#define SNDRV_PCM_FORMAT_U24_3LE ((__force snd_pcm_format_t) 34)
226#define SNDRV_PCM_FORMAT_U24_3BE ((__force snd_pcm_format_t) 35)
227#define SNDRV_PCM_FORMAT_S20_3LE ((__force snd_pcm_format_t) 36)
228#define SNDRV_PCM_FORMAT_S20_3BE ((__force snd_pcm_format_t) 37)
229#define SNDRV_PCM_FORMAT_U20_3LE ((__force snd_pcm_format_t) 38)
230#define SNDRV_PCM_FORMAT_U20_3BE ((__force snd_pcm_format_t) 39)
231#define SNDRV_PCM_FORMAT_S18_3LE ((__force snd_pcm_format_t) 40)
232#define SNDRV_PCM_FORMAT_S18_3BE ((__force snd_pcm_format_t) 41)
233#define SNDRV_PCM_FORMAT_U18_3LE ((__force snd_pcm_format_t) 42)
234#define SNDRV_PCM_FORMAT_U18_3BE ((__force snd_pcm_format_t) 43)
235#define SNDRV_PCM_FORMAT_G723_24 ((__force snd_pcm_format_t) 44)
236#define SNDRV_PCM_FORMAT_G723_24_1B ((__force snd_pcm_format_t) 45)
237#define SNDRV_PCM_FORMAT_G723_40 ((__force snd_pcm_format_t) 46)
238#define SNDRV_PCM_FORMAT_G723_40_1B ((__force snd_pcm_format_t) 47)
239#define SNDRV_PCM_FORMAT_DSD_U8 ((__force snd_pcm_format_t) 48)
240#define SNDRV_PCM_FORMAT_DSD_U16_LE ((__force snd_pcm_format_t) 49)
241#define SNDRV_PCM_FORMAT_DSD_U32_LE ((__force snd_pcm_format_t) 50)
242#define SNDRV_PCM_FORMAT_DSD_U16_BE ((__force snd_pcm_format_t) 51)
243#define SNDRV_PCM_FORMAT_DSD_U32_BE ((__force snd_pcm_format_t) 52)
244#define SNDRV_PCM_FORMAT_LAST SNDRV_PCM_FORMAT_DSD_U32_BE
245#define SNDRV_PCM_FORMAT_FIRST SNDRV_PCM_FORMAT_S8
246
247#ifdef SNDRV_LITTLE_ENDIAN
248#define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_LE
249#define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_LE
250#define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_LE
251#define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_LE
252#define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_LE
253#define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_LE
254#define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_LE
255#define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_LE
256#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE
257#define SNDRV_PCM_FORMAT_S20 SNDRV_PCM_FORMAT_S20_LE
258#define SNDRV_PCM_FORMAT_U20 SNDRV_PCM_FORMAT_U20_LE
259#endif
260#ifdef SNDRV_BIG_ENDIAN
261#define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_BE
262#define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_BE
263#define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_BE
264#define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_BE
265#define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_BE
266#define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_BE
267#define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_BE
268#define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_BE
269#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE
270#define SNDRV_PCM_FORMAT_S20 SNDRV_PCM_FORMAT_S20_BE
271#define SNDRV_PCM_FORMAT_U20 SNDRV_PCM_FORMAT_U20_BE
272#endif
273
274typedef int __bitwise snd_pcm_subformat_t;
275#define SNDRV_PCM_SUBFORMAT_STD ((__force snd_pcm_subformat_t) 0)
276#define SNDRV_PCM_SUBFORMAT_LAST SNDRV_PCM_SUBFORMAT_STD
277
278#define SNDRV_PCM_INFO_MMAP 0x00000001
279#define SNDRV_PCM_INFO_MMAP_VALID 0x00000002
280#define SNDRV_PCM_INFO_DOUBLE 0x00000004
281#define SNDRV_PCM_INFO_BATCH 0x00000010
282#define SNDRV_PCM_INFO_SYNC_APPLPTR 0x00000020
283#define SNDRV_PCM_INFO_INTERLEAVED 0x00000100
284#define SNDRV_PCM_INFO_NONINTERLEAVED 0x00000200
285#define SNDRV_PCM_INFO_COMPLEX 0x00000400
286#define SNDRV_PCM_INFO_BLOCK_TRANSFER 0x00010000
287#define SNDRV_PCM_INFO_OVERRANGE 0x00020000
288#define SNDRV_PCM_INFO_RESUME 0x00040000
289#define SNDRV_PCM_INFO_PAUSE 0x00080000
290#define SNDRV_PCM_INFO_HALF_DUPLEX 0x00100000
291#define SNDRV_PCM_INFO_JOINT_DUPLEX 0x00200000
292#define SNDRV_PCM_INFO_SYNC_START 0x00400000
293#define SNDRV_PCM_INFO_NO_PERIOD_WAKEUP 0x00800000
294#define SNDRV_PCM_INFO_HAS_WALL_CLOCK 0x01000000
295#define SNDRV_PCM_INFO_HAS_LINK_ATIME 0x01000000
296#define SNDRV_PCM_INFO_HAS_LINK_ABSOLUTE_ATIME 0x02000000
297#define SNDRV_PCM_INFO_HAS_LINK_ESTIMATED_ATIME 0x04000000
298#define SNDRV_PCM_INFO_HAS_LINK_SYNCHRONIZED_ATIME 0x08000000
299
300#define SNDRV_PCM_INFO_DRAIN_TRIGGER 0x40000000
301#define SNDRV_PCM_INFO_FIFO_IN_FRAMES 0x80000000
302
303
304
305typedef int __bitwise snd_pcm_state_t;
306#define SNDRV_PCM_STATE_OPEN ((__force snd_pcm_state_t) 0)
307#define SNDRV_PCM_STATE_SETUP ((__force snd_pcm_state_t) 1)
308#define SNDRV_PCM_STATE_PREPARED ((__force snd_pcm_state_t) 2)
309#define SNDRV_PCM_STATE_RUNNING ((__force snd_pcm_state_t) 3)
310#define SNDRV_PCM_STATE_XRUN ((__force snd_pcm_state_t) 4)
311#define SNDRV_PCM_STATE_DRAINING ((__force snd_pcm_state_t) 5)
312#define SNDRV_PCM_STATE_PAUSED ((__force snd_pcm_state_t) 6)
313#define SNDRV_PCM_STATE_SUSPENDED ((__force snd_pcm_state_t) 7)
314#define SNDRV_PCM_STATE_DISCONNECTED ((__force snd_pcm_state_t) 8)
315#define SNDRV_PCM_STATE_LAST SNDRV_PCM_STATE_DISCONNECTED
316
317enum {
318 SNDRV_PCM_MMAP_OFFSET_DATA = 0x00000000,
319 SNDRV_PCM_MMAP_OFFSET_STATUS = 0x80000000,
320 SNDRV_PCM_MMAP_OFFSET_CONTROL = 0x81000000,
321};
322
323union snd_pcm_sync_id {
324 unsigned char id[16];
325 unsigned short id16[8];
326 unsigned int id32[4];
327};
328
329struct snd_pcm_info {
330 unsigned int device;
331 unsigned int subdevice;
332 int stream;
333 int card;
334 unsigned char id[64];
335 unsigned char name[80];
336 unsigned char subname[32];
337 int dev_class;
338 int dev_subclass;
339 unsigned int subdevices_count;
340 unsigned int subdevices_avail;
341 union snd_pcm_sync_id sync;
342 unsigned char reserved[64];
343};
344
345typedef int snd_pcm_hw_param_t;
346#define SNDRV_PCM_HW_PARAM_ACCESS 0
347#define SNDRV_PCM_HW_PARAM_FORMAT 1
348#define SNDRV_PCM_HW_PARAM_SUBFORMAT 2
349#define SNDRV_PCM_HW_PARAM_FIRST_MASK SNDRV_PCM_HW_PARAM_ACCESS
350#define SNDRV_PCM_HW_PARAM_LAST_MASK SNDRV_PCM_HW_PARAM_SUBFORMAT
351
352#define SNDRV_PCM_HW_PARAM_SAMPLE_BITS 8
353#define SNDRV_PCM_HW_PARAM_FRAME_BITS 9
354#define SNDRV_PCM_HW_PARAM_CHANNELS 10
355#define SNDRV_PCM_HW_PARAM_RATE 11
356#define SNDRV_PCM_HW_PARAM_PERIOD_TIME 12
357
358
359#define SNDRV_PCM_HW_PARAM_PERIOD_SIZE 13
360
361
362#define SNDRV_PCM_HW_PARAM_PERIOD_BYTES 14
363
364
365#define SNDRV_PCM_HW_PARAM_PERIODS 15
366
367
368#define SNDRV_PCM_HW_PARAM_BUFFER_TIME 16
369
370
371#define SNDRV_PCM_HW_PARAM_BUFFER_SIZE 17
372#define SNDRV_PCM_HW_PARAM_BUFFER_BYTES 18
373#define SNDRV_PCM_HW_PARAM_TICK_TIME 19
374#define SNDRV_PCM_HW_PARAM_FIRST_INTERVAL SNDRV_PCM_HW_PARAM_SAMPLE_BITS
375#define SNDRV_PCM_HW_PARAM_LAST_INTERVAL SNDRV_PCM_HW_PARAM_TICK_TIME
376
377#define SNDRV_PCM_HW_PARAMS_NORESAMPLE (1<<0)
378#define SNDRV_PCM_HW_PARAMS_EXPORT_BUFFER (1<<1)
379#define SNDRV_PCM_HW_PARAMS_NO_PERIOD_WAKEUP (1<<2)
380
381struct snd_interval {
382 unsigned int min, max;
383 unsigned int openmin:1,
384 openmax:1,
385 integer:1,
386 empty:1;
387};
388
389#define SNDRV_MASK_MAX 256
390
391struct snd_mask {
392 __u32 bits[(SNDRV_MASK_MAX+31)/32];
393};
394
395struct snd_pcm_hw_params {
396 unsigned int flags;
397 struct snd_mask masks[SNDRV_PCM_HW_PARAM_LAST_MASK -
398 SNDRV_PCM_HW_PARAM_FIRST_MASK + 1];
399 struct snd_mask mres[5];
400 struct snd_interval intervals[SNDRV_PCM_HW_PARAM_LAST_INTERVAL -
401 SNDRV_PCM_HW_PARAM_FIRST_INTERVAL + 1];
402 struct snd_interval ires[9];
403 unsigned int rmask;
404 unsigned int cmask;
405 unsigned int info;
406 unsigned int msbits;
407 unsigned int rate_num;
408 unsigned int rate_den;
409 snd_pcm_uframes_t fifo_size;
410 unsigned char reserved[64];
411};
412
413enum {
414 SNDRV_PCM_TSTAMP_NONE = 0,
415 SNDRV_PCM_TSTAMP_ENABLE,
416 SNDRV_PCM_TSTAMP_LAST = SNDRV_PCM_TSTAMP_ENABLE,
417};
418
419struct snd_pcm_sw_params {
420 int tstamp_mode;
421 unsigned int period_step;
422 unsigned int sleep_min;
423 snd_pcm_uframes_t avail_min;
424 snd_pcm_uframes_t xfer_align;
425 snd_pcm_uframes_t start_threshold;
426 snd_pcm_uframes_t stop_threshold;
427 snd_pcm_uframes_t silence_threshold;
428 snd_pcm_uframes_t silence_size;
429 snd_pcm_uframes_t boundary;
430 unsigned int proto;
431 unsigned int tstamp_type;
432 unsigned char reserved[56];
433};
434
435struct snd_pcm_channel_info {
436 unsigned int channel;
437 __kernel_off_t offset;
438 unsigned int first;
439 unsigned int step;
440};
441
442enum {
443
444
445
446
447 SNDRV_PCM_AUDIO_TSTAMP_TYPE_COMPAT = 0,
448
449
450 SNDRV_PCM_AUDIO_TSTAMP_TYPE_DEFAULT = 1,
451 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK = 2,
452 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_ABSOLUTE = 3,
453 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_ESTIMATED = 4,
454 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_SYNCHRONIZED = 5,
455 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LAST = SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_SYNCHRONIZED
456};
457
458struct snd_pcm_status {
459 snd_pcm_state_t state;
460 struct timespec trigger_tstamp;
461 struct timespec tstamp;
462 snd_pcm_uframes_t appl_ptr;
463 snd_pcm_uframes_t hw_ptr;
464 snd_pcm_sframes_t delay;
465 snd_pcm_uframes_t avail;
466 snd_pcm_uframes_t avail_max;
467 snd_pcm_uframes_t overrange;
468 snd_pcm_state_t suspended_state;
469 __u32 audio_tstamp_data;
470 struct timespec audio_tstamp;
471 struct timespec driver_tstamp;
472 __u32 audio_tstamp_accuracy;
473 unsigned char reserved[52-2*sizeof(struct timespec)];
474};
475
476struct snd_pcm_mmap_status {
477 snd_pcm_state_t state;
478 int pad1;
479 snd_pcm_uframes_t hw_ptr;
480 struct timespec tstamp;
481 snd_pcm_state_t suspended_state;
482 struct timespec audio_tstamp;
483};
484
485struct snd_pcm_mmap_control {
486 snd_pcm_uframes_t appl_ptr;
487 snd_pcm_uframes_t avail_min;
488};
489
490#define SNDRV_PCM_SYNC_PTR_HWSYNC (1<<0)
491#define SNDRV_PCM_SYNC_PTR_APPL (1<<1)
492#define SNDRV_PCM_SYNC_PTR_AVAIL_MIN (1<<2)
493
494struct snd_pcm_sync_ptr {
495 unsigned int flags;
496 union {
497 struct snd_pcm_mmap_status status;
498 unsigned char reserved[64];
499 } s;
500 union {
501 struct snd_pcm_mmap_control control;
502 unsigned char reserved[64];
503 } c;
504};
505
506struct snd_xferi {
507 snd_pcm_sframes_t result;
508 void __user *buf;
509 snd_pcm_uframes_t frames;
510};
511
512struct snd_xfern {
513 snd_pcm_sframes_t result;
514 void __user * __user *bufs;
515 snd_pcm_uframes_t frames;
516};
517
518enum {
519 SNDRV_PCM_TSTAMP_TYPE_GETTIMEOFDAY = 0,
520 SNDRV_PCM_TSTAMP_TYPE_MONOTONIC,
521 SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW,
522 SNDRV_PCM_TSTAMP_TYPE_LAST = SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW,
523};
524
525
526enum {
527 SNDRV_CHMAP_UNKNOWN = 0,
528 SNDRV_CHMAP_NA,
529 SNDRV_CHMAP_MONO,
530
531 SNDRV_CHMAP_FL,
532 SNDRV_CHMAP_FR,
533 SNDRV_CHMAP_RL,
534 SNDRV_CHMAP_RR,
535 SNDRV_CHMAP_FC,
536 SNDRV_CHMAP_LFE,
537 SNDRV_CHMAP_SL,
538 SNDRV_CHMAP_SR,
539 SNDRV_CHMAP_RC,
540
541 SNDRV_CHMAP_FLC,
542 SNDRV_CHMAP_FRC,
543 SNDRV_CHMAP_RLC,
544 SNDRV_CHMAP_RRC,
545 SNDRV_CHMAP_FLW,
546 SNDRV_CHMAP_FRW,
547 SNDRV_CHMAP_FLH,
548 SNDRV_CHMAP_FCH,
549 SNDRV_CHMAP_FRH,
550 SNDRV_CHMAP_TC,
551 SNDRV_CHMAP_TFL,
552 SNDRV_CHMAP_TFR,
553 SNDRV_CHMAP_TFC,
554 SNDRV_CHMAP_TRL,
555 SNDRV_CHMAP_TRR,
556 SNDRV_CHMAP_TRC,
557
558 SNDRV_CHMAP_TFLC,
559 SNDRV_CHMAP_TFRC,
560 SNDRV_CHMAP_TSL,
561 SNDRV_CHMAP_TSR,
562 SNDRV_CHMAP_LLFE,
563 SNDRV_CHMAP_RLFE,
564 SNDRV_CHMAP_BC,
565 SNDRV_CHMAP_BLC,
566 SNDRV_CHMAP_BRC,
567 SNDRV_CHMAP_LAST = SNDRV_CHMAP_BRC,
568};
569
570#define SNDRV_CHMAP_POSITION_MASK 0xffff
571#define SNDRV_CHMAP_PHASE_INVERSE (0x01 << 16)
572#define SNDRV_CHMAP_DRIVER_SPEC (0x02 << 16)
573
574#define SNDRV_PCM_IOCTL_PVERSION _IOR('A', 0x00, int)
575#define SNDRV_PCM_IOCTL_INFO _IOR('A', 0x01, struct snd_pcm_info)
576#define SNDRV_PCM_IOCTL_TSTAMP _IOW('A', 0x02, int)
577#define SNDRV_PCM_IOCTL_TTSTAMP _IOW('A', 0x03, int)
578#define SNDRV_PCM_IOCTL_USER_PVERSION _IOW('A', 0x04, int)
579#define SNDRV_PCM_IOCTL_HW_REFINE _IOWR('A', 0x10, struct snd_pcm_hw_params)
580#define SNDRV_PCM_IOCTL_HW_PARAMS _IOWR('A', 0x11, struct snd_pcm_hw_params)
581#define SNDRV_PCM_IOCTL_HW_FREE _IO('A', 0x12)
582#define SNDRV_PCM_IOCTL_SW_PARAMS _IOWR('A', 0x13, struct snd_pcm_sw_params)
583#define SNDRV_PCM_IOCTL_STATUS _IOR('A', 0x20, struct snd_pcm_status)
584#define SNDRV_PCM_IOCTL_DELAY _IOR('A', 0x21, snd_pcm_sframes_t)
585#define SNDRV_PCM_IOCTL_HWSYNC _IO('A', 0x22)
586#define SNDRV_PCM_IOCTL_SYNC_PTR _IOWR('A', 0x23, struct snd_pcm_sync_ptr)
587#define SNDRV_PCM_IOCTL_STATUS_EXT _IOWR('A', 0x24, struct snd_pcm_status)
588#define SNDRV_PCM_IOCTL_CHANNEL_INFO _IOR('A', 0x32, struct snd_pcm_channel_info)
589#define SNDRV_PCM_IOCTL_PREPARE _IO('A', 0x40)
590#define SNDRV_PCM_IOCTL_RESET _IO('A', 0x41)
591#define SNDRV_PCM_IOCTL_START _IO('A', 0x42)
592#define SNDRV_PCM_IOCTL_DROP _IO('A', 0x43)
593#define SNDRV_PCM_IOCTL_DRAIN _IO('A', 0x44)
594#define SNDRV_PCM_IOCTL_PAUSE _IOW('A', 0x45, int)
595#define SNDRV_PCM_IOCTL_REWIND _IOW('A', 0x46, snd_pcm_uframes_t)
596#define SNDRV_PCM_IOCTL_RESUME _IO('A', 0x47)
597#define SNDRV_PCM_IOCTL_XRUN _IO('A', 0x48)
598#define SNDRV_PCM_IOCTL_FORWARD _IOW('A', 0x49, snd_pcm_uframes_t)
599#define SNDRV_PCM_IOCTL_WRITEI_FRAMES _IOW('A', 0x50, struct snd_xferi)
600#define SNDRV_PCM_IOCTL_READI_FRAMES _IOR('A', 0x51, struct snd_xferi)
601#define SNDRV_PCM_IOCTL_WRITEN_FRAMES _IOW('A', 0x52, struct snd_xfern)
602#define SNDRV_PCM_IOCTL_READN_FRAMES _IOR('A', 0x53, struct snd_xfern)
603#define SNDRV_PCM_IOCTL_LINK _IOW('A', 0x60, int)
604#define SNDRV_PCM_IOCTL_UNLINK _IO('A', 0x61)
605
606
607
608
609
610
611
612
613
614
615
616#define SNDRV_RAWMIDI_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 0)
617
618enum {
619 SNDRV_RAWMIDI_STREAM_OUTPUT = 0,
620 SNDRV_RAWMIDI_STREAM_INPUT,
621 SNDRV_RAWMIDI_STREAM_LAST = SNDRV_RAWMIDI_STREAM_INPUT,
622};
623
624#define SNDRV_RAWMIDI_INFO_OUTPUT 0x00000001
625#define SNDRV_RAWMIDI_INFO_INPUT 0x00000002
626#define SNDRV_RAWMIDI_INFO_DUPLEX 0x00000004
627
628struct snd_rawmidi_info {
629 unsigned int device;
630 unsigned int subdevice;
631 int stream;
632 int card;
633 unsigned int flags;
634 unsigned char id[64];
635 unsigned char name[80];
636 unsigned char subname[32];
637 unsigned int subdevices_count;
638 unsigned int subdevices_avail;
639 unsigned char reserved[64];
640};
641
642struct snd_rawmidi_params {
643 int stream;
644 size_t buffer_size;
645 size_t avail_min;
646 unsigned int no_active_sensing: 1;
647 unsigned char reserved[16];
648};
649
650struct snd_rawmidi_status {
651 int stream;
652 struct timespec tstamp;
653 size_t avail;
654 size_t xruns;
655 unsigned char reserved[16];
656};
657
658#define SNDRV_RAWMIDI_IOCTL_PVERSION _IOR('W', 0x00, int)
659#define SNDRV_RAWMIDI_IOCTL_INFO _IOR('W', 0x01, struct snd_rawmidi_info)
660#define SNDRV_RAWMIDI_IOCTL_PARAMS _IOWR('W', 0x10, struct snd_rawmidi_params)
661#define SNDRV_RAWMIDI_IOCTL_STATUS _IOWR('W', 0x20, struct snd_rawmidi_status)
662#define SNDRV_RAWMIDI_IOCTL_DROP _IOW('W', 0x30, int)
663#define SNDRV_RAWMIDI_IOCTL_DRAIN _IOW('W', 0x31, int)
664
665
666
667
668
669#define SNDRV_TIMER_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 6)
670
671enum {
672 SNDRV_TIMER_CLASS_NONE = -1,
673 SNDRV_TIMER_CLASS_SLAVE = 0,
674 SNDRV_TIMER_CLASS_GLOBAL,
675 SNDRV_TIMER_CLASS_CARD,
676 SNDRV_TIMER_CLASS_PCM,
677 SNDRV_TIMER_CLASS_LAST = SNDRV_TIMER_CLASS_PCM,
678};
679
680
681enum {
682 SNDRV_TIMER_SCLASS_NONE = 0,
683 SNDRV_TIMER_SCLASS_APPLICATION,
684 SNDRV_TIMER_SCLASS_SEQUENCER,
685 SNDRV_TIMER_SCLASS_OSS_SEQUENCER,
686 SNDRV_TIMER_SCLASS_LAST = SNDRV_TIMER_SCLASS_OSS_SEQUENCER,
687};
688
689
690#define SNDRV_TIMER_GLOBAL_SYSTEM 0
691#define SNDRV_TIMER_GLOBAL_RTC 1
692#define SNDRV_TIMER_GLOBAL_HPET 2
693#define SNDRV_TIMER_GLOBAL_HRTIMER 3
694
695
696#define SNDRV_TIMER_FLG_SLAVE (1<<0)
697
698struct snd_timer_id {
699 int dev_class;
700 int dev_sclass;
701 int card;
702 int device;
703 int subdevice;
704};
705
706struct snd_timer_ginfo {
707 struct snd_timer_id tid;
708 unsigned int flags;
709 int card;
710 unsigned char id[64];
711 unsigned char name[80];
712 unsigned long reserved0;
713 unsigned long resolution;
714 unsigned long resolution_min;
715 unsigned long resolution_max;
716 unsigned int clients;
717 unsigned char reserved[32];
718};
719
720struct snd_timer_gparams {
721 struct snd_timer_id tid;
722 unsigned long period_num;
723 unsigned long period_den;
724 unsigned char reserved[32];
725};
726
727struct snd_timer_gstatus {
728 struct snd_timer_id tid;
729 unsigned long resolution;
730 unsigned long resolution_num;
731 unsigned long resolution_den;
732 unsigned char reserved[32];
733};
734
735struct snd_timer_select {
736 struct snd_timer_id id;
737 unsigned char reserved[32];
738};
739
740struct snd_timer_info {
741 unsigned int flags;
742 int card;
743 unsigned char id[64];
744 unsigned char name[80];
745 unsigned long reserved0;
746 unsigned long resolution;
747 unsigned char reserved[64];
748};
749
750#define SNDRV_TIMER_PSFLG_AUTO (1<<0)
751#define SNDRV_TIMER_PSFLG_EXCLUSIVE (1<<1)
752#define SNDRV_TIMER_PSFLG_EARLY_EVENT (1<<2)
753
754struct snd_timer_params {
755 unsigned int flags;
756 unsigned int ticks;
757 unsigned int queue_size;
758 unsigned int reserved0;
759 unsigned int filter;
760 unsigned char reserved[60];
761};
762
763struct snd_timer_status {
764 struct timespec tstamp;
765 unsigned int resolution;
766 unsigned int lost;
767 unsigned int overrun;
768 unsigned int queue;
769 unsigned char reserved[64];
770};
771
772#define SNDRV_TIMER_IOCTL_PVERSION _IOR('T', 0x00, int)
773#define SNDRV_TIMER_IOCTL_NEXT_DEVICE _IOWR('T', 0x01, struct snd_timer_id)
774#define SNDRV_TIMER_IOCTL_TREAD _IOW('T', 0x02, int)
775#define SNDRV_TIMER_IOCTL_GINFO _IOWR('T', 0x03, struct snd_timer_ginfo)
776#define SNDRV_TIMER_IOCTL_GPARAMS _IOW('T', 0x04, struct snd_timer_gparams)
777#define SNDRV_TIMER_IOCTL_GSTATUS _IOWR('T', 0x05, struct snd_timer_gstatus)
778#define SNDRV_TIMER_IOCTL_SELECT _IOW('T', 0x10, struct snd_timer_select)
779#define SNDRV_TIMER_IOCTL_INFO _IOR('T', 0x11, struct snd_timer_info)
780#define SNDRV_TIMER_IOCTL_PARAMS _IOW('T', 0x12, struct snd_timer_params)
781#define SNDRV_TIMER_IOCTL_STATUS _IOR('T', 0x14, struct snd_timer_status)
782
783#define SNDRV_TIMER_IOCTL_START _IO('T', 0xa0)
784#define SNDRV_TIMER_IOCTL_STOP _IO('T', 0xa1)
785#define SNDRV_TIMER_IOCTL_CONTINUE _IO('T', 0xa2)
786#define SNDRV_TIMER_IOCTL_PAUSE _IO('T', 0xa3)
787
788struct snd_timer_read {
789 unsigned int resolution;
790 unsigned int ticks;
791};
792
793enum {
794 SNDRV_TIMER_EVENT_RESOLUTION = 0,
795 SNDRV_TIMER_EVENT_TICK,
796 SNDRV_TIMER_EVENT_START,
797 SNDRV_TIMER_EVENT_STOP,
798 SNDRV_TIMER_EVENT_CONTINUE,
799 SNDRV_TIMER_EVENT_PAUSE,
800 SNDRV_TIMER_EVENT_EARLY,
801 SNDRV_TIMER_EVENT_SUSPEND,
802 SNDRV_TIMER_EVENT_RESUME,
803
804 SNDRV_TIMER_EVENT_MSTART = SNDRV_TIMER_EVENT_START + 10,
805 SNDRV_TIMER_EVENT_MSTOP = SNDRV_TIMER_EVENT_STOP + 10,
806 SNDRV_TIMER_EVENT_MCONTINUE = SNDRV_TIMER_EVENT_CONTINUE + 10,
807 SNDRV_TIMER_EVENT_MPAUSE = SNDRV_TIMER_EVENT_PAUSE + 10,
808 SNDRV_TIMER_EVENT_MSUSPEND = SNDRV_TIMER_EVENT_SUSPEND + 10,
809 SNDRV_TIMER_EVENT_MRESUME = SNDRV_TIMER_EVENT_RESUME + 10,
810};
811
812struct snd_timer_tread {
813 int event;
814 struct timespec tstamp;
815 unsigned int val;
816};
817
818
819
820
821
822
823
824#define SNDRV_CTL_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 7)
825
826struct snd_ctl_card_info {
827 int card;
828 int pad;
829 unsigned char id[16];
830 unsigned char driver[16];
831 unsigned char name[32];
832 unsigned char longname[80];
833 unsigned char reserved_[16];
834 unsigned char mixername[80];
835 unsigned char components[128];
836};
837
838typedef int __bitwise snd_ctl_elem_type_t;
839#define SNDRV_CTL_ELEM_TYPE_NONE ((__force snd_ctl_elem_type_t) 0)
840#define SNDRV_CTL_ELEM_TYPE_BOOLEAN ((__force snd_ctl_elem_type_t) 1)
841#define SNDRV_CTL_ELEM_TYPE_INTEGER ((__force snd_ctl_elem_type_t) 2)
842#define SNDRV_CTL_ELEM_TYPE_ENUMERATED ((__force snd_ctl_elem_type_t) 3)
843#define SNDRV_CTL_ELEM_TYPE_BYTES ((__force snd_ctl_elem_type_t) 4)
844#define SNDRV_CTL_ELEM_TYPE_IEC958 ((__force snd_ctl_elem_type_t) 5)
845#define SNDRV_CTL_ELEM_TYPE_INTEGER64 ((__force snd_ctl_elem_type_t) 6)
846#define SNDRV_CTL_ELEM_TYPE_LAST SNDRV_CTL_ELEM_TYPE_INTEGER64
847
848typedef int __bitwise snd_ctl_elem_iface_t;
849#define SNDRV_CTL_ELEM_IFACE_CARD ((__force snd_ctl_elem_iface_t) 0)
850#define SNDRV_CTL_ELEM_IFACE_HWDEP ((__force snd_ctl_elem_iface_t) 1)
851#define SNDRV_CTL_ELEM_IFACE_MIXER ((__force snd_ctl_elem_iface_t) 2)
852#define SNDRV_CTL_ELEM_IFACE_PCM ((__force snd_ctl_elem_iface_t) 3)
853#define SNDRV_CTL_ELEM_IFACE_RAWMIDI ((__force snd_ctl_elem_iface_t) 4)
854#define SNDRV_CTL_ELEM_IFACE_TIMER ((__force snd_ctl_elem_iface_t) 5)
855#define SNDRV_CTL_ELEM_IFACE_SEQUENCER ((__force snd_ctl_elem_iface_t) 6)
856#define SNDRV_CTL_ELEM_IFACE_LAST SNDRV_CTL_ELEM_IFACE_SEQUENCER
857
858#define SNDRV_CTL_ELEM_ACCESS_READ (1<<0)
859#define SNDRV_CTL_ELEM_ACCESS_WRITE (1<<1)
860#define SNDRV_CTL_ELEM_ACCESS_READWRITE (SNDRV_CTL_ELEM_ACCESS_READ|SNDRV_CTL_ELEM_ACCESS_WRITE)
861#define SNDRV_CTL_ELEM_ACCESS_VOLATILE (1<<2)
862#define SNDRV_CTL_ELEM_ACCESS_TIMESTAMP (1<<3)
863#define SNDRV_CTL_ELEM_ACCESS_TLV_READ (1<<4)
864#define SNDRV_CTL_ELEM_ACCESS_TLV_WRITE (1<<5)
865#define SNDRV_CTL_ELEM_ACCESS_TLV_READWRITE (SNDRV_CTL_ELEM_ACCESS_TLV_READ|SNDRV_CTL_ELEM_ACCESS_TLV_WRITE)
866#define SNDRV_CTL_ELEM_ACCESS_TLV_COMMAND (1<<6)
867#define SNDRV_CTL_ELEM_ACCESS_INACTIVE (1<<8)
868#define SNDRV_CTL_ELEM_ACCESS_LOCK (1<<9)
869#define SNDRV_CTL_ELEM_ACCESS_OWNER (1<<10)
870#define SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK (1<<28)
871#define SNDRV_CTL_ELEM_ACCESS_USER (1<<29)
872
873
874
875#define SNDRV_CTL_POWER_D0 0x0000
876#define SNDRV_CTL_POWER_D1 0x0100
877#define SNDRV_CTL_POWER_D2 0x0200
878#define SNDRV_CTL_POWER_D3 0x0300
879#define SNDRV_CTL_POWER_D3hot (SNDRV_CTL_POWER_D3|0x0000)
880#define SNDRV_CTL_POWER_D3cold (SNDRV_CTL_POWER_D3|0x0001)
881
882#define SNDRV_CTL_ELEM_ID_NAME_MAXLEN 44
883
884struct snd_ctl_elem_id {
885 unsigned int numid;
886 snd_ctl_elem_iface_t iface;
887 unsigned int device;
888 unsigned int subdevice;
889 unsigned char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
890 unsigned int index;
891};
892
893struct snd_ctl_elem_list {
894 unsigned int offset;
895 unsigned int space;
896 unsigned int used;
897 unsigned int count;
898 struct snd_ctl_elem_id __user *pids;
899 unsigned char reserved[50];
900};
901
902struct snd_ctl_elem_info {
903 struct snd_ctl_elem_id id;
904 snd_ctl_elem_type_t type;
905 unsigned int access;
906 unsigned int count;
907 __kernel_pid_t owner;
908 union {
909 struct {
910 long min;
911 long max;
912 long step;
913 } integer;
914 struct {
915 long long min;
916 long long max;
917 long long step;
918 } integer64;
919 struct {
920 unsigned int items;
921 unsigned int item;
922 char name[64];
923 __u64 names_ptr;
924 unsigned int names_length;
925 } enumerated;
926 unsigned char reserved[128];
927 } value;
928 union {
929 unsigned short d[4];
930 unsigned short *d_ptr;
931 } dimen;
932 unsigned char reserved[64-4*sizeof(unsigned short)];
933};
934
935struct snd_ctl_elem_value {
936 struct snd_ctl_elem_id id;
937 unsigned int indirect: 1;
938 union {
939 union {
940 long value[128];
941 long *value_ptr;
942 } integer;
943 union {
944 long long value[64];
945 long long *value_ptr;
946 } integer64;
947 union {
948 unsigned int item[128];
949 unsigned int *item_ptr;
950 } enumerated;
951 union {
952 unsigned char data[512];
953 unsigned char *data_ptr;
954 } bytes;
955 struct snd_aes_iec958 iec958;
956 } value;
957 struct timespec tstamp;
958 unsigned char reserved[128-sizeof(struct timespec)];
959};
960
961struct snd_ctl_tlv {
962 unsigned int numid;
963 unsigned int length;
964 unsigned int tlv[0];
965};
966
967#define SNDRV_CTL_IOCTL_PVERSION _IOR('U', 0x00, int)
968#define SNDRV_CTL_IOCTL_CARD_INFO _IOR('U', 0x01, struct snd_ctl_card_info)
969#define SNDRV_CTL_IOCTL_ELEM_LIST _IOWR('U', 0x10, struct snd_ctl_elem_list)
970#define SNDRV_CTL_IOCTL_ELEM_INFO _IOWR('U', 0x11, struct snd_ctl_elem_info)
971#define SNDRV_CTL_IOCTL_ELEM_READ _IOWR('U', 0x12, struct snd_ctl_elem_value)
972#define SNDRV_CTL_IOCTL_ELEM_WRITE _IOWR('U', 0x13, struct snd_ctl_elem_value)
973#define SNDRV_CTL_IOCTL_ELEM_LOCK _IOW('U', 0x14, struct snd_ctl_elem_id)
974#define SNDRV_CTL_IOCTL_ELEM_UNLOCK _IOW('U', 0x15, struct snd_ctl_elem_id)
975#define SNDRV_CTL_IOCTL_SUBSCRIBE_EVENTS _IOWR('U', 0x16, int)
976#define SNDRV_CTL_IOCTL_ELEM_ADD _IOWR('U', 0x17, struct snd_ctl_elem_info)
977#define SNDRV_CTL_IOCTL_ELEM_REPLACE _IOWR('U', 0x18, struct snd_ctl_elem_info)
978#define SNDRV_CTL_IOCTL_ELEM_REMOVE _IOWR('U', 0x19, struct snd_ctl_elem_id)
979#define SNDRV_CTL_IOCTL_TLV_READ _IOWR('U', 0x1a, struct snd_ctl_tlv)
980#define SNDRV_CTL_IOCTL_TLV_WRITE _IOWR('U', 0x1b, struct snd_ctl_tlv)
981#define SNDRV_CTL_IOCTL_TLV_COMMAND _IOWR('U', 0x1c, struct snd_ctl_tlv)
982#define SNDRV_CTL_IOCTL_HWDEP_NEXT_DEVICE _IOWR('U', 0x20, int)
983#define SNDRV_CTL_IOCTL_HWDEP_INFO _IOR('U', 0x21, struct snd_hwdep_info)
984#define SNDRV_CTL_IOCTL_PCM_NEXT_DEVICE _IOR('U', 0x30, int)
985#define SNDRV_CTL_IOCTL_PCM_INFO _IOWR('U', 0x31, struct snd_pcm_info)
986#define SNDRV_CTL_IOCTL_PCM_PREFER_SUBDEVICE _IOW('U', 0x32, int)
987#define SNDRV_CTL_IOCTL_RAWMIDI_NEXT_DEVICE _IOWR('U', 0x40, int)
988#define SNDRV_CTL_IOCTL_RAWMIDI_INFO _IOWR('U', 0x41, struct snd_rawmidi_info)
989#define SNDRV_CTL_IOCTL_RAWMIDI_PREFER_SUBDEVICE _IOW('U', 0x42, int)
990#define SNDRV_CTL_IOCTL_POWER _IOWR('U', 0xd0, int)
991#define SNDRV_CTL_IOCTL_POWER_STATE _IOR('U', 0xd1, int)
992
993
994
995
996
997enum sndrv_ctl_event_type {
998 SNDRV_CTL_EVENT_ELEM = 0,
999 SNDRV_CTL_EVENT_LAST = SNDRV_CTL_EVENT_ELEM,
1000};
1001
1002#define SNDRV_CTL_EVENT_MASK_VALUE (1<<0)
1003#define SNDRV_CTL_EVENT_MASK_INFO (1<<1)
1004#define SNDRV_CTL_EVENT_MASK_ADD (1<<2)
1005#define SNDRV_CTL_EVENT_MASK_TLV (1<<3)
1006#define SNDRV_CTL_EVENT_MASK_REMOVE (~0U)
1007
1008struct snd_ctl_event {
1009 int type;
1010 union {
1011 struct {
1012 unsigned int mask;
1013 struct snd_ctl_elem_id id;
1014 } elem;
1015 unsigned char data8[60];
1016 } data;
1017};
1018
1019
1020
1021
1022
1023#define SNDRV_CTL_NAME_NONE ""
1024#define SNDRV_CTL_NAME_PLAYBACK "Playback "
1025#define SNDRV_CTL_NAME_CAPTURE "Capture "
1026
1027#define SNDRV_CTL_NAME_IEC958_NONE ""
1028#define SNDRV_CTL_NAME_IEC958_SWITCH "Switch"
1029#define SNDRV_CTL_NAME_IEC958_VOLUME "Volume"
1030#define SNDRV_CTL_NAME_IEC958_DEFAULT "Default"
1031#define SNDRV_CTL_NAME_IEC958_MASK "Mask"
1032#define SNDRV_CTL_NAME_IEC958_CON_MASK "Con Mask"
1033#define SNDRV_CTL_NAME_IEC958_PRO_MASK "Pro Mask"
1034#define SNDRV_CTL_NAME_IEC958_PCM_STREAM "PCM Stream"
1035#define SNDRV_CTL_NAME_IEC958(expl,direction,what) "IEC958 " expl SNDRV_CTL_NAME_##direction SNDRV_CTL_NAME_IEC958_##what
1036
1037#endif
1038