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20#include <asm/ppc_asm.h>
21#include <asm/kvm_asm.h>
22#include <asm/reg.h>
23#include <asm/page.h>
24#include <asm/asm-offsets.h>
25#include <asm/exception-64s.h>
26#include <asm/asm-compat.h>
27
28
29#ifdef PPC64_ELF_ABI_v2
30#define FUNC(name) name
31#else
32#define FUNC(name) GLUE(.,name)
33#endif
34#define GET_SHADOW_VCPU(reg) addi reg, r13, PACA_SVCPU
35
36
37#define FUNC(name) name
38#define GET_SHADOW_VCPU(reg) lwz reg, (THREAD + THREAD_KVM_SVCPU)(r2)
39
40#endif
41
42#define VCPU_LOAD_NVGPRS(vcpu) \
43 PPC_LL r14, VCPU_GPR(R14)(vcpu); \
44 PPC_LL r15, VCPU_GPR(R15)(vcpu); \
45 PPC_LL r16, VCPU_GPR(R16)(vcpu); \
46 PPC_LL r17, VCPU_GPR(R17)(vcpu); \
47 PPC_LL r18, VCPU_GPR(R18)(vcpu); \
48 PPC_LL r19, VCPU_GPR(R19)(vcpu); \
49 PPC_LL r20, VCPU_GPR(R20)(vcpu); \
50 PPC_LL r21, VCPU_GPR(R21)(vcpu); \
51 PPC_LL r22, VCPU_GPR(R22)(vcpu); \
52 PPC_LL r23, VCPU_GPR(R23)(vcpu); \
53 PPC_LL r24, VCPU_GPR(R24)(vcpu); \
54 PPC_LL r25, VCPU_GPR(R25)(vcpu); \
55 PPC_LL r26, VCPU_GPR(R26)(vcpu); \
56 PPC_LL r27, VCPU_GPR(R27)(vcpu); \
57 PPC_LL r28, VCPU_GPR(R28)(vcpu); \
58 PPC_LL r29, VCPU_GPR(R29)(vcpu); \
59 PPC_LL r30, VCPU_GPR(R30)(vcpu); \
60 PPC_LL r31, VCPU_GPR(R31)(vcpu); \
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71
72_GLOBAL(__kvmppc_vcpu_run)
73
74kvm_start_entry:
75
76 mflr r0
77 PPC_STL r0,PPC_LR_STKOFF(r1)
78
79
80 PPC_STLU r1, -SWITCH_FRAME_SIZE(r1)
81
82
83 SAVE_2GPRS(3, r1)
84
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86 SAVE_NVGPRS(r1)
87
88
89 mfcr r14
90 stw r14, _CCR(r1)
91
92
93 PPC_STL r0, _LINK(r1)
94
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96 VCPU_LOAD_NVGPRS(r4)
97
98kvm_start_lightweight:
99
100 mr r3, r4
101 bl FUNC(kvmppc_copy_to_svcpu)
102 nop
103 REST_GPR(4, r1)
104
105#ifdef CONFIG_PPC_BOOK3S_64
106
107 PPC_LL r3, VCPU_HFLAGS(r4)
108 rldicl r3, r3, 0, 63
109 stb r3, HSTATE_RESTORE_HID5(r13)
110
111
112 lwz r3, VCPU_SHAREDBE(r4)
113 cmpwi r3, 0
114 ld r5, VCPU_SHARED(r4)
115 beq sprg3_little_endian
116sprg3_big_endian:
117#ifdef __BIG_ENDIAN__
118 ld r3, VCPU_SHARED_SPRG3(r5)
119#else
120 addi r5, r5, VCPU_SHARED_SPRG3
121 ldbrx r3, 0, r5
122#endif
123 b after_sprg3_load
124sprg3_little_endian:
125#ifdef __LITTLE_ENDIAN__
126 ld r3, VCPU_SHARED_SPRG3(r5)
127#else
128 addi r5, r5, VCPU_SHARED_SPRG3
129 ldbrx r3, 0, r5
130#endif
131
132after_sprg3_load:
133 mtspr SPRN_SPRG3, r3
134#endif
135
136 PPC_LL r4, VCPU_SHADOW_MSR(r4)
137
138
139 bl FUNC(kvmppc_entry_trampoline)
140 nop
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160 PPC_LL r3, GPR4(r1)
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165
166 stw r12, VCPU_TRAP(r3)
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169
170 bl FUNC(kvmppc_copy_from_svcpu)
171 nop
172
173#ifdef CONFIG_PPC_BOOK3S_64
174
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176
177
178 ld r3, PACA_SPRG_VDSO(r13)
179 mtspr SPRN_SPRG_VDSO_WRITE, r3
180#endif
181
182
183 PPC_LL r7, GPR4(r1)
184
185 PPC_STL r14, VCPU_GPR(R14)(r7)
186 PPC_STL r15, VCPU_GPR(R15)(r7)
187 PPC_STL r16, VCPU_GPR(R16)(r7)
188 PPC_STL r17, VCPU_GPR(R17)(r7)
189 PPC_STL r18, VCPU_GPR(R18)(r7)
190 PPC_STL r19, VCPU_GPR(R19)(r7)
191 PPC_STL r20, VCPU_GPR(R20)(r7)
192 PPC_STL r21, VCPU_GPR(R21)(r7)
193 PPC_STL r22, VCPU_GPR(R22)(r7)
194 PPC_STL r23, VCPU_GPR(R23)(r7)
195 PPC_STL r24, VCPU_GPR(R24)(r7)
196 PPC_STL r25, VCPU_GPR(R25)(r7)
197 PPC_STL r26, VCPU_GPR(R26)(r7)
198 PPC_STL r27, VCPU_GPR(R27)(r7)
199 PPC_STL r28, VCPU_GPR(R28)(r7)
200 PPC_STL r29, VCPU_GPR(R29)(r7)
201 PPC_STL r30, VCPU_GPR(R30)(r7)
202 PPC_STL r31, VCPU_GPR(R31)(r7)
203
204
205 lwz r5, VCPU_TRAP(r7)
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208 REST_2GPRS(3, r1)
209 bl FUNC(kvmppc_handle_exit_pr)
210
211
212 cmpwi r3, RESUME_GUEST
213 beq kvm_loop_lightweight
214
215 cmpwi r3, RESUME_GUEST_NV
216 beq kvm_loop_heavyweight
217
218kvm_exit_loop:
219
220 PPC_LL r4, _LINK(r1)
221 mtlr r4
222
223 lwz r14, _CCR(r1)
224 mtcr r14
225
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227 REST_NVGPRS(r1)
228
229 addi r1, r1, SWITCH_FRAME_SIZE
230 blr
231
232kvm_loop_heavyweight:
233
234 PPC_LL r4, _LINK(r1)
235 PPC_STL r4, (PPC_LR_STKOFF + SWITCH_FRAME_SIZE)(r1)
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238 REST_2GPRS(3, r1)
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241 VCPU_LOAD_NVGPRS(r4)
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244 b kvm_start_lightweight
245
246kvm_loop_lightweight:
247
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249 REST_GPR(4, r1)
250
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252 b kvm_start_lightweight
253