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11#include <linux/irq.h>
12#include <linux/io.h>
13#include <linux/irq.h>
14#include <linux/export.h>
15#include <linux/err.h>
16#include <mach/sysasic.h>
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46#define ESR_BASE 0x005f6900
47#define EMR_BASE 0x005f6910
48
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52
53#define LEVEL(event) (((event) - HW_EVENT_IRQ_BASE) / 32)
54
55
56#define EVENT_BIT(event) (((event) - HW_EVENT_IRQ_BASE) & 31)
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63
64static inline void disable_systemasic_irq(struct irq_data *data)
65{
66 unsigned int irq = data->irq;
67 __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2);
68 __u32 mask;
69
70 mask = inl(emr);
71 mask &= ~(1 << EVENT_BIT(irq));
72 outl(mask, emr);
73}
74
75
76static inline void enable_systemasic_irq(struct irq_data *data)
77{
78 unsigned int irq = data->irq;
79 __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2);
80 __u32 mask;
81
82 mask = inl(emr);
83 mask |= (1 << EVENT_BIT(irq));
84 outl(mask, emr);
85}
86
87
88static void mask_ack_systemasic_irq(struct irq_data *data)
89{
90 unsigned int irq = data->irq;
91 __u32 esr = ESR_BASE + (LEVEL(irq) << 2);
92 disable_systemasic_irq(data);
93 outl((1 << EVENT_BIT(irq)), esr);
94}
95
96struct irq_chip systemasic_int = {
97 .name = "System ASIC",
98 .irq_mask = disable_systemasic_irq,
99 .irq_mask_ack = mask_ack_systemasic_irq,
100 .irq_unmask = enable_systemasic_irq,
101};
102
103
104
105
106int systemasic_irq_demux(int irq)
107{
108 __u32 emr, esr, status, level;
109 __u32 j, bit;
110
111 switch (irq) {
112 case 13:
113 level = 0;
114 break;
115 case 11:
116 level = 1;
117 break;
118 case 9:
119 level = 2;
120 break;
121 default:
122 return irq;
123 }
124 emr = EMR_BASE + (level << 4) + (level << 2);
125 esr = ESR_BASE + (level << 2);
126
127
128 status = inl(esr);
129 status &= inl(emr);
130
131
132 for (bit = 1, j = 0; j < 32; bit <<= 1, j++) {
133 if (status & bit) {
134 irq = HW_EVENT_IRQ_BASE + j + (level << 5);
135 return irq;
136 }
137 }
138
139
140 return irq;
141}
142
143void systemasic_irq_init(void)
144{
145 int irq_base, i;
146
147 irq_base = irq_alloc_descs(HW_EVENT_IRQ_BASE, HW_EVENT_IRQ_BASE,
148 HW_EVENT_IRQ_MAX - HW_EVENT_IRQ_BASE, -1);
149 if (IS_ERR_VALUE(irq_base)) {
150 pr_err("%s: failed hooking irqs\n", __func__);
151 return;
152 }
153
154 for (i = HW_EVENT_IRQ_BASE; i < HW_EVENT_IRQ_MAX; i++)
155 irq_set_chip_and_handler(i, &systemasic_int, handle_level_irq);
156}
157