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8
9#include <acpi/acpi.h>
10#include "accommon.h"
11#include "acevents.h"
12
13#define _COMPONENT ACPI_HARDWARE
14ACPI_MODULE_NAME("hwregs")
15
16#if (!ACPI_REDUCED_HARDWARE)
17
18static u8
19acpi_hw_get_access_bit_width(u64 address,
20 struct acpi_generic_address *reg,
21 u8 max_bit_width);
22
23static acpi_status
24acpi_hw_read_multiple(u32 *value,
25 struct acpi_generic_address *register_a,
26 struct acpi_generic_address *register_b);
27
28static acpi_status
29acpi_hw_write_multiple(u32 value,
30 struct acpi_generic_address *register_a,
31 struct acpi_generic_address *register_b);
32
33#endif
34
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48
49static u8
50acpi_hw_get_access_bit_width(u64 address,
51 struct acpi_generic_address *reg, u8 max_bit_width)
52{
53 u8 access_bit_width;
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67
68
69 if (!reg->bit_offset && reg->bit_width &&
70 ACPI_IS_POWER_OF_TWO(reg->bit_width) &&
71 ACPI_IS_ALIGNED(reg->bit_width, 8)) {
72 access_bit_width = reg->bit_width;
73 } else if (reg->access_width) {
74 access_bit_width = ACPI_ACCESS_BIT_WIDTH(reg->access_width);
75 } else {
76 access_bit_width =
77 ACPI_ROUND_UP_POWER_OF_TWO_8(reg->bit_offset +
78 reg->bit_width);
79 if (access_bit_width <= 8) {
80 access_bit_width = 8;
81 } else {
82 while (!ACPI_IS_ALIGNED(address, access_bit_width >> 3)) {
83 access_bit_width >>= 1;
84 }
85 }
86 }
87
88
89
90 if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_IO) {
91 max_bit_width = 32;
92 }
93
94
95
96
97
98
99 if (access_bit_width < max_bit_width) {
100 return (access_bit_width);
101 }
102 return (max_bit_width);
103}
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120
121acpi_status
122acpi_hw_validate_register(struct acpi_generic_address *reg,
123 u8 max_bit_width, u64 *address)
124{
125 u8 bit_width;
126 u8 access_width;
127
128
129
130 if (!reg) {
131 return (AE_BAD_PARAMETER);
132 }
133
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135
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137
138
139 ACPI_MOVE_64_TO_64(address, ®->address);
140 if (!(*address)) {
141 return (AE_BAD_ADDRESS);
142 }
143
144
145
146 if ((reg->space_id != ACPI_ADR_SPACE_SYSTEM_MEMORY) &&
147 (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO)) {
148 ACPI_ERROR((AE_INFO,
149 "Unsupported address space: 0x%X", reg->space_id));
150 return (AE_SUPPORT);
151 }
152
153
154
155 if (reg->access_width > 4) {
156 ACPI_ERROR((AE_INFO,
157 "Unsupported register access width: 0x%X",
158 reg->access_width));
159 return (AE_SUPPORT);
160 }
161
162
163
164 access_width =
165 acpi_hw_get_access_bit_width(*address, reg, max_bit_width);
166 bit_width =
167 ACPI_ROUND_UP(reg->bit_offset + reg->bit_width, access_width);
168 if (max_bit_width < bit_width) {
169 ACPI_WARNING((AE_INFO,
170 "Requested bit width 0x%X is smaller than register bit width 0x%X",
171 max_bit_width, bit_width));
172 return (AE_SUPPORT);
173 }
174
175 return (AE_OK);
176}
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194
195acpi_status acpi_hw_read(u64 *value, struct acpi_generic_address *reg)
196{
197 u64 address;
198 u8 access_width;
199 u32 bit_width;
200 u8 bit_offset;
201 u64 value64;
202 u32 value32;
203 u8 index;
204 acpi_status status;
205
206 ACPI_FUNCTION_NAME(hw_read);
207
208
209
210 status = acpi_hw_validate_register(reg, 64, &address);
211 if (ACPI_FAILURE(status)) {
212 return (status);
213 }
214
215
216
217
218
219 *value = 0;
220 access_width = acpi_hw_get_access_bit_width(address, reg, 64);
221 bit_width = reg->bit_offset + reg->bit_width;
222 bit_offset = reg->bit_offset;
223
224
225
226
227
228 index = 0;
229 while (bit_width) {
230 if (bit_offset >= access_width) {
231 value64 = 0;
232 bit_offset -= access_width;
233 } else {
234 if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
235 status =
236 acpi_os_read_memory((acpi_physical_address)
237 address +
238 index *
239 ACPI_DIV_8
240 (access_width),
241 &value64, access_width);
242 } else {
243
244 status = acpi_hw_read_port((acpi_io_address)
245 address +
246 index *
247 ACPI_DIV_8
248 (access_width),
249 &value32,
250 access_width);
251 value64 = (u64)value32;
252 }
253 }
254
255
256
257
258
259 ACPI_SET_BITS(value, index * access_width,
260 ACPI_MASK_BITS_ABOVE_64(access_width), value64);
261
262 bit_width -=
263 bit_width > access_width ? access_width : bit_width;
264 index++;
265 }
266
267 ACPI_DEBUG_PRINT((ACPI_DB_IO,
268 "Read: %8.8X%8.8X width %2d from %8.8X%8.8X (%s)\n",
269 ACPI_FORMAT_UINT64(*value), access_width,
270 ACPI_FORMAT_UINT64(address),
271 acpi_ut_get_region_name(reg->space_id)));
272
273 return (status);
274}
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289
290acpi_status acpi_hw_write(u64 value, struct acpi_generic_address *reg)
291{
292 u64 address;
293 u8 access_width;
294 u32 bit_width;
295 u8 bit_offset;
296 u64 value64;
297 u8 index;
298 acpi_status status;
299
300 ACPI_FUNCTION_NAME(hw_write);
301
302
303
304 status = acpi_hw_validate_register(reg, 64, &address);
305 if (ACPI_FAILURE(status)) {
306 return (status);
307 }
308
309
310
311 access_width = acpi_hw_get_access_bit_width(address, reg, 64);
312 bit_width = reg->bit_offset + reg->bit_width;
313 bit_offset = reg->bit_offset;
314
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318
319 index = 0;
320 while (bit_width) {
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322
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324
325 value64 = ACPI_GET_BITS(&value, index * access_width,
326 ACPI_MASK_BITS_ABOVE_64(access_width));
327
328 if (bit_offset >= access_width) {
329 bit_offset -= access_width;
330 } else {
331 if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
332 status =
333 acpi_os_write_memory((acpi_physical_address)
334 address +
335 index *
336 ACPI_DIV_8
337 (access_width),
338 value64, access_width);
339 } else {
340
341 status = acpi_hw_write_port((acpi_io_address)
342 address +
343 index *
344 ACPI_DIV_8
345 (access_width),
346 (u32)value64,
347 access_width);
348 }
349 }
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351
352
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354
355 bit_width -=
356 bit_width > access_width ? access_width : bit_width;
357 index++;
358 }
359
360 ACPI_DEBUG_PRINT((ACPI_DB_IO,
361 "Wrote: %8.8X%8.8X width %2d to %8.8X%8.8X (%s)\n",
362 ACPI_FORMAT_UINT64(value), access_width,
363 ACPI_FORMAT_UINT64(address),
364 acpi_ut_get_region_name(reg->space_id)));
365
366 return (status);
367}
368
369#if (!ACPI_REDUCED_HARDWARE)
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382acpi_status acpi_hw_clear_acpi_status(void)
383{
384 acpi_status status;
385 acpi_cpu_flags lock_flags = 0;
386
387 ACPI_FUNCTION_TRACE(hw_clear_acpi_status);
388
389 ACPI_DEBUG_PRINT((ACPI_DB_IO, "About to write %04X to %8.8X%8.8X\n",
390 ACPI_BITMASK_ALL_FIXED_STATUS,
391 ACPI_FORMAT_UINT64(acpi_gbl_xpm1a_status.address)));
392
393 lock_flags = acpi_os_acquire_raw_lock(acpi_gbl_hardware_lock);
394
395
396
397 status = acpi_hw_register_write(ACPI_REGISTER_PM1_STATUS,
398 ACPI_BITMASK_ALL_FIXED_STATUS);
399
400 acpi_os_release_raw_lock(acpi_gbl_hardware_lock, lock_flags);
401
402 if (ACPI_FAILURE(status)) {
403 goto exit;
404 }
405
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408 status = acpi_ev_walk_gpe_list(acpi_hw_clear_gpe_block, NULL);
409
410exit:
411 return_ACPI_STATUS(status);
412}
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425
426struct acpi_bit_register_info *acpi_hw_get_bit_register_info(u32 register_id)
427{
428 ACPI_FUNCTION_ENTRY();
429
430 if (register_id > ACPI_BITREG_MAX) {
431 ACPI_ERROR((AE_INFO, "Invalid BitRegister ID: 0x%X",
432 register_id));
433 return (NULL);
434 }
435
436 return (&acpi_gbl_bit_register_info[register_id]);
437}
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456acpi_status acpi_hw_write_pm1_control(u32 pm1a_control, u32 pm1b_control)
457{
458 acpi_status status;
459
460 ACPI_FUNCTION_TRACE(hw_write_pm1_control);
461
462 status =
463 acpi_hw_write(pm1a_control, &acpi_gbl_FADT.xpm1a_control_block);
464 if (ACPI_FAILURE(status)) {
465 return_ACPI_STATUS(status);
466 }
467
468 if (acpi_gbl_FADT.xpm1b_control_block.address) {
469 status =
470 acpi_hw_write(pm1b_control,
471 &acpi_gbl_FADT.xpm1b_control_block);
472 }
473 return_ACPI_STATUS(status);
474}
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487
488acpi_status acpi_hw_register_read(u32 register_id, u32 *return_value)
489{
490 u32 value = 0;
491 u64 value64;
492 acpi_status status;
493
494 ACPI_FUNCTION_TRACE(hw_register_read);
495
496 switch (register_id) {
497 case ACPI_REGISTER_PM1_STATUS:
498
499 status = acpi_hw_read_multiple(&value,
500 &acpi_gbl_xpm1a_status,
501 &acpi_gbl_xpm1b_status);
502 break;
503
504 case ACPI_REGISTER_PM1_ENABLE:
505
506 status = acpi_hw_read_multiple(&value,
507 &acpi_gbl_xpm1a_enable,
508 &acpi_gbl_xpm1b_enable);
509 break;
510
511 case ACPI_REGISTER_PM1_CONTROL:
512
513 status = acpi_hw_read_multiple(&value,
514 &acpi_gbl_FADT.
515 xpm1a_control_block,
516 &acpi_gbl_FADT.
517 xpm1b_control_block);
518
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523
524 value &= ~ACPI_PM1_CONTROL_WRITEONLY_BITS;
525 break;
526
527 case ACPI_REGISTER_PM2_CONTROL:
528
529 status =
530 acpi_hw_read(&value64, &acpi_gbl_FADT.xpm2_control_block);
531 if (ACPI_SUCCESS(status)) {
532 value = (u32)value64;
533 }
534 break;
535
536 case ACPI_REGISTER_PM_TIMER:
537
538 status = acpi_hw_read(&value64, &acpi_gbl_FADT.xpm_timer_block);
539 if (ACPI_SUCCESS(status)) {
540 value = (u32)value64;
541 }
542
543 break;
544
545 case ACPI_REGISTER_SMI_COMMAND_BLOCK:
546
547 status =
548 acpi_hw_read_port(acpi_gbl_FADT.smi_command, &value, 8);
549 break;
550
551 default:
552
553 ACPI_ERROR((AE_INFO, "Unknown Register ID: 0x%X", register_id));
554 status = AE_BAD_PARAMETER;
555 break;
556 }
557
558 if (ACPI_SUCCESS(status)) {
559 *return_value = (u32)value;
560 }
561
562 return_ACPI_STATUS(status);
563}
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591acpi_status acpi_hw_register_write(u32 register_id, u32 value)
592{
593 acpi_status status;
594 u32 read_value;
595 u64 read_value64;
596
597 ACPI_FUNCTION_TRACE(hw_register_write);
598
599 switch (register_id) {
600 case ACPI_REGISTER_PM1_STATUS:
601
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610
611 value &= ~ACPI_PM1_STATUS_PRESERVED_BITS;
612
613 status = acpi_hw_write_multiple(value,
614 &acpi_gbl_xpm1a_status,
615 &acpi_gbl_xpm1b_status);
616 break;
617
618 case ACPI_REGISTER_PM1_ENABLE:
619
620 status = acpi_hw_write_multiple(value,
621 &acpi_gbl_xpm1a_enable,
622 &acpi_gbl_xpm1b_enable);
623 break;
624
625 case ACPI_REGISTER_PM1_CONTROL:
626
627
628
629
630 status = acpi_hw_read_multiple(&read_value,
631 &acpi_gbl_FADT.
632 xpm1a_control_block,
633 &acpi_gbl_FADT.
634 xpm1b_control_block);
635 if (ACPI_FAILURE(status)) {
636 goto exit;
637 }
638
639
640
641 ACPI_INSERT_BITS(value, ACPI_PM1_CONTROL_PRESERVED_BITS,
642 read_value);
643
644
645
646 status = acpi_hw_write_multiple(value,
647 &acpi_gbl_FADT.
648 xpm1a_control_block,
649 &acpi_gbl_FADT.
650 xpm1b_control_block);
651 break;
652
653 case ACPI_REGISTER_PM2_CONTROL:
654
655
656
657
658 status =
659 acpi_hw_read(&read_value64,
660 &acpi_gbl_FADT.xpm2_control_block);
661 if (ACPI_FAILURE(status)) {
662 goto exit;
663 }
664 read_value = (u32)read_value64;
665
666
667
668 ACPI_INSERT_BITS(value, ACPI_PM2_CONTROL_PRESERVED_BITS,
669 read_value);
670
671 status =
672 acpi_hw_write(value, &acpi_gbl_FADT.xpm2_control_block);
673 break;
674
675 case ACPI_REGISTER_PM_TIMER:
676
677 status = acpi_hw_write(value, &acpi_gbl_FADT.xpm_timer_block);
678 break;
679
680 case ACPI_REGISTER_SMI_COMMAND_BLOCK:
681
682
683
684 status =
685 acpi_hw_write_port(acpi_gbl_FADT.smi_command, value, 8);
686 break;
687
688 default:
689
690 ACPI_ERROR((AE_INFO, "Unknown Register ID: 0x%X", register_id));
691 status = AE_BAD_PARAMETER;
692 break;
693 }
694
695exit:
696 return_ACPI_STATUS(status);
697}
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712
713static acpi_status
714acpi_hw_read_multiple(u32 *value,
715 struct acpi_generic_address *register_a,
716 struct acpi_generic_address *register_b)
717{
718 u32 value_a = 0;
719 u32 value_b = 0;
720 u64 value64;
721 acpi_status status;
722
723
724
725 status = acpi_hw_read(&value64, register_a);
726 if (ACPI_FAILURE(status)) {
727 return (status);
728 }
729 value_a = (u32)value64;
730
731
732
733 if (register_b->address) {
734 status = acpi_hw_read(&value64, register_b);
735 if (ACPI_FAILURE(status)) {
736 return (status);
737 }
738 value_b = (u32)value64;
739 }
740
741
742
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745
746
747
748
749
750
751 *value = (value_a | value_b);
752 return (AE_OK);
753}
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768
769static acpi_status
770acpi_hw_write_multiple(u32 value,
771 struct acpi_generic_address *register_a,
772 struct acpi_generic_address *register_b)
773{
774 acpi_status status;
775
776
777
778 status = acpi_hw_write(value, register_a);
779 if (ACPI_FAILURE(status)) {
780 return (status);
781 }
782
783
784
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786
787
788
789
790
791
792
793
794
795 if (register_b->address) {
796 status = acpi_hw_write(value, register_b);
797 }
798
799 return (status);
800}
801
802#endif
803