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6#ifndef __STRATIX10_CLK_H
7#define __STRATIX10_CLK_H
8
9struct stratix10_clock_data {
10 struct clk_onecell_data clk_data;
11 void __iomem *base;
12};
13
14struct stratix10_pll_clock {
15 unsigned int id;
16 const char *name;
17 const char *const *parent_names;
18 u8 num_parents;
19 unsigned long flags;
20 unsigned long offset;
21};
22
23struct stratix10_perip_c_clock {
24 unsigned int id;
25 const char *name;
26 const char *parent_name;
27 const char *const *parent_names;
28 u8 num_parents;
29 unsigned long flags;
30 unsigned long offset;
31};
32
33struct stratix10_perip_cnt_clock {
34 unsigned int id;
35 const char *name;
36 const char *parent_name;
37 const char *const *parent_names;
38 u8 num_parents;
39 unsigned long flags;
40 unsigned long offset;
41 u8 fixed_divider;
42 unsigned long bypass_reg;
43 unsigned long bypass_shift;
44};
45
46struct stratix10_gate_clock {
47 unsigned int id;
48 const char *name;
49 const char *parent_name;
50 const char *const *parent_names;
51 u8 num_parents;
52 unsigned long flags;
53 unsigned long gate_reg;
54 u8 gate_idx;
55 unsigned long div_reg;
56 u8 div_offset;
57 u8 div_width;
58 unsigned long bypass_reg;
59 u8 bypass_shift;
60 u8 fixed_div;
61};
62
63struct clk *s10_register_pll(const char *, const char *const *, u8,
64 unsigned long, void __iomem *, unsigned long);
65
66struct clk *s10_register_periph(const char *, const char *,
67 const char * const *, u8, unsigned long,
68 void __iomem *, unsigned long);
69struct clk *s10_register_cnt_periph(const char *, const char *,
70 const char * const *, u8,
71 unsigned long, void __iomem *,
72 unsigned long, u8, unsigned long,
73 unsigned long);
74struct clk *s10_register_gate(const char *, const char *,
75 const char * const *, u8,
76 unsigned long, void __iomem *,
77 unsigned long, unsigned long,
78 unsigned long, unsigned long, u8,
79 unsigned long, u8, u8);
80#endif
81
