LXR linux/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gm200.c

   1/*
   2 * Copyright 2017 Red Hat Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 */
  22#include "mem.h"
  23#include "vmm.h"
  24
  25#include <subdev/fb.h>
  26
  27#include <nvif/class.h>
  28
  29const u8 *
  30gm200_mmu_kind(struct nvkm_mmu *mmu, int *count)
  31{
  32        static const u8
  33        kind[256] = {
  34                0x00, 0x01, 0x01, 0x01, 0x01, 0x01, 0xff, 0x01, /* 0x00 */
  35                0x01, 0x01, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff,
  36                0xff, 0x11, 0xff, 0xff, 0xff, 0xff, 0xff, 0x11, /* 0x10 */
  37                0x11, 0x11, 0x11, 0xff, 0xff, 0xff, 0xff, 0xff,
  38                0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x26, 0x27, /* 0x20 */
  39                0x28, 0x29, 0x2a, 0x2b, 0xff, 0xff, 0xff, 0xff,
  40                0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 0x30 */
  41                0xff, 0xff, 0x26, 0x27, 0x28, 0x29, 0x26, 0x27,
  42                0x28, 0x29, 0xff, 0xff, 0xff, 0xff, 0x46, 0xff, /* 0x40 */
  43                0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  44                0xff, 0x46, 0x46, 0x46, 0x46, 0xff, 0xff, 0xff, /* 0x50 */
  45                0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  46                0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 0x60 */
  47                0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  48                0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 0x70 */
  49                0xff, 0xff, 0xff, 0x7b, 0xff, 0xff, 0xff, 0xff,
  50                0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7b, 0x7b, /* 0x80 */
  51                0x7b, 0x7b, 0xff, 0x8b, 0x8c, 0x8d, 0x8e, 0xff,
  52                0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 0x90 */
  53                0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  54                0xff, 0xff, 0xff, 0x8b, 0x8c, 0x8d, 0x8e, 0xa7, /* 0xa0 */
  55                0xa8, 0xa9, 0xaa, 0xff, 0xff, 0xff, 0xff, 0xff,
  56                0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 0xb0 */
  57                0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xa7,
  58                0xa8, 0xa9, 0xaa, 0xc3, 0xff, 0xff, 0xff, 0xff, /* 0xc0 */
  59                0xff, 0xff, 0xff, 0xff, 0xfe, 0xfe, 0xc3, 0xc3,
  60                0xc3, 0xc3, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 0xd0 */
  61                0xfe, 0xff, 0xff, 0xfe, 0xff, 0xfe, 0xff, 0xfe,
  62                0xfe, 0xff, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xff, /* 0xe0 */
  63                0xff, 0xfe, 0xff, 0xfe, 0xff, 0xfe, 0xfe, 0xff,
  64                0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, /* 0xf0 */
  65                0xfe, 0xfe, 0xfe, 0xfe, 0xff, 0xfd, 0xfe, 0xff
  66        };
  67        *count = ARRAY_SIZE(kind);
  68        return kind;
  69}
  70
  71static const struct nvkm_mmu_func
  72gm200_mmu = {
  73        .dma_bits = 40,
  74        .mmu = {{ -1, -1, NVIF_CLASS_MMU_GF100}},
  75        .mem = {{ -1,  0, NVIF_CLASS_MEM_GF100}, gf100_mem_new, gf100_mem_map },
  76        .vmm = {{ -1,  0, NVIF_CLASS_VMM_GM200}, gm200_vmm_new },
  77        .kind = gm200_mmu_kind,
  78        .kind_sys = true,
  79};
  80
  81static const struct nvkm_mmu_func
  82gm200_mmu_fixed = {
  83        .dma_bits = 40,
  84        .mmu = {{ -1, -1, NVIF_CLASS_MMU_GF100}},
  85        .mem = {{ -1,  0, NVIF_CLASS_MEM_GF100}, gf100_mem_new, gf100_mem_map },
  86        .vmm = {{ -1, -1, NVIF_CLASS_VMM_GM200}, gm200_vmm_new_fixed },
  87        .kind = gm200_mmu_kind,
  88        .kind_sys = true,
  89};
  90
  91int
  92gm200_mmu_new(struct nvkm_device *device, int index, struct nvkm_mmu **pmmu)
  93{
  94        if (device->fb->page)
  95                return nvkm_mmu_new_(&gm200_mmu_fixed, device, index, pmmu);
  96        return nvkm_mmu_new_(&gm200_mmu, device, index, pmmu);
  97}
  98