linux/drivers/net/ethernet/intel/igbvf/mbx.h
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   1/* SPDX-License-Identifier: GPL-2.0 */
   2/* Copyright(c) 1999 - 2018 Intel Corporation. */
   3
   4#ifndef _E1000_MBX_H_
   5#define _E1000_MBX_H_
   6
   7#include "vf.h"
   8
   9#define E1000_V2PMAILBOX_REQ    0x00000001 /* Request for PF Ready bit */
  10#define E1000_V2PMAILBOX_ACK    0x00000002 /* Ack PF message received */
  11#define E1000_V2PMAILBOX_VFU    0x00000004 /* VF owns the mailbox buffer */
  12#define E1000_V2PMAILBOX_PFU    0x00000008 /* PF owns the mailbox buffer */
  13#define E1000_V2PMAILBOX_PFSTS  0x00000010 /* PF wrote a message in the MB */
  14#define E1000_V2PMAILBOX_PFACK  0x00000020 /* PF ack the previous VF msg */
  15#define E1000_V2PMAILBOX_RSTI   0x00000040 /* PF has reset indication */
  16#define E1000_V2PMAILBOX_RSTD   0x00000080 /* PF has indicated reset done */
  17#define E1000_V2PMAILBOX_R2C_BITS 0x000000B0 /* All read to clear bits */
  18
  19#define E1000_VFMAILBOX_SIZE    16 /* 16 32 bit words - 64 bytes */
  20
  21/* If it's a E1000_VF_* msg then it originates in the VF and is sent to the
  22 * PF.  The reverse is true if it is E1000_PF_*.
  23 * Message ACK's are the value or'd with 0xF0000000
  24 */
  25/* Messages below or'd with this are the ACK */
  26#define E1000_VT_MSGTYPE_ACK    0x80000000
  27/* Messages below or'd with this are the NACK */
  28#define E1000_VT_MSGTYPE_NACK   0x40000000
  29/* Indicates that VF is still clear to send requests */
  30#define E1000_VT_MSGTYPE_CTS    0x20000000
  31
  32/* We have a total wait time of 1s for vf mailbox posted messages */
  33#define E1000_VF_MBX_INIT_TIMEOUT       2000 /* retry count for mbx timeout */
  34#define E1000_VF_MBX_INIT_DELAY         500  /* usec delay between retries */
  35
  36#define E1000_VT_MSGINFO_SHIFT  16
  37/* bits 23:16 are used for exra info for certain messages */
  38#define E1000_VT_MSGINFO_MASK   (0xFF << E1000_VT_MSGINFO_SHIFT)
  39
  40#define E1000_VF_RESET          0x01 /* VF requests reset */
  41#define E1000_VF_SET_MAC_ADDR   0x02 /* VF requests PF to set MAC addr */
  42/* VF requests PF to clear all unicast MAC filters */
  43#define E1000_VF_MAC_FILTER_CLR (0x01 << E1000_VT_MSGINFO_SHIFT)
  44/* VF requests PF to add unicast MAC filter */
  45#define E1000_VF_MAC_FILTER_ADD (0x02 << E1000_VT_MSGINFO_SHIFT)
  46#define E1000_VF_SET_MULTICAST  0x03 /* VF requests PF to set MC addr */
  47#define E1000_VF_SET_VLAN       0x04 /* VF requests PF to set VLAN */
  48#define E1000_VF_SET_LPE        0x05 /* VF requests PF to set VMOLR.LPE */
  49
  50#define E1000_PF_CONTROL_MSG    0x0100 /* PF control message */
  51
  52void e1000_init_mbx_ops_generic(struct e1000_hw *hw);
  53s32 e1000_init_mbx_params_vf(struct e1000_hw *);
  54
  55#endif /* _E1000_MBX_H_ */
  56