linux/drivers/pinctrl/nomadik/pinctrl-abx500.c
<<
>>
Prefs
   1/*
   2 * Copyright (C) ST-Ericsson SA 2013
   3 *
   4 * Author: Patrice Chotard <patrice.chotard@st.com>
   5 * License terms: GNU General Public License (GPL) version 2
   6 *
   7 * Driver allows to use AxB5xx unused pins to be used as GPIO
   8 *
   9 * This program is free software; you can redistribute it and/or modify
  10 * it under the terms of the GNU General Public License version 2 as
  11 * published by the Free Software Foundation.
  12 */
  13#include <linux/kernel.h>
  14#include <linux/types.h>
  15#include <linux/slab.h>
  16#include <linux/init.h>
  17#include <linux/err.h>
  18#include <linux/of.h>
  19#include <linux/of_device.h>
  20#include <linux/platform_device.h>
  21#include <linux/gpio.h>
  22#include <linux/irq.h>
  23#include <linux/irqdomain.h>
  24#include <linux/interrupt.h>
  25#include <linux/bitops.h>
  26#include <linux/mfd/abx500.h>
  27#include <linux/mfd/abx500/ab8500.h>
  28#include <linux/pinctrl/pinctrl.h>
  29#include <linux/pinctrl/consumer.h>
  30#include <linux/pinctrl/pinmux.h>
  31#include <linux/pinctrl/pinconf.h>
  32#include <linux/pinctrl/pinconf-generic.h>
  33#include <linux/pinctrl/machine.h>
  34
  35#include "pinctrl-abx500.h"
  36#include "../core.h"
  37#include "../pinconf.h"
  38#include "../pinctrl-utils.h"
  39
  40/*
  41 * GPIO registers offset
  42 * Bank: 0x10
  43 */
  44#define AB8500_GPIO_SEL1_REG    0x00
  45#define AB8500_GPIO_SEL2_REG    0x01
  46#define AB8500_GPIO_SEL3_REG    0x02
  47#define AB8500_GPIO_SEL4_REG    0x03
  48#define AB8500_GPIO_SEL5_REG    0x04
  49#define AB8500_GPIO_SEL6_REG    0x05
  50
  51#define AB8500_GPIO_DIR1_REG    0x10
  52#define AB8500_GPIO_DIR2_REG    0x11
  53#define AB8500_GPIO_DIR3_REG    0x12
  54#define AB8500_GPIO_DIR4_REG    0x13
  55#define AB8500_GPIO_DIR5_REG    0x14
  56#define AB8500_GPIO_DIR6_REG    0x15
  57
  58#define AB8500_GPIO_OUT1_REG    0x20
  59#define AB8500_GPIO_OUT2_REG    0x21
  60#define AB8500_GPIO_OUT3_REG    0x22
  61#define AB8500_GPIO_OUT4_REG    0x23
  62#define AB8500_GPIO_OUT5_REG    0x24
  63#define AB8500_GPIO_OUT6_REG    0x25
  64
  65#define AB8500_GPIO_PUD1_REG    0x30
  66#define AB8500_GPIO_PUD2_REG    0x31
  67#define AB8500_GPIO_PUD3_REG    0x32
  68#define AB8500_GPIO_PUD4_REG    0x33
  69#define AB8500_GPIO_PUD5_REG    0x34
  70#define AB8500_GPIO_PUD6_REG    0x35
  71
  72#define AB8500_GPIO_IN1_REG     0x40
  73#define AB8500_GPIO_IN2_REG     0x41
  74#define AB8500_GPIO_IN3_REG     0x42
  75#define AB8500_GPIO_IN4_REG     0x43
  76#define AB8500_GPIO_IN5_REG     0x44
  77#define AB8500_GPIO_IN6_REG     0x45
  78#define AB8500_GPIO_ALTFUN_REG  0x50
  79
  80#define ABX500_GPIO_INPUT       0
  81#define ABX500_GPIO_OUTPUT      1
  82
  83struct abx500_pinctrl {
  84        struct device *dev;
  85        struct pinctrl_dev *pctldev;
  86        struct abx500_pinctrl_soc_data *soc;
  87        struct gpio_chip chip;
  88        struct ab8500 *parent;
  89        struct abx500_gpio_irq_cluster *irq_cluster;
  90        int irq_cluster_size;
  91};
  92
  93static int abx500_gpio_get_bit(struct gpio_chip *chip, u8 reg,
  94                               unsigned offset, bool *bit)
  95{
  96        struct abx500_pinctrl *pct = gpiochip_get_data(chip);
  97        u8 pos = offset % 8;
  98        u8 val;
  99        int ret;
 100
 101        reg += offset / 8;
 102        ret = abx500_get_register_interruptible(pct->dev,
 103                                                AB8500_MISC, reg, &val);
 104        if (ret < 0) {
 105                dev_err(pct->dev,
 106                        "%s read reg =%x, offset=%x failed (%d)\n",
 107                        __func__, reg, offset, ret);
 108                return ret;
 109        }
 110
 111        *bit = !!(val & BIT(pos));
 112
 113        return 0;
 114}
 115
 116static int abx500_gpio_set_bits(struct gpio_chip *chip, u8 reg,
 117                                unsigned offset, int val)
 118{
 119        struct abx500_pinctrl *pct = gpiochip_get_data(chip);
 120        u8 pos = offset % 8;
 121        int ret;
 122
 123        reg += offset / 8;
 124        ret = abx500_mask_and_set_register_interruptible(pct->dev,
 125                                AB8500_MISC, reg, BIT(pos), val << pos);
 126        if (ret < 0)
 127                dev_err(pct->dev, "%s write reg, %x offset %x failed (%d)\n",
 128                                __func__, reg, offset, ret);
 129
 130        return ret;
 131}
 132
 133/**
 134 * abx500_gpio_get() - Get the particular GPIO value
 135 * @chip:       Gpio device
 136 * @offset:     GPIO number to read
 137 */
 138static int abx500_gpio_get(struct gpio_chip *chip, unsigned offset)
 139{
 140        struct abx500_pinctrl *pct = gpiochip_get_data(chip);
 141        bool bit;
 142        bool is_out;
 143        u8 gpio_offset = offset - 1;
 144        int ret;
 145
 146        ret = abx500_gpio_get_bit(chip, AB8500_GPIO_DIR1_REG,
 147                        gpio_offset, &is_out);
 148        if (ret < 0)
 149                goto out;
 150
 151        if (is_out)
 152                ret = abx500_gpio_get_bit(chip, AB8500_GPIO_OUT1_REG,
 153                                gpio_offset, &bit);
 154        else
 155                ret = abx500_gpio_get_bit(chip, AB8500_GPIO_IN1_REG,
 156                                gpio_offset, &bit);
 157out:
 158        if (ret < 0) {
 159                dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 160                return ret;
 161        }
 162
 163        return bit;
 164}
 165
 166static void abx500_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
 167{
 168        struct abx500_pinctrl *pct = gpiochip_get_data(chip);
 169        int ret;
 170
 171        ret = abx500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val);
 172        if (ret < 0)
 173                dev_err(pct->dev, "%s write failed (%d)\n", __func__, ret);
 174}
 175
 176static int abx500_gpio_direction_output(struct gpio_chip *chip,
 177                                        unsigned offset,
 178                                        int val)
 179{
 180        struct abx500_pinctrl *pct = gpiochip_get_data(chip);
 181        int ret;
 182
 183        /* set direction as output */
 184        ret = abx500_gpio_set_bits(chip,
 185                                AB8500_GPIO_DIR1_REG,
 186                                offset,
 187                                ABX500_GPIO_OUTPUT);
 188        if (ret < 0)
 189                goto out;
 190
 191        /* disable pull down */
 192        ret = abx500_gpio_set_bits(chip,
 193                                AB8500_GPIO_PUD1_REG,
 194                                offset,
 195                                ABX500_GPIO_PULL_NONE);
 196
 197out:
 198        if (ret < 0) {
 199                dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 200                return ret;
 201        }
 202
 203        /* set the output as 1 or 0 */
 204        return abx500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val);
 205}
 206
 207static int abx500_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
 208{
 209        /* set the register as input */
 210        return abx500_gpio_set_bits(chip,
 211                                AB8500_GPIO_DIR1_REG,
 212                                offset,
 213                                ABX500_GPIO_INPUT);
 214}
 215
 216static int abx500_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
 217{
 218        struct abx500_pinctrl *pct = gpiochip_get_data(chip);
 219        /* The AB8500 GPIO numbers are off by one */
 220        int gpio = offset + 1;
 221        int hwirq;
 222        int i;
 223
 224        for (i = 0; i < pct->irq_cluster_size; i++) {
 225                struct abx500_gpio_irq_cluster *cluster =
 226                        &pct->irq_cluster[i];
 227
 228                if (gpio >= cluster->start && gpio <= cluster->end) {
 229                        /*
 230                         * The ABx500 GPIO's associated IRQs are clustered together
 231                         * throughout the interrupt numbers at irregular intervals.
 232                         * To solve this quandry, we have placed the read-in values
 233                         * into the cluster information table.
 234                         */
 235                        hwirq = gpio - cluster->start + cluster->to_irq;
 236                        return irq_create_mapping(pct->parent->domain, hwirq);
 237                }
 238        }
 239
 240        return -EINVAL;
 241}
 242
 243static int abx500_set_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip,
 244                           unsigned gpio, int alt_setting)
 245{
 246        struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 247        struct alternate_functions af = pct->soc->alternate_functions[gpio];
 248        int ret;
 249        int val;
 250        unsigned offset;
 251
 252        const char *modes[] = {
 253                [ABX500_DEFAULT]        = "default",
 254                [ABX500_ALT_A]          = "altA",
 255                [ABX500_ALT_B]          = "altB",
 256                [ABX500_ALT_C]          = "altC",
 257        };
 258
 259        /* sanity check */
 260        if (((alt_setting == ABX500_ALT_A) && (af.gpiosel_bit == UNUSED)) ||
 261            ((alt_setting == ABX500_ALT_B) && (af.alt_bit1 == UNUSED)) ||
 262            ((alt_setting == ABX500_ALT_C) && (af.alt_bit2 == UNUSED))) {
 263                dev_dbg(pct->dev, "pin %d doesn't support %s mode\n", gpio,
 264                                modes[alt_setting]);
 265                return -EINVAL;
 266        }
 267
 268        /* on ABx5xx, there is no GPIO0, so adjust the offset */
 269        offset = gpio - 1;
 270
 271        switch (alt_setting) {
 272        case ABX500_DEFAULT:
 273                /*
 274                 * for ABx5xx family, default mode is always selected by
 275                 * writing 0 to GPIOSELx register, except for pins which
 276                 * support at least ALT_B mode, default mode is selected
 277                 * by writing 1 to GPIOSELx register
 278                 */
 279                val = 0;
 280                if (af.alt_bit1 != UNUSED)
 281                        val++;
 282
 283                ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
 284                                           offset, val);
 285                break;
 286
 287        case ABX500_ALT_A:
 288                /*
 289                 * for ABx5xx family, alt_a mode is always selected by
 290                 * writing 1 to GPIOSELx register, except for pins which
 291                 * support at least ALT_B mode, alt_a mode is selected
 292                 * by writing 0 to GPIOSELx register and 0 in ALTFUNC
 293                 * register
 294                 */
 295                if (af.alt_bit1 != UNUSED) {
 296                        ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
 297                                        offset, 0);
 298                        if (ret < 0)
 299                                goto out;
 300
 301                        ret = abx500_gpio_set_bits(chip,
 302                                        AB8500_GPIO_ALTFUN_REG,
 303                                        af.alt_bit1,
 304                                        !!(af.alta_val & BIT(0)));
 305                        if (ret < 0)
 306                                goto out;
 307
 308                        if (af.alt_bit2 != UNUSED)
 309                                ret = abx500_gpio_set_bits(chip,
 310                                        AB8500_GPIO_ALTFUN_REG,
 311                                        af.alt_bit2,
 312                                        !!(af.alta_val & BIT(1)));
 313                } else
 314                        ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
 315                                        offset, 1);
 316                break;
 317
 318        case ABX500_ALT_B:
 319                ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
 320                                offset, 0);
 321                if (ret < 0)
 322                        goto out;
 323
 324                ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
 325                                af.alt_bit1, !!(af.altb_val & BIT(0)));
 326                if (ret < 0)
 327                        goto out;
 328
 329                if (af.alt_bit2 != UNUSED)
 330                        ret = abx500_gpio_set_bits(chip,
 331                                        AB8500_GPIO_ALTFUN_REG,
 332                                        af.alt_bit2,
 333                                        !!(af.altb_val & BIT(1)));
 334                break;
 335
 336        case ABX500_ALT_C:
 337                ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
 338                                offset, 0);
 339                if (ret < 0)
 340                        goto out;
 341
 342                ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
 343                                af.alt_bit2, !!(af.altc_val & BIT(0)));
 344                if (ret < 0)
 345                        goto out;
 346
 347                ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
 348                                af.alt_bit2, !!(af.altc_val & BIT(1)));
 349                break;
 350
 351        default:
 352                dev_dbg(pct->dev, "unknown alt_setting %d\n", alt_setting);
 353
 354                return -EINVAL;
 355        }
 356out:
 357        if (ret < 0)
 358                dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 359
 360        return ret;
 361}
 362
 363#ifdef CONFIG_DEBUG_FS
 364static int abx500_get_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip,
 365                          unsigned gpio)
 366{
 367        u8 mode;
 368        bool bit_mode;
 369        bool alt_bit1;
 370        bool alt_bit2;
 371        struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 372        struct alternate_functions af = pct->soc->alternate_functions[gpio];
 373        /* on ABx5xx, there is no GPIO0, so adjust the offset */
 374        unsigned offset = gpio - 1;
 375        int ret;
 376
 377        /*
 378         * if gpiosel_bit is set to unused,
 379         * it means no GPIO or special case
 380         */
 381        if (af.gpiosel_bit == UNUSED)
 382                return ABX500_DEFAULT;
 383
 384        /* read GpioSelx register */
 385        ret = abx500_gpio_get_bit(chip, AB8500_GPIO_SEL1_REG + (offset / 8),
 386                        af.gpiosel_bit, &bit_mode);
 387        if (ret < 0)
 388                goto out;
 389
 390        mode = bit_mode;
 391
 392        /* sanity check */
 393        if ((af.alt_bit1 < UNUSED) || (af.alt_bit1 > 7) ||
 394            (af.alt_bit2 < UNUSED) || (af.alt_bit2 > 7)) {
 395                dev_err(pct->dev,
 396                        "alt_bitX value not in correct range (-1 to 7)\n");
 397                return -EINVAL;
 398        }
 399
 400        /* if alt_bit2 is used, alt_bit1 must be used too */
 401        if ((af.alt_bit2 != UNUSED) && (af.alt_bit1 == UNUSED)) {
 402                dev_err(pct->dev,
 403                        "if alt_bit2 is used, alt_bit1 can't be unused\n");
 404                return -EINVAL;
 405        }
 406
 407        /* check if pin use AlternateFunction register */
 408        if ((af.alt_bit1 == UNUSED) && (af.alt_bit2 == UNUSED))
 409                return mode;
 410        /*
 411         * if pin GPIOSEL bit is set and pin supports alternate function,
 412         * it means DEFAULT mode
 413         */
 414        if (mode)
 415                return ABX500_DEFAULT;
 416
 417        /*
 418         * pin use the AlternatFunction register
 419         * read alt_bit1 value
 420         */
 421        ret = abx500_gpio_get_bit(chip, AB8500_GPIO_ALTFUN_REG,
 422                            af.alt_bit1, &alt_bit1);
 423        if (ret < 0)
 424                goto out;
 425
 426        if (af.alt_bit2 != UNUSED) {
 427                /* read alt_bit2 value */
 428                ret = abx500_gpio_get_bit(chip, AB8500_GPIO_ALTFUN_REG,
 429                                af.alt_bit2,
 430                                &alt_bit2);
 431                if (ret < 0)
 432                        goto out;
 433        } else
 434                alt_bit2 = 0;
 435
 436        mode = (alt_bit2 << 1) + alt_bit1;
 437        if (mode == af.alta_val)
 438                return ABX500_ALT_A;
 439        else if (mode == af.altb_val)
 440                return ABX500_ALT_B;
 441        else
 442                return ABX500_ALT_C;
 443
 444out:
 445        dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 446        return ret;
 447}
 448
 449#include <linux/seq_file.h>
 450
 451static void abx500_gpio_dbg_show_one(struct seq_file *s,
 452                                     struct pinctrl_dev *pctldev,
 453                                     struct gpio_chip *chip,
 454                                     unsigned offset, unsigned gpio)
 455{
 456        struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 457        const char *label = gpiochip_is_requested(chip, offset - 1);
 458        u8 gpio_offset = offset - 1;
 459        int mode = -1;
 460        bool is_out;
 461        bool pd;
 462        int ret;
 463
 464        const char *modes[] = {
 465                [ABX500_DEFAULT]        = "default",
 466                [ABX500_ALT_A]          = "altA",
 467                [ABX500_ALT_B]          = "altB",
 468                [ABX500_ALT_C]          = "altC",
 469        };
 470
 471        const char *pull_up_down[] = {
 472                [ABX500_GPIO_PULL_DOWN]         = "pull down",
 473                [ABX500_GPIO_PULL_NONE]         = "pull none",
 474                [ABX500_GPIO_PULL_NONE + 1]     = "pull none",
 475                [ABX500_GPIO_PULL_UP]           = "pull up",
 476        };
 477
 478        ret = abx500_gpio_get_bit(chip, AB8500_GPIO_DIR1_REG,
 479                        gpio_offset, &is_out);
 480        if (ret < 0)
 481                goto out;
 482
 483        seq_printf(s, " gpio-%-3d (%-20.20s) %-3s",
 484                   gpio, label ?: "(none)",
 485                   is_out ? "out" : "in ");
 486
 487        if (!is_out) {
 488                ret = abx500_gpio_get_bit(chip, AB8500_GPIO_PUD1_REG,
 489                                gpio_offset, &pd);
 490                if (ret < 0)
 491                        goto out;
 492
 493                seq_printf(s, " %-9s", pull_up_down[pd]);
 494        } else
 495                seq_printf(s, " %-9s", chip->get(chip, offset) ? "hi" : "lo");
 496
 497        mode = abx500_get_mode(pctldev, chip, offset);
 498
 499        seq_printf(s, " %s", (mode < 0) ? "unknown" : modes[mode]);
 500
 501out:
 502        if (ret < 0)
 503                dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 504}
 505
 506static void abx500_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
 507{
 508        unsigned i;
 509        unsigned gpio = chip->base;
 510        struct abx500_pinctrl *pct = gpiochip_get_data(chip);
 511        struct pinctrl_dev *pctldev = pct->pctldev;
 512
 513        for (i = 0; i < chip->ngpio; i++, gpio++) {
 514                /* On AB8500, there is no GPIO0, the first is the GPIO 1 */
 515                abx500_gpio_dbg_show_one(s, pctldev, chip, i + 1, gpio);
 516                seq_putc(s, '\n');
 517        }
 518}
 519
 520#else
 521static inline void abx500_gpio_dbg_show_one(struct seq_file *s,
 522                                            struct pinctrl_dev *pctldev,
 523                                            struct gpio_chip *chip,
 524                                            unsigned offset, unsigned gpio)
 525{
 526}
 527#define abx500_gpio_dbg_show    NULL
 528#endif
 529
 530static const struct gpio_chip abx500gpio_chip = {
 531        .label                  = "abx500-gpio",
 532        .owner                  = THIS_MODULE,
 533        .request                = gpiochip_generic_request,
 534        .free                   = gpiochip_generic_free,
 535        .direction_input        = abx500_gpio_direction_input,
 536        .get                    = abx500_gpio_get,
 537        .direction_output       = abx500_gpio_direction_output,
 538        .set                    = abx500_gpio_set,
 539        .to_irq                 = abx500_gpio_to_irq,
 540        .dbg_show               = abx500_gpio_dbg_show,
 541};
 542
 543static int abx500_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev)
 544{
 545        struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 546
 547        return pct->soc->nfunctions;
 548}
 549
 550static const char *abx500_pmx_get_func_name(struct pinctrl_dev *pctldev,
 551                                         unsigned function)
 552{
 553        struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 554
 555        return pct->soc->functions[function].name;
 556}
 557
 558static int abx500_pmx_get_func_groups(struct pinctrl_dev *pctldev,
 559                                      unsigned function,
 560                                      const char * const **groups,
 561                                      unsigned * const num_groups)
 562{
 563        struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 564
 565        *groups = pct->soc->functions[function].groups;
 566        *num_groups = pct->soc->functions[function].ngroups;
 567
 568        return 0;
 569}
 570
 571static int abx500_pmx_set(struct pinctrl_dev *pctldev, unsigned function,
 572                          unsigned group)
 573{
 574        struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 575        struct gpio_chip *chip = &pct->chip;
 576        const struct abx500_pingroup *g;
 577        int i;
 578        int ret = 0;
 579
 580        g = &pct->soc->groups[group];
 581        if (g->altsetting < 0)
 582                return -EINVAL;
 583
 584        dev_dbg(pct->dev, "enable group %s, %u pins\n", g->name, g->npins);
 585
 586        for (i = 0; i < g->npins; i++) {
 587                dev_dbg(pct->dev, "setting pin %d to altsetting %d\n",
 588                        g->pins[i], g->altsetting);
 589
 590                ret = abx500_set_mode(pctldev, chip, g->pins[i], g->altsetting);
 591        }
 592
 593        if (ret < 0)
 594                dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 595
 596        return ret;
 597}
 598
 599static int abx500_gpio_request_enable(struct pinctrl_dev *pctldev,
 600                               struct pinctrl_gpio_range *range,
 601                               unsigned offset)
 602{
 603        struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 604        const struct abx500_pinrange *p;
 605        int ret;
 606        int i;
 607
 608        /*
 609         * Different ranges have different ways to enable GPIO function on a
 610         * pin, so refer back to our local range type, where we handily define
 611         * what altfunc enables GPIO for a certain pin.
 612         */
 613        for (i = 0; i < pct->soc->gpio_num_ranges; i++) {
 614                p = &pct->soc->gpio_ranges[i];
 615                if ((offset >= p->offset) &&
 616                    (offset < (p->offset + p->npins)))
 617                  break;
 618        }
 619
 620        if (i == pct->soc->gpio_num_ranges) {
 621                dev_err(pct->dev, "%s failed to locate range\n", __func__);
 622                return -ENODEV;
 623        }
 624
 625        dev_dbg(pct->dev, "enable GPIO by altfunc %d at gpio %d\n",
 626                p->altfunc, offset);
 627
 628        ret = abx500_set_mode(pct->pctldev, &pct->chip,
 629                              offset, p->altfunc);
 630        if (ret < 0)
 631                dev_err(pct->dev, "%s setting altfunc failed\n", __func__);
 632
 633        return ret;
 634}
 635
 636static void abx500_gpio_disable_free(struct pinctrl_dev *pctldev,
 637                                     struct pinctrl_gpio_range *range,
 638                                     unsigned offset)
 639{
 640}
 641
 642static const struct pinmux_ops abx500_pinmux_ops = {
 643        .get_functions_count = abx500_pmx_get_funcs_cnt,
 644        .get_function_name = abx500_pmx_get_func_name,
 645        .get_function_groups = abx500_pmx_get_func_groups,
 646        .set_mux = abx500_pmx_set,
 647        .gpio_request_enable = abx500_gpio_request_enable,
 648        .gpio_disable_free = abx500_gpio_disable_free,
 649};
 650
 651static int abx500_get_groups_cnt(struct pinctrl_dev *pctldev)
 652{
 653        struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 654
 655        return pct->soc->ngroups;
 656}
 657
 658static const char *abx500_get_group_name(struct pinctrl_dev *pctldev,
 659                                         unsigned selector)
 660{
 661        struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 662
 663        return pct->soc->groups[selector].name;
 664}
 665
 666static int abx500_get_group_pins(struct pinctrl_dev *pctldev,
 667                                 unsigned selector,
 668                                 const unsigned **pins,
 669                                 unsigned *num_pins)
 670{
 671        struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 672
 673        *pins = pct->soc->groups[selector].pins;
 674        *num_pins = pct->soc->groups[selector].npins;
 675
 676        return 0;
 677}
 678
 679static void abx500_pin_dbg_show(struct pinctrl_dev *pctldev,
 680                                struct seq_file *s, unsigned offset)
 681{
 682        struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 683        struct gpio_chip *chip = &pct->chip;
 684
 685        abx500_gpio_dbg_show_one(s, pctldev, chip, offset,
 686                                 chip->base + offset - 1);
 687}
 688
 689static int abx500_dt_add_map_mux(struct pinctrl_map **map,
 690                unsigned *reserved_maps,
 691                unsigned *num_maps, const char *group,
 692                const char *function)
 693{
 694        if (*num_maps == *reserved_maps)
 695                return -ENOSPC;
 696
 697        (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP;
 698        (*map)[*num_maps].data.mux.group = group;
 699        (*map)[*num_maps].data.mux.function = function;
 700        (*num_maps)++;
 701
 702        return 0;
 703}
 704
 705static int abx500_dt_add_map_configs(struct pinctrl_map **map,
 706                unsigned *reserved_maps,
 707                unsigned *num_maps, const char *group,
 708                unsigned long *configs, unsigned num_configs)
 709{
 710        unsigned long *dup_configs;
 711
 712        if (*num_maps == *reserved_maps)
 713                return -ENOSPC;
 714
 715        dup_configs = kmemdup(configs, num_configs * sizeof(*dup_configs),
 716                              GFP_KERNEL);
 717        if (!dup_configs)
 718                return -ENOMEM;
 719
 720        (*map)[*num_maps].type = PIN_MAP_TYPE_CONFIGS_PIN;
 721
 722        (*map)[*num_maps].data.configs.group_or_pin = group;
 723        (*map)[*num_maps].data.configs.configs = dup_configs;
 724        (*map)[*num_maps].data.configs.num_configs = num_configs;
 725        (*num_maps)++;
 726
 727        return 0;
 728}
 729
 730static const char *abx500_find_pin_name(struct pinctrl_dev *pctldev,
 731                                        const char *pin_name)
 732{
 733        int i, pin_number;
 734        struct abx500_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
 735
 736        if (sscanf((char *)pin_name, "GPIO%d", &pin_number) == 1)
 737                for (i = 0; i < npct->soc->npins; i++)
 738                        if (npct->soc->pins[i].number == pin_number)
 739                                return npct->soc->pins[i].name;
 740        return NULL;
 741}
 742
 743static int abx500_dt_subnode_to_map(struct pinctrl_dev *pctldev,
 744                struct device_node *np,
 745                struct pinctrl_map **map,
 746                unsigned *reserved_maps,
 747                unsigned *num_maps)
 748{
 749        int ret;
 750        const char *function = NULL;
 751        unsigned long *configs;
 752        unsigned int nconfigs = 0;
 753        struct property *prop;
 754
 755        ret = of_property_read_string(np, "function", &function);
 756        if (ret >= 0) {
 757                const char *group;
 758
 759                ret = of_property_count_strings(np, "groups");
 760                if (ret < 0)
 761                        goto exit;
 762
 763                ret = pinctrl_utils_reserve_map(pctldev, map, reserved_maps,
 764                                                num_maps, ret);
 765                if (ret < 0)
 766                        goto exit;
 767
 768                of_property_for_each_string(np, "groups", prop, group) {
 769                        ret = abx500_dt_add_map_mux(map, reserved_maps,
 770                                        num_maps, group, function);
 771                        if (ret < 0)
 772                                goto exit;
 773                }
 774        }
 775
 776        ret = pinconf_generic_parse_dt_config(np, pctldev, &configs, &nconfigs);
 777        if (nconfigs) {
 778                const char *gpio_name;
 779                const char *pin;
 780
 781                ret = of_property_count_strings(np, "pins");
 782                if (ret < 0)
 783                        goto exit;
 784
 785                ret = pinctrl_utils_reserve_map(pctldev, map,
 786                                                reserved_maps,
 787                                                num_maps, ret);
 788                if (ret < 0)
 789                        goto exit;
 790
 791                of_property_for_each_string(np, "pins", prop, pin) {
 792                        gpio_name = abx500_find_pin_name(pctldev, pin);
 793
 794                        ret = abx500_dt_add_map_configs(map, reserved_maps,
 795                                        num_maps, gpio_name, configs, 1);
 796                        if (ret < 0)
 797                                goto exit;
 798                }
 799        }
 800
 801exit:
 802        return ret;
 803}
 804
 805static int abx500_dt_node_to_map(struct pinctrl_dev *pctldev,
 806                                 struct device_node *np_config,
 807                                 struct pinctrl_map **map, unsigned *num_maps)
 808{
 809        unsigned reserved_maps;
 810        struct device_node *np;
 811        int ret;
 812
 813        reserved_maps = 0;
 814        *map = NULL;
 815        *num_maps = 0;
 816
 817        for_each_child_of_node(np_config, np) {
 818                ret = abx500_dt_subnode_to_map(pctldev, np, map,
 819                                &reserved_maps, num_maps);
 820                if (ret < 0) {
 821                        pinctrl_utils_free_map(pctldev, *map, *num_maps);
 822                        return ret;
 823                }
 824        }
 825
 826        return 0;
 827}
 828
 829static const struct pinctrl_ops abx500_pinctrl_ops = {
 830        .get_groups_count = abx500_get_groups_cnt,
 831        .get_group_name = abx500_get_group_name,
 832        .get_group_pins = abx500_get_group_pins,
 833        .pin_dbg_show = abx500_pin_dbg_show,
 834        .dt_node_to_map = abx500_dt_node_to_map,
 835        .dt_free_map = pinctrl_utils_free_map,
 836};
 837
 838static int abx500_pin_config_get(struct pinctrl_dev *pctldev,
 839                          unsigned pin,
 840                          unsigned long *config)
 841{
 842        return -ENOSYS;
 843}
 844
 845static int abx500_pin_config_set(struct pinctrl_dev *pctldev,
 846                          unsigned pin,
 847                          unsigned long *configs,
 848                          unsigned num_configs)
 849{
 850        struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
 851        struct gpio_chip *chip = &pct->chip;
 852        unsigned offset;
 853        int ret = -EINVAL;
 854        int i;
 855        enum pin_config_param param;
 856        enum pin_config_param argument;
 857
 858        for (i = 0; i < num_configs; i++) {
 859                param = pinconf_to_config_param(configs[i]);
 860                argument = pinconf_to_config_argument(configs[i]);
 861
 862                dev_dbg(chip->parent, "pin %d [%#lx]: %s %s\n",
 863                        pin, configs[i],
 864                        (param == PIN_CONFIG_OUTPUT) ? "output " : "input",
 865                        (param == PIN_CONFIG_OUTPUT) ?
 866                        (argument ? "high" : "low") :
 867                        (argument ? "pull up" : "pull down"));
 868
 869                /* on ABx500, there is no GPIO0, so adjust the offset */
 870                offset = pin - 1;
 871
 872                switch (param) {
 873                case PIN_CONFIG_BIAS_DISABLE:
 874                        ret = abx500_gpio_direction_input(chip, offset);
 875                        if (ret < 0)
 876                                goto out;
 877
 878                        /* Chip only supports pull down */
 879                        ret = abx500_gpio_set_bits(chip,
 880                                AB8500_GPIO_PUD1_REG, offset,
 881                                ABX500_GPIO_PULL_NONE);
 882                        break;
 883
 884                case PIN_CONFIG_BIAS_PULL_DOWN:
 885                        ret = abx500_gpio_direction_input(chip, offset);
 886                        if (ret < 0)
 887                                goto out;
 888                        /*
 889                         * if argument = 1 set the pull down
 890                         * else clear the pull down
 891                         * Chip only supports pull down
 892                         */
 893                        ret = abx500_gpio_set_bits(chip,
 894                        AB8500_GPIO_PUD1_REG,
 895                                offset,
 896                                argument ? ABX500_GPIO_PULL_DOWN :
 897                                ABX500_GPIO_PULL_NONE);
 898                        break;
 899
 900                case PIN_CONFIG_BIAS_PULL_UP:
 901                        ret = abx500_gpio_direction_input(chip, offset);
 902                        if (ret < 0)
 903                                goto out;
 904                        /*
 905                         * if argument = 1 set the pull up
 906                         * else clear the pull up
 907                         */
 908                        ret = abx500_gpio_direction_input(chip, offset);
 909                        break;
 910
 911                case PIN_CONFIG_OUTPUT:
 912                        ret = abx500_gpio_direction_output(chip, offset,
 913                                argument);
 914                        break;
 915
 916                default:
 917                        dev_err(chip->parent,
 918                                "illegal configuration requested\n");
 919                }
 920        } /* for each config */
 921out:
 922        if (ret < 0)
 923                dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
 924
 925        return ret;
 926}
 927
 928static const struct pinconf_ops abx500_pinconf_ops = {
 929        .pin_config_get = abx500_pin_config_get,
 930        .pin_config_set = abx500_pin_config_set,
 931        .is_generic = true,
 932};
 933
 934static struct pinctrl_desc abx500_pinctrl_desc = {
 935        .name = "pinctrl-abx500",
 936        .pctlops = &abx500_pinctrl_ops,
 937        .pmxops = &abx500_pinmux_ops,
 938        .confops = &abx500_pinconf_ops,
 939        .owner = THIS_MODULE,
 940};
 941
 942static int abx500_get_gpio_num(struct abx500_pinctrl_soc_data *soc)
 943{
 944        unsigned int lowest = 0;
 945        unsigned int highest = 0;
 946        unsigned int npins = 0;
 947        int i;
 948
 949        /*
 950         * Compute number of GPIOs from the last SoC gpio range descriptors
 951         * These ranges may include "holes" but the GPIO number space shall
 952         * still be homogeneous, so we need to detect and account for any
 953         * such holes so that these are included in the number of GPIO pins.
 954         */
 955        for (i = 0; i < soc->gpio_num_ranges; i++) {
 956                unsigned gstart;
 957                unsigned gend;
 958                const struct abx500_pinrange *p;
 959
 960                p = &soc->gpio_ranges[i];
 961                gstart = p->offset;
 962                gend = p->offset + p->npins - 1;
 963
 964                if (i == 0) {
 965                        /* First iteration, set start values */
 966                        lowest = gstart;
 967                        highest = gend;
 968                } else {
 969                        if (gstart < lowest)
 970                                lowest = gstart;
 971                        if (gend > highest)
 972                                highest = gend;
 973                }
 974        }
 975        /* this gives the absolute number of pins */
 976        npins = highest - lowest + 1;
 977        return npins;
 978}
 979
 980static const struct of_device_id abx500_gpio_match[] = {
 981        { .compatible = "stericsson,ab8500-gpio", .data = (void *)PINCTRL_AB8500, },
 982        { .compatible = "stericsson,ab8505-gpio", .data = (void *)PINCTRL_AB8505, },
 983        { }
 984};
 985
 986static int abx500_gpio_probe(struct platform_device *pdev)
 987{
 988        struct device_node *np = pdev->dev.of_node;
 989        const struct of_device_id *match;
 990        struct abx500_pinctrl *pct;
 991        unsigned int id = -1;
 992        int ret;
 993        int i;
 994
 995        if (!np) {
 996                dev_err(&pdev->dev, "gpio dt node missing\n");
 997                return -ENODEV;
 998        }
 999
1000        pct = devm_kzalloc(&pdev->dev, sizeof(*pct), GFP_KERNEL);
1001        if (!pct)
1002                return -ENOMEM;
1003
1004        pct->dev = &pdev->dev;
1005        pct->parent = dev_get_drvdata(pdev->dev.parent);
1006        pct->chip = abx500gpio_chip;
1007        pct->chip.parent = &pdev->dev;
1008        pct->chip.base = -1; /* Dynamic allocation */
1009
1010        match = of_match_device(abx500_gpio_match, &pdev->dev);
1011        if (!match) {
1012                dev_err(&pdev->dev, "gpio dt not matching\n");
1013                return -ENODEV;
1014        }
1015        id = (unsigned long)match->data;
1016
1017        /* Poke in other ASIC variants here */
1018        switch (id) {
1019        case PINCTRL_AB8500:
1020                abx500_pinctrl_ab8500_init(&pct->soc);
1021                break;
1022        case PINCTRL_AB8505:
1023                abx500_pinctrl_ab8505_init(&pct->soc);
1024                break;
1025        default:
1026                dev_err(&pdev->dev, "Unsupported pinctrl sub driver (%d)\n", id);
1027                return -EINVAL;
1028        }
1029
1030        if (!pct->soc) {
1031                dev_err(&pdev->dev, "Invalid SOC data\n");
1032                return -EINVAL;
1033        }
1034
1035        pct->chip.ngpio = abx500_get_gpio_num(pct->soc);
1036        pct->irq_cluster = pct->soc->gpio_irq_cluster;
1037        pct->irq_cluster_size = pct->soc->ngpio_irq_cluster;
1038
1039        ret = gpiochip_add_data(&pct->chip, pct);
1040        if (ret) {
1041                dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret);
1042                return ret;
1043        }
1044        dev_info(&pdev->dev, "added gpiochip\n");
1045
1046        abx500_pinctrl_desc.pins = pct->soc->pins;
1047        abx500_pinctrl_desc.npins = pct->soc->npins;
1048        pct->pctldev = devm_pinctrl_register(&pdev->dev, &abx500_pinctrl_desc,
1049                                             pct);
1050        if (IS_ERR(pct->pctldev)) {
1051                dev_err(&pdev->dev,
1052                        "could not register abx500 pinctrl driver\n");
1053                ret = PTR_ERR(pct->pctldev);
1054                goto out_rem_chip;
1055        }
1056        dev_info(&pdev->dev, "registered pin controller\n");
1057
1058        /* We will handle a range of GPIO pins */
1059        for (i = 0; i < pct->soc->gpio_num_ranges; i++) {
1060                const struct abx500_pinrange *p = &pct->soc->gpio_ranges[i];
1061
1062                ret = gpiochip_add_pin_range(&pct->chip,
1063                                        dev_name(&pdev->dev),
1064                                        p->offset - 1, p->offset, p->npins);
1065                if (ret < 0)
1066                        goto out_rem_chip;
1067        }
1068
1069        platform_set_drvdata(pdev, pct);
1070        dev_info(&pdev->dev, "initialized abx500 pinctrl driver\n");
1071
1072        return 0;
1073
1074out_rem_chip:
1075        gpiochip_remove(&pct->chip);
1076        return ret;
1077}
1078
1079/**
1080 * abx500_gpio_remove() - remove Ab8500-gpio driver
1081 * @pdev:       Platform device registered
1082 */
1083static int abx500_gpio_remove(struct platform_device *pdev)
1084{
1085        struct abx500_pinctrl *pct = platform_get_drvdata(pdev);
1086
1087        gpiochip_remove(&pct->chip);
1088        return 0;
1089}
1090
1091static struct platform_driver abx500_gpio_driver = {
1092        .driver = {
1093                .name = "abx500-gpio",
1094                .of_match_table = abx500_gpio_match,
1095        },
1096        .probe = abx500_gpio_probe,
1097        .remove = abx500_gpio_remove,
1098};
1099
1100static int __init abx500_gpio_init(void)
1101{
1102        return platform_driver_register(&abx500_gpio_driver);
1103}
1104core_initcall(abx500_gpio_init);
1105