LXR linux/include/uapi/linux/target_core

   1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
   2#ifndef __TARGET_CORE_USER_H
   3#define __TARGET_CORE_USER_H
   4
   5/* This header will be used by application too */
   6
   7#include <linux/types.h>
   8#include <linux/uio.h>
   9
  10#define TCMU_VERSION "2.0"
  11
  12/**
  13 * DOC: Ring Design
  14 * Ring Design
  15 * -----------
  16 *
  17 * The mmaped area is divided into three parts:
  18 * 1) The mailbox (struct tcmu_mailbox, below);
  19 * 2) The command ring;
  20 * 3) Everything beyond the command ring (data).
  21 *
  22 * The mailbox tells userspace the offset of the command ring from the
  23 * start of the shared memory region, and how big the command ring is.
  24 *
  25 * The kernel passes SCSI commands to userspace by putting a struct
  26 * tcmu_cmd_entry in the ring, updating mailbox->cmd_head, and poking
  27 * userspace via UIO's interrupt mechanism.
  28 *
  29 * tcmu_cmd_entry contains a header. If the header type is PAD,
  30 * userspace should skip hdr->length bytes (mod cmdr_size) to find the
  31 * next cmd_entry.
  32 *
  33 * Otherwise, the entry will contain offsets into the mmaped area that
  34 * contain the cdb and data buffers -- the latter accessible via the
  35 * iov array. iov addresses are also offsets into the shared area.
  36 *
  37 * When userspace is completed handling the command, set
  38 * entry->rsp.scsi_status, fill in rsp.sense_buffer if appropriate,
  39 * and also set mailbox->cmd_tail equal to the old cmd_tail plus
  40 * hdr->length, mod cmdr_size. If cmd_tail doesn't equal cmd_head, it
  41 * should process the next packet the same way, and so on.
  42 */
  43
  44#define TCMU_MAILBOX_VERSION 2
  45#define ALIGN_SIZE 64 /* Should be enough for most CPUs */
  46#define TCMU_MAILBOX_FLAG_CAP_OOOC (1 << 0) /* Out-of-order completions */
  47#define TCMU_MAILBOX_FLAG_CAP_READ_LEN (1 << 1) /* Read data length */
  48
  49struct tcmu_mailbox {
  50        __u16 version;
  51        __u16 flags;
  52        __u32 cmdr_off;
  53        __u32 cmdr_size;
  54
  55        __u32 cmd_head;
  56
  57        /* Updated by user. On its own cacheline */
  58        __u32 cmd_tail __attribute__((__aligned__(ALIGN_SIZE)));
  59
  60} __packed;
  61
  62enum tcmu_opcode {
  63        TCMU_OP_PAD = 0,
  64        TCMU_OP_CMD,
  65};
  66
  67/*
  68 * Only a few opcodes, and length is 8-byte aligned, so use low bits for opcode.
  69 */
  70struct tcmu_cmd_entry_hdr {
  71        __u32 len_op;
  72        __u16 cmd_id;
  73        __u8 kflags;
  74#define TCMU_UFLAG_UNKNOWN_OP 0x1
  75#define TCMU_UFLAG_READ_LEN   0x2
  76        __u8 uflags;
  77
  78} __packed;
  79
  80#define TCMU_OP_MASK 0x7
  81
  82static inline enum tcmu_opcode tcmu_hdr_get_op(__u32 len_op)
  83{
  84        return len_op & TCMU_OP_MASK;
  85}
  86
  87static inline void tcmu_hdr_set_op(__u32 *len_op, enum tcmu_opcode op)
  88{
  89        *len_op &= ~TCMU_OP_MASK;
  90        *len_op |= (op & TCMU_OP_MASK);
  91}
  92
  93static inline __u32 tcmu_hdr_get_len(__u32 len_op)
  94{
  95        return len_op & ~TCMU_OP_MASK;
  96}
  97
  98static inline void tcmu_hdr_set_len(__u32 *len_op, __u32 len)
  99{
 100        *len_op &= TCMU_OP_MASK;
 101        *len_op |= len;
 102}
 103
 104/* Currently the same as SCSI_SENSE_BUFFERSIZE */
 105#define TCMU_SENSE_BUFFERSIZE 96
 106
 107struct tcmu_cmd_entry {
 108        struct tcmu_cmd_entry_hdr hdr;
 109
 110        union {
 111                struct {
 112                        __u32 iov_cnt;
 113                        __u32 iov_bidi_cnt;
 114                        __u32 iov_dif_cnt;
 115                        __u64 cdb_off;
 116                        __u64 __pad1;
 117                        __u64 __pad2;
 118                        struct iovec iov[0];
 119                } req;
 120                struct {
 121                        __u8 scsi_status;
 122                        __u8 __pad1;
 123                        __u16 __pad2;
 124                        __u32 read_len;
 125                        char sense_buffer[TCMU_SENSE_BUFFERSIZE];
 126                } rsp;
 127        };
 128
 129} __packed;
 130
 131#define TCMU_OP_ALIGN_SIZE sizeof(__u64)
 132
 133enum tcmu_genl_cmd {
 134        TCMU_CMD_UNSPEC,
 135        TCMU_CMD_ADDED_DEVICE,
 136        TCMU_CMD_REMOVED_DEVICE,
 137        TCMU_CMD_RECONFIG_DEVICE,
 138        TCMU_CMD_ADDED_DEVICE_DONE,
 139        TCMU_CMD_REMOVED_DEVICE_DONE,
 140        TCMU_CMD_RECONFIG_DEVICE_DONE,
 141        TCMU_CMD_SET_FEATURES,
 142        __TCMU_CMD_MAX,
 143};
 144#define TCMU_CMD_MAX (__TCMU_CMD_MAX - 1)
 145
 146enum tcmu_genl_attr {
 147        TCMU_ATTR_UNSPEC,
 148        TCMU_ATTR_DEVICE,
 149        TCMU_ATTR_MINOR,
 150        TCMU_ATTR_PAD,
 151        TCMU_ATTR_DEV_CFG,
 152        TCMU_ATTR_DEV_SIZE,
 153        TCMU_ATTR_WRITECACHE,
 154        TCMU_ATTR_CMD_STATUS,
 155        TCMU_ATTR_DEVICE_ID,
 156        TCMU_ATTR_SUPP_KERN_CMD_REPLY,
 157        __TCMU_ATTR_MAX,
 158};
 159#define TCMU_ATTR_MAX (__TCMU_ATTR_MAX - 1)
 160
 161#endif
 162