linux/sound/soc/codecs/rt5616.h
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   1/*
   2 * rt5616.h  --  RT5616 ALSA SoC audio driver
   3 *
   4 * Copyright 2011 Realtek Microelectronics
   5 * Author: Johnny Hsu <johnnyhsu@realtek.com>
   6 *
   7 * This program is free software; you can redistribute it and/or modify
   8 * it under the terms of the GNU General Public License version 2 as
   9 * published by the Free Software Foundation.
  10 */
  11
  12#ifndef __RT5616_H__
  13#define __RT5616_H__
  14
  15/* Info */
  16#define RT5616_RESET                            0x00
  17#define RT5616_VERSION_ID                       0xfd
  18#define RT5616_VENDOR_ID                        0xfe
  19#define RT5616_DEVICE_ID                        0xff
  20/*  I/O - Output */
  21#define RT5616_HP_VOL                           0x02
  22#define RT5616_LOUT_CTRL1                       0x03
  23#define RT5616_LOUT_CTRL2                       0x05
  24/* I/O - Input */
  25#define RT5616_IN1_IN2                          0x0d
  26#define RT5616_INL1_INR1_VOL                    0x0f
  27/* I/O - ADC/DAC/DMIC */
  28#define RT5616_DAC1_DIG_VOL                     0x19
  29#define RT5616_ADC_DIG_VOL                      0x1c
  30#define RT5616_ADC_BST_VOL                      0x1e
  31/* Mixer - D-D */
  32#define RT5616_STO1_ADC_MIXER                   0x27
  33#define RT5616_AD_DA_MIXER                      0x29
  34#define RT5616_STO_DAC_MIXER                    0x2a
  35
  36/* Mixer - ADC */
  37#define RT5616_REC_L1_MIXER                     0x3b
  38#define RT5616_REC_L2_MIXER                     0x3c
  39#define RT5616_REC_R1_MIXER                     0x3d
  40#define RT5616_REC_R2_MIXER                     0x3e
  41/* Mixer - DAC */
  42#define RT5616_HPO_MIXER                        0x45
  43#define RT5616_OUT_L1_MIXER                     0x4d
  44#define RT5616_OUT_L2_MIXER                     0x4e
  45#define RT5616_OUT_L3_MIXER                     0x4f
  46#define RT5616_OUT_R1_MIXER                     0x50
  47#define RT5616_OUT_R2_MIXER                     0x51
  48#define RT5616_OUT_R3_MIXER                     0x52
  49#define RT5616_LOUT_MIXER                       0x53
  50/* Power */
  51#define RT5616_PWR_DIG1                         0x61
  52#define RT5616_PWR_DIG2                         0x62
  53#define RT5616_PWR_ANLG1                        0x63
  54#define RT5616_PWR_ANLG2                        0x64
  55#define RT5616_PWR_MIXER                        0x65
  56#define RT5616_PWR_VOL                          0x66
  57/* Private Register Control */
  58#define RT5616_PRIV_INDEX                       0x6a
  59#define RT5616_PRIV_DATA                        0x6c
  60/* Format - ADC/DAC */
  61#define RT5616_I2S1_SDP                         0x70
  62#define RT5616_ADDA_CLK1                        0x73
  63#define RT5616_ADDA_CLK2                        0x74
  64
  65/* Function - Analog */
  66#define RT5616_GLB_CLK                          0x80
  67#define RT5616_PLL_CTRL1                        0x81
  68#define RT5616_PLL_CTRL2                        0x82
  69#define RT5616_HP_OVCD                          0x8b
  70#define RT5616_DEPOP_M1                         0x8e
  71#define RT5616_DEPOP_M2                         0x8f
  72#define RT5616_DEPOP_M3                         0x90
  73#define RT5616_CHARGE_PUMP                      0x91
  74#define RT5616_PV_DET_SPK_G                     0x92
  75#define RT5616_MICBIAS                          0x93
  76#define RT5616_A_JD_CTL1                        0x94
  77#define RT5616_A_JD_CTL2                        0x95
  78/* Function - Digital */
  79#define RT5616_EQ_CTRL1                         0xb0
  80#define RT5616_EQ_CTRL2                         0xb1
  81#define RT5616_WIND_FILTER                      0xb2
  82#define RT5616_DRC_AGC_1                        0xb4
  83#define RT5616_DRC_AGC_2                        0xb5
  84#define RT5616_DRC_AGC_3                        0xb6
  85#define RT5616_SVOL_ZC                          0xb7
  86#define RT5616_JD_CTRL1                         0xbb
  87#define RT5616_JD_CTRL2                         0xbc
  88#define RT5616_IRQ_CTRL1                        0xbd
  89#define RT5616_IRQ_CTRL2                        0xbe
  90#define RT5616_INT_IRQ_ST                       0xbf
  91#define RT5616_GPIO_CTRL1                       0xc0
  92#define RT5616_GPIO_CTRL2                       0xc1
  93#define RT5616_GPIO_CTRL3                       0xc2
  94#define RT5616_PGM_REG_ARR1                     0xc8
  95#define RT5616_PGM_REG_ARR2                     0xc9
  96#define RT5616_PGM_REG_ARR3                     0xca
  97#define RT5616_PGM_REG_ARR4                     0xcb
  98#define RT5616_PGM_REG_ARR5                     0xcc
  99#define RT5616_SCB_FUNC                         0xcd
 100#define RT5616_SCB_CTRL                         0xce
 101#define RT5616_BASE_BACK                        0xcf
 102#define RT5616_MP3_PLUS1                        0xd0
 103#define RT5616_MP3_PLUS2                        0xd1
 104#define RT5616_ADJ_HPF_CTRL1                    0xd3
 105#define RT5616_ADJ_HPF_CTRL2                    0xd4
 106#define RT5616_HP_CALIB_AMP_DET                 0xd6
 107#define RT5616_HP_CALIB2                        0xd7
 108#define RT5616_SV_ZCD1                          0xd9
 109#define RT5616_SV_ZCD2                          0xda
 110#define RT5616_D_MISC                           0xfa
 111/* Dummy Register */
 112#define RT5616_DUMMY2                           0xfb
 113#define RT5616_DUMMY3                           0xfc
 114
 115
 116/* Index of Codec Private Register definition */
 117#define RT5616_BIAS_CUR1                        0x12
 118#define RT5616_BIAS_CUR3                        0x14
 119#define RT5616_CLSD_INT_REG1                    0x1c
 120#define RT5616_MAMP_INT_REG2                    0x37
 121#define RT5616_CHOP_DAC_ADC                     0x3d
 122#define RT5616_3D_SPK                           0x63
 123#define RT5616_WND_1                            0x6c
 124#define RT5616_WND_2                            0x6d
 125#define RT5616_WND_3                            0x6e
 126#define RT5616_WND_4                            0x6f
 127#define RT5616_WND_5                            0x70
 128#define RT5616_WND_8                            0x73
 129#define RT5616_DIP_SPK_INF                      0x75
 130#define RT5616_HP_DCC_INT1                      0x77
 131#define RT5616_EQ_BW_LOP                        0xa0
 132#define RT5616_EQ_GN_LOP                        0xa1
 133#define RT5616_EQ_FC_BP1                        0xa2
 134#define RT5616_EQ_BW_BP1                        0xa3
 135#define RT5616_EQ_GN_BP1                        0xa4
 136#define RT5616_EQ_FC_BP2                        0xa5
 137#define RT5616_EQ_BW_BP2                        0xa6
 138#define RT5616_EQ_GN_BP2                        0xa7
 139#define RT5616_EQ_FC_BP3                        0xa8
 140#define RT5616_EQ_BW_BP3                        0xa9
 141#define RT5616_EQ_GN_BP3                        0xaa
 142#define RT5616_EQ_FC_BP4                        0xab
 143#define RT5616_EQ_BW_BP4                        0xac
 144#define RT5616_EQ_GN_BP4                        0xad
 145#define RT5616_EQ_FC_HIP1                       0xae
 146#define RT5616_EQ_GN_HIP1                       0xaf
 147#define RT5616_EQ_FC_HIP2                       0xb0
 148#define RT5616_EQ_BW_HIP2                       0xb1
 149#define RT5616_EQ_GN_HIP2                       0xb2
 150#define RT5616_EQ_PRE_VOL                       0xb3
 151#define RT5616_EQ_PST_VOL                       0xb4
 152
 153
 154/* global definition */
 155#define RT5616_L_MUTE                           (0x1 << 15)
 156#define RT5616_L_MUTE_SFT                       15
 157#define RT5616_VOL_L_MUTE                       (0x1 << 14)
 158#define RT5616_VOL_L_SFT                        14
 159#define RT5616_R_MUTE                           (0x1 << 7)
 160#define RT5616_R_MUTE_SFT                       7
 161#define RT5616_VOL_R_MUTE                       (0x1 << 6)
 162#define RT5616_VOL_R_SFT                        6
 163#define RT5616_L_VOL_MASK                       (0x3f << 8)
 164#define RT5616_L_VOL_SFT                        8
 165#define RT5616_R_VOL_MASK                       (0x3f)
 166#define RT5616_R_VOL_SFT                        0
 167
 168/* LOUT Control 2(0x05) */
 169#define RT5616_EN_DFO                           (0x1 << 15)
 170
 171/* IN1 and IN2 Control (0x0d) */
 172/* IN3 and IN4 Control (0x0e) */
 173#define RT5616_BST_MASK1                        (0xf<<12)
 174#define RT5616_BST_SFT1                         12
 175#define RT5616_BST_MASK2                        (0xf<<8)
 176#define RT5616_BST_SFT2                         8
 177#define RT5616_IN_DF1                           (0x1 << 7)
 178#define RT5616_IN_SFT1                          7
 179#define RT5616_IN_DF2                           (0x1 << 6)
 180#define RT5616_IN_SFT2                          6
 181
 182/* INL1 and INR1 Volume Control (0x0f) */
 183#define RT5616_INL_VOL_MASK                     (0x1f << 8)
 184#define RT5616_INL_VOL_SFT                      8
 185#define RT5616_INR_SEL_MASK                     (0x1 << 7)
 186#define RT5616_INR_SEL_SFT                      7
 187#define RT5616_INR_SEL_IN4N                     (0x0 << 7)
 188#define RT5616_INR_SEL_MONON                    (0x1 << 7)
 189#define RT5616_INR_VOL_MASK                     (0x1f)
 190#define RT5616_INR_VOL_SFT                      0
 191
 192/* DAC1 Digital Volume (0x19) */
 193#define RT5616_DAC_L1_VOL_MASK                  (0xff << 8)
 194#define RT5616_DAC_L1_VOL_SFT                   8
 195#define RT5616_DAC_R1_VOL_MASK                  (0xff)
 196#define RT5616_DAC_R1_VOL_SFT                   0
 197
 198/* DAC2 Digital Volume (0x1a) */
 199#define RT5616_DAC_L2_VOL_MASK                  (0xff << 8)
 200#define RT5616_DAC_L2_VOL_SFT                   8
 201#define RT5616_DAC_R2_VOL_MASK                  (0xff)
 202#define RT5616_DAC_R2_VOL_SFT                   0
 203
 204/* ADC Digital Volume Control (0x1c) */
 205#define RT5616_ADC_L_VOL_MASK                   (0x7f << 8)
 206#define RT5616_ADC_L_VOL_SFT                    8
 207#define RT5616_ADC_R_VOL_MASK                   (0x7f)
 208#define RT5616_ADC_R_VOL_SFT                    0
 209
 210/* Mono ADC Digital Volume Control (0x1d) */
 211#define RT5616_M_MONO_ADC_L                     (0x1 << 15)
 212#define RT5616_M_MONO_ADC_L_SFT                 15
 213#define RT5616_MONO_ADC_L_VOL_MASK              (0x7f << 8)
 214#define RT5616_MONO_ADC_L_VOL_SFT               8
 215#define RT5616_M_MONO_ADC_R                     (0x1 << 7)
 216#define RT5616_M_MONO_ADC_R_SFT                 7
 217#define RT5616_MONO_ADC_R_VOL_MASK              (0x7f)
 218#define RT5616_MONO_ADC_R_VOL_SFT               0
 219
 220/* ADC Boost Volume Control (0x1e) */
 221#define RT5616_ADC_L_BST_MASK                   (0x3 << 14)
 222#define RT5616_ADC_L_BST_SFT                    14
 223#define RT5616_ADC_R_BST_MASK                   (0x3 << 12)
 224#define RT5616_ADC_R_BST_SFT                    12
 225#define RT5616_ADC_COMP_MASK                    (0x3 << 10)
 226#define RT5616_ADC_COMP_SFT                     10
 227
 228/* Stereo ADC1 Mixer Control (0x27) */
 229#define RT5616_M_STO1_ADC_L1                    (0x1 << 14)
 230#define RT5616_M_STO1_ADC_L1_SFT                14
 231#define RT5616_M_STO1_ADC_R1                    (0x1 << 6)
 232#define RT5616_M_STO1_ADC_R1_SFT                6
 233
 234/* ADC Mixer to DAC Mixer Control (0x29) */
 235#define RT5616_M_ADCMIX_L                       (0x1 << 15)
 236#define RT5616_M_ADCMIX_L_SFT                   15
 237#define RT5616_M_IF1_DAC_L                      (0x1 << 14)
 238#define RT5616_M_IF1_DAC_L_SFT                  14
 239#define RT5616_M_ADCMIX_R                       (0x1 << 7)
 240#define RT5616_M_ADCMIX_R_SFT                   7
 241#define RT5616_M_IF1_DAC_R                      (0x1 << 6)
 242#define RT5616_M_IF1_DAC_R_SFT                  6
 243
 244/* Stereo DAC Mixer Control (0x2a) */
 245#define RT5616_M_DAC_L1_MIXL                    (0x1 << 14)
 246#define RT5616_M_DAC_L1_MIXL_SFT                14
 247#define RT5616_DAC_L1_STO_L_VOL_MASK            (0x1 << 13)
 248#define RT5616_DAC_L1_STO_L_VOL_SFT             13
 249#define RT5616_M_DAC_R1_MIXL                    (0x1 << 9)
 250#define RT5616_M_DAC_R1_MIXL_SFT                9
 251#define RT5616_DAC_R1_STO_L_VOL_MASK            (0x1 << 8)
 252#define RT5616_DAC_R1_STO_L_VOL_SFT             8
 253#define RT5616_M_DAC_R1_MIXR                    (0x1 << 6)
 254#define RT5616_M_DAC_R1_MIXR_SFT                6
 255#define RT5616_DAC_R1_STO_R_VOL_MASK            (0x1 << 5)
 256#define RT5616_DAC_R1_STO_R_VOL_SFT             5
 257#define RT5616_M_DAC_L1_MIXR                    (0x1 << 1)
 258#define RT5616_M_DAC_L1_MIXR_SFT                1
 259#define RT5616_DAC_L1_STO_R_VOL_MASK            (0x1)
 260#define RT5616_DAC_L1_STO_R_VOL_SFT             0
 261
 262/* DD Mixer Control (0x2b) */
 263#define RT5616_M_STO_DD_L1                      (0x1 << 14)
 264#define RT5616_M_STO_DD_L1_SFT                  14
 265#define RT5616_STO_DD_L1_VOL_MASK               (0x1 << 13)
 266#define RT5616_DAC_DD_L1_VOL_SFT                13
 267#define RT5616_M_STO_DD_L2                      (0x1 << 12)
 268#define RT5616_M_STO_DD_L2_SFT                  12
 269#define RT5616_STO_DD_L2_VOL_MASK               (0x1 << 11)
 270#define RT5616_STO_DD_L2_VOL_SFT                11
 271#define RT5616_M_STO_DD_R2_L                    (0x1 << 10)
 272#define RT5616_M_STO_DD_R2_L_SFT                10
 273#define RT5616_STO_DD_R2_L_VOL_MASK             (0x1 << 9)
 274#define RT5616_STO_DD_R2_L_VOL_SFT              9
 275#define RT5616_M_STO_DD_R1                      (0x1 << 6)
 276#define RT5616_M_STO_DD_R1_SFT                  6
 277#define RT5616_STO_DD_R1_VOL_MASK               (0x1 << 5)
 278#define RT5616_STO_DD_R1_VOL_SFT                5
 279#define RT5616_M_STO_DD_R2                      (0x1 << 4)
 280#define RT5616_M_STO_DD_R2_SFT                  4
 281#define RT5616_STO_DD_R2_VOL_MASK               (0x1 << 3)
 282#define RT5616_STO_DD_R2_VOL_SFT                3
 283#define RT5616_M_STO_DD_L2_R                    (0x1 << 2)
 284#define RT5616_M_STO_DD_L2_R_SFT                2
 285#define RT5616_STO_DD_L2_R_VOL_MASK             (0x1 << 1)
 286#define RT5616_STO_DD_L2_R_VOL_SFT              1
 287
 288/* Digital Mixer Control (0x2c) */
 289#define RT5616_M_STO_L_DAC_L                    (0x1 << 15)
 290#define RT5616_M_STO_L_DAC_L_SFT                15
 291#define RT5616_STO_L_DAC_L_VOL_MASK             (0x1 << 14)
 292#define RT5616_STO_L_DAC_L_VOL_SFT              14
 293#define RT5616_M_DAC_L2_DAC_L                   (0x1 << 13)
 294#define RT5616_M_DAC_L2_DAC_L_SFT               13
 295#define RT5616_DAC_L2_DAC_L_VOL_MASK            (0x1 << 12)
 296#define RT5616_DAC_L2_DAC_L_VOL_SFT             12
 297#define RT5616_M_STO_R_DAC_R                    (0x1 << 11)
 298#define RT5616_M_STO_R_DAC_R_SFT                11
 299#define RT5616_STO_R_DAC_R_VOL_MASK             (0x1 << 10)
 300#define RT5616_STO_R_DAC_R_VOL_SFT              10
 301#define RT5616_M_DAC_R2_DAC_R                   (0x1 << 9)
 302#define RT5616_M_DAC_R2_DAC_R_SFT               9
 303#define RT5616_DAC_R2_DAC_R_VOL_MASK            (0x1 << 8)
 304#define RT5616_DAC_R2_DAC_R_VOL_SFT             8
 305
 306/* DSP Path Control 1 (0x2d) */
 307#define RT5616_RXDP_SRC_MASK                    (0x1 << 15)
 308#define RT5616_RXDP_SRC_SFT                     15
 309#define RT5616_RXDP_SRC_NOR                     (0x0 << 15)
 310#define RT5616_RXDP_SRC_DIV3                    (0x1 << 15)
 311#define RT5616_TXDP_SRC_MASK                    (0x1 << 14)
 312#define RT5616_TXDP_SRC_SFT                     14
 313#define RT5616_TXDP_SRC_NOR                     (0x0 << 14)
 314#define RT5616_TXDP_SRC_DIV3                    (0x1 << 14)
 315
 316/* DSP Path Control 2 (0x2e) */
 317#define RT5616_DAC_L2_SEL_MASK                  (0x3 << 14)
 318#define RT5616_DAC_L2_SEL_SFT                   14
 319#define RT5616_DAC_L2_SEL_IF2                   (0x0 << 14)
 320#define RT5616_DAC_L2_SEL_IF3                   (0x1 << 14)
 321#define RT5616_DAC_L2_SEL_TXDC                  (0x2 << 14)
 322#define RT5616_DAC_L2_SEL_BASS                  (0x3 << 14)
 323#define RT5616_DAC_R2_SEL_MASK                  (0x3 << 12)
 324#define RT5616_DAC_R2_SEL_SFT                   12
 325#define RT5616_DAC_R2_SEL_IF2                   (0x0 << 12)
 326#define RT5616_DAC_R2_SEL_IF3                   (0x1 << 12)
 327#define RT5616_DAC_R2_SEL_TXDC                  (0x2 << 12)
 328#define RT5616_IF2_ADC_L_SEL_MASK               (0x1 << 11)
 329#define RT5616_IF2_ADC_L_SEL_SFT                11
 330#define RT5616_IF2_ADC_L_SEL_TXDP               (0x0 << 11)
 331#define RT5616_IF2_ADC_L_SEL_PASS               (0x1 << 11)
 332#define RT5616_IF2_ADC_R_SEL_MASK               (0x1 << 10)
 333#define RT5616_IF2_ADC_R_SEL_SFT                10
 334#define RT5616_IF2_ADC_R_SEL_TXDP               (0x0 << 10)
 335#define RT5616_IF2_ADC_R_SEL_PASS               (0x1 << 10)
 336#define RT5616_RXDC_SEL_MASK                    (0x3 << 8)
 337#define RT5616_RXDC_SEL_SFT                     8
 338#define RT5616_RXDC_SEL_NOR                     (0x0 << 8)
 339#define RT5616_RXDC_SEL_L2R                     (0x1 << 8)
 340#define RT5616_RXDC_SEL_R2L                     (0x2 << 8)
 341#define RT5616_RXDC_SEL_SWAP                    (0x3 << 8)
 342#define RT5616_RXDP_SEL_MASK                    (0x3 << 6)
 343#define RT5616_RXDP_SEL_SFT                     6
 344#define RT5616_RXDP_SEL_NOR                     (0x0 << 6)
 345#define RT5616_RXDP_SEL_L2R                     (0x1 << 6)
 346#define RT5616_RXDP_SEL_R2L                     (0x2 << 6)
 347#define RT5616_RXDP_SEL_SWAP                    (0x3 << 6)
 348#define RT5616_TXDC_SEL_MASK                    (0x3 << 4)
 349#define RT5616_TXDC_SEL_SFT                     4
 350#define RT5616_TXDC_SEL_NOR                     (0x0 << 4)
 351#define RT5616_TXDC_SEL_L2R                     (0x1 << 4)
 352#define RT5616_TXDC_SEL_R2L                     (0x2 << 4)
 353#define RT5616_TXDC_SEL_SWAP                    (0x3 << 4)
 354#define RT5616_TXDP_SEL_MASK                    (0x3 << 2)
 355#define RT5616_TXDP_SEL_SFT                     2
 356#define RT5616_TXDP_SEL_NOR                     (0x0 << 2)
 357#define RT5616_TXDP_SEL_L2R                     (0x1 << 2)
 358#define RT5616_TXDP_SEL_R2L                     (0x2 << 2)
 359#define RT5616_TRXDP_SEL_SWAP                   (0x3 << 2)
 360
 361/* REC Left Mixer Control 1 (0x3b) */
 362#define RT5616_G_LN_L2_RM_L_MASK                (0x7 << 13)
 363#define RT5616_G_IN_L2_RM_L_SFT                 13
 364#define RT5616_G_LN_L1_RM_L_MASK                (0x7 << 10)
 365#define RT5616_G_IN_L1_RM_L_SFT                 10
 366#define RT5616_G_BST3_RM_L_MASK                 (0x7 << 4)
 367#define RT5616_G_BST3_RM_L_SFT                  4
 368#define RT5616_G_BST2_RM_L_MASK                 (0x7 << 1)
 369#define RT5616_G_BST2_RM_L_SFT                  1
 370
 371/* REC Left Mixer Control 2 (0x3c) */
 372#define RT5616_G_BST1_RM_L_MASK                 (0x7 << 13)
 373#define RT5616_G_BST1_RM_L_SFT                  13
 374#define RT5616_G_OM_L_RM_L_MASK                 (0x7 << 10)
 375#define RT5616_G_OM_L_RM_L_SFT                  10
 376#define RT5616_M_IN2_L_RM_L                     (0x1 << 6)
 377#define RT5616_M_IN2_L_RM_L_SFT                 6
 378#define RT5616_M_IN1_L_RM_L                     (0x1 << 5)
 379#define RT5616_M_IN1_L_RM_L_SFT                 5
 380#define RT5616_M_BST3_RM_L                      (0x1 << 3)
 381#define RT5616_M_BST3_RM_L_SFT                  3
 382#define RT5616_M_BST2_RM_L                      (0x1 << 2)
 383#define RT5616_M_BST2_RM_L_SFT                  2
 384#define RT5616_M_BST1_RM_L                      (0x1 << 1)
 385#define RT5616_M_BST1_RM_L_SFT                  1
 386#define RT5616_M_OM_L_RM_L                      (0x1)
 387#define RT5616_M_OM_L_RM_L_SFT                  0
 388
 389/* REC Right Mixer Control 1 (0x3d) */
 390#define RT5616_G_IN2_R_RM_R_MASK                (0x7 << 13)
 391#define RT5616_G_IN2_R_RM_R_SFT                 13
 392#define RT5616_G_IN1_R_RM_R_MASK                (0x7 << 10)
 393#define RT5616_G_IN1_R_RM_R_SFT                 10
 394#define RT5616_G_BST3_RM_R_MASK                 (0x7 << 4)
 395#define RT5616_G_BST3_RM_R_SFT                  4
 396#define RT5616_G_BST2_RM_R_MASK                 (0x7 << 1)
 397#define RT5616_G_BST2_RM_R_SFT                  1
 398
 399/* REC Right Mixer Control 2 (0x3e) */
 400#define RT5616_G_BST1_RM_R_MASK                 (0x7 << 13)
 401#define RT5616_G_BST1_RM_R_SFT                  13
 402#define RT5616_G_OM_R_RM_R_MASK                 (0x7 << 10)
 403#define RT5616_G_OM_R_RM_R_SFT                  10
 404#define RT5616_M_IN2_R_RM_R                     (0x1 << 6)
 405#define RT5616_M_IN2_R_RM_R_SFT                 6
 406#define RT5616_M_IN1_R_RM_R                     (0x1 << 5)
 407#define RT5616_M_IN1_R_RM_R_SFT                 5
 408#define RT5616_M_BST3_RM_R                      (0x1 << 3)
 409#define RT5616_M_BST3_RM_R_SFT                  3
 410#define RT5616_M_BST2_RM_R                      (0x1 << 2)
 411#define RT5616_M_BST2_RM_R_SFT                  2
 412#define RT5616_M_BST1_RM_R                      (0x1 << 1)
 413#define RT5616_M_BST1_RM_R_SFT                  1
 414#define RT5616_M_OM_R_RM_R                      (0x1)
 415#define RT5616_M_OM_R_RM_R_SFT                  0
 416
 417/* HPMIX Control (0x45) */
 418#define RT5616_M_DAC1_HM                        (0x1 << 14)
 419#define RT5616_M_DAC1_HM_SFT                    14
 420#define RT5616_M_HPVOL_HM                       (0x1 << 13)
 421#define RT5616_M_HPVOL_HM_SFT                   13
 422#define RT5616_G_HPOMIX_MASK                    (0x1 << 12)
 423#define RT5616_G_HPOMIX_SFT                     12
 424
 425/* SPK Left Mixer Control (0x46) */
 426#define RT5616_G_RM_L_SM_L_MASK                 (0x3 << 14)
 427#define RT5616_G_RM_L_SM_L_SFT                  14
 428#define RT5616_G_IN_L_SM_L_MASK                 (0x3 << 12)
 429#define RT5616_G_IN_L_SM_L_SFT                  12
 430#define RT5616_G_DAC_L1_SM_L_MASK               (0x3 << 10)
 431#define RT5616_G_DAC_L1_SM_L_SFT                10
 432#define RT5616_G_DAC_L2_SM_L_MASK               (0x3 << 8)
 433#define RT5616_G_DAC_L2_SM_L_SFT                8
 434#define RT5616_G_OM_L_SM_L_MASK                 (0x3 << 6)
 435#define RT5616_G_OM_L_SM_L_SFT                  6
 436#define RT5616_M_RM_L_SM_L                      (0x1 << 5)
 437#define RT5616_M_RM_L_SM_L_SFT                  5
 438#define RT5616_M_IN_L_SM_L                      (0x1 << 4)
 439#define RT5616_M_IN_L_SM_L_SFT                  4
 440#define RT5616_M_DAC_L1_SM_L                    (0x1 << 3)
 441#define RT5616_M_DAC_L1_SM_L_SFT                3
 442#define RT5616_M_DAC_L2_SM_L                    (0x1 << 2)
 443#define RT5616_M_DAC_L2_SM_L_SFT                2
 444#define RT5616_M_OM_L_SM_L                      (0x1 << 1)
 445#define RT5616_M_OM_L_SM_L_SFT                  1
 446
 447/* SPK Right Mixer Control (0x47) */
 448#define RT5616_G_RM_R_SM_R_MASK                 (0x3 << 14)
 449#define RT5616_G_RM_R_SM_R_SFT                  14
 450#define RT5616_G_IN_R_SM_R_MASK                 (0x3 << 12)
 451#define RT5616_G_IN_R_SM_R_SFT                  12
 452#define RT5616_G_DAC_R1_SM_R_MASK               (0x3 << 10)
 453#define RT5616_G_DAC_R1_SM_R_SFT                10
 454#define RT5616_G_DAC_R2_SM_R_MASK               (0x3 << 8)
 455#define RT5616_G_DAC_R2_SM_R_SFT                8
 456#define RT5616_G_OM_R_SM_R_MASK                 (0x3 << 6)
 457#define RT5616_G_OM_R_SM_R_SFT                  6
 458#define RT5616_M_RM_R_SM_R                      (0x1 << 5)
 459#define RT5616_M_RM_R_SM_R_SFT                  5
 460#define RT5616_M_IN_R_SM_R                      (0x1 << 4)
 461#define RT5616_M_IN_R_SM_R_SFT                  4
 462#define RT5616_M_DAC_R1_SM_R                    (0x1 << 3)
 463#define RT5616_M_DAC_R1_SM_R_SFT                3
 464#define RT5616_M_DAC_R2_SM_R                    (0x1 << 2)
 465#define RT5616_M_DAC_R2_SM_R_SFT                2
 466#define RT5616_M_OM_R_SM_R                      (0x1 << 1)
 467#define RT5616_M_OM_R_SM_R_SFT                  1
 468
 469/* SPOLMIX Control (0x48) */
 470#define RT5616_M_DAC_R1_SPM_L                   (0x1 << 15)
 471#define RT5616_M_DAC_R1_SPM_L_SFT               15
 472#define RT5616_M_DAC_L1_SPM_L                   (0x1 << 14)
 473#define RT5616_M_DAC_L1_SPM_L_SFT               14
 474#define RT5616_M_SV_R_SPM_L                     (0x1 << 13)
 475#define RT5616_M_SV_R_SPM_L_SFT                 13
 476#define RT5616_M_SV_L_SPM_L                     (0x1 << 12)
 477#define RT5616_M_SV_L_SPM_L_SFT                 12
 478#define RT5616_M_BST1_SPM_L                     (0x1 << 11)
 479#define RT5616_M_BST1_SPM_L_SFT                 11
 480
 481/* SPORMIX Control (0x49) */
 482#define RT5616_M_DAC_R1_SPM_R                   (0x1 << 13)
 483#define RT5616_M_DAC_R1_SPM_R_SFT               13
 484#define RT5616_M_SV_R_SPM_R                     (0x1 << 12)
 485#define RT5616_M_SV_R_SPM_R_SFT                 12
 486#define RT5616_M_BST1_SPM_R                     (0x1 << 11)
 487#define RT5616_M_BST1_SPM_R_SFT                 11
 488
 489/* SPOLMIX / SPORMIX Ratio Control (0x4a) */
 490#define RT5616_SPO_CLSD_RATIO_MASK              (0x7)
 491#define RT5616_SPO_CLSD_RATIO_SFT               0
 492
 493/* Mono Output Mixer Control (0x4c) */
 494#define RT5616_M_DAC_R2_MM                      (0x1 << 15)
 495#define RT5616_M_DAC_R2_MM_SFT                  15
 496#define RT5616_M_DAC_L2_MM                      (0x1 << 14)
 497#define RT5616_M_DAC_L2_MM_SFT                  14
 498#define RT5616_M_OV_R_MM                        (0x1 << 13)
 499#define RT5616_M_OV_R_MM_SFT                    13
 500#define RT5616_M_OV_L_MM                        (0x1 << 12)
 501#define RT5616_M_OV_L_MM_SFT                    12
 502#define RT5616_M_BST1_MM                        (0x1 << 11)
 503#define RT5616_M_BST1_MM_SFT                    11
 504#define RT5616_G_MONOMIX_MASK                   (0x1 << 10)
 505#define RT5616_G_MONOMIX_SFT                    10
 506
 507/* Output Left Mixer Control 1 (0x4d) */
 508#define RT5616_G_BST2_OM_L_MASK                 (0x7 << 10)
 509#define RT5616_G_BST2_OM_L_SFT                  10
 510#define RT5616_G_BST1_OM_L_MASK                 (0x7 << 7)
 511#define RT5616_G_BST1_OM_L_SFT                  7
 512#define RT5616_G_IN1_L_OM_L_MASK                (0x7 << 4)
 513#define RT5616_G_IN1_L_OM_L_SFT                 4
 514#define RT5616_G_RM_L_OM_L_MASK                 (0x7 << 1)
 515#define RT5616_G_RM_L_OM_L_SFT                  1
 516
 517/* Output Left Mixer Control 2 (0x4e) */
 518#define RT5616_G_DAC_L1_OM_L_MASK               (0x7 << 7)
 519#define RT5616_G_DAC_L1_OM_L_SFT                7
 520#define RT5616_G_IN2_L_OM_L_MASK                (0x7 << 4)
 521#define RT5616_G_IN2_L_OM_L_SFT                 4
 522
 523/* Output Left Mixer Control 3 (0x4f) */
 524#define RT5616_M_IN2_L_OM_L                     (0x1 << 9)
 525#define RT5616_M_IN2_L_OM_L_SFT                 9
 526#define RT5616_M_BST2_OM_L                      (0x1 << 6)
 527#define RT5616_M_BST2_OM_L_SFT                  6
 528#define RT5616_M_BST1_OM_L                      (0x1 << 5)
 529#define RT5616_M_BST1_OM_L_SFT                  5
 530#define RT5616_M_IN1_L_OM_L                     (0x1 << 4)
 531#define RT5616_M_IN1_L_OM_L_SFT                 4
 532#define RT5616_M_RM_L_OM_L                      (0x1 << 3)
 533#define RT5616_M_RM_L_OM_L_SFT                  3
 534#define RT5616_M_DAC_L1_OM_L                    (0x1)
 535#define RT5616_M_DAC_L1_OM_L_SFT                0
 536
 537/* Output Right Mixer Control 1 (0x50) */
 538#define RT5616_G_BST2_OM_R_MASK                 (0x7 << 10)
 539#define RT5616_G_BST2_OM_R_SFT                  10
 540#define RT5616_G_BST1_OM_R_MASK                 (0x7 << 7)
 541#define RT5616_G_BST1_OM_R_SFT                  7
 542#define RT5616_G_IN1_R_OM_R_MASK                (0x7 << 4)
 543#define RT5616_G_IN1_R_OM_R_SFT                 4
 544#define RT5616_G_RM_R_OM_R_MASK                 (0x7 << 1)
 545#define RT5616_G_RM_R_OM_R_SFT                  1
 546
 547/* Output Right Mixer Control 2 (0x51) */
 548#define RT5616_G_DAC_R1_OM_R_MASK               (0x7 << 7)
 549#define RT5616_G_DAC_R1_OM_R_SFT                7
 550#define RT5616_G_IN2_R_OM_R_MASK                (0x7 << 4)
 551#define RT5616_G_IN2_R_OM_R_SFT                 4
 552
 553/* Output Right Mixer Control 3 (0x52) */
 554#define RT5616_M_IN2_R_OM_R                     (0x1 << 9)
 555#define RT5616_M_IN2_R_OM_R_SFT                 9
 556#define RT5616_M_BST2_OM_R                      (0x1 << 6)
 557#define RT5616_M_BST2_OM_R_SFT                  6
 558#define RT5616_M_BST1_OM_R                      (0x1 << 5)
 559#define RT5616_M_BST1_OM_R_SFT                  5
 560#define RT5616_M_IN1_R_OM_R                     (0x1 << 4)
 561#define RT5616_M_IN1_R_OM_R_SFT                 4
 562#define RT5616_M_RM_R_OM_R                      (0x1 << 3)
 563#define RT5616_M_RM_R_OM_R_SFT                  3
 564#define RT5616_M_DAC_R1_OM_R                    (0x1)
 565#define RT5616_M_DAC_R1_OM_R_SFT                0
 566
 567/* LOUT Mixer Control (0x53) */
 568#define RT5616_M_DAC_L1_LM                      (0x1 << 15)
 569#define RT5616_M_DAC_L1_LM_SFT                  15
 570#define RT5616_M_DAC_R1_LM                      (0x1 << 14)
 571#define RT5616_M_DAC_R1_LM_SFT                  14
 572#define RT5616_M_OV_L_LM                        (0x1 << 13)
 573#define RT5616_M_OV_L_LM_SFT                    13
 574#define RT5616_M_OV_R_LM                        (0x1 << 12)
 575#define RT5616_M_OV_R_LM_SFT                    12
 576#define RT5616_G_LOUTMIX_MASK                   (0x1 << 11)
 577#define RT5616_G_LOUTMIX_SFT                    11
 578
 579/* Power Management for Digital 1 (0x61) */
 580#define RT5616_PWR_I2S1                         (0x1 << 15)
 581#define RT5616_PWR_I2S1_BIT                     15
 582#define RT5616_PWR_I2S2                         (0x1 << 14)
 583#define RT5616_PWR_I2S2_BIT                     14
 584#define RT5616_PWR_DAC_L1                       (0x1 << 12)
 585#define RT5616_PWR_DAC_L1_BIT                   12
 586#define RT5616_PWR_DAC_R1                       (0x1 << 11)
 587#define RT5616_PWR_DAC_R1_BIT                   11
 588#define RT5616_PWR_ADC_L                        (0x1 << 2)
 589#define RT5616_PWR_ADC_L_BIT                    2
 590#define RT5616_PWR_ADC_R                        (0x1 << 1)
 591#define RT5616_PWR_ADC_R_BIT                    1
 592
 593/* Power Management for Digital 2 (0x62) */
 594#define RT5616_PWR_ADC_STO1_F                   (0x1 << 15)
 595#define RT5616_PWR_ADC_STO1_F_BIT               15
 596#define RT5616_PWR_DAC_STO1_F                   (0x1 << 11)
 597#define RT5616_PWR_DAC_STO1_F_BIT               11
 598
 599/* Power Management for Analog 1 (0x63) */
 600#define RT5616_PWR_VREF1                        (0x1 << 15)
 601#define RT5616_PWR_VREF1_BIT                    15
 602#define RT5616_PWR_FV1                          (0x1 << 14)
 603#define RT5616_PWR_FV1_BIT                      14
 604#define RT5616_PWR_MB                           (0x1 << 13)
 605#define RT5616_PWR_MB_BIT                       13
 606#define RT5616_PWR_LM                           (0x1 << 12)
 607#define RT5616_PWR_LM_BIT                       12
 608#define RT5616_PWR_BG                           (0x1 << 11)
 609#define RT5616_PWR_BG_BIT                       11
 610#define RT5616_PWR_HP_L                         (0x1 << 7)
 611#define RT5616_PWR_HP_L_BIT                     7
 612#define RT5616_PWR_HP_R                         (0x1 << 6)
 613#define RT5616_PWR_HP_R_BIT                     6
 614#define RT5616_PWR_HA                           (0x1 << 5)
 615#define RT5616_PWR_HA_BIT                       5
 616#define RT5616_PWR_VREF2                        (0x1 << 4)
 617#define RT5616_PWR_VREF2_BIT                    4
 618#define RT5616_PWR_FV2                          (0x1 << 3)
 619#define RT5616_PWR_FV2_BIT                      3
 620#define RT5616_PWR_LDO                          (0x1 << 2)
 621#define RT5616_PWR_LDO_BIT                      2
 622#define RT5616_PWR_LDO_DVO_MASK                 (0x3)
 623#define RT5616_PWR_LDO_DVO_1_0V                 0
 624#define RT5616_PWR_LDO_DVO_1_1V                 1
 625#define RT5616_PWR_LDO_DVO_1_2V                 2
 626#define RT5616_PWR_LDO_DVO_1_3V                 3
 627
 628/* Power Management for Analog 2 (0x64) */
 629#define RT5616_PWR_BST1                         (0x1 << 15)
 630#define RT5616_PWR_BST1_BIT                     15
 631#define RT5616_PWR_BST2                         (0x1 << 14)
 632#define RT5616_PWR_BST2_BIT                     14
 633#define RT5616_PWR_MB1                          (0x1 << 11)
 634#define RT5616_PWR_MB1_BIT                      11
 635#define RT5616_PWR_PLL                          (0x1 << 9)
 636#define RT5616_PWR_PLL_BIT                      9
 637#define RT5616_PWR_BST1_OP2                     (0x1 << 5)
 638#define RT5616_PWR_BST1_OP2_BIT                 5
 639#define RT5616_PWR_BST2_OP2                     (0x1 << 4)
 640#define RT5616_PWR_BST2_OP2_BIT                 4
 641#define RT5616_PWR_BST3_OP2                     (0x1 << 3)
 642#define RT5616_PWR_BST3_OP2_BIT                 3
 643#define RT5616_PWR_JD_M                         (0x1 << 2)
 644#define RT5616_PWM_JD_M_BIT                     2
 645#define RT5616_PWR_JD2                          (0x1 << 1)
 646#define RT5616_PWM_JD2_BIT                      1
 647#define RT5616_PWR_JD3                          (0x1)
 648#define RT5616_PWM_JD3_BIT                      0
 649
 650/* Power Management for Mixer (0x65) */
 651#define RT5616_PWR_OM_L                         (0x1 << 15)
 652#define RT5616_PWR_OM_L_BIT                     15
 653#define RT5616_PWR_OM_R                         (0x1 << 14)
 654#define RT5616_PWR_OM_R_BIT                     14
 655#define RT5616_PWR_RM_L                         (0x1 << 11)
 656#define RT5616_PWR_RM_L_BIT                     11
 657#define RT5616_PWR_RM_R                         (0x1 << 10)
 658#define RT5616_PWR_RM_R_BIT                     10
 659
 660/* Power Management for Volume (0x66) */
 661#define RT5616_PWR_OV_L                         (0x1 << 13)
 662#define RT5616_PWR_OV_L_BIT                     13
 663#define RT5616_PWR_OV_R                         (0x1 << 12)
 664#define RT5616_PWR_OV_R_BIT                     12
 665#define RT5616_PWR_HV_L                         (0x1 << 11)
 666#define RT5616_PWR_HV_L_BIT                     11
 667#define RT5616_PWR_HV_R                         (0x1 << 10)
 668#define RT5616_PWR_HV_R_BIT                     10
 669#define RT5616_PWR_IN1_L                        (0x1 << 9)
 670#define RT5616_PWR_IN1_L_BIT                    9
 671#define RT5616_PWR_IN1_R                        (0x1 << 8)
 672#define RT5616_PWR_IN1_R_BIT                    8
 673#define RT5616_PWR_IN2_L                        (0x1 << 7)
 674#define RT5616_PWR_IN2_L_BIT                    7
 675#define RT5616_PWR_IN2_R                        (0x1 << 6)
 676#define RT5616_PWR_IN2_R_BIT                    6
 677
 678/* I2S1/2/3 Audio Serial Data Port Control (0x70 0x71) */
 679#define RT5616_I2S_MS_MASK                      (0x1 << 15)
 680#define RT5616_I2S_MS_SFT                       15
 681#define RT5616_I2S_MS_M                         (0x0 << 15)
 682#define RT5616_I2S_MS_S                         (0x1 << 15)
 683#define RT5616_I2S_O_CP_MASK                    (0x3 << 10)
 684#define RT5616_I2S_O_CP_SFT                     10
 685#define RT5616_I2S_O_CP_OFF                     (0x0 << 10)
 686#define RT5616_I2S_O_CP_U_LAW                   (0x1 << 10)
 687#define RT5616_I2S_O_CP_A_LAW                   (0x2 << 10)
 688#define RT5616_I2S_I_CP_MASK                    (0x3 << 8)
 689#define RT5616_I2S_I_CP_SFT                     8
 690#define RT5616_I2S_I_CP_OFF                     (0x0 << 8)
 691#define RT5616_I2S_I_CP_U_LAW                   (0x1 << 8)
 692#define RT5616_I2S_I_CP_A_LAW                   (0x2 << 8)
 693#define RT5616_I2S_BP_MASK                      (0x1 << 7)
 694#define RT5616_I2S_BP_SFT                       7
 695#define RT5616_I2S_BP_NOR                       (0x0 << 7)
 696#define RT5616_I2S_BP_INV                       (0x1 << 7)
 697#define RT5616_I2S_DL_MASK                      (0x3 << 2)
 698#define RT5616_I2S_DL_SFT                       2
 699#define RT5616_I2S_DL_16                        (0x0 << 2)
 700#define RT5616_I2S_DL_20                        (0x1 << 2)
 701#define RT5616_I2S_DL_24                        (0x2 << 2)
 702#define RT5616_I2S_DL_8                         (0x3 << 2)
 703#define RT5616_I2S_DF_MASK                      (0x3)
 704#define RT5616_I2S_DF_SFT                       0
 705#define RT5616_I2S_DF_I2S                       (0x0)
 706#define RT5616_I2S_DF_LEFT                      (0x1)
 707#define RT5616_I2S_DF_PCM_A                     (0x2)
 708#define RT5616_I2S_DF_PCM_B                     (0x3)
 709
 710/* ADC/DAC Clock Control 1 (0x73) */
 711#define RT5616_I2S_PD1_MASK                     (0x7 << 12)
 712#define RT5616_I2S_PD1_SFT                      12
 713#define RT5616_I2S_PD1_1                        (0x0 << 12)
 714#define RT5616_I2S_PD1_2                        (0x1 << 12)
 715#define RT5616_I2S_PD1_3                        (0x2 << 12)
 716#define RT5616_I2S_PD1_4                        (0x3 << 12)
 717#define RT5616_I2S_PD1_6                        (0x4 << 12)
 718#define RT5616_I2S_PD1_8                        (0x5 << 12)
 719#define RT5616_I2S_PD1_12                       (0x6 << 12)
 720#define RT5616_I2S_PD1_16                       (0x7 << 12)
 721#define RT5616_I2S_BCLK_MS2_MASK                (0x1 << 11)
 722#define RT5616_DAC_OSR_MASK                     (0x3 << 2)
 723#define RT5616_DAC_OSR_SFT                      2
 724#define RT5616_DAC_OSR_128                      (0x0 << 2)
 725#define RT5616_DAC_OSR_64                       (0x1 << 2)
 726#define RT5616_DAC_OSR_32                       (0x2 << 2)
 727#define RT5616_DAC_OSR_128_3                    (0x3 << 2)
 728#define RT5616_ADC_OSR_MASK                     (0x3)
 729#define RT5616_ADC_OSR_SFT                      0
 730#define RT5616_ADC_OSR_128                      (0x0)
 731#define RT5616_ADC_OSR_64                       (0x1)
 732#define RT5616_ADC_OSR_32                       (0x2)
 733#define RT5616_ADC_OSR_128_3                    (0x3)
 734
 735/* ADC/DAC Clock Control 2 (0x74) */
 736#define RT5616_DAHPF_EN                         (0x1 << 11)
 737#define RT5616_DAHPF_EN_SFT                     11
 738#define RT5616_ADHPF_EN                         (0x1 << 10)
 739#define RT5616_ADHPF_EN_SFT                     10
 740
 741/* TDM Control 1 (0x77) */
 742#define RT5616_TDM_INTEL_SEL_MASK               (0x1 << 15)
 743#define RT5616_TDM_INTEL_SEL_SFT                15
 744#define RT5616_TDM_INTEL_SEL_64                 (0x0 << 15)
 745#define RT5616_TDM_INTEL_SEL_50                 (0x1 << 15)
 746#define RT5616_TDM_MODE_SEL_MASK                (0x1 << 14)
 747#define RT5616_TDM_MODE_SEL_SFT                 14
 748#define RT5616_TDM_MODE_SEL_NOR                 (0x0 << 14)
 749#define RT5616_TDM_MODE_SEL_TDM                 (0x1 << 14)
 750#define RT5616_TDM_CH_NUM_SEL_MASK              (0x3 << 12)
 751#define RT5616_TDM_CH_NUM_SEL_SFT               12
 752#define RT5616_TDM_CH_NUM_SEL_2                 (0x0 << 12)
 753#define RT5616_TDM_CH_NUM_SEL_4                 (0x1 << 12)
 754#define RT5616_TDM_CH_NUM_SEL_6                 (0x2 << 12)
 755#define RT5616_TDM_CH_NUM_SEL_8                 (0x3 << 12)
 756#define RT5616_TDM_CH_LEN_SEL_MASK              (0x3 << 10)
 757#define RT5616_TDM_CH_LEN_SEL_SFT               10
 758#define RT5616_TDM_CH_LEN_SEL_16                (0x0 << 10)
 759#define RT5616_TDM_CH_LEN_SEL_20                (0x1 << 10)
 760#define RT5616_TDM_CH_LEN_SEL_24                (0x2 << 10)
 761#define RT5616_TDM_CH_LEN_SEL_32                (0x3 << 10)
 762#define RT5616_TDM_ADC_SEL_MASK                 (0x1 << 9)
 763#define RT5616_TDM_ADC_SEL_SFT                  9
 764#define RT5616_TDM_ADC_SEL_NOR                  (0x0 << 9)
 765#define RT5616_TDM_ADC_SEL_SWAP                 (0x1 << 9)
 766#define RT5616_TDM_ADC_START_SEL_MASK           (0x1 << 8)
 767#define RT5616_TDM_ADC_START_SEL_SFT            8
 768#define RT5616_TDM_ADC_START_SEL_SL0            (0x0 << 8)
 769#define RT5616_TDM_ADC_START_SEL_SL4            (0x1 << 8)
 770#define RT5616_TDM_I2S_CH2_SEL_MASK             (0x3 << 6)
 771#define RT5616_TDM_I2S_CH2_SEL_SFT              6
 772#define RT5616_TDM_I2S_CH2_SEL_LR               (0x0 << 6)
 773#define RT5616_TDM_I2S_CH2_SEL_RL               (0x1 << 6)
 774#define RT5616_TDM_I2S_CH2_SEL_LL               (0x2 << 6)
 775#define RT5616_TDM_I2S_CH2_SEL_RR               (0x3 << 6)
 776#define RT5616_TDM_I2S_CH4_SEL_MASK             (0x3 << 4)
 777#define RT5616_TDM_I2S_CH4_SEL_SFT              4
 778#define RT5616_TDM_I2S_CH4_SEL_LR               (0x0 << 4)
 779#define RT5616_TDM_I2S_CH4_SEL_RL               (0x1 << 4)
 780#define RT5616_TDM_I2S_CH4_SEL_LL               (0x2 << 4)
 781#define RT5616_TDM_I2S_CH4_SEL_RR               (0x3 << 4)
 782#define RT5616_TDM_I2S_CH6_SEL_MASK             (0x3 << 2)
 783#define RT5616_TDM_I2S_CH6_SEL_SFT              2
 784#define RT5616_TDM_I2S_CH6_SEL_LR               (0x0 << 2)
 785#define RT5616_TDM_I2S_CH6_SEL_RL               (0x1 << 2)
 786#define RT5616_TDM_I2S_CH6_SEL_LL               (0x2 << 2)
 787#define RT5616_TDM_I2S_CH6_SEL_RR               (0x3 << 2)
 788#define RT5616_TDM_I2S_CH8_SEL_MASK             (0x3)
 789#define RT5616_TDM_I2S_CH8_SEL_SFT              0
 790#define RT5616_TDM_I2S_CH8_SEL_LR               (0x0)
 791#define RT5616_TDM_I2S_CH8_SEL_RL               (0x1)
 792#define RT5616_TDM_I2S_CH8_SEL_LL               (0x2)
 793#define RT5616_TDM_I2S_CH8_SEL_RR               (0x3)
 794
 795/* TDM Control 2 (0x78) */
 796#define RT5616_TDM_LRCK_POL_SEL_MASK            (0x1 << 15)
 797#define RT5616_TDM_LRCK_POL_SEL_SFT             15
 798#define RT5616_TDM_LRCK_POL_SEL_NOR             (0x0 << 15)
 799#define RT5616_TDM_LRCK_POL_SEL_INV             (0x1 << 15)
 800#define RT5616_TDM_CH_VAL_SEL_MASK              (0x1 << 14)
 801#define RT5616_TDM_CH_VAL_SEL_SFT               14
 802#define RT5616_TDM_CH_VAL_SEL_CH01              (0x0 << 14)
 803#define RT5616_TDM_CH_VAL_SEL_CH0123            (0x1 << 14)
 804#define RT5616_TDM_CH_VAL_EN                    (0x1 << 13)
 805#define RT5616_TDM_CH_VAL_SFT                   13
 806#define RT5616_TDM_LPBK_EN                      (0x1 << 12)
 807#define RT5616_TDM_LPBK_SFT                     12
 808#define RT5616_TDM_LRCK_PULSE_SEL_MASK          (0x1 << 11)
 809#define RT5616_TDM_LRCK_PULSE_SEL_SFT           11
 810#define RT5616_TDM_LRCK_PULSE_SEL_BCLK          (0x0 << 11)
 811#define RT5616_TDM_LRCK_PULSE_SEL_CH            (0x1 << 11)
 812#define RT5616_TDM_END_EDGE_SEL_MASK            (0x1 << 10)
 813#define RT5616_TDM_END_EDGE_SEL_SFT             10
 814#define RT5616_TDM_END_EDGE_SEL_POS             (0x0 << 10)
 815#define RT5616_TDM_END_EDGE_SEL_NEG             (0x1 << 10)
 816#define RT5616_TDM_END_EDGE_EN                  (0x1 << 9)
 817#define RT5616_TDM_END_EDGE_EN_SFT              9
 818#define RT5616_TDM_TRAN_EDGE_SEL_MASK           (0x1 << 8)
 819#define RT5616_TDM_TRAN_EDGE_SEL_SFT            8
 820#define RT5616_TDM_TRAN_EDGE_SEL_POS            (0x0 << 8)
 821#define RT5616_TDM_TRAN_EDGE_SEL_NEG            (0x1 << 8)
 822#define RT5616_M_TDM2_L                         (0x1 << 7)
 823#define RT5616_M_TDM2_L_SFT                     7
 824#define RT5616_M_TDM2_R                         (0x1 << 6)
 825#define RT5616_M_TDM2_R_SFT                     6
 826#define RT5616_M_TDM4_L                         (0x1 << 5)
 827#define RT5616_M_TDM4_L_SFT                     5
 828#define RT5616_M_TDM4_R                         (0x1 << 4)
 829#define RT5616_M_TDM4_R_SFT                     4
 830
 831/* Global Clock Control (0x80) */
 832#define RT5616_SCLK_SRC_MASK                    (0x3 << 14)
 833#define RT5616_SCLK_SRC_SFT                     14
 834#define RT5616_SCLK_SRC_MCLK                    (0x0 << 14)
 835#define RT5616_SCLK_SRC_PLL1                    (0x1 << 14)
 836#define RT5616_PLL1_SRC_MASK                    (0x3 << 12)
 837#define RT5616_PLL1_SRC_SFT                     12
 838#define RT5616_PLL1_SRC_MCLK                    (0x0 << 12)
 839#define RT5616_PLL1_SRC_BCLK1                   (0x1 << 12)
 840#define RT5616_PLL1_SRC_BCLK2                   (0x2 << 12)
 841#define RT5616_PLL1_PD_MASK                     (0x1 << 3)
 842#define RT5616_PLL1_PD_SFT                      3
 843#define RT5616_PLL1_PD_1                        (0x0 << 3)
 844#define RT5616_PLL1_PD_2                        (0x1 << 3)
 845
 846#define RT5616_PLL_INP_MAX                      40000000
 847#define RT5616_PLL_INP_MIN                      256000
 848/* PLL M/N/K Code Control 1 (0x81) */
 849#define RT5616_PLL_N_MAX                        0x1ff
 850#define RT5616_PLL_N_MASK                       (RT5616_PLL_N_MAX << 7)
 851#define RT5616_PLL_N_SFT                        7
 852#define RT5616_PLL_K_MAX                        0x1f
 853#define RT5616_PLL_K_MASK                       (RT5616_PLL_K_MAX)
 854#define RT5616_PLL_K_SFT                        0
 855
 856/* PLL M/N/K Code Control 2 (0x82) */
 857#define RT5616_PLL_M_MAX                        0xf
 858#define RT5616_PLL_M_MASK                       (RT5616_PLL_M_MAX << 12)
 859#define RT5616_PLL_M_SFT                        12
 860#define RT5616_PLL_M_BP                         (0x1 << 11)
 861#define RT5616_PLL_M_BP_SFT                     11
 862
 863/* PLL tracking mode 1 (0x83) */
 864#define RT5616_STO1_T_MASK                      (0x1 << 15)
 865#define RT5616_STO1_T_SFT                       15
 866#define RT5616_STO1_T_SCLK                      (0x0 << 15)
 867#define RT5616_STO1_T_LRCK1                     (0x1 << 15)
 868#define RT5616_STO2_T_MASK                      (0x1 << 12)
 869#define RT5616_STO2_T_SFT                       12
 870#define RT5616_STO2_T_I2S2                      (0x0 << 12)
 871#define RT5616_STO2_T_LRCK2                     (0x1 << 12)
 872#define RT5616_ASRC2_REF_MASK                   (0x1 << 11)
 873#define RT5616_ASRC2_REF_SFT                    11
 874#define RT5616_ASRC2_REF_LRCK2                  (0x0 << 11)
 875#define RT5616_ASRC2_REF_LRCK1                  (0x1 << 11)
 876#define RT5616_DMIC_1_M_MASK                    (0x1 << 9)
 877#define RT5616_DMIC_1_M_SFT                     9
 878#define RT5616_DMIC_1_M_NOR                     (0x0 << 9)
 879#define RT5616_DMIC_1_M_ASYN                    (0x1 << 9)
 880
 881/* PLL tracking mode 2 (0x84) */
 882#define RT5616_STO1_ASRC_EN                     (0x1 << 15)
 883#define RT5616_STO1_ASRC_EN_SFT                 15
 884#define RT5616_STO2_ASRC_EN                     (0x1 << 14)
 885#define RT5616_STO2_ASRC_EN_SFT                 14
 886#define RT5616_STO1_DAC_M_MASK                  (0x1 << 13)
 887#define RT5616_STO1_DAC_M_SFT                   13
 888#define RT5616_STO1_DAC_M_NOR                   (0x0 << 13)
 889#define RT5616_STO1_DAC_M_ASRC                  (0x1 << 13)
 890#define RT5616_STO2_DAC_M_MASK                  (0x1 << 12)
 891#define RT5616_STO2_DAC_M_SFT                   12
 892#define RT5616_STO2_DAC_M_NOR                   (0x0 << 12)
 893#define RT5616_STO2_DAC_M_ASRC                  (0x1 << 12)
 894#define RT5616_ADC_M_MASK                       (0x1 << 11)
 895#define RT5616_ADC_M_SFT                        11
 896#define RT5616_ADC_M_NOR                        (0x0 << 11)
 897#define RT5616_ADC_M_ASRC                       (0x1 << 11)
 898#define RT5616_I2S1_R_D_MASK                    (0x1 << 4)
 899#define RT5616_I2S1_R_D_SFT                     4
 900#define RT5616_I2S1_R_D_DIS                     (0x0 << 4)
 901#define RT5616_I2S1_R_D_EN                      (0x1 << 4)
 902#define RT5616_I2S2_R_D_MASK                    (0x1 << 3)
 903#define RT5616_I2S2_R_D_SFT                     3
 904#define RT5616_I2S2_R_D_DIS                     (0x0 << 3)
 905#define RT5616_I2S2_R_D_EN                      (0x1 << 3)
 906#define RT5616_PRE_SCLK_MASK                    (0x3)
 907#define RT5616_PRE_SCLK_SFT                     0
 908#define RT5616_PRE_SCLK_512                     (0x0)
 909#define RT5616_PRE_SCLK_1024                    (0x1)
 910#define RT5616_PRE_SCLK_2048                    (0x2)
 911
 912/* PLL tracking mode 3 (0x85) */
 913#define RT5616_I2S1_RATE_MASK                   (0xf << 12)
 914#define RT5616_I2S1_RATE_SFT                    12
 915#define RT5616_I2S2_RATE_MASK                   (0xf << 8)
 916#define RT5616_I2S2_RATE_SFT                    8
 917#define RT5616_G_ASRC_LP_MASK                   (0x1 << 3)
 918#define RT5616_G_ASRC_LP_SFT                    3
 919#define RT5616_ASRC_LP_F_M                      (0x1 << 2)
 920#define RT5616_ASRC_LP_F_SFT                    2
 921#define RT5616_ASRC_LP_F_NOR                    (0x0 << 2)
 922#define RT5616_ASRC_LP_F_SB                     (0x1 << 2)
 923#define RT5616_FTK_PH_DET_MASK                  (0x3)
 924#define RT5616_FTK_PH_DET_SFT                   0
 925#define RT5616_FTK_PH_DET_DIV1                  (0x0)
 926#define RT5616_FTK_PH_DET_DIV2                  (0x1)
 927#define RT5616_FTK_PH_DET_DIV4                  (0x2)
 928#define RT5616_FTK_PH_DET_DIV8                  (0x3)
 929
 930/*PLL tracking mode 6 (0x89) */
 931#define RT5616_I2S1_PD_MASK                     (0x7 << 12)
 932#define RT5616_I2S1_PD_SFT                      12
 933#define RT5616_I2S2_PD_MASK                     (0x7 << 8)
 934#define RT5616_I2S2_PD_SFT                      8
 935
 936/*PLL tracking mode 7 (0x8a) */
 937#define RT5616_FSI1_RATE_MASK                   (0xf << 12)
 938#define RT5616_FSI1_RATE_SFT                    12
 939#define RT5616_FSI2_RATE_MASK                   (0xf << 8)
 940#define RT5616_FSI2_RATE_SFT                    8
 941
 942/* HPOUT Over Current Detection (0x8b) */
 943#define RT5616_HP_OVCD_MASK                     (0x1 << 10)
 944#define RT5616_HP_OVCD_SFT                      10
 945#define RT5616_HP_OVCD_DIS                      (0x0 << 10)
 946#define RT5616_HP_OVCD_EN                       (0x1 << 10)
 947#define RT5616_HP_OC_TH_MASK                    (0x3 << 8)
 948#define RT5616_HP_OC_TH_SFT                     8
 949#define RT5616_HP_OC_TH_90                      (0x0 << 8)
 950#define RT5616_HP_OC_TH_105                     (0x1 << 8)
 951#define RT5616_HP_OC_TH_120                     (0x2 << 8)
 952#define RT5616_HP_OC_TH_135                     (0x3 << 8)
 953
 954/* Depop Mode Control 1 (0x8e) */
 955#define RT5616_SMT_TRIG_MASK                    (0x1 << 15)
 956#define RT5616_SMT_TRIG_SFT                     15
 957#define RT5616_SMT_TRIG_DIS                     (0x0 << 15)
 958#define RT5616_SMT_TRIG_EN                      (0x1 << 15)
 959#define RT5616_HP_L_SMT_MASK                    (0x1 << 9)
 960#define RT5616_HP_L_SMT_SFT                     9
 961#define RT5616_HP_L_SMT_DIS                     (0x0 << 9)
 962#define RT5616_HP_L_SMT_EN                      (0x1 << 9)
 963#define RT5616_HP_R_SMT_MASK                    (0x1 << 8)
 964#define RT5616_HP_R_SMT_SFT                     8
 965#define RT5616_HP_R_SMT_DIS                     (0x0 << 8)
 966#define RT5616_HP_R_SMT_EN                      (0x1 << 8)
 967#define RT5616_HP_CD_PD_MASK                    (0x1 << 7)
 968#define RT5616_HP_CD_PD_SFT                     7
 969#define RT5616_HP_CD_PD_DIS                     (0x0 << 7)
 970#define RT5616_HP_CD_PD_EN                      (0x1 << 7)
 971#define RT5616_RSTN_MASK                        (0x1 << 6)
 972#define RT5616_RSTN_SFT                         6
 973#define RT5616_RSTN_DIS                         (0x0 << 6)
 974#define RT5616_RSTN_EN                          (0x1 << 6)
 975#define RT5616_RSTP_MASK                        (0x1 << 5)
 976#define RT5616_RSTP_SFT                         5
 977#define RT5616_RSTP_DIS                         (0x0 << 5)
 978#define RT5616_RSTP_EN                          (0x1 << 5)
 979#define RT5616_HP_CO_MASK                       (0x1 << 4)
 980#define RT5616_HP_CO_SFT                        4
 981#define RT5616_HP_CO_DIS                        (0x0 << 4)
 982#define RT5616_HP_CO_EN                         (0x1 << 4)
 983#define RT5616_HP_CP_MASK                       (0x1 << 3)
 984#define RT5616_HP_CP_SFT                        3
 985#define RT5616_HP_CP_PD                         (0x0 << 3)
 986#define RT5616_HP_CP_PU                         (0x1 << 3)
 987#define RT5616_HP_SG_MASK                       (0x1 << 2)
 988#define RT5616_HP_SG_SFT                        2
 989#define RT5616_HP_SG_DIS                        (0x0 << 2)
 990#define RT5616_HP_SG_EN                         (0x1 << 2)
 991#define RT5616_HP_DP_MASK                       (0x1 << 1)
 992#define RT5616_HP_DP_SFT                        1
 993#define RT5616_HP_DP_PD                         (0x0 << 1)
 994#define RT5616_HP_DP_PU                         (0x1 << 1)
 995#define RT5616_HP_CB_MASK                       (0x1)
 996#define RT5616_HP_CB_SFT                        0
 997#define RT5616_HP_CB_PD                         (0x0)
 998#define RT5616_HP_CB_PU                         (0x1)
 999
1000/* Depop Mode Control 2 (0x8f) */
1001#define RT5616_DEPOP_MASK                       (0x1 << 13)
1002#define RT5616_DEPOP_SFT                        13
1003#define RT5616_DEPOP_AUTO                       (0x0 << 13)
1004#define RT5616_DEPOP_MAN                        (0x1 << 13)
1005#define RT5616_RAMP_MASK                        (0x1 << 12)
1006#define RT5616_RAMP_SFT                         12
1007#define RT5616_RAMP_DIS                         (0x0 << 12)
1008#define RT5616_RAMP_EN                          (0x1 << 12)
1009#define RT5616_BPS_MASK                         (0x1 << 11)
1010#define RT5616_BPS_SFT                          11
1011#define RT5616_BPS_DIS                          (0x0 << 11)
1012#define RT5616_BPS_EN                           (0x1 << 11)
1013#define RT5616_FAST_UPDN_MASK                   (0x1 << 10)
1014#define RT5616_FAST_UPDN_SFT                    10
1015#define RT5616_FAST_UPDN_DIS                    (0x0 << 10)
1016#define RT5616_FAST_UPDN_EN                     (0x1 << 10)
1017#define RT5616_MRES_MASK                        (0x3 << 8)
1018#define RT5616_MRES_SFT                         8
1019#define RT5616_MRES_15MO                        (0x0 << 8)
1020#define RT5616_MRES_25MO                        (0x1 << 8)
1021#define RT5616_MRES_35MO                        (0x2 << 8)
1022#define RT5616_MRES_45MO                        (0x3 << 8)
1023#define RT5616_VLO_MASK                         (0x1 << 7)
1024#define RT5616_VLO_SFT                          7
1025#define RT5616_VLO_3V                           (0x0 << 7)
1026#define RT5616_VLO_32V                          (0x1 << 7)
1027#define RT5616_DIG_DP_MASK                      (0x1 << 6)
1028#define RT5616_DIG_DP_SFT                       6
1029#define RT5616_DIG_DP_DIS                       (0x0 << 6)
1030#define RT5616_DIG_DP_EN                        (0x1 << 6)
1031#define RT5616_DP_TH_MASK                       (0x3 << 4)
1032#define RT5616_DP_TH_SFT                        4
1033
1034/* Depop Mode Control 3 (0x90) */
1035#define RT5616_CP_SYS_MASK                      (0x7 << 12)
1036#define RT5616_CP_SYS_SFT                       12
1037#define RT5616_CP_FQ1_MASK                      (0x7 << 8)
1038#define RT5616_CP_FQ1_SFT                       8
1039#define RT5616_CP_FQ2_MASK                      (0x7 << 4)
1040#define RT5616_CP_FQ2_SFT                       4
1041#define RT5616_CP_FQ3_MASK                      (0x7)
1042#define RT5616_CP_FQ3_SFT                       0
1043#define RT5616_CP_FQ_1_5_KHZ                    0
1044#define RT5616_CP_FQ_3_KHZ                      1
1045#define RT5616_CP_FQ_6_KHZ                      2
1046#define RT5616_CP_FQ_12_KHZ                     3
1047#define RT5616_CP_FQ_24_KHZ                     4
1048#define RT5616_CP_FQ_48_KHZ                     5
1049#define RT5616_CP_FQ_96_KHZ                     6
1050#define RT5616_CP_FQ_192_KHZ                    7
1051
1052/* HPOUT charge pump (0x91) */
1053#define RT5616_OSW_L_MASK                       (0x1 << 11)
1054#define RT5616_OSW_L_SFT                        11
1055#define RT5616_OSW_L_DIS                        (0x0 << 11)
1056#define RT5616_OSW_L_EN                         (0x1 << 11)
1057#define RT5616_OSW_R_MASK                       (0x1 << 10)
1058#define RT5616_OSW_R_SFT                        10
1059#define RT5616_OSW_R_DIS                        (0x0 << 10)
1060#define RT5616_OSW_R_EN                         (0x1 << 10)
1061#define RT5616_PM_HP_MASK                       (0x3 << 8)
1062#define RT5616_PM_HP_SFT                        8
1063#define RT5616_PM_HP_LV                         (0x0 << 8)
1064#define RT5616_PM_HP_MV                         (0x1 << 8)
1065#define RT5616_PM_HP_HV                         (0x2 << 8)
1066#define RT5616_IB_HP_MASK                       (0x3 << 6)
1067#define RT5616_IB_HP_SFT                        6
1068#define RT5616_IB_HP_125IL                      (0x0 << 6)
1069#define RT5616_IB_HP_25IL                       (0x1 << 6)
1070#define RT5616_IB_HP_5IL                        (0x2 << 6)
1071#define RT5616_IB_HP_1IL                        (0x3 << 6)
1072
1073/* Micbias Control (0x93) */
1074#define RT5616_MIC1_BS_MASK                     (0x1 << 15)
1075#define RT5616_MIC1_BS_SFT                      15
1076#define RT5616_MIC1_BS_9AV                      (0x0 << 15)
1077#define RT5616_MIC1_BS_75AV                     (0x1 << 15)
1078#define RT5616_MIC1_CLK_MASK                    (0x1 << 13)
1079#define RT5616_MIC1_CLK_SFT                     13
1080#define RT5616_MIC1_CLK_DIS                     (0x0 << 13)
1081#define RT5616_MIC1_CLK_EN                      (0x1 << 13)
1082#define RT5616_MIC1_OVCD_MASK                   (0x1 << 11)
1083#define RT5616_MIC1_OVCD_SFT                    11
1084#define RT5616_MIC1_OVCD_DIS                    (0x0 << 11)
1085#define RT5616_MIC1_OVCD_EN                     (0x1 << 11)
1086#define RT5616_MIC1_OVTH_MASK                   (0x3 << 9)
1087#define RT5616_MIC1_OVTH_SFT                    9
1088#define RT5616_MIC1_OVTH_600UA                  (0x0 << 9)
1089#define RT5616_MIC1_OVTH_1500UA                 (0x1 << 9)
1090#define RT5616_MIC1_OVTH_2000UA                 (0x2 << 9)
1091#define RT5616_PWR_MB_MASK                      (0x1 << 5)
1092#define RT5616_PWR_MB_SFT                       5
1093#define RT5616_PWR_MB_PD                        (0x0 << 5)
1094#define RT5616_PWR_MB_PU                        (0x1 << 5)
1095#define RT5616_PWR_CLK12M_MASK                  (0x1 << 4)
1096#define RT5616_PWR_CLK12M_SFT                   4
1097#define RT5616_PWR_CLK12M_PD                    (0x0 << 4)
1098#define RT5616_PWR_CLK12M_PU                    (0x1 << 4)
1099
1100/* Analog JD Control 1 (0x94) */
1101#define RT5616_JD2_CMP_MASK                     (0x7 << 12)
1102#define RT5616_JD2_CMP_SFT                      12
1103#define RT5616_JD_PU                            (0x1 << 11)
1104#define RT5616_JD_PU_SFT                        11
1105#define RT5616_JD_PD                            (0x1 << 10)
1106#define RT5616_JD_PD_SFT                        10
1107#define RT5616_JD_MODE_SEL_MASK                 (0x3 << 8)
1108#define RT5616_JD_MODE_SEL_SFT                  8
1109#define RT5616_JD_MODE_SEL_M0                   (0x0 << 8)
1110#define RT5616_JD_MODE_SEL_M1                   (0x1 << 8)
1111#define RT5616_JD_MODE_SEL_M2                   (0x2 << 8)
1112#define RT5616_JD_M_CMP                         (0x7 << 4)
1113#define RT5616_JD_M_CMP_SFT                     4
1114#define RT5616_JD_M_PU                          (0x1 << 3)
1115#define RT5616_JD_M_PU_SFT                      3
1116#define RT5616_JD_M_PD                          (0x1 << 2)
1117#define RT5616_JD_M_PD_SFT                      2
1118#define RT5616_JD_M_MODE_SEL_MASK               (0x3)
1119#define RT5616_JD_M_MODE_SEL_SFT                0
1120#define RT5616_JD_M_MODE_SEL_M0                 (0x0)
1121#define RT5616_JD_M_MODE_SEL_M1                 (0x1)
1122#define RT5616_JD_M_MODE_SEL_M2                 (0x2)
1123
1124/* Analog JD Control 2 (0x95) */
1125#define RT5616_JD3_CMP_MASK                     (0x7 << 12)
1126#define RT5616_JD3_CMP_SFT                      12
1127
1128/* EQ Control 1 (0xb0) */
1129#define RT5616_EQ_SRC_MASK                      (0x1 << 15)
1130#define RT5616_EQ_SRC_SFT                       15
1131#define RT5616_EQ_SRC_DAC                       (0x0 << 15)
1132#define RT5616_EQ_SRC_ADC                       (0x1 << 15)
1133#define RT5616_EQ_UPD                           (0x1 << 14)
1134#define RT5616_EQ_UPD_BIT                       14
1135#define RT5616_EQ_CD_MASK                       (0x1 << 13)
1136#define RT5616_EQ_CD_SFT                        13
1137#define RT5616_EQ_CD_DIS                        (0x0 << 13)
1138#define RT5616_EQ_CD_EN                         (0x1 << 13)
1139#define RT5616_EQ_DITH_MASK                     (0x3 << 8)
1140#define RT5616_EQ_DITH_SFT                      8
1141#define RT5616_EQ_DITH_NOR                      (0x0 << 8)
1142#define RT5616_EQ_DITH_LSB                      (0x1 << 8)
1143#define RT5616_EQ_DITH_LSB_1                    (0x2 << 8)
1144#define RT5616_EQ_DITH_LSB_2                    (0x3 << 8)
1145#define RT5616_EQ_CD_F                          (0x1 << 7)
1146#define RT5616_EQ_CD_F_BIT                      7
1147#define RT5616_EQ_STA_HP2                       (0x1 << 6)
1148#define RT5616_EQ_STA_HP2_BIT                   6
1149#define RT5616_EQ_STA_HP1                       (0x1 << 5)
1150#define RT5616_EQ_STA_HP1_BIT                   5
1151#define RT5616_EQ_STA_BP4                       (0x1 << 4)
1152#define RT5616_EQ_STA_BP4_BIT                   4
1153#define RT5616_EQ_STA_BP3                       (0x1 << 3)
1154#define RT5616_EQ_STA_BP3_BIT                   3
1155#define RT5616_EQ_STA_BP2                       (0x1 << 2)
1156#define RT5616_EQ_STA_BP2_BIT                   2
1157#define RT5616_EQ_STA_BP1                       (0x1 << 1)
1158#define RT5616_EQ_STA_BP1_BIT                   1
1159#define RT5616_EQ_STA_LP                        (0x1)
1160#define RT5616_EQ_STA_LP_BIT                    0
1161
1162/* EQ Control 2 (0xb1) */
1163#define RT5616_EQ_HPF1_M_MASK                   (0x1 << 8)
1164#define RT5616_EQ_HPF1_M_SFT                    8
1165#define RT5616_EQ_HPF1_M_HI                     (0x0 << 8)
1166#define RT5616_EQ_HPF1_M_1ST                    (0x1 << 8)
1167#define RT5616_EQ_LPF1_M_MASK                   (0x1 << 7)
1168#define RT5616_EQ_LPF1_M_SFT                    7
1169#define RT5616_EQ_LPF1_M_LO                     (0x0 << 7)
1170#define RT5616_EQ_LPF1_M_1ST                    (0x1 << 7)
1171#define RT5616_EQ_HPF2_MASK                     (0x1 << 6)
1172#define RT5616_EQ_HPF2_SFT                      6
1173#define RT5616_EQ_HPF2_DIS                      (0x0 << 6)
1174#define RT5616_EQ_HPF2_EN                       (0x1 << 6)
1175#define RT5616_EQ_HPF1_MASK                     (0x1 << 5)
1176#define RT5616_EQ_HPF1_SFT                      5
1177#define RT5616_EQ_HPF1_DIS                      (0x0 << 5)
1178#define RT5616_EQ_HPF1_EN                       (0x1 << 5)
1179#define RT5616_EQ_BPF4_MASK                     (0x1 << 4)
1180#define RT5616_EQ_BPF4_SFT                      4
1181#define RT5616_EQ_BPF4_DIS                      (0x0 << 4)
1182#define RT5616_EQ_BPF4_EN                       (0x1 << 4)
1183#define RT5616_EQ_BPF3_MASK                     (0x1 << 3)
1184#define RT5616_EQ_BPF3_SFT                      3
1185#define RT5616_EQ_BPF3_DIS                      (0x0 << 3)
1186#define RT5616_EQ_BPF3_EN                       (0x1 << 3)
1187#define RT5616_EQ_BPF2_MASK                     (0x1 << 2)
1188#define RT5616_EQ_BPF2_SFT                      2
1189#define RT5616_EQ_BPF2_DIS                      (0x0 << 2)
1190#define RT5616_EQ_BPF2_EN                       (0x1 << 2)
1191#define RT5616_EQ_BPF1_MASK                     (0x1 << 1)
1192#define RT5616_EQ_BPF1_SFT                      1
1193#define RT5616_EQ_BPF1_DIS                      (0x0 << 1)
1194#define RT5616_EQ_BPF1_EN                       (0x1 << 1)
1195#define RT5616_EQ_LPF_MASK                      (0x1)
1196#define RT5616_EQ_LPF_SFT                       0
1197#define RT5616_EQ_LPF_DIS                       (0x0)
1198#define RT5616_EQ_LPF_EN                        (0x1)
1199#define RT5616_EQ_CTRL_MASK                     (0x7f)
1200
1201/* Memory Test (0xb2) */
1202#define RT5616_MT_MASK                          (0x1 << 15)
1203#define RT5616_MT_SFT                           15
1204#define RT5616_MT_DIS                           (0x0 << 15)
1205#define RT5616_MT_EN                            (0x1 << 15)
1206
1207/* DRC/AGC Control 1 (0xb4) */
1208#define RT5616_DRC_AGC_P_MASK                   (0x1 << 15)
1209#define RT5616_DRC_AGC_P_SFT                    15
1210#define RT5616_DRC_AGC_P_DAC                    (0x0 << 15)
1211#define RT5616_DRC_AGC_P_ADC                    (0x1 << 15)
1212#define RT5616_DRC_AGC_MASK                     (0x1 << 14)
1213#define RT5616_DRC_AGC_SFT                      14
1214#define RT5616_DRC_AGC_DIS                      (0x0 << 14)
1215#define RT5616_DRC_AGC_EN                       (0x1 << 14)
1216#define RT5616_DRC_AGC_UPD                      (0x1 << 13)
1217#define RT5616_DRC_AGC_UPD_BIT                  13
1218#define RT5616_DRC_AGC_AR_MASK                  (0x1f << 8)
1219#define RT5616_DRC_AGC_AR_SFT                   8
1220#define RT5616_DRC_AGC_R_MASK                   (0x7 << 5)
1221#define RT5616_DRC_AGC_R_SFT                    5
1222#define RT5616_DRC_AGC_R_48K                    (0x1 << 5)
1223#define RT5616_DRC_AGC_R_96K                    (0x2 << 5)
1224#define RT5616_DRC_AGC_R_192K                   (0x3 << 5)
1225#define RT5616_DRC_AGC_R_441K                   (0x5 << 5)
1226#define RT5616_DRC_AGC_R_882K                   (0x6 << 5)
1227#define RT5616_DRC_AGC_R_1764K                  (0x7 << 5)
1228#define RT5616_DRC_AGC_RC_MASK                  (0x1f)
1229#define RT5616_DRC_AGC_RC_SFT                   0
1230
1231/* DRC/AGC Control 2 (0xb5) */
1232#define RT5616_DRC_AGC_POB_MASK                 (0x3f << 8)
1233#define RT5616_DRC_AGC_POB_SFT                  8
1234#define RT5616_DRC_AGC_CP_MASK                  (0x1 << 7)
1235#define RT5616_DRC_AGC_CP_SFT                   7
1236#define RT5616_DRC_AGC_CP_DIS                   (0x0 << 7)
1237#define RT5616_DRC_AGC_CP_EN                    (0x1 << 7)
1238#define RT5616_DRC_AGC_CPR_MASK                 (0x3 << 5)
1239#define RT5616_DRC_AGC_CPR_SFT                  5
1240#define RT5616_DRC_AGC_CPR_1_1                  (0x0 << 5)
1241#define RT5616_DRC_AGC_CPR_1_2                  (0x1 << 5)
1242#define RT5616_DRC_AGC_CPR_1_3                  (0x2 << 5)
1243#define RT5616_DRC_AGC_CPR_1_4                  (0x3 << 5)
1244#define RT5616_DRC_AGC_PRB_MASK                 (0x1f)
1245#define RT5616_DRC_AGC_PRB_SFT                  0
1246
1247/* DRC/AGC Control 3 (0xb6) */
1248#define RT5616_DRC_AGC_NGB_MASK                 (0xf << 12)
1249#define RT5616_DRC_AGC_NGB_SFT                  12
1250#define RT5616_DRC_AGC_TAR_MASK                 (0x1f << 7)
1251#define RT5616_DRC_AGC_TAR_SFT                  7
1252#define RT5616_DRC_AGC_NG_MASK                  (0x1 << 6)
1253#define RT5616_DRC_AGC_NG_SFT                   6
1254#define RT5616_DRC_AGC_NG_DIS                   (0x0 << 6)
1255#define RT5616_DRC_AGC_NG_EN                    (0x1 << 6)
1256#define RT5616_DRC_AGC_NGH_MASK                 (0x1 << 5)
1257#define RT5616_DRC_AGC_NGH_SFT                  5
1258#define RT5616_DRC_AGC_NGH_DIS                  (0x0 << 5)
1259#define RT5616_DRC_AGC_NGH_EN                   (0x1 << 5)
1260#define RT5616_DRC_AGC_NGT_MASK                 (0x1f)
1261#define RT5616_DRC_AGC_NGT_SFT                  0
1262
1263/* Jack Detect Control 1 (0xbb) */
1264#define RT5616_JD_MASK                          (0x7 << 13)
1265#define RT5616_JD_SFT                           13
1266#define RT5616_JD_DIS                           (0x0 << 13)
1267#define RT5616_JD_GPIO1                         (0x1 << 13)
1268#define RT5616_JD_GPIO2                         (0x2 << 13)
1269#define RT5616_JD_GPIO3                         (0x3 << 13)
1270#define RT5616_JD_GPIO4                         (0x4 << 13)
1271#define RT5616_JD_GPIO5                         (0x5 << 13)
1272#define RT5616_JD_GPIO6                         (0x6 << 13)
1273#define RT5616_JD_HP_MASK                       (0x1 << 11)
1274#define RT5616_JD_HP_SFT                        11
1275#define RT5616_JD_HP_DIS                        (0x0 << 11)
1276#define RT5616_JD_HP_EN                         (0x1 << 11)
1277#define RT5616_JD_HP_TRG_MASK                   (0x1 << 10)
1278#define RT5616_JD_HP_TRG_SFT                    10
1279#define RT5616_JD_HP_TRG_LO                     (0x0 << 10)
1280#define RT5616_JD_HP_TRG_HI                     (0x1 << 10)
1281#define RT5616_JD_SPL_MASK                      (0x1 << 9)
1282#define RT5616_JD_SPL_SFT                       9
1283#define RT5616_JD_SPL_DIS                       (0x0 << 9)
1284#define RT5616_JD_SPL_EN                        (0x1 << 9)
1285#define RT5616_JD_SPL_TRG_MASK                  (0x1 << 8)
1286#define RT5616_JD_SPL_TRG_SFT                   8
1287#define RT5616_JD_SPL_TRG_LO                    (0x0 << 8)
1288#define RT5616_JD_SPL_TRG_HI                    (0x1 << 8)
1289#define RT5616_JD_SPR_MASK                      (0x1 << 7)
1290#define RT5616_JD_SPR_SFT                       7
1291#define RT5616_JD_SPR_DIS                       (0x0 << 7)
1292#define RT5616_JD_SPR_EN                        (0x1 << 7)
1293#define RT5616_JD_SPR_TRG_MASK                  (0x1 << 6)
1294#define RT5616_JD_SPR_TRG_SFT                   6
1295#define RT5616_JD_SPR_TRG_LO                    (0x0 << 6)
1296#define RT5616_JD_SPR_TRG_HI                    (0x1 << 6)
1297#define RT5616_JD_LO_MASK                       (0x1 << 3)
1298#define RT5616_JD_LO_SFT                        3
1299#define RT5616_JD_LO_DIS                        (0x0 << 3)
1300#define RT5616_JD_LO_EN                         (0x1 << 3)
1301#define RT5616_JD_LO_TRG_MASK                   (0x1 << 2)
1302#define RT5616_JD_LO_TRG_SFT                    2
1303#define RT5616_JD_LO_TRG_LO                     (0x0 << 2)
1304#define RT5616_JD_LO_TRG_HI                     (0x1 << 2)
1305
1306/* Jack Detect Control 2 (0xbc) */
1307#define RT5616_JD_TRG_SEL_MASK                  (0x7 << 9)
1308#define RT5616_JD_TRG_SEL_SFT                   9
1309#define RT5616_JD_TRG_SEL_GPIO                  (0x0 << 9)
1310#define RT5616_JD_TRG_SEL_JD1_1                 (0x1 << 9)
1311#define RT5616_JD_TRG_SEL_JD1_2                 (0x2 << 9)
1312#define RT5616_JD_TRG_SEL_JD2                   (0x3 << 9)
1313#define RT5616_JD_TRG_SEL_JD3                   (0x4 << 9)
1314#define RT5616_JD3_IRQ_EN                       (0x1 << 8)
1315#define RT5616_JD3_IRQ_EN_SFT                   8
1316#define RT5616_JD3_EN_STKY                      (0x1 << 7)
1317#define RT5616_JD3_EN_STKY_SFT                  7
1318#define RT5616_JD3_INV                          (0x1 << 6)
1319#define RT5616_JD3_INV_SFT                      6
1320
1321/* IRQ Control 1 (0xbd) */
1322#define RT5616_IRQ_JD_MASK                      (0x1 << 15)
1323#define RT5616_IRQ_JD_SFT                       15
1324#define RT5616_IRQ_JD_BP                        (0x0 << 15)
1325#define RT5616_IRQ_JD_NOR                       (0x1 << 15)
1326#define RT5616_JD_STKY_MASK                     (0x1 << 13)
1327#define RT5616_JD_STKY_SFT                      13
1328#define RT5616_JD_STKY_DIS                      (0x0 << 13)
1329#define RT5616_JD_STKY_EN                       (0x1 << 13)
1330#define RT5616_JD_P_MASK                        (0x1 << 11)
1331#define RT5616_JD_P_SFT                         11
1332#define RT5616_JD_P_NOR                         (0x0 << 11)
1333#define RT5616_JD_P_INV                         (0x1 << 11)
1334#define RT5616_JD1_1_IRQ_EN                     (0x1 << 9)
1335#define RT5616_JD1_1_IRQ_EN_SFT                 9
1336#define RT5616_JD1_1_EN_STKY                    (0x1 << 8)
1337#define RT5616_JD1_1_EN_STKY_SFT                        8
1338#define RT5616_JD1_1_INV                        (0x1 << 7)
1339#define RT5616_JD1_1_INV_SFT                    7
1340#define RT5616_JD1_2_IRQ_EN                     (0x1 << 6)
1341#define RT5616_JD1_2_IRQ_EN_SFT                 6
1342#define RT5616_JD1_2_EN_STKY                    (0x1 << 5)
1343#define RT5616_JD1_2_EN_STKY_SFT                        5
1344#define RT5616_JD1_2_INV                        (0x1 << 4)
1345#define RT5616_JD1_2_INV_SFT                    4
1346#define RT5616_JD2_IRQ_EN                       (0x1 << 3)
1347#define RT5616_JD2_IRQ_EN_SFT                   3
1348#define RT5616_JD2_EN_STKY                      (0x1 << 2)
1349#define RT5616_JD2_EN_STKY_SFT                  2
1350#define RT5616_JD2_INV                          (0x1 << 1)
1351#define RT5616_JD2_INV_SFT                      1
1352
1353/* IRQ Control 2 (0xbe) */
1354#define RT5616_IRQ_MB1_OC_MASK                  (0x1 << 15)
1355#define RT5616_IRQ_MB1_OC_SFT                   15
1356#define RT5616_IRQ_MB1_OC_BP                    (0x0 << 15)
1357#define RT5616_IRQ_MB1_OC_NOR                   (0x1 << 15)
1358#define RT5616_MB1_OC_STKY_MASK                 (0x1 << 11)
1359#define RT5616_MB1_OC_STKY_SFT                  11
1360#define RT5616_MB1_OC_STKY_DIS                  (0x0 << 11)
1361#define RT5616_MB1_OC_STKY_EN                   (0x1 << 11)
1362#define RT5616_MB1_OC_P_MASK                    (0x1 << 7)
1363#define RT5616_MB1_OC_P_SFT                     7
1364#define RT5616_MB1_OC_P_NOR                     (0x0 << 7)
1365#define RT5616_MB1_OC_P_INV                     (0x1 << 7)
1366#define RT5616_MB2_OC_P_MASK                    (0x1 << 6)
1367#define RT5616_MB1_OC_CLR                       (0x1 << 3)
1368#define RT5616_MB1_OC_CLR_SFT                   3
1369#define RT5616_STA_GPIO8                        (0x1)
1370#define RT5616_STA_GPIO8_BIT                    0
1371
1372/* Internal Status and GPIO status (0xbf) */
1373#define RT5616_STA_JD3                          (0x1 << 15)
1374#define RT5616_STA_JD3_BIT                      15
1375#define RT5616_STA_JD2                          (0x1 << 14)
1376#define RT5616_STA_JD2_BIT                      14
1377#define RT5616_STA_JD1_2                        (0x1 << 13)
1378#define RT5616_STA_JD1_2_BIT                    13
1379#define RT5616_STA_JD1_1                        (0x1 << 12)
1380#define RT5616_STA_JD1_1_BIT                    12
1381#define RT5616_STA_GP7                          (0x1 << 11)
1382#define RT5616_STA_GP7_BIT                      11
1383#define RT5616_STA_GP6                          (0x1 << 10)
1384#define RT5616_STA_GP6_BIT                      10
1385#define RT5616_STA_GP5                          (0x1 << 9)
1386#define RT5616_STA_GP5_BIT                      9
1387#define RT5616_STA_GP1                          (0x1 << 8)
1388#define RT5616_STA_GP1_BIT                      8
1389#define RT5616_STA_GP2                          (0x1 << 7)
1390#define RT5616_STA_GP2_BIT                      7
1391#define RT5616_STA_GP3                          (0x1 << 6)
1392#define RT5616_STA_GP3_BIT                      6
1393#define RT5616_STA_GP4                          (0x1 << 5)
1394#define RT5616_STA_GP4_BIT                      5
1395#define RT5616_STA_GP_JD                        (0x1 << 4)
1396#define RT5616_STA_GP_JD_BIT                    4
1397
1398/* GPIO Control 1 (0xc0) */
1399#define RT5616_GP1_PIN_MASK                     (0x1 << 15)
1400#define RT5616_GP1_PIN_SFT                      15
1401#define RT5616_GP1_PIN_GPIO1                    (0x0 << 15)
1402#define RT5616_GP1_PIN_IRQ                      (0x1 << 15)
1403#define RT5616_GP2_PIN_MASK                     (0x1 << 14)
1404#define RT5616_GP2_PIN_SFT                      14
1405#define RT5616_GP2_PIN_GPIO2                    (0x0 << 14)
1406#define RT5616_GP2_PIN_DMIC1_SCL                (0x1 << 14)
1407#define RT5616_GPIO_M_MASK                      (0x1 << 9)
1408#define RT5616_GPIO_M_SFT                       9
1409#define RT5616_GPIO_M_FLT                       (0x0 << 9)
1410#define RT5616_GPIO_M_PH                        (0x1 << 9)
1411#define RT5616_I2S2_SEL_MASK                    (0x1 << 8)
1412#define RT5616_I2S2_SEL_SFT                     8
1413#define RT5616_I2S2_SEL_I2S                     (0x0 << 8)
1414#define RT5616_I2S2_SEL_GPIO                    (0x1 << 8)
1415#define RT5616_GP5_PIN_MASK                     (0x1 << 7)
1416#define RT5616_GP5_PIN_SFT                      7
1417#define RT5616_GP5_PIN_GPIO5                    (0x0 << 7)
1418#define RT5616_GP5_PIN_IRQ                      (0x1 << 7)
1419#define RT5616_GP6_PIN_MASK                     (0x1 << 6)
1420#define RT5616_GP6_PIN_SFT                      6
1421#define RT5616_GP6_PIN_GPIO6                    (0x0 << 6)
1422#define RT5616_GP6_PIN_DMIC_SDA                 (0x1 << 6)
1423#define RT5616_GP7_PIN_MASK                     (0x1 << 5)
1424#define RT5616_GP7_PIN_SFT                      5
1425#define RT5616_GP7_PIN_GPIO7                    (0x0 << 5)
1426#define RT5616_GP7_PIN_IRQ                      (0x1 << 5)
1427#define RT5616_GP8_PIN_MASK                     (0x1 << 4)
1428#define RT5616_GP8_PIN_SFT                      4
1429#define RT5616_GP8_PIN_GPIO8                    (0x0 << 4)
1430#define RT5616_GP8_PIN_DMIC_SDA                 (0x1 << 4)
1431#define RT5616_GPIO_PDM_SEL_MASK                (0x1 << 3)
1432#define RT5616_GPIO_PDM_SEL_SFT                 3
1433#define RT5616_GPIO_PDM_SEL_GPIO                (0x0 << 3)
1434#define RT5616_GPIO_PDM_SEL_PDM                 (0x1 << 3)
1435
1436/* GPIO Control 2 (0xc1) */
1437#define RT5616_GP5_DR_MASK                      (0x1 << 14)
1438#define RT5616_GP5_DR_SFT                       14
1439#define RT5616_GP5_DR_IN                        (0x0 << 14)
1440#define RT5616_GP5_DR_OUT                       (0x1 << 14)
1441#define RT5616_GP5_OUT_MASK                     (0x1 << 13)
1442#define RT5616_GP5_OUT_SFT                      13
1443#define RT5616_GP5_OUT_LO                       (0x0 << 13)
1444#define RT5616_GP5_OUT_HI                       (0x1 << 13)
1445#define RT5616_GP5_P_MASK                       (0x1 << 12)
1446#define RT5616_GP5_P_SFT                        12
1447#define RT5616_GP5_P_NOR                        (0x0 << 12)
1448#define RT5616_GP5_P_INV                        (0x1 << 12)
1449#define RT5616_GP4_DR_MASK                      (0x1 << 11)
1450#define RT5616_GP4_DR_SFT                       11
1451#define RT5616_GP4_DR_IN                        (0x0 << 11)
1452#define RT5616_GP4_DR_OUT                       (0x1 << 11)
1453#define RT5616_GP4_OUT_MASK                     (0x1 << 10)
1454#define RT5616_GP4_OUT_SFT                      10
1455#define RT5616_GP4_OUT_LO                       (0x0 << 10)
1456#define RT5616_GP4_OUT_HI                       (0x1 << 10)
1457#define RT5616_GP4_P_MASK                       (0x1 << 9)
1458#define RT5616_GP4_P_SFT                        9
1459#define RT5616_GP4_P_NOR                        (0x0 << 9)
1460#define RT5616_GP4_P_INV                        (0x1 << 9)
1461#define RT5616_GP3_DR_MASK                      (0x1 << 8)
1462#define RT5616_GP3_DR_SFT                       8
1463#define RT5616_GP3_DR_IN                        (0x0 << 8)
1464#define RT5616_GP3_DR_OUT                       (0x1 << 8)
1465#define RT5616_GP3_OUT_MASK                     (0x1 << 7)
1466#define RT5616_GP3_OUT_SFT                      7
1467#define RT5616_GP3_OUT_LO                       (0x0 << 7)
1468#define RT5616_GP3_OUT_HI                       (0x1 << 7)
1469#define RT5616_GP3_P_MASK                       (0x1 << 6)
1470#define RT5616_GP3_P_SFT                        6
1471#define RT5616_GP3_P_NOR                        (0x0 << 6)
1472#define RT5616_GP3_P_INV                        (0x1 << 6)
1473#define RT5616_GP2_DR_MASK                      (0x1 << 5)
1474#define RT5616_GP2_DR_SFT                       5
1475#define RT5616_GP2_DR_IN                        (0x0 << 5)
1476#define RT5616_GP2_DR_OUT                       (0x1 << 5)
1477#define RT5616_GP2_OUT_MASK                     (0x1 << 4)
1478#define RT5616_GP2_OUT_SFT                      4
1479#define RT5616_GP2_OUT_LO                       (0x0 << 4)
1480#define RT5616_GP2_OUT_HI                       (0x1 << 4)
1481#define RT5616_GP2_P_MASK                       (0x1 << 3)
1482#define RT5616_GP2_P_SFT                        3
1483#define RT5616_GP2_P_NOR                        (0x0 << 3)
1484#define RT5616_GP2_P_INV                        (0x1 << 3)
1485#define RT5616_GP1_DR_MASK                      (0x1 << 2)
1486#define RT5616_GP1_DR_SFT                       2
1487#define RT5616_GP1_DR_IN                        (0x0 << 2)
1488#define RT5616_GP1_DR_OUT                       (0x1 << 2)
1489#define RT5616_GP1_OUT_MASK                     (0x1 << 1)
1490#define RT5616_GP1_OUT_SFT                      1
1491#define RT5616_GP1_OUT_LO                       (0x0 << 1)
1492#define RT5616_GP1_OUT_HI                       (0x1 << 1)
1493#define RT5616_GP1_P_MASK                       (0x1)
1494#define RT5616_GP1_P_SFT                        0
1495#define RT5616_GP1_P_NOR                        (0x0)
1496#define RT5616_GP1_P_INV                        (0x1)
1497
1498/* GPIO Control 3 (0xc2) */
1499#define RT5616_GP8_DR_MASK                      (0x1 << 8)
1500#define RT5616_GP8_DR_SFT                       8
1501#define RT5616_GP8_DR_IN                        (0x0 << 8)
1502#define RT5616_GP8_DR_OUT                       (0x1 << 8)
1503#define RT5616_GP8_OUT_MASK                     (0x1 << 7)
1504#define RT5616_GP8_OUT_SFT                      7
1505#define RT5616_GP8_OUT_LO                       (0x0 << 7)
1506#define RT5616_GP8_OUT_HI                       (0x1 << 7)
1507#define RT5616_GP8_P_MASK                       (0x1 << 6)
1508#define RT5616_GP8_P_SFT                        6
1509#define RT5616_GP8_P_NOR                        (0x0 << 6)
1510#define RT5616_GP8_P_INV                        (0x1 << 6)
1511#define RT5616_GP7_DR_MASK                      (0x1 << 5)
1512#define RT5616_GP7_DR_SFT                       5
1513#define RT5616_GP7_DR_IN                        (0x0 << 5)
1514#define RT5616_GP7_DR_OUT                       (0x1 << 5)
1515#define RT5616_GP7_OUT_MASK                     (0x1 << 4)
1516#define RT5616_GP7_OUT_SFT                      4
1517#define RT5616_GP7_OUT_LO                       (0x0 << 4)
1518#define RT5616_GP7_OUT_HI                       (0x1 << 4)
1519#define RT5616_GP7_P_MASK                       (0x1 << 3)
1520#define RT5616_GP7_P_SFT                        3
1521#define RT5616_GP7_P_NOR                        (0x0 << 3)
1522#define RT5616_GP7_P_INV                        (0x1 << 3)
1523#define RT5616_GP6_DR_MASK                      (0x1 << 2)
1524#define RT5616_GP6_DR_SFT                       2
1525#define RT5616_GP6_DR_IN                        (0x0 << 2)
1526#define RT5616_GP6_DR_OUT                       (0x1 << 2)
1527#define RT5616_GP6_OUT_MASK                     (0x1 << 1)
1528#define RT5616_GP6_OUT_SFT                      1
1529#define RT5616_GP6_OUT_LO                       (0x0 << 1)
1530#define RT5616_GP6_OUT_HI                       (0x1 << 1)
1531#define RT5616_GP6_P_MASK                       (0x1)
1532#define RT5616_GP6_P_SFT                        0
1533#define RT5616_GP6_P_NOR                        (0x0)
1534#define RT5616_GP6_P_INV                        (0x1)
1535
1536/* Scramble Control (0xce) */
1537#define RT5616_SCB_SWAP_MASK                    (0x1 << 15)
1538#define RT5616_SCB_SWAP_SFT                     15
1539#define RT5616_SCB_SWAP_DIS                     (0x0 << 15)
1540#define RT5616_SCB_SWAP_EN                      (0x1 << 15)
1541#define RT5616_SCB_MASK                         (0x1 << 14)
1542#define RT5616_SCB_SFT                          14
1543#define RT5616_SCB_DIS                          (0x0 << 14)
1544#define RT5616_SCB_EN                           (0x1 << 14)
1545
1546/* Baseback Control (0xcf) */
1547#define RT5616_BB_MASK                          (0x1 << 15)
1548#define RT5616_BB_SFT                           15
1549#define RT5616_BB_DIS                           (0x0 << 15)
1550#define RT5616_BB_EN                            (0x1 << 15)
1551#define RT5616_BB_CT_MASK                       (0x7 << 12)
1552#define RT5616_BB_CT_SFT                        12
1553#define RT5616_BB_CT_A                          (0x0 << 12)
1554#define RT5616_BB_CT_B                          (0x1 << 12)
1555#define RT5616_BB_CT_C                          (0x2 << 12)
1556#define RT5616_BB_CT_D                          (0x3 << 12)
1557#define RT5616_M_BB_L_MASK                      (0x1 << 9)
1558#define RT5616_M_BB_L_SFT                       9
1559#define RT5616_M_BB_R_MASK                      (0x1 << 8)
1560#define RT5616_M_BB_R_SFT                       8
1561#define RT5616_M_BB_HPF_L_MASK                  (0x1 << 7)
1562#define RT5616_M_BB_HPF_L_SFT                   7
1563#define RT5616_M_BB_HPF_R_MASK                  (0x1 << 6)
1564#define RT5616_M_BB_HPF_R_SFT                   6
1565#define RT5616_G_BB_BST_MASK                    (0x3f)
1566#define RT5616_G_BB_BST_SFT                     0
1567
1568/* MP3 Plus Control 1 (0xd0) */
1569#define RT5616_M_MP3_L_MASK                     (0x1 << 15)
1570#define RT5616_M_MP3_L_SFT                      15
1571#define RT5616_M_MP3_R_MASK                     (0x1 << 14)
1572#define RT5616_M_MP3_R_SFT                      14
1573#define RT5616_M_MP3_MASK                       (0x1 << 13)
1574#define RT5616_M_MP3_SFT                        13
1575#define RT5616_M_MP3_DIS                        (0x0 << 13)
1576#define RT5616_M_MP3_EN                         (0x1 << 13)
1577#define RT5616_EG_MP3_MASK                      (0x1f << 8)
1578#define RT5616_EG_MP3_SFT                       8
1579#define RT5616_MP3_HLP_MASK                     (0x1 << 7)
1580#define RT5616_MP3_HLP_SFT                      7
1581#define RT5616_MP3_HLP_DIS                      (0x0 << 7)
1582#define RT5616_MP3_HLP_EN                       (0x1 << 7)
1583#define RT5616_M_MP3_ORG_L_MASK                 (0x1 << 6)
1584#define RT5616_M_MP3_ORG_L_SFT                  6
1585#define RT5616_M_MP3_ORG_R_MASK                 (0x1 << 5)
1586#define RT5616_M_MP3_ORG_R_SFT                  5
1587
1588/* MP3 Plus Control 2 (0xd1) */
1589#define RT5616_MP3_WT_MASK                      (0x1 << 13)
1590#define RT5616_MP3_WT_SFT                       13
1591#define RT5616_MP3_WT_1_4                       (0x0 << 13)
1592#define RT5616_MP3_WT_1_2                       (0x1 << 13)
1593#define RT5616_OG_MP3_MASK                      (0x1f << 8)
1594#define RT5616_OG_MP3_SFT                       8
1595#define RT5616_HG_MP3_MASK                      (0x3f)
1596#define RT5616_HG_MP3_SFT                       0
1597
1598/* 3D HP Control 1 (0xd2) */
1599#define RT5616_3D_CF_MASK                       (0x1 << 15)
1600#define RT5616_3D_CF_SFT                        15
1601#define RT5616_3D_CF_DIS                        (0x0 << 15)
1602#define RT5616_3D_CF_EN                         (0x1 << 15)
1603#define RT5616_3D_HP_MASK                       (0x1 << 14)
1604#define RT5616_3D_HP_SFT                        14
1605#define RT5616_3D_HP_DIS                        (0x0 << 14)
1606#define RT5616_3D_HP_EN                         (0x1 << 14)
1607#define RT5616_3D_BT_MASK                       (0x1 << 13)
1608#define RT5616_3D_BT_SFT                        13
1609#define RT5616_3D_BT_DIS                        (0x0 << 13)
1610#define RT5616_3D_BT_EN                         (0x1 << 13)
1611#define RT5616_3D_1F_MIX_MASK                   (0x3 << 11)
1612#define RT5616_3D_1F_MIX_SFT                    11
1613#define RT5616_3D_HP_M_MASK                     (0x1 << 10)
1614#define RT5616_3D_HP_M_SFT                      10
1615#define RT5616_3D_HP_M_SUR                      (0x0 << 10)
1616#define RT5616_3D_HP_M_FRO                      (0x1 << 10)
1617#define RT5616_M_3D_HRTF_MASK                   (0x1 << 9)
1618#define RT5616_M_3D_HRTF_SFT                    9
1619#define RT5616_M_3D_D2H_MASK                    (0x1 << 8)
1620#define RT5616_M_3D_D2H_SFT                     8
1621#define RT5616_M_3D_D2R_MASK                    (0x1 << 7)
1622#define RT5616_M_3D_D2R_SFT                     7
1623#define RT5616_M_3D_REVB_MASK                   (0x1 << 6)
1624#define RT5616_M_3D_REVB_SFT                    6
1625
1626/* Adjustable high pass filter control 1 (0xd3) */
1627#define RT5616_2ND_HPF_MASK                     (0x1 << 15)
1628#define RT5616_2ND_HPF_SFT                      15
1629#define RT5616_2ND_HPF_DIS                      (0x0 << 15)
1630#define RT5616_2ND_HPF_EN                       (0x1 << 15)
1631#define RT5616_HPF_CF_L_MASK                    (0x7 << 12)
1632#define RT5616_HPF_CF_L_SFT                     12
1633#define RT5616_HPF_CF_R_MASK                    (0x7 << 8)
1634#define RT5616_HPF_CF_R_SFT                     8
1635#define RT5616_ZD_T_MASK                        (0x3 << 6)
1636#define RT5616_ZD_T_SFT                         6
1637#define RT5616_ZD_F_MASK                        (0x3 << 4)
1638#define RT5616_ZD_F_SFT                         4
1639#define RT5616_ZD_F_IM                          (0x0 << 4)
1640#define RT5616_ZD_F_ZC_IM                       (0x1 << 4)
1641#define RT5616_ZD_F_ZC_IOD                      (0x2 << 4)
1642#define RT5616_ZD_F_UN                          (0x3 << 4)
1643
1644/* Adjustable high pass filter control 2 (0xd4) */
1645#define RT5616_HPF_CF_L_NUM_MASK                (0x3f << 8)
1646#define RT5616_HPF_CF_L_NUM_SFT                 8
1647#define RT5616_HPF_CF_R_NUM_MASK                (0x3f)
1648#define RT5616_HPF_CF_R_NUM_SFT                 0
1649
1650/* HP calibration control and Amp detection (0xd6) */
1651#define RT5616_SI_DAC_MASK                      (0x1 << 11)
1652#define RT5616_SI_DAC_SFT                       11
1653#define RT5616_SI_DAC_AUTO                      (0x0 << 11)
1654#define RT5616_SI_DAC_TEST                      (0x1 << 11)
1655#define RT5616_DC_CAL_M_MASK                    (0x1 << 10)
1656#define RT5616_DC_CAL_M_SFT                     10
1657#define RT5616_DC_CAL_M_NOR                     (0x0 << 10)
1658#define RT5616_DC_CAL_M_CAL                     (0x1 << 10)
1659#define RT5616_DC_CAL_MASK                      (0x1 << 9)
1660#define RT5616_DC_CAL_SFT                       9
1661#define RT5616_DC_CAL_DIS                       (0x0 << 9)
1662#define RT5616_DC_CAL_EN                        (0x1 << 9)
1663#define RT5616_HPD_RCV_MASK                     (0x7 << 6)
1664#define RT5616_HPD_RCV_SFT                      6
1665#define RT5616_HPD_PS_MASK                      (0x1 << 5)
1666#define RT5616_HPD_PS_SFT                       5
1667#define RT5616_HPD_PS_DIS                       (0x0 << 5)
1668#define RT5616_HPD_PS_EN                        (0x1 << 5)
1669#define RT5616_CAL_M_MASK                       (0x1 << 4)
1670#define RT5616_CAL_M_SFT                        4
1671#define RT5616_CAL_M_DEP                        (0x0 << 4)
1672#define RT5616_CAL_M_CAL                        (0x1 << 4)
1673#define RT5616_CAL_MASK                         (0x1 << 3)
1674#define RT5616_CAL_SFT                          3
1675#define RT5616_CAL_DIS                          (0x0 << 3)
1676#define RT5616_CAL_EN                           (0x1 << 3)
1677#define RT5616_CAL_TEST_MASK                    (0x1 << 2)
1678#define RT5616_CAL_TEST_SFT                     2
1679#define RT5616_CAL_TEST_DIS                     (0x0 << 2)
1680#define RT5616_CAL_TEST_EN                      (0x1 << 2)
1681#define RT5616_CAL_P_MASK                       (0x3)
1682#define RT5616_CAL_P_SFT                        0
1683#define RT5616_CAL_P_NONE                       (0x0)
1684#define RT5616_CAL_P_CAL                        (0x1)
1685#define RT5616_CAL_P_DAC_CAL                    (0x2)
1686
1687/* Soft volume and zero cross control 1 (0xd9) */
1688#define RT5616_SV_MASK                          (0x1 << 15)
1689#define RT5616_SV_SFT                           15
1690#define RT5616_SV_DIS                           (0x0 << 15)
1691#define RT5616_SV_EN                            (0x1 << 15)
1692#define RT5616_OUT_SV_MASK                      (0x1 << 13)
1693#define RT5616_OUT_SV_SFT                       13
1694#define RT5616_OUT_SV_DIS                       (0x0 << 13)
1695#define RT5616_OUT_SV_EN                        (0x1 << 13)
1696#define RT5616_HP_SV_MASK                       (0x1 << 12)
1697#define RT5616_HP_SV_SFT                        12
1698#define RT5616_HP_SV_DIS                        (0x0 << 12)
1699#define RT5616_HP_SV_EN                         (0x1 << 12)
1700#define RT5616_ZCD_DIG_MASK                     (0x1 << 11)
1701#define RT5616_ZCD_DIG_SFT                      11
1702#define RT5616_ZCD_DIG_DIS                      (0x0 << 11)
1703#define RT5616_ZCD_DIG_EN                       (0x1 << 11)
1704#define RT5616_ZCD_MASK                         (0x1 << 10)
1705#define RT5616_ZCD_SFT                          10
1706#define RT5616_ZCD_PD                           (0x0 << 10)
1707#define RT5616_ZCD_PU                           (0x1 << 10)
1708#define RT5616_M_ZCD_MASK                       (0x3f << 4)
1709#define RT5616_M_ZCD_SFT                        4
1710#define RT5616_M_ZCD_OM_L                       (0x1 << 7)
1711#define RT5616_M_ZCD_OM_R                       (0x1 << 6)
1712#define RT5616_M_ZCD_RM_L                       (0x1 << 5)
1713#define RT5616_M_ZCD_RM_R                       (0x1 << 4)
1714#define RT5616_SV_DLY_MASK                      (0xf)
1715#define RT5616_SV_DLY_SFT                       0
1716
1717/* Soft volume and zero cross control 2 (0xda) */
1718#define RT5616_ZCD_HP_MASK                      (0x1 << 15)
1719#define RT5616_ZCD_HP_SFT                       15
1720#define RT5616_ZCD_HP_DIS                       (0x0 << 15)
1721#define RT5616_ZCD_HP_EN                        (0x1 << 15)
1722
1723/* Digital Misc Control (0xfa) */
1724#define RT5616_I2S2_MS_SP_MASK                  (0x1 << 8)
1725#define RT5616_I2S2_MS_SP_SEL                   8
1726#define RT5616_I2S2_MS_SP_64                    (0x0 << 8)
1727#define RT5616_I2S2_MS_SP_50                    (0x1 << 8)
1728#define RT5616_CLK_DET_EN                       (0x1 << 3)
1729#define RT5616_CLK_DET_EN_SFT                   3
1730#define RT5616_AMP_DET_EN                       (0x1 << 1)
1731#define RT5616_AMP_DET_EN_SFT                   1
1732#define RT5616_D_GATE_EN                        (0x1)
1733#define RT5616_D_GATE_EN_SFT                    0
1734
1735/* Codec Private Register definition */
1736/* 3D Speaker Control (0x63) */
1737#define RT5616_3D_SPK_MASK                      (0x1 << 15)
1738#define RT5616_3D_SPK_SFT                       15
1739#define RT5616_3D_SPK_DIS                       (0x0 << 15)
1740#define RT5616_3D_SPK_EN                        (0x1 << 15)
1741#define RT5616_3D_SPK_M_MASK                    (0x3 << 13)
1742#define RT5616_3D_SPK_M_SFT                     13
1743#define RT5616_3D_SPK_CG_MASK                   (0x1f << 8)
1744#define RT5616_3D_SPK_CG_SFT                    8
1745#define RT5616_3D_SPK_SG_MASK                   (0x1f)
1746#define RT5616_3D_SPK_SG_SFT                    0
1747
1748/* Wind Noise Detection Control 1 (0x6c) */
1749#define RT5616_WND_MASK                         (0x1 << 15)
1750#define RT5616_WND_SFT                          15
1751#define RT5616_WND_DIS                          (0x0 << 15)
1752#define RT5616_WND_EN                           (0x1 << 15)
1753
1754/* Wind Noise Detection Control 2 (0x6d) */
1755#define RT5616_WND_FC_NW_MASK                   (0x3f << 10)
1756#define RT5616_WND_FC_NW_SFT                    10
1757#define RT5616_WND_FC_WK_MASK                   (0x3f << 4)
1758#define RT5616_WND_FC_WK_SFT                    4
1759
1760/* Wind Noise Detection Control 3 (0x6e) */
1761#define RT5616_HPF_FC_MASK                      (0x3f << 6)
1762#define RT5616_HPF_FC_SFT                       6
1763#define RT5616_WND_FC_ST_MASK                   (0x3f)
1764#define RT5616_WND_FC_ST_SFT                    0
1765
1766/* Wind Noise Detection Control 4 (0x6f) */
1767#define RT5616_WND_TH_LO_MASK                   (0x3ff)
1768#define RT5616_WND_TH_LO_SFT                    0
1769
1770/* Wind Noise Detection Control 5 (0x70) */
1771#define RT5616_WND_TH_HI_MASK                   (0x3ff)
1772#define RT5616_WND_TH_HI_SFT                    0
1773
1774/* Wind Noise Detection Control 8 (0x73) */
1775#define RT5616_WND_WIND_MASK                    (0x1 << 13) /* Read-Only */
1776#define RT5616_WND_WIND_SFT                     13
1777#define RT5616_WND_STRONG_MASK                  (0x1 << 12) /* Read-Only */
1778#define RT5616_WND_STRONG_SFT                   12
1779enum {
1780        RT5616_NO_WIND,
1781        RT5616_BREEZE,
1782        RT5616_STORM,
1783};
1784
1785/* Dipole Speaker Interface (0x75) */
1786#define RT5616_DP_ATT_MASK                      (0x3 << 14)
1787#define RT5616_DP_ATT_SFT                       14
1788#define RT5616_DP_SPK_MASK                      (0x1 << 10)
1789#define RT5616_DP_SPK_SFT                       10
1790#define RT5616_DP_SPK_DIS                       (0x0 << 10)
1791#define RT5616_DP_SPK_EN                        (0x1 << 10)
1792
1793/* EQ Pre Volume Control (0xb3) */
1794#define RT5616_EQ_PRE_VOL_MASK                  (0xffff)
1795#define RT5616_EQ_PRE_VOL_SFT                   0
1796
1797/* EQ Post Volume Control (0xb4) */
1798#define RT5616_EQ_PST_VOL_MASK                  (0xffff)
1799#define RT5616_EQ_PST_VOL_SFT                   0
1800
1801/* System Clock Source */
1802enum {
1803        RT5616_SCLK_S_MCLK,
1804        RT5616_SCLK_S_PLL1,
1805};
1806
1807/* PLL1 Source */
1808enum {
1809        RT5616_PLL1_S_MCLK,
1810        RT5616_PLL1_S_BCLK1,
1811        RT5616_PLL1_S_BCLK2,
1812};
1813
1814enum {
1815        RT5616_AIF1,
1816        RT5616_AIFS,
1817};
1818
1819#endif /* __RT5616_H__ */
1820