LXR linux/arch/arm/mach-socfpga/platsmp.c

   1/*
   2 * Copyright 2010-2011 Calxeda, Inc.
   3 * Copyright 2012 Pavel Machek <pavel@denx.de>
   4 * Based on platsmp.c, Copyright (C) 2002 ARM Ltd.
   5 * Copyright (C) 2012 Altera Corporation
   6 *
   7 * This program is free software; you can redistribute it and/or modify it
   8 * under the terms and conditions of the GNU General Public License,
   9 * version 2, as published by the Free Software Foundation.
  10 *
  11 * This program is distributed in the hope it will be useful, but WITHOUT
  12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14 * more details.
  15 *
  16 * You should have received a copy of the GNU General Public License along with
  17 * this program.  If not, see <http://www.gnu.org/licenses/>.
  18 */
  19#include <linux/delay.h>
  20#include <linux/init.h>
  21#include <linux/smp.h>
  22#include <linux/io.h>
  23#include <linux/of.h>
  24#include <linux/of_address.h>
  25
  26#include <asm/cacheflush.h>
  27#include <asm/smp_scu.h>
  28#include <asm/smp_plat.h>
  29
  30#include "core.h"
  31
  32static int socfpga_boot_secondary(unsigned int cpu, struct task_struct *idle)
  33{
  34        int trampoline_size = &secondary_trampoline_end - &secondary_trampoline;
  35
  36        if (socfpga_cpu1start_addr) {
  37                /* This will put CPU #1 into reset. */
  38                writel(RSTMGR_MPUMODRST_CPU1,
  39                       rst_manager_base_addr + SOCFPGA_RSTMGR_MODMPURST);
  40
  41                memcpy(phys_to_virt(0), &secondary_trampoline, trampoline_size);
  42
  43                writel(virt_to_phys(secondary_startup),
  44                       sys_manager_base_addr + (socfpga_cpu1start_addr & 0x000000ff));
  45
  46                flush_cache_all();
  47                smp_wmb();
  48                outer_clean_range(0, trampoline_size);
  49
  50                /* This will release CPU #1 out of reset. */
  51                writel(0, rst_manager_base_addr + SOCFPGA_RSTMGR_MODMPURST);
  52        }
  53
  54        return 0;
  55}
  56
  57static int socfpga_a10_boot_secondary(unsigned int cpu, struct task_struct *idle)
  58{
  59        int trampoline_size = &secondary_trampoline_end - &secondary_trampoline;
  60
  61        if (socfpga_cpu1start_addr) {
  62                writel(RSTMGR_MPUMODRST_CPU1, rst_manager_base_addr +
  63                       SOCFPGA_A10_RSTMGR_MODMPURST);
  64                memcpy(phys_to_virt(0), &secondary_trampoline, trampoline_size);
  65
  66                writel(virt_to_phys(secondary_startup),
  67                       sys_manager_base_addr + (socfpga_cpu1start_addr & 0x00000fff));
  68
  69                flush_cache_all();
  70                smp_wmb();
  71                outer_clean_range(0, trampoline_size);
  72
  73                /* This will release CPU #1 out of reset. */
  74                writel(0, rst_manager_base_addr + SOCFPGA_A10_RSTMGR_MODMPURST);
  75        }
  76
  77        return 0;
  78}
  79
  80static void __init socfpga_smp_prepare_cpus(unsigned int max_cpus)
  81{
  82        struct device_node *np;
  83        void __iomem *socfpga_scu_base_addr;
  84
  85        np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu");
  86        if (!np) {
  87                pr_err("%s: missing scu\n", __func__);
  88                return;
  89        }
  90
  91        socfpga_scu_base_addr = of_iomap(np, 0);
  92        if (!socfpga_scu_base_addr)
  93                return;
  94        scu_enable(socfpga_scu_base_addr);
  95}
  96
  97/*
  98 * platform-specific code to shutdown a CPU
  99 *
 100 * Called with IRQs disabled
 101 */
 102static void socfpga_cpu_die(unsigned int cpu)
 103{
 104        /* Do WFI. If we wake up early, go back into WFI */
 105        while (1)
 106                cpu_do_idle();
 107}
 108
 109static struct smp_operations socfpga_smp_ops __initdata = {
 110        .smp_prepare_cpus       = socfpga_smp_prepare_cpus,
 111        .smp_boot_secondary     = socfpga_boot_secondary,
 112#ifdef CONFIG_HOTPLUG_CPU
 113        .cpu_die                = socfpga_cpu_die,
 114#endif
 115};
 116
 117static struct smp_operations socfpga_a10_smp_ops __initdata = {
 118        .smp_prepare_cpus       = socfpga_smp_prepare_cpus,
 119        .smp_boot_secondary     = socfpga_a10_boot_secondary,
 120#ifdef CONFIG_HOTPLUG_CPU
 121        .cpu_die                = socfpga_cpu_die,
 122#endif
 123};
 124
 125CPU_METHOD_OF_DECLARE(socfpga_smp, "altr,socfpga-smp", &socfpga_smp_ops);
 126CPU_METHOD_OF_DECLARE(socfpga_a10_smp, "altr,socfpga-a10-smp", &socfpga_a10_smp_ops);
 127